An integrated circuit firmware upgrade method, device, equipment and medium

Abstract

This application discloses a method, apparatus, device, and medium for upgrading integrated circuit firmware, belonging to the field of server technology. The method includes: receiving an instruction to upgrade the firmware of any signal enhancement integrated circuit; determining the signal enhancement integrated circuit to be upgraded based on the model information of the signal enhancement integrated circuit; loading a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via a logic element; obtaining a second firmware file; and writing the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via a first substrate management controller and the logic element to replace the first firmware file. This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit, provides a new firmware upgrade method for signal enhancement integrated circuits, and improves the efficiency of integrated circuit firmware upgrades.

Description

Technical Field

[0001] This application relates to the field of server technology, and in particular to an integrated circuit firmware upgrade method, apparatus, device and medium. Background Technology

[0002] With the rapid development of big data, artificial intelligence, cloud computing and other fields, the demand for high-speed hardware data interaction within servers has become increasingly urgent; the speed of information interaction between server hardware has once again leaped forward, and the high-speed PCIe protocol has become the mainstream solution for server buses, and the performance, computing power and functions of servers are all related to PCIe devices.

[0003] For firmware upgrades of signal enhancement integrated circuits, such as Figure 1 As shown, the relevant technology upgrades the signal enhancement integrated circuit (Retimer) by upgrading the corresponding read-only memory via the I2C bus. However, for Retimer integrated circuits from different manufacturers, the Baseboard Management Controller (BMC) needs to develop and integrate different software development SDK tools to manage the Retimer integrated circuits, resulting in a long development cycle. Furthermore, since there is currently no direct connection between the server BMC and the electrically erasable programmable read-only memory (EEPROM), it is necessary to indirectly read and write the read-only memory through the Retimer integrated circuit. Therefore, upgrading the firmware of multiple signal enhancement integrated circuits can take several hours, which is time-consuming and risky, affecting the efficiency of production and customer use. Summary of the Invention

[0004] To overcome the aforementioned technical deficiencies, the purpose of this application is to provide an integrated circuit firmware upgrade method, apparatus, device, and medium. The method includes: receiving an instruction to upgrade the firmware of any signal enhancement integrated circuit; the instruction including the model information of the signal enhancement integrated circuit to be upgraded; a logic element determining the signal enhancement integrated circuit to be upgraded based on the model information; loading a first firmware file from a storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element; obtaining a second firmware file, the second firmware file being used to upgrade the signal enhancement integrated circuit to be upgraded; and writing the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via a first substrate management controller and the logic element, replacing the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded. This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit, provides a new firmware upgrade approach for signal enhancement integrated circuits, and improves the efficiency of integrated circuit firmware upgrades.

[0005] The specific technical solutions provided in this application are as follows:

[0006] In a first aspect, this application provides an integrated circuit firmware upgrade method. The method is applied to a firmware upgrade system, which includes a plurality of signal enhancement integrated circuits, a first substrate management controller, logic elements, and a plurality of storage media. The first substrate management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to the plurality of storage media, the first substrate management controller is connected to the logic elements, and each signal enhancement integrated circuit corresponds one-to-one with a storage media. The method includes:

[0007] The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0008] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0009] The first firmware file is loaded from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element.

[0010] Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0011] The second firmware file is written to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0012] In one embodiment, the firmware upgrade system includes a power module, the output terminal of the logic element is connected to the input terminal of the power module, the output terminal of the power module is connected to the input terminals of the plurality of signal enhancement integrated circuits, and loading a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes:

[0013] The power module powers on the signal enhancement integrated circuit to be upgraded with firmware.

[0014] The logic element creates a serial peripheral interface signal channel between the signal enhancement integrated circuit and the storage medium corresponding to the signal enhancement integrated circuit to be upgraded.

[0015] The first firmware file is loaded through the signal enhancement integrated circuit to be upgraded, and the first firmware file in the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is read through the serial peripheral interface signal channel.

[0016] Determine whether there is signal transmission in the serial peripheral interface signal channel;

[0017] If not, modify the register value of the logic element and send the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller;

[0018] After sending the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller, the process includes:

[0019] The first baseboard management controller monitors whether the signal enhancement integrated circuit to be upgraded is successfully powered on.

[0020] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0021] In one embodiment, the firmware upgrade system includes a second baseboard management controller connected to a first baseboard management controller. The step of writing the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded, via the first baseboard management controller and the logic elements, to replace the first firmware file, includes:

[0022] The second firmware file is sent to the logic element via the second baseboard management controller and the first baseboard management controller;

[0023] The second firmware file is written to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element, thereby replacing the first firmware file;

[0024] The logic element is used to perform data verification on the storage medium corresponding to the signal enhancement integrated circuit to be upgraded.

[0025] The step of performing data verification on the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes:

[0026] Determine whether the second firmware file written to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is consistent with the second firmware file sent to the logic element;

[0027] If so, the data verification result will be displayed on the graphical user interface via the second baseboard management controller.

[0028] In one embodiment, the firmware upgrade system further includes a connector, a master device, and a slave device.

[0029] The output terminal of the main device is connected to the input terminals of the plurality of signal enhancement integrated circuits via the connector;

[0030] The output terminals of the plurality of signal enhancement integrated circuits are connected to the input terminals of the slave device via the connector.

[0031] In one embodiment, after completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded, the process includes:

[0032] When a firmware upgrade of the signal enhancement integrated circuit to be upgraded fails, the data verification of the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is performed again through the logic element.

[0033] In one embodiment, the firmware upgrade system further includes a plurality of read-only memories, and the signal enhancement integrated circuit is connected to each of the read-only memories in a one-to-one correspondence. The method includes:

[0034] When a failure occurs in the storage medium corresponding to the signal enhancement integrated circuit to be upgraded, which is written to the second firmware file through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory.

[0035] Loading the first firmware file through the read-only memory includes:

[0036] A serial communication bus signal channel is created between the signal enhancement integrated circuit to be upgraded and the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0037] Read the first firmware file from the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded;

[0038] The second firmware file is sent to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0039] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded using the software development tool for the signal enhancement integrated circuit to be upgraded, thereby replacing the first firmware file and completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0040] In one embodiment, the plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface;

[0041] The logic element is connected to the plurality of storage media via a serial peripheral interface;

[0042] The first substrate management controller is connected to the logic element via a serial communication bus.

[0043] Secondly, this application also provides an integrated circuit firmware upgrade device, which is applied to a firmware upgrade system. The firmware upgrade system includes a plurality of signal enhancement integrated circuits, a first substrate management controller, logic elements, and a plurality of storage media. The first substrate management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to the plurality of storage media, the first substrate management controller is connected to the logic elements, and the signal enhancement integrated circuits correspond one-to-one with the storage media. The device includes:

[0044] A receiving module is used to receive an instruction to upgrade the firmware of any signal enhancement integrated circuit, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0045] An acquisition module is used to acquire a second firmware file; the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0046] The determination module is used to determine the signal enhancement integrated circuit to be upgraded in firmware based on the signal enhancement integrated circuit model information.

[0047] A loading module is used to load a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element.

[0048] The upgrade module is used to write the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the first baseboard management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0049] Thirdly, an integrated circuit firmware upgrade device is also provided, comprising:

[0050] One or more processors;

[0051] Storage device for storing one or more programs;

[0052] When the one or more programs are executed by the one or more processors, the one or more processors implement the integrated circuit firmware upgrade method as described in any of the first aspects.

[0053] Fourthly, this application also provides a computer device, the device comprising:

[0054] A memory, a processor, and a computer program stored on the memory, wherein the processor executes the computer program to implement the steps of the integrated circuit firmware upgrade method as described in any of the first aspects.

[0055] Fifthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the integrated circuit firmware upgrade method described in any of the first aspects.

[0056] Sixthly, this application also provides a computer storage medium, the medium comprising:

[0057] It stores a computer program that, when executed by a processor, implements the steps of the integrated circuit firmware upgrade method described in any of the first aspects.

[0058] Compared with the prior art, the method of the technical solution provided in this application includes: a first substrate management controller receiving an instruction to upgrade the firmware of any signal enhancement integrated circuit, the instruction including the model information of the signal enhancement integrated circuit to be upgraded; a logic element determining the signal enhancement integrated circuit to be upgraded based on the model information; loading a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element; obtaining a second firmware file, the second firmware file being used to upgrade the signal enhancement integrated circuit to be upgraded; and writing the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the first substrate management controller and the logic element to replace the first firmware file, thereby completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded. This application, by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, shortens the time required for power-on firmware loading of the signal enhancement integrated circuit, provides a new firmware upgrade method for signal enhancement integrated circuits, and improves the efficiency of integrated circuit firmware upgrades.

[0059] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0060] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application uses storage media (SPI Flash) with more choices and lower cost. Attached Figure Description

[0061] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0062] Figure 1 This is a first structural diagram of the integrated circuit firmware upgrade system provided in Embodiment 1 of this application;

[0063] Figure 2 This is a second structural diagram of the integrated circuit firmware upgrade system provided in Embodiment 1 of this application;

[0064] Figure 3 This is a third structural diagram of the integrated circuit firmware upgrade system provided in Embodiment 2 of this application;

[0065] Figure 4 This is a first flowchart of an integrated circuit firmware upgrade method provided in Embodiment 1 of this application;

[0066] Figure 5 This is a second flowchart of the integrated circuit firmware upgrade method provided in Embodiment 2 of this application;

[0067] Figure 6 This is a flowchart of the firmware power-on loading process provided in Embodiment 2 of this application;

[0068] Figure 7 This is a flowchart of the firmware upgrade process provided in Embodiment 2 of this application;

[0069] Figure 8 This is a structural diagram of the integrated circuit firmware upgrade device provided in Embodiment 3 of this application;

[0070] Figure 9This is an exemplary system provided for Embodiment Seven of this application, which can be used to implement the various embodiments described in this application. Detailed Implementation

[0071] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0072] It should be noted that, unless the context explicitly requires it, the words "comprising," "including," and similar terms in the entire specification and claims should be interpreted as encompassing rather than being exclusive or exhaustive; that is, meaning "including but not limited to."

[0073] Furthermore, in the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0074] A PCIe signal enhancement integrated circuit (PCIe Retimer) is a hybrid digital + analog signal device. It can extract the embedded clock from the input signal through its internal clock data recovery circuit, and then retransmit the data using the complete, undamaged clock signal to fully recover the data signal for retransmission. This mode of recovering the data first and then retransmitting the signal through the serial channel can effectively solve the signal attenuation problem. The current mainstream solution is to add a PCIe retimer to the PCIe link to compensate for losses and ensure device performance.

[0075] Currently, Retimer IC configuration information is written offline to the corresponding read-only memory on the board for Retimer IC upgrades. However, due to the typically low I2C bus speed, the time required for the Retimer IC to power on and load firmware is relatively long. Furthermore, the firmware loading time varies between different manufacturers' Retimer ICs, affecting timing and BMC management. If the BMC accesses the Retimer IC during firmware loading, card drop issues may occur. Additionally, there is currently no specific flag to determine whether firmware loading for each Retimer IC is complete.

[0076] Example 1

[0077] This application provides an integrated circuit firmware upgrade method, such as... Figure 2 , 3As shown in Figure 4, the method is applied to a firmware upgrade system. The firmware upgrade system includes several signal enhancement integrated circuits, a first baseboard management controller, logic elements, and several flash memories (storage media). The first baseboard management controller is connected to the several signal enhancement integrated circuits, the several signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to the several flash memories, and the first baseboard management controller is connected to the logic elements. Each signal enhancement integrated circuit corresponds one-to-one with a flash memory. The method includes:

[0078] The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0079] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0080] The first firmware file is loaded from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element;

[0081] Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0082] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0083] Specifically, this application provides a novel PCIE signal enhancement integrated circuit firmware upgrade design, which optimizes the hardware circuitry related to firmware upgrade and loading.

[0084] The Retimer integrated circuit is designed to store firmware files using flash memory (SPI flash).

[0085] Since EEPROM only supports the I2C protocol, its speed is only 100kbps in standard mode, which is relatively low. The SPI protocol is usually faster than I2C, with some devices reaching 50Mbps. Current Retimer ICs support the use of some multiplexed GPIO pins as SPI flash related signals. Therefore, this solution no longer uses the traditional EEPROM design, but instead uses SPI flash to store the firmware file of the Retimer IC.

[0086] The design uses a logic device (CPLD, Complex Programmable Logic Device) to transparently transmit the SPI signal of the Retimer integrated circuit;

[0087] Because this involves compatibility design with multiple Retimer integrated circuits, each Retimer integrated circuit uses different pins for SPI Flash functionality, and the functions corresponding to the same pin are also inconsistent, lacking a unified standard definition. Therefore, simply switching the BOM and hardware routing cannot achieve compatibility across multiple designs. Thus, this solution connects the SPI-related signals of different Retimer integrated circuits to the logic element CPLD. The logic element distinguishes between different Retimer integrated circuits using their IDs and transmits the SPI signals of each Retimer integrated circuit to the corresponding SPI Flash memory.

[0088] Meanwhile, the substrate management controller (BMC) can directly read and write the relevant registers of the CPLD via I2C / JTAG signals, thereby enabling remote FW refresh of the Retimer integrated circuit.

[0089] This application optimizes the hardware circuitry related to firmware upgrades and loading, using SPI Flash instead of the traditional EEPROM design, thus solving the problems of long firmware loading time and slow firmware upgrades caused by the traditional PCIE Retimer integrated circuit.

[0090] Here, Flash memory (SPI) is a non-volatile memory integrated circuit based on the Serial Peripheral Interface (SPI) protocol.

[0091] The beneficial effects of the technical solutions provided in this application are:

[0092] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0093] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0094] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application offers more options and lower costs by using flash memory (SPI Flash) as a replacement.

[0095] Example 2

[0096] This application provides an integrated circuit firmware upgrade method, such as... Figure 5 As shown, the method is applied to a firmware upgrade system, which includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, logic elements, and a plurality of flash memory modules. The first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to the plurality of flash memory modules, the first baseboard management controller is connected to the logic elements, and the signal enhancement integrated circuits and flash memory modules correspond one-to-one. The method includes:

[0097] Step S01: The first substrate management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded.

[0098] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0099] Specifically, in the current solution, different manufacturers' Retimer integrated circuits require different BOMs for adaptation on external network lines. Therefore, multiple pull-up and pull-down resistors need to be designed in the hardware. The combination of multiple pull-up and pull-down resistors serves as the Retimer integrated circuit for the CPLD to distinguish between Retimer integrated circuits from different manufacturers.

[0100] Step S02: Load the first firmware file from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element.

[0101] Step S02 also includes:

[0102] Step S021, as follows Figure 6 As shown, the power module powers on the signal enhancement integrated circuit to be upgraded.

[0103] The logic element creates a serial peripheral interface signal channel between the signal enhancement integrated circuit and the flash memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0104] The first firmware file is loaded through the signal enhancement integrated circuit to be upgraded, and the first firmware file in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is read through the serial peripheral interface signal channel.

[0105] Determine whether there is signal transmission in the serial peripheral interface signal channel;

[0106] If not, modify the register value of the logic element and send the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller;

[0107] After sending the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller, the process includes:

[0108] The first baseboard management controller monitors whether the signal enhancement integrated circuit to be upgraded is successfully powered on.

[0109] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0110] Specifically, after the board is powered on, the logic element CPLD first identifies the model of the Retimer integrated circuit on the board through the ID of the Retimer integrated circuit, and then selects different input PINs to pass through according to the Retimer ID, corresponding to the SPI signal from the Retimer integrated circuit to the SPI Flash; the CPLD monitors the SPI signal in real time. After the Retimer integrated circuit loads the first firmware file, the CPLD determines whether the SPI bus is idle. If there is no signal transmission, it modifies the value of the internal register to inform the BMC that the Retimer integrated circuit has finished loading the firmware; based on this judgment condition, the BMC begins to monitor the temperature and other status information of the Retimer integrated circuit.

[0111] Step S03: The logic element obtains a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0112] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0113] Step S03 also includes:

[0114] Step S031, as follows Figure 7 As shown, the second firmware file is sent to the logic element via the second baseboard management controller and the first baseboard management controller;

[0115] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element, thereby replacing the first firmware file;

[0116] The logic element is used to perform data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded in firmware.

[0117] The step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes:

[0118] Determine whether the second firmware file written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is consistent with the second firmware file sent to the logic element;

[0119] If so, the data verification result will be displayed on the graphical user interface via the second baseboard management controller.

[0120] Specifically, when it comes to scenarios requiring the upgrade of the Retimer integrated circuit, the customer remotely uploads the second firmware file (FW) to the second substrate management controller (BMC0). BMC0 then uploads the second firmware file (FW) to the first substrate management controller (BMC1) on the board via USB signal. The first substrate management controller (BMC1) transmits the FW to the CPLD via I2C / JTAG. The CPLD receives the FW and performs read / write verification on the corresponding flash memory (SPI Flash), and sends the results back to the first substrate management controller (BMC1). The second substrate management controller (BMC0) communicates with BMC1 to display the programming results in the GUI interface.

[0121] This process eliminates the need for the Baseboard Management Controller (BMC) to develop and adapt different SDK integration tools for different Retimer IC manufacturers. It only requires rewriting and adapting the current CPLD upgrade process to be compatible with all subsequent Retimer IC manufacturers, greatly improving work efficiency.

[0122] Step S04: When a firmware upgrade of the signal enhancement integrated circuit to be upgraded fails, the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is re-verified through the logic element.

[0123] Step S05, as follows Figure 1 As shown, in response to a failure in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded, which is written to the second firmware file through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory.

[0124] Loading the first firmware file through the read-only memory includes:

[0125] A serial communication bus signal channel is created between the signal enhancement integrated circuit to be upgraded and the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0126] Read the first firmware file from the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded;

[0127] The second firmware file is sent to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0128] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded using the software development tool for the signal enhancement integrated circuit to be upgraded, thereby replacing the first firmware file and completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0129] Specifically, the CPLD on the board controls the output of the power modules related to the eight Retimer integrated circuits, and the power modules provide the DC power required for the operation of the eight Retimer integrated circuits; the first firmware file FW is written to the read-only memory EEPROM, and the eight Retimer integrated circuits communicate with their respective read-only memories EEPROMs through I2C signals to complete the loading of the first firmware file FW of the integrated circuits; the Retimer integrated circuits are connected to the master device RC (Root Complex) via PCIe X16 signals for uplink and to the slave device EP (EndPoint) via PCIe X16 signals for downlink.

[0130] The second firmware file (FW) of the Retimer integrated circuit is upgraded via I2C signal through the BMC. The second baseboard management controller BMC0 of the uplink board communicates with the first baseboard management controller BMC1 on the board via USB bus. BMC1 is connected to 8 Retimer integrated circuits via I2C bus. Different software development SDK tools are developed and integrated for Retimer integrated circuits from different manufacturers to upgrade the FW of the Retimer integrated circuits.

[0131] Understandably, when a scenario requires remote upgrades to the firmware of eight Retimer integrated circuits on the board, BMC1 writes the second firmware file to the Retimer integrated circuit via I2C, and then the Retimer integrated circuit upgrades the corresponding read-only memory (EEPROM) via the I2C bus. In other words, in response to a failure in the firmware upgrade of the signal enhancement integrated circuit to be upgraded through data transmission verification between the first substrate management controller and the logic element, a backup solution is added to reduce the risk of firmware upgrade.

[0132] This application proposes a novel firmware upgrade design for PCIE retimer integrated circuits, which can solve the problem of long loading time of traditional PCIE retimer integrated circuits, affecting timing design. In addition, when it is necessary to remotely upgrade the firmware of 8 retimer integrated circuits on the board, BMC no longer needs to develop and adapt retimer integrated circuits from different manufacturers separately, which can greatly shorten the upgrade time.

[0133] The improvements in this application's technical solution are as follows: the Retimer integrated circuit is designed to use flash memory (SPI) to store the firmware file (FW); the design uses a logic element (CPLD) to transmit the Serial Peripheral Interface (SPI) signal of the Retimer integrated circuit; and a new method for upgrading the Retimer integrated circuit's firmware (FW) is provided.

[0134] Furthermore, the step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element also includes:

[0135] Configure the logic element CPLD to adapt to the protocol of the Serial Peripheral Interface (SPI);

[0136] Initialize the SPI Flash and set the read / write mode;

[0137] Determine the data verification algorithm, which includes a cyclic redundancy check algorithm and a checksum algorithm;

[0138] Firmware file data is read from SPI Flash via the SPI protocol;

[0139] The check value of the firmware file data written to the flash memory is calculated using the cyclic redundancy check algorithm.

[0140] The check value of the firmware file data received by the logic element is calculated using the cyclic redundancy check algorithm.

[0141] The verification value of the firmware file data in the flash memory is compared with the verification value of the firmware file received by the logic element;

[0142] If the two values ​​match, the data is complete; if an error is detected, an error log is logged, an alert is sent to the user, and the data is restored.

[0143] Here, CPLD can be effectively used to implement firmware file data verification function of SPI Flash, thereby improving the reliability and stability of system firmware upgrade.

[0144] The integrated circuit firmware upgrade method provided in this application embodiment can be improved and optimized in several ways without departing from the technical solution of this application, and these improvements and optimizations should also be considered within the protection scope of this application.

[0145] This technical solution can also be used in various other types of server Retimer integrated circuit applications and other product requirements. The beneficial effects of the technical solution provided in this application are:

[0146] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0147] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0148] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application uses flash memory (SPI Flash) which offers more choices and lower costs.

[0149] Example 3

[0150] This application provides an integrated circuit firmware upgrade device, such as... Figure 8As shown, the device is applied to a firmware upgrade system. The firmware upgrade system includes several signal enhancement integrated circuits, a first baseboard management controller, logic elements, and several flash memory modules. The first baseboard management controller is connected to the several signal enhancement integrated circuits, the several signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to the several flash memory modules, and the first baseboard management controller is connected to the logic elements. Each signal enhancement integrated circuit corresponds to one flash memory module. The device includes: a receiving module, an acquisition module, a determining module, a loading module, an upgrade module, and a processing module.

[0151] In this embodiment, the receiving module is used to receive an instruction to upgrade the firmware of any signal enhancement integrated circuit, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0152] An acquisition module is used to acquire a second firmware file; the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0153] The determination module is used to determine the signal enhancement integrated circuit to be upgraded in firmware based on the signal enhancement integrated circuit model information.

[0154] A loading module is used to load a first firmware file from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element.

[0155] The upgrade module is used to write the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded through the first baseboard management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0156] In one embodiment, a loading module is used to power on the signal enhancement integrated circuit to be upgraded via the power module;

[0157] The logic element creates a serial peripheral interface signal channel between the signal enhancement integrated circuit and the flash memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0158] The first firmware file is loaded through the signal enhancement integrated circuit to be upgraded, and the first firmware file in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is read through the serial peripheral interface signal channel.

[0159] Determine whether there is signal transmission in the serial peripheral interface signal channel;

[0160] If not, modify the register value of the logic element and send the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller;

[0161] After sending the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller, the process includes:

[0162] The first baseboard management controller monitors whether the signal enhancement integrated circuit to be upgraded is successfully powered on.

[0163] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0164] In one embodiment, the upgrade module is used to send the second firmware file to the logic element via the second baseboard management controller and the first baseboard management controller;

[0165] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element, thereby replacing the first firmware file;

[0166] The logic element is used to perform data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded in firmware.

[0167] The step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes:

[0168] Determine whether the second firmware file written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is consistent with the second firmware file sent to the logic element;

[0169] If so, the data verification result will be displayed on the graphical user interface via the second baseboard management controller.

[0170] In one embodiment, the firmware upgrade system further includes a connector, a master device, and a slave device.

[0171] The output terminal of the main device is connected to the input terminals of the plurality of signal enhancement integrated circuits via the connector;

[0172] The output terminals of the plurality of signal enhancement integrated circuits are connected to the input terminals of the slave device via the connector.

[0173] In one embodiment, the processing module is configured to re-verify the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element when a failure occurs during the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0174] In one embodiment, the processing module is configured to load the first firmware file through the read-only memory when a failure occurs in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded, which was written to the second firmware file through the first substrate management controller and the logic element.

[0175] Loading the first firmware file through the read-only memory includes:

[0176] A serial communication bus signal channel is created between the signal enhancement integrated circuit to be upgraded and the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0177] Read the first firmware file from the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded;

[0178] The second firmware file is sent to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0179] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded using the software development tool for the signal enhancement integrated circuit to be upgraded, thereby replacing the first firmware file and completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0180] In one embodiment, the plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface;

[0181] The logic element is connected to the plurality of flash memory via a serial peripheral interface;

[0182] The first substrate management controller is connected to the logic element via a serial communication bus.

[0183] The beneficial effects of the technical solutions provided in this application are:

[0184] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0185] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0186] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application uses flash memory (SPI Flash) which offers more choices and lower costs.

[0187] Example 4

[0188] The present invention also provides an integrated circuit firmware upgrade device, comprising:

[0189] One or more processors;

[0190] Storage device for storing one or more programs;

[0191] When the one or more programs are executed by the one or more processors, the one or more processors perform the following integrated circuit firmware upgrade method:

[0192] The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0193] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0194] The first firmware file is loaded from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element;

[0195] Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0196] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0197] The beneficial effects of the technical solutions provided in this application are:

[0198] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0199] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0200] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application uses flash memory (SPI Flash) which offers more choices and lower costs.

[0201] Example 5

[0202] This application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it can perform the following method for upgrading integrated circuit firmware:

[0203] The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0204] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0205] The first firmware file is loaded from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element;

[0206] Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0207] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0208] The beneficial effects of the technical solutions provided in this application are:

[0209] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0210] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0211] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application uses flash memory (SPI Flash) which offers more choices and lower costs.

[0212] Example 6

[0213] This application also provides a computer program product, including a computer program that, when executed by a processor, can implement the following method for upgrading integrated circuit firmware:

[0214] The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0215] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0216] The first firmware file is loaded from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element;

[0217] Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0218] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0219] The beneficial effects of the technical solutions provided in this application are:

[0220] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0221] The technical solution provided in this application can solve the problem that traditional signal enhancement integrated circuits have long firmware loading time, which affects timing and the management of the substrate management controller. In addition, when it is necessary to remotely upgrade multiple Retimer integrated circuits on the board, the substrate management controller no longer needs to develop and adapt to Retimer integrated circuits from different manufacturers, which can greatly shorten the upgrade time.

[0222] The technical solution provided in this application provides a firmware (FW) loading completion flag that is applicable to various Retimer manufacturers, reducing design risks. At the same time, traditional upgrade methods have low availability and high cost of large-capacity read-only memory, while this application uses flash memory (SPI Flash) which offers more choices and lower costs.

[0223] Example 7

[0224] This application provides a computer storage medium, including a memory, a processor, and a computer program stored on the memory and executable on the processor. When the processor executes the computer program, it performs the following steps:

[0225] The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded;

[0226] The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information.

[0227] The first firmware file is loaded from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element;

[0228] Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded.

[0229] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

[0230] In one embodiment, the firmware upgrade system includes a power module, the output of the logic element is connected to the input of the power module, the output of the power module is connected to the input of the plurality of signal enhancement integrated circuits, and loading a first firmware file from the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes:

[0231] The power module powers on the signal enhancement integrated circuit to be upgraded with firmware.

[0232] The logic element creates a serial peripheral interface signal channel between the signal enhancement integrated circuit and the flash memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0233] The first firmware file is loaded through the signal enhancement integrated circuit to be upgraded, and the first firmware file in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is read through the serial peripheral interface signal channel.

[0234] Determine whether there is signal transmission in the serial peripheral interface signal channel;

[0235] If not, modify the register value of the logic element and send the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller;

[0236] After sending the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller, the process includes:

[0237] The first baseboard management controller monitors whether the signal enhancement integrated circuit to be upgraded is successfully powered on.

[0238] The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

[0239] In one embodiment, the firmware upgrade system includes a second baseboard management controller connected to a first baseboard management controller. The step of writing the second firmware file into the flash memory corresponding to the signal enhancement integrated circuit to be upgraded, via the first baseboard management controller and the logic elements, to replace the first firmware file, includes:

[0240] The second firmware file is sent to the logic element via the second baseboard management controller and the first baseboard management controller;

[0241] The second firmware file is written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element, thereby replacing the first firmware file;

[0242] The logic element is used to perform data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded in firmware.

[0243] The step of performing data verification on the flash memory corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes:

[0244] Determine whether the second firmware file written to the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is consistent with the second firmware file sent to the logic element;

[0245] If so, the data verification result will be displayed on the graphical user interface via the second baseboard management controller.

[0246] In one embodiment, the firmware upgrade system further includes a connector, a master device, and a slave device.

[0247] The output terminal of the main device is connected to the input terminals of the plurality of signal enhancement integrated circuits via the connector;

[0248] The output terminals of the plurality of signal enhancement integrated circuits are connected to the input terminals of the slave device via the connector.

[0249] In one embodiment, after completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded, the process includes:

[0250] When a firmware upgrade of the signal enhancement integrated circuit to be upgraded fails, the data verification of the flash memory corresponding to the signal enhancement integrated circuit to be upgraded is performed again through the logic element.

[0251] In one embodiment, the firmware upgrade system further includes a plurality of read-only memories, and the signal enhancement integrated circuit is connected to each of the read-only memories in a one-to-one correspondence. The method includes:

[0252] When a failure occurs in the flash memory corresponding to the signal enhancement integrated circuit to be upgraded, which is written to the second firmware file through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory.

[0253] Loading the first firmware file through the read-only memory includes:

[0254] A serial communication bus signal channel is created between the signal enhancement integrated circuit to be upgraded and the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded.

[0255] Read the first firmware file from the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded;

[0256] The second firmware file is sent to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller;

[0257] The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded using the software development tool for the signal enhancement integrated circuit to be upgraded, thereby replacing the first firmware file and completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

[0258] In one embodiment, the plurality of signal enhancement integrated circuits are connected to the logic element via a serial peripheral interface;

[0259] The logic element is connected to the plurality of flash memory via a serial peripheral interface;

[0260] The first substrate management controller is connected to the logic element via a serial communication bus.

[0261] This application shortens the time required for power-on firmware loading of the signal enhancement integrated circuit by connecting the first substrate management controller to the logic element and the logic element to the plurality of storage media, provides a new firmware upgrade method for the signal enhancement integrated circuit, and improves the efficiency of integrated circuit firmware upgrade.

[0262] Figure 9 This is an exemplary system provided for Embodiment Seven of this application, which can be used to implement the various embodiments described in this application;

[0263] like Figure 9 As shown, in some embodiments, the system can function as any of the aforementioned devices for integrated circuit firmware upgrades in each of the various embodiments. In some embodiments, the system may include one or more computer-readable media (e.g., system memory or NVM / storage device) having a result, and one or more processors (e.g., one or more processors) coupled to the one or more computer-readable media and configured to execute the result to implement the module thereby performing the actions described in this application.

[0264] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0265] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0266] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A method for upgrading firmware of an integrated circuit, characterized in that, The method is applied to a firmware upgrade system, which includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, logic elements, and a plurality of storage media. The first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to a plurality of flash memory modules, the first baseboard management controller is connected to the logic elements, and the signal enhancement integrated circuits and flash memory modules are in one-to-one correspondence. The method includes: The first baseboard management controller receives an instruction to upgrade the firmware of any one of the signal enhancement integrated circuits, the instruction including the model information of the signal enhancement integrated circuit to be upgraded; The logic element determines the signal enhancement integrated circuit to be upgraded based on the signal enhancement integrated circuit model information. The first firmware file is loaded from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element. Obtain a second firmware file, which is used to upgrade the signal enhancement integrated circuit to be upgraded. The second firmware file is written to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded by the first substrate management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded. The firmware upgrade system includes a power module. The output terminal of the logic element is connected to the input terminal of the power module, and the output terminal of the power module is connected to the input terminals of the plurality of signal enhancement integrated circuits. Loading a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes: The power module powers on the signal enhancement integrated circuit to be upgraded with firmware. The logic element creates a serial peripheral interface signal channel between the signal enhancement integrated circuit and the storage medium corresponding to the signal enhancement integrated circuit to be upgraded. The first firmware file is loaded through the signal enhancement integrated circuit to be upgraded, and the first firmware file in the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is read through the serial peripheral interface signal channel. Determine whether there is signal transmission in the serial peripheral interface signal channel; If not, modify the register value of the logic element and send the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller; After sending the signal enhancement integrated circuit to be upgraded with the first firmware file loading completion information to the first baseboard management controller, the process includes: The first baseboard management controller monitors whether the signal enhancement integrated circuit to be upgraded is successfully powered on. The temperature information of the signal enhancement integrated circuit to be upgraded with firmware is monitored.

2. The integrated circuit firmware upgrade method according to claim 1, characterized in that, The firmware upgrade system includes a second baseboard management controller connected to a first baseboard management controller. The step of writing the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded, via the first baseboard management controller and the logic elements, to replace the first firmware file, includes: The second firmware file is sent to the logic element via the second baseboard management controller and the first baseboard management controller; The second firmware file is written to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element, thereby replacing the first firmware file; The logic element is used to perform data verification on the storage medium corresponding to the signal enhancement integrated circuit to be upgraded. The step of performing data verification on the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element includes: Determine whether the second firmware file written to the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is consistent with the second firmware file sent to the logic element; If so, the data verification result will be displayed on the graphical user interface via the second baseboard management controller.

3. The integrated circuit firmware upgrade method according to claim 1, characterized in that, The firmware upgrade system also includes connectors, a master device, and slave devices. The output terminal of the main device is connected to the input terminals of the plurality of signal enhancement integrated circuits via the connector; The output terminals of the plurality of signal enhancement integrated circuits are connected to the input terminals of the slave device via the connector.

4. The integrated circuit firmware upgrade method according to claim 2, characterized in that, After completing the firmware file upgrade of the signal enhancement integrated circuit to be upgraded, the process includes: When a firmware upgrade of the signal enhancement integrated circuit to be upgraded fails, the data verification of the storage medium corresponding to the signal enhancement integrated circuit to be upgraded is performed again through the logic element.

5. The integrated circuit firmware upgrade method according to claim 1, characterized in that, The firmware upgrade system further includes several read-only memories, and the signal enhancement integrated circuit is connected to each of the read-only memories in a one-to-one correspondence. The method includes: When a failure occurs in the storage medium corresponding to the signal enhancement integrated circuit to be upgraded, which is written to the second firmware file through the first baseboard management controller and the logic element, the first firmware file is loaded through the read-only memory. Loading the first firmware file through the read-only memory includes: A serial communication bus signal channel is created between the signal enhancement integrated circuit to be upgraded and the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded. Read the first firmware file from the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded; The second firmware file is sent to the signal enhancement integrated circuit to be upgraded via the second baseboard management controller and the first baseboard management controller; The second firmware file is written into the read-only memory corresponding to the signal enhancement integrated circuit to be upgraded using the software development tool for the signal enhancement integrated circuit to be upgraded, thereby replacing the first firmware file and completing the firmware upgrade of the signal enhancement integrated circuit to be upgraded.

6. The integrated circuit firmware upgrade method according to claim 1, characterized in that, The plurality of signal enhancement integrated circuits are connected to the logic elements through a serial peripheral interface; The logic element is connected to the plurality of storage media via a serial peripheral interface; The first substrate management controller is connected to the logic element via a serial communication bus.

7. An integrated circuit firmware upgrade apparatus for implementing the method as described in claim 1, characterized in that, The device is applied to a firmware upgrade system, which includes a plurality of signal enhancement integrated circuits, a first baseboard management controller, logic elements, and a plurality of storage media. The first baseboard management controller is connected to the plurality of signal enhancement integrated circuits, the plurality of signal enhancement integrated circuits are connected to the logic elements, the logic elements are connected to the plurality of storage media, and the first baseboard management controller is connected to the logic elements. Each signal enhancement integrated circuit corresponds one-to-one with a storage media. The device includes: A receiving module is used to receive an instruction to upgrade the firmware of any signal enhancement integrated circuit, the instruction including the model information of the signal enhancement integrated circuit to be upgraded; An acquisition module is used to acquire a second firmware file; the second firmware file is used to upgrade the signal enhancement integrated circuit to be upgraded. The determination module is used to determine the signal enhancement integrated circuit to be upgraded in firmware based on the signal enhancement integrated circuit model information. A loading module is used to load a first firmware file from the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the logic element. The upgrade module is used to write the second firmware file into the storage medium corresponding to the signal enhancement integrated circuit to be upgraded via the first baseboard management controller and the logic element, so as to replace the first firmware file and complete the firmware file upgrade of the signal enhancement integrated circuit to be upgraded.

8. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the integrated circuit firmware upgrade method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the steps of the integrated circuit firmware upgrade method according to any one of claims 1 to 6.

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