Power dedicated chip-based distribution network relay protection method and system
By adopting a distribution network relay protection method based on power-specific chips in power distribution equipment, using wireless signals for command and data transmission of JTAG protocol, the compatibility problem between chips and distribution equipment is solved, and efficient remote debugging and fast data transmission are achieved.
Patent Information
- Application Number
- CN202411644360.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-18
- Publication Date
- 2025-03-11
AI Technical Summary
In existing power distribution equipment, compatibility issues between chips and power distribution equipment lead to various problems in connections, and the connection needs to be adjusted to enhance the adaptability.
The distribution network relay protection method based on power-specific chips is adopted. By selecting a chip that matches the power distribution terminal, and installing debugging devices and debugging software in the power distribution terminal, debugging is performed using wireless signals, and converting it into commands and data that complies with the JTAG protocol, and transmitting it to the JTAG interface of the CPU.
Remote debugging of wireless LAN or Internet is realized, reducing dependence on simulation debugger and download cable, and can debug multiple chips at the same time, improving the working frequency and data transmission speed of the JTAG interface.
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Figure CN119597135A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power system relay protection, and in particular to a distribution network relay protection method and system based on a power-specific chip. Background Art
[0002] The chip generally has logic circuits for CPU debugging, and these debugging circuits mainly use the JTAG interface to communicate with the outside. The hardware emulation debugger is connected to the debugging host through a USB interface or other interfaces, accepts debugging commands sent by the software on the debugging host, converts these debugging commands into commands that comply with the JTAG protocol, and then sends them to the debugging circuit built into the chip through the download line, the wires on the debugging target circuit board, and the pins of the chip. JTAG stands for Joint Test Action Group, which is an international standard test protocol mainly used for internal chip testing. The standard JTAG interface is 5 lines: TRST, TCK, TMS, TDI, TDO, where TRST is the debug logic reset signal, TCK is the clock used by the debug logic, TMS is the mode selection signal, TDI and TDO are used as serial data input and serial data output respectively. When the chip executes the software program, debugging means are needed to provide software personnel with debugging procedures. As the scale of chip design becomes larger and larger, the system-on-chip has also integrated more and more core systems, especially artificial intelligence chips, which have dozens or even hundreds of computing cores. Summary of the invention
[0003] In view of the above existing problems, the present invention is proposed.
[0004] Therefore, the present invention provides a distribution network relay protection method based on a power-specific chip. The chip is usually installed in the existing distribution equipment. When the chip is connected to the distribution equipment, various problems usually arise due to compatibility issues. Therefore, it is necessary to adjust the connection between the chip and the distribution equipment to enhance the compatibility between the distribution equipment and the chip.
[0005] In order to solve the above technical problems, the present invention provides the following technical solutions, a distribution network relay protection method based on a power-specific chip, comprising: selecting a chip matching the distribution terminal and installing it in the distribution terminal, installing a debugging device in the distribution terminal, and using debugging software to debug the software running on the chip; the debugging software sends the debugging command and data to the operating system, and according to the selected path, the operating system converts the debugging command into a wireless signal and sends it to the circuit board; the circuit board receives the wireless signal and transmits the wireless signal to the wireless protocol controller in the chip; the wireless protocol controller is configured in debugging mode, converts the received wireless signal into received data and sends it to the wireless debugging command parsing module.
[0006] As a preferred solution of the distribution network relay protection method based on the power dedicated chip described in the present invention, wherein: the debugging device includes an underlying network protocol driver module, the chip installed on the circuit board includes a wireless protocol controller, a wireless debugging command parsing module, a JTAG command and read data cache and a CPU, and the chip performs a write operation and / or a read operation on the debugging object when running the debugging command;
[0007] After performing the read operation on the debug object, the chip feeds back the read data to the debug device and receives confirmation information from the debug device. When the confirmation information is failure information, the chip resends the read data to the debug device until the confirmation information is success information.
[0008] As a preferred solution of the distribution network relay protection method based on the power dedicated chip described in the present invention, wherein: the conversion of the debugging command into a wireless signal includes: the debugging software generates the debugging command, each command is formatted as a data packet, and the debugging software selects an appropriate wireless communication protocol based on the characteristics and environmental conditions of the target circuit board;
[0009] Adaptive waveform coding suitable for wireless transmission is used to optimize data transmission in different signal-to-noise ratio environments. Each data packet is encoded before sending, and the data is transmitted to the circuit board through the interface of the network protocol stack, the underlying protocol driver of the debugging device, and the encapsulation and encryption of the data packet.
[0010] As a preferred solution of the distribution network relay protection method based on the power dedicated chip described in the present invention, wherein: the receiving of wireless signals includes the circuit board capturing scattered and reflected wireless signals through the antenna, and the received weak signals are amplified by the low noise amplifier to improve the signal-to-noise ratio;
[0011] After the amplified signal is modulated and demodulated by the demodulation circuit, it is necessary to identify the data packet in the signal, detect the starting mark of the data packet by setting the packet header recognition algorithm, perform data integrity detection on the extracted data packet, and use the improved CRC cyclic redundancy check algorithm to increase the fixed value to improve the correction capability of burst errors:
[0012]
[0013] Among them, CRC n Represents the cyclic redundancy check value, d i represents the value of the i-th data bit, P i represents the bit weight, C f represents the redundant bits introduced under specific conditions, k represents the total number of bits in the data stream, and mod represents the modulus operation;
[0014] After verification, the data packet is sent to the wireless protocol controller to extract the debugging command and corresponding parameters.
[0015] As a preferred solution of the distribution network relay protection method based on the power dedicated chip described in the present invention, wherein: the wireless protocol controller includes, after receiving the signal, performing preliminary signal capture, analyzing the received RF signal transmission quality and signal-to-noise ratio, evaluating whether the signal meets the processing conditions, and determining whether the signal enters the debugging mode;
[0016] After confirming that the signal quality is qualified, the wireless protocol controller automatically switches to the debugging mode. The activation of the debugging mode will also trigger the demodulation process of the signal to ensure that the subsequent processing enters a specific decoding process;
[0017] The improved digital demodulation algorithm is used to demodulate the received modulated signal and extract the data bit stream. When setting the signal to be modulated, frequency shift keying or phase keying is used. The demodulation process accurately extracts each bit. The demodulated bit stream is expressed as:
[0018] D output =f(D input ,θ,T)
[0019] Among them, D input is the input modulation signal, θ is the modulation phase, and T is the time window during demodulation;
[0020] The demodulated bit stream is then formatted into a standard data packet structure and transmitted to the wireless debugging command parsing module.
[0021] As a preferred solution of the distribution network relay protection method based on the power dedicated chip described in the present invention, wherein: the debugging mode includes converting the received wireless signal into received data and sending it to the wireless debugging command parsing module;
[0022] The module receives data and converts it into commands and data that comply with the JTAG protocol. According to the operating frequency and data transmission speed of the JTAG interface of the CPU, the commands and data that comply with the JTAG protocol obtained by the wireless debugging command parsing module are cached in the JTAG command and read data cache.
[0023] As a preferred solution of the distribution network relay protection method based on the power dedicated chip described in the present invention, wherein: the caching of the JTAG command and the read data cache includes sending the commands and data in the JTAG command and the read data cache to the JTAG interface of the CPU in the original order, and the debugging device uses wireless LAN debugging or Internet remote debugging;
[0024] When the debugging software needs to read the data and status in the chip, it first sends the corresponding read command and necessary data information according to the aforementioned path. After the JTAG interface finally receives the read command, it sends the data to the JTAG command and read data cache. Under the control of the control command sent by the debugging software, it is retrieved in sequence along the path opposite to the aforementioned path, and finally displayed on the debugging software, completing the debugging of the chip.
[0025] Another object of the present invention is to provide a distribution network relay protection system based on a power-specific chip, which can monitor the power grid status in real time, quickly detect and isolate faults in the power grid, protect the safe and stable operation of the power grid, and prevent the expansion of faults.
[0026] As a preferred solution of the power distribution network relay protection system based on the power dedicated chip described in the present invention, it includes: a power distribution terminal, a wireless protocol controller, a debugging device, a JTAG command and read data cache module, and a debugging software module;
[0027] The power distribution terminal, as the core part of the system, is responsible for integrating and running the power-specific chip to realize the distribution network relay protection function;
[0028] The wireless protocol controller, in the debugging mode, receives the wireless signal and converts it into data, and parses the debugging command and transmits it to the CPU or other related modules;
[0029] The debugging device includes an underlying network protocol driver module for sending debugging commands and data to the power distribution terminal and receiving feedback information to realize the remote debugging function;
[0030] The JTAG command and read data cache module caches the JTAG protocol commands and data from the wireless debugging command parsing module to ensure that the data is sent to the JTAG interface of the CPU in the correct order;
[0031] The debugging software module generates debugging commands, sends wireless signals through the operating system, controls the debugging process, and provides a user interface to display debugging data and status.
[0032] A computer device comprises a memory and a processor, wherein the memory stores a computer program, and is characterized in that when the processor executes the computer program, it implements the steps of a distribution network relay protection method based on a power-specific chip.
[0033] A computer-readable storage medium stores a computer program thereon, characterized in that when the computer program is executed by a processor, the steps of a distribution network relay protection method based on a power-specific chip are implemented.
[0034] The beneficial effects of the present invention are as follows: the method no longer has positional restrictions between the debugging device and the circuit board, and wireless LAN debugging or Internet remote debugging can be used; debugging chips no longer require emulation debuggers and download cables, and multiple chips can be debugged at the same time; after replacing or upgrading the CPU, only the debugging software needs to be replaced or upgraded when debugging is required; multiple debugging targets in a LAN or on the Internet can be debugged simultaneously and very conveniently; the operating frequency of the JTAG interface can be greatly increased, and the data transmission speed is faster.
[0035] In this method, when the debugging software needs to read the data and status in the chip, the corresponding read command and necessary data information, such as the read address, are first sent according to the aforementioned path. After the JTAG interface of the CPU finally receives the read command, the data is sent to the JTAG command and read data cache. Under the control of the control command sent by the debugging software, the data is retrieved in sequence according to the path opposite to the aforementioned path, and finally displayed on the debugging software, thereby completing the debugging of the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:
[0037] Figure 1 A schematic flow chart of a distribution network relay protection method based on a power-specific chip is provided for one embodiment of the present invention.
[0038] Figure 2 A schematic diagram of working modules of a distribution network relay protection system based on a power-specific chip provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0039] In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are described in detail below in conjunction with the drawings of the specification. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary persons in the art without creative work should fall within the scope of protection of the present invention.
[0040] In the following description, many specific details are set forth to facilitate a full understanding of the present invention, but the present invention may also be implemented in other ways different from those described herein, and those skilled in the art may make similar generalizations without violating the connotation of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
[0041] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The term "in one embodiment" that appears in different places in this specification does not necessarily refer to the same embodiment, nor is it a separate or selective embodiment that is mutually exclusive with other embodiments.
[0042] The present invention is described in detail with reference to schematic diagrams. When describing the embodiments of the present invention, for the sake of convenience, the cross-sectional diagrams showing the device structure will not be partially enlarged according to the general scale, and the schematic diagrams are only examples, which should not limit the scope of protection of the present invention. In addition, in actual production, the three-dimensional dimensions of length, width and depth should be included.
[0043] At the same time, in the description of the present invention, it should be noted that the directions or positional relationships indicated by the terms "upper, lower, inner and outer" are based on the directions or positional relationships shown in the drawings, which are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present invention. In addition, the terms "first, second or third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.
[0044] In the present invention, unless otherwise clearly specified and limited, the terms "install, connect, connect" should be understood in a broad sense, for example: it can be a fixed connection, a detachable connection or an integral connection; it can also be a mechanical connection, an electrical connection or a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0045] Example 1, reference Figure 1 , which is the first embodiment of the present invention, and provides a distribution network relay protection method based on a power-specific chip, comprising:
[0046] S1: Select a chip that matches the power distribution terminal and install it in the power distribution terminal. Install a debugging device in the power distribution terminal and use debugging software to debug the software running on the chip.
[0047] Furthermore, a debugging device is installed in the power distribution terminal, and debugging software is used on the debugging device to debug the software running on the chip. The debugging device includes an underlying network protocol driver module. The chip is installed on a circuit board and includes a wireless protocol controller, a wireless debugging command parsing module, a JTAG command and read data cache, and a CPU. When the chip runs the debugging command, it performs a write operation and / or a read operation on the debugging object;
[0048] After performing the read operation on the debug object, the chip feeds back the read data to the debug device and receives confirmation information from the debug device; and when the confirmation information is failure information, the chip resends the read data to the debug device until the confirmation information is success information;
[0049] It should be noted that debugging of the software running on the chip includes single-step execution, inserting or deleting breakpoints, setting watch points and changing data values. There is no longer a position restriction between the debugging device and the circuit board, and wireless LAN debugging or Internet remote debugging can be used. Debugging chips no longer require simulation debuggers and download cables, and multiple chips can be debugged at the same time. After replacing or upgrading the CPU, only the debugging software needs to be replaced or upgraded when debugging is required. It is very convenient to debug multiple debugging targets in the LAN or on the Internet at the same time. The operating frequency of the JTAG interface can be greatly increased, and the data transmission speed is faster.
[0050] It should also be noted that the debugging device includes an underlying network protocol driver module, the chip installed on the circuit board includes a wireless protocol controller, a wireless debugging command parsing module, a JTAG command and read data cache, and a CPU, and the chip performs write operations and / or read operations on the debugging object when running the debugging command;
[0051] After performing the read operation on the debug object, the chip feeds back the read data to the debug device and receives confirmation information from the debug device. When the confirmation information is failure information, the chip resends the read data to the debug device until the confirmation information is success information.
[0052] The underlying network protocol driver module includes the following wireless protocols: Wifi, Bluetooth, NB-IoT and Zigbee.
[0053] S2: The debugging software sends the debugging commands and data to the operating system. According to the selected path, the operating system converts the debugging commands into wireless signals and sends them to the circuit board.
[0054] Furthermore, the debugging software generates a debugging command, which includes information such as execution instructions, target address, data, and checksum.
[0055] Each command is formatted as a data packet, and the data packet structure is defined as follows:
[0056] Header: contains the packet start identifier, packet length, and type information;
[0057] Payload: contains specific debugging commands and parameters;
[0058] Checksum: used for subsequent data integrity verification.
[0059] The debugging software selects the appropriate wireless communication protocol based on the characteristics of the target board and environmental conditions;
[0060] Adaptive waveform coding suitable for wireless transmission is used to optimize data transmission in different signal-to-noise ratio environments. Each data packet is encoded before sending, and the data is transmitted to the circuit board through the interface of the network protocol stack, the underlying protocol driver of the debugging device, and the encapsulation and encryption of the data packet.
[0061] It should be noted that Hamming coding is used for error correction, and redundant bits are added to each data packet to detect and correct bit errors:
[0062]
[0063] Among them, d H is the Hamming distance, x i represents the i-th bit in the bit string x, y i is the i-th bit in the bit string y, and n represents the length of the bit string.
[0064] When using Hamming coding, errors can be located and corrected by analyzing the Hamming distance. H If the value is less than or equal to a certain threshold, it means that only a small number of errors have occurred and can be corrected by redundant bits; if it is greater than this threshold, it cannot be corrected and re-encoding is required.
[0065] S3: The circuit board receives the wireless signal and transmits the wireless signal to the wireless protocol controller in the chip.
[0066] Furthermore, the circuit board captures scattered and reflected wireless signals through antennas, and the weak signals received are amplified by low-noise amplifiers to improve the signal-to-noise ratio;
[0067] After the amplified signal is modulated and demodulated by the demodulation circuit, it is necessary to identify the data packet in the signal, detect the starting mark of the data packet by setting the packet header recognition algorithm, perform data integrity detection on the extracted data packet, and use the improved CRC cyclic redundancy check algorithm to increase the fixed value to improve the correction capability of burst errors:
[0068]
[0069] Among them, CRC n Represents the cyclic redundancy check value, d i represents the value of the i-th data bit, P i represents the bit weight, C frepresents the redundant bits introduced under specific conditions, k represents the total number of bits in the data stream, and mod represents the modulus operation;
[0070] After verification, the data packet is sent to the wireless protocol controller to extract the debugging command and corresponding parameters.
[0071] S4: The wireless protocol controller is configured in a debugging mode, converts the received wireless signal into received data and sends the received data to the wireless debugging command parsing module.
[0072] Furthermore, after receiving the signal, a preliminary signal capture is performed to analyze the received RF signal transmission quality and signal-to-noise ratio to evaluate whether the signal meets the processing conditions. The signal quality analysis uses the following formula to determine whether the signal enters the debug mode:
[0073] SNR threshold =SNR current -L noise
[0074] Among them, L noise is the ambient noise level, SNR current Indicates the current signal-to-noise ratio, SNR threshold Indicates the signal-to-noise ratio threshold. current When the signal is greater than the set threshold, it will be further processed.
[0075] After confirming that the signal quality is qualified, the wireless protocol controller automatically switches to the debugging mode. The activation of the debugging mode will also trigger the demodulation process of the signal to ensure that the subsequent processing enters a specific decoding process;
[0076] The improved digital demodulation algorithm is used to demodulate the received modulated signal and extract the data bit stream. When setting the signal to be modulated, frequency shift keying or phase keying is used. The demodulation process accurately extracts each bit. The demodulated bit stream is expressed as:
[0077] D output =f(D input ,θ,T)
[0078] Among them, D input is the input modulation signal, θ is the modulation phase, and T is the time window during demodulation;
[0079] The demodulated bit stream is then formatted into a standard data packet structure and transmitted to the wireless debugging command parsing module.
[0080] Furthermore, the received wireless signal is converted into received data and sent to the wireless debugging command parsing module;
[0081] The module receives data and converts it into commands and data that comply with the JTAG protocol. According to the operating frequency and data transmission speed of the JTAG interface of the CPU, the commands and data that comply with the JTAG protocol obtained by the wireless debugging command parsing module are cached in the JTAG command and read data cache.
[0082] It should be noted that the JTAG command and the commands and data in the read data cache are sent to the JTAG interface of the CPU in the original order, and the debugging device uses wireless LAN debugging or Internet remote debugging;
[0083] When the debugging software needs to read the data and status in the chip, it first sends the corresponding read command and necessary data information according to the aforementioned path. After the JTAG interface finally receives the read command, it sends the data to the JTAG command and read data cache. Under the control of the control command sent by the debugging software, it is retrieved in sequence along the path opposite to the aforementioned path, and finally displayed on the debugging software, completing the debugging of the chip.
[0084] Embodiment 2, the second embodiment of the present invention, is different from the previous embodiment in that:
[0085] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.
[0086] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in conjunction with such instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in conjunction with such instruction execution systems, devices or apparatuses.
[0087] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.
[0088] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0089] Example 3, reference Figure 2 , which is an embodiment of the present invention, provides a distribution network relay protection system based on a power-specific chip, characterized in that it includes a distribution terminal 100, a wireless protocol controller 200, a debugging device 300, a JTAG command and read data cache module 400, and a debugging software module 500;
[0090] The power distribution terminal 100, as the core part of the system, is responsible for integrating and running the power-specific chip to realize the relay protection function of the distribution network;
[0091] The wireless protocol controller 200 receives wireless signals and converts them into data in the debugging mode, and parses the debugging commands and transmits them to the CPU or other related modules;
[0092] The debugging device 300 includes an underlying network protocol driver module, which is used to send debugging commands and data to the power distribution terminal and receive feedback information to realize the remote debugging function;
[0093] The JTAG command and read data cache module 400 caches the JTAG protocol commands and data from the wireless debugging command parsing module to ensure that the data is sent to the JTAG interface of the CPU in the correct order;
[0094] The debugging software module 500 generates debugging commands, sends wireless signals through the operating system, controls the debugging process, and provides a user interface to display debugging data and status.
[0095] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the spirit and scope of the technical solutions of the present invention, which should all be included in the scope of the claims of the present invention.
Claims
1. A distribution network relay protection method based on a power-specific chip, characterized in that: include, Select a chip that matches the power distribution terminal and install it in the power distribution terminal, install a debugging device in the power distribution terminal, and use debugging software to debug the software running on the chip; The debugging software sends the debugging commands and data to the operating system. According to the selected path, the operating system converts the debugging commands into wireless signals and sends them to the circuit board. The circuit board receives the wireless signal and transmits the wireless signal to the wireless protocol controller in the chip; The wireless protocol controller is configured in the debugging mode, converts the received wireless signal into received data and sends it to the wireless debugging command parsing module.
2. A distribution network relay protection method based on a power-specific chip as claimed in claim 1, characterized in that: The debugging device includes an underlying network protocol driver module, the chip installed on the circuit board includes a wireless protocol controller, a wireless debugging command parsing module, a JTAG command and read data cache, and a CPU, and the chip performs a write operation and / or a read operation on the debugging object when running the debugging command; After performing the read operation on the debug object, the chip feeds back the read data to the debug device and receives confirmation information from the debug device. When the confirmation information is failure information, the chip resends the read data to the debug device until the confirmation information is success information.
3. A distribution network relay protection method based on a power-specific chip as claimed in claim 2, characterized in that: The converting the debugging command into a wireless signal includes: the debugging software generates the debugging command, each command is formatted as a data packet, and the debugging software selects an appropriate wireless communication protocol based on the characteristics and environmental conditions of the target circuit board; Adaptive waveform coding suitable for wireless transmission is used to optimize data transmission in different signal-to-noise ratio environments. Each data packet is encoded before sending, and the data is transmitted to the circuit board through the interface of the network protocol stack, the underlying protocol driver of the debugging device, and the encapsulation and encryption of the data packet.
4. A distribution network relay protection method based on a power-specific chip as claimed in claim 3, characterized in that: The receiving of wireless signals includes the circuit board capturing scattered and reflected wireless signals through an antenna, and amplifying the received weak signals through a low noise amplifier to improve the signal-to-noise ratio; After the amplified signal is modulated and demodulated by the demodulation circuit, it is necessary to identify the data packet in the signal, detect the starting mark of the data packet by setting the packet header recognition algorithm, perform data integrity detection on the extracted data packet, and use the improved CRC cyclic redundancy check algorithm to increase the fixed value to improve the correction capability of burst errors: Among them, CRC n Represents the cyclic redundancy check value, d i represents the value of the i-th data bit, P i represents the bit weight, C f represents the redundant bits introduced under specific conditions, k represents the total number of bits in the data stream, and mod represents the modulus operation; After verification, the data packet is sent to the wireless protocol controller to extract the debugging command and corresponding parameters.
5. A distribution network relay protection method based on a power-specific chip as claimed in claim 4, characterized in that: The wireless protocol controller includes, after receiving the signal, performing preliminary signal capture, analyzing the received RF signal transmission quality and signal-to-noise ratio, evaluating whether the signal meets the processing conditions, and determining whether the signal enters the debugging mode; After confirming that the signal quality is qualified, the wireless protocol controller automatically switches to the debugging mode. The activation of the debugging mode will also trigger the demodulation process of the signal to ensure that the subsequent processing enters a specific decoding process; The improved digital demodulation algorithm is used to demodulate the received modulated signal and extract the data bit stream. When setting the signal to be modulated, frequency shift keying or phase keying is used. The demodulation process accurately extracts each bit. The demodulated bit stream is expressed as: D output =f(D input ,θ,T) Among them, D input is the input modulation signal, θ is the modulation phase, and T is the time window during demodulation; The demodulated bit stream is then formatted into a standard data packet structure and transmitted to the wireless debugging command parsing module.
6. A distribution network relay protection method based on a power-specific chip as claimed in claim 5, characterized in that: The debugging mode includes converting the received wireless signal into received data and sending it to the wireless debugging command parsing module; The module receives data and converts it into commands and data that comply with the JTAG protocol. According to the operating frequency and data transmission speed of the JTAG interface of the CPU, the commands and data that comply with the JTAG protocol obtained by the wireless debugging command parsing module are cached in the JTAG command and read data cache.
7. A distribution network relay protection method based on a power-specific chip as claimed in claim 6, characterized in that: The caching of the JTAG command and read data cache includes sending the commands and data in the JTAG command and read data cache to the JTAG interface of the CPU in the original order, and the debugging device uses wireless LAN debugging or Internet remote debugging; When the debugging software needs to read the data and status in the chip, it first sends the corresponding read command and necessary data information according to the aforementioned path. After the JTAG interface finally receives the read command, it sends the data to the JTAG command and read data cache. Under the control of the control command sent by the debugging software, it is retrieved in sequence along the path opposite to the aforementioned path, and finally displayed on the debugging software, completing the debugging of the chip.
8. A system using a distribution network relay protection method based on a power-specific chip as claimed in any one of claims 1 to 7, characterized in that: It includes a power distribution terminal, a wireless protocol controller, a debugging device, a JTAG command and read data cache module, and a debugging software module; The power distribution terminal, as the core part of the system, is responsible for integrating and running the power-specific chip to realize the distribution network relay protection function; The wireless protocol controller, in the debugging mode, receives the wireless signal and converts it into data, and parses the debugging command and transmits it to the CPU or other related modules; The debugging device includes an underlying network protocol driver module for sending debugging commands and data to the power distribution terminal and receiving feedback information to realize the remote debugging function; The JTAG command and read data cache module caches the JTAG protocol commands and data from the wireless debugging command parsing module to ensure that the data is sent to the JTAG interface of the CPU in the correct order; The debugging software module generates debugging commands, sends wireless signals through the operating system, controls the debugging process, and provides a user interface to display debugging data and status.
9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.