Automatic device address allocation method, address allocation circuit and communication device

Abstract

The invention relates to the technical field of communication and automation control, and discloses an equipment address automatic allocation method, an address allocation circuit and communication equipment, the allocation method is applied to cascaded communication equipment, and the allocation method comprises the following steps: responding to an addressing trigger operation, reading an address input signal, and determining own equipment attribute according to the address input signal; determining an addressing mode and carrying out addressing according to own equipment attributes; after addressing is completed, a first addressing instruction carrying equipment addressing information is issued to the existing next-level communication equipment; the first addressing instruction is used for instructing the next-level communication equipment to perform addressing. According to the invention, the device address can be automatically addressed, and the correctness and reliability of address allocation are improved.

Description

Technical Field

[0001] The present application relates to the field of communication and automation control technology, and in particular to a method for automatically allocating device addresses, an address allocation circuit, and a communication device. Background Art

[0002] In communication systems in the fields of industrial control, smart home, Internet of Things, etc., RS485 communication, CAN communication, etc. are usually used to transmit device data. To ensure accurate transmission of communication, a unique address ID needs to be assigned to each slave device so that the master device can accurately identify the slave device and communicate with the corresponding slave device.

[0003] Traditional address allocation methods usually use manual settings of devices such as dip switches, for example, Figure 1 Five dip switches (S1, S2, S3, S4 and S5) are shown, wherein each dip switch is connected to a slave device. However, the above-mentioned address allocation method often has the following problems: the dip switch needs to be operated manually. If the operator is careless or improperly operates when setting or changing the address code, it is easy to cause the address code to be set incorrectly; for application scenarios where the address code needs to be frequently changed or a large number of devices need to be configured, the operation of the dip switch is complicated, not flexible and efficient, etc.; the address configuration depends on the operator's professional knowledge and skills, which increases the operator's labor cost; in addition, the address resources of the dip switch are limited. When adding new devices or adopting different addressing methods or protocols, the entire communication system needs to be modified or upgraded, which will also increase the cost and complexity of the communication system.

[0004] Therefore, it is necessary to propose a new method for automatic device address allocation. Summary of the invention

[0005] In view of this, the embodiments of the present application provide a method for automatically allocating device addresses, an address allocation circuit and a communication device, which can effectively solve the problems of easy addressing errors and reliance on manual operation in the process of address allocation using dip switches in existing solutions.

[0006] In a first aspect, an embodiment of the present application provides a method for automatically allocating device addresses, which is applied to a communication device in a cascaded configuration, and the method includes:

[0007] In response to the addressing trigger operation, the address input signal is read to determine the device attribute of the device according to the address input signal;

[0008] Determine the addressing method and perform addressing according to the device attributes;

[0009] After the addressing is completed, a first addressing instruction carrying device addressing information is issued to the existing next-level communication device; the first addressing instruction is used to instruct the next-level communication device to perform addressing.

[0010] In some embodiments, determining the addressing mode and performing addressing according to the device attributes thereof includes:

[0011] If the device attribute is a master device, addressing is performed according to a preset address;

[0012] If the device attribute is a slave device, after receiving the second addressing instruction sent by the upper-level communication device, addressing is performed according to the second addressing instruction.

[0013] In some embodiments, the addressing further includes:

[0014] A wake-up signal is sent to the next-level communication device, wherein the wake-up signal is used to instruct the next-level communication device to enter an addressing instruction waiting state.

[0015] In some embodiments, if the device attribute is a slave device, after receiving the second addressing instruction sent by the upper-level communication device, the method further includes:

[0016] Parsing the second addressing instruction to obtain device addressing information for indicating addressing, and sending an address confirmation request to the master device; wherein the device addressing information includes the addressed information of the upper-level communication device or the to-be-addressed information of the current slave device itself;

[0017] If the address non-conflict information returned by the master device is received, addressing is performed according to the device addressing information.

[0018] In some embodiments, if the device attribute is a primary device, the method further includes:

[0019] After the current addressing cycle ends, preset frame data is sent to each other communication device through the communication bus to detect whether there is a communication device that has not been successfully addressed;

[0020] If it exists, the initial addressing instruction carrying the addressing information is sent again to the next-level communication device, and the re-sent initial addressing instruction is used to trigger the next-level communication device to re-address.

[0021] In some embodiments, if the device attribute is a primary device, the method further includes:

[0022] If an address confirmation request is received from other communication devices to be addressed, when it is detected that the addressing information of at least two communication devices is the same, an initialization instruction is sent to the next-level communication device, and the initialization instruction is used to instruct the next-level communication device to enter a standby state to wait for the initial addressing instruction again.

[0023] In some embodiments, the reading of the address input signal to determine the device attribute according to the address input signal includes:

[0024] If the read address input signal is in the first preset state, determining its own device attribute as a master device;

[0025] If the read address input signal is in the second preset state, or the address input signal is not in the first preset state, it is determined that the device attribute itself is a slave device.

[0026] In some embodiments, each of the addressing instructions is generated according to a preset communication protocol;

[0027] The preset communication protocol includes a pre-agreed synchronization signal, a device address data signal, an address verification data signal and a stop signal; wherein the device address data signal is used to describe the device addressing information of the corresponding communication device.

[0028] In some embodiments, the device address data signal is described by a preset number of level signal units in a preset transmission order;

[0029] Each of the level signal units is obtained by combining a first level of a first duration and a second level of a second duration, and all the level signal units have the same signal duration, wherein the sum of the first duration and the second duration is equal to the signal duration.

[0030] In some embodiments, the communication device is provided with an address allocation circuit, and the communication device receives the second addressing instruction sent by the upper-level communication device and / or sends the first addressing instruction to the lower-level communication device through the address allocation circuit.

[0031] In a second aspect, an embodiment of the present application provides an address allocation circuit, applied to a communication device, the address allocation circuit comprising:

[0032] An address receiving unit, used to connect to an existing upper-level communication device to receive a second addressing instruction issued by the upper-level communication device;

[0033] a processing unit, configured to perform addressing according to the second addressing instruction, and generate a first addressing instruction according to the device addressing information when a next-level communication device exists;

[0034] The address sending unit is used to connect to the existing next-level communication device to send the first addressing instruction to the next-level communication device; wherein the first addressing instruction is used to instruct the next-level communication device to perform addressing.

[0035] In some embodiments, the address receiving unit includes a first optical coupler, the address sending unit includes a second optical coupler, and both the first optical coupler and the second optical coupler are connected to the processing unit.

[0036] In a third aspect, an embodiment of the present application provides a communication device, comprising the above-mentioned address allocation circuit, wherein the communication device is used to implement the above-mentioned device address automatic allocation method based on the address allocation circuit.

[0037] The embodiments of the present application have the following beneficial effects:

[0038] The device address automatic allocation method of the embodiment of the present application responds to the addressing trigger operation by first judging the device attributes of the communication device according to the address input signal of the communication device itself, and determining the corresponding addressing method and performing addressing according to the device attributes of the communication device itself; after the addressing is completed, an addressing instruction is also issued to the existing next-level communication device to trigger the addressing, until the automatic address allocation of all communication devices in the serial communication is completed. The present application does not need to manually set components such as dip switches, which not only reduces costs; through automatic allocation, it reduces the dependence on manual operation and improves the efficiency and accuracy of device address allocation. In addition, the method is not limited to the number of communication devices and is easy to increase, which is beneficial to system maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 A circuit connection schematic diagram of manual address allocation in the prior art is shown;

[0041] Figure 2 A schematic diagram of the structure of a communication system according to an embodiment of the present application is shown;

[0042] Figure 3 A schematic diagram of the structure of the address allocation circuit according to an embodiment of the present application is shown;

[0043] Figure 4 A first circuit diagram of an address receiving unit using an optical coupler in an embodiment of the present application is shown;

[0044] Figure 5 A first circuit diagram of an address sending unit using an optical coupler in an embodiment of the present application is shown;

[0045] Figure 6 A second circuit diagram of an address receiving unit using an optical coupler in an embodiment of the present application is shown;

[0046] Figure 7 A second circuit diagram of an address sending unit using an optical coupler in an embodiment of the present application is shown;

[0047] Figure 8 A schematic diagram of a process flow of a method for automatically allocating device addresses according to an embodiment of the present application is shown;

[0048] Fig. 9 A schematic diagram of a process of performing addressing according to a second addressing instruction in an embodiment of the present application is shown;

[0049] Fig.10 A schematic diagram showing a composition of a preset communication protocol in an embodiment of the present application is shown;

[0050] Fig.11 A first signal schematic diagram of a preset communication protocol according to an embodiment of the present application is shown;

[0051] Fig.12 A second signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown;

[0052] Fig.13 A third signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown;

[0053] Fig.14 A fourth signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown;

[0054] Fig.15 A fifth signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown;

[0055] Fig.16 A sixth signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown;

[0056] Fig.17 A seventh signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown;

[0057] Fig.18 An eighth signal schematic diagram of the preset communication protocol of an embodiment of the present application is shown.

[0058] Description of main component symbols:

[0059] 10-address allocation circuit; 11-address receiving unit; 12-processing unit; 13-address sending unit. DETAILED DESCRIPTION

[0060] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0061] The components of the embodiments of the present application generally described and shown in the drawings herein may be arranged and designed in various configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0062] Hereinafter, the terms "including", "having" and their cognates that can be used in various embodiments of the present application are intended only to indicate specific features, numbers, steps, operations, elements, components or a combination of the foregoing items, and should not be understood as first excluding the existence of one or more other features, numbers, steps, operations, elements, components or a combination of the foregoing items or increasing the possibility of one or more features, numbers, steps, operations, elements, components or a combination of the foregoing items. In addition, the terms "first", "second", "third" and the like are only used to distinguish descriptions and cannot be understood as indicating or implying relative importance.

[0063] Unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meanings as those generally understood by those skilled in the art to which the various embodiments of the present application belong. The terms (such as those defined in generally used dictionaries) will be interpreted as having the same meanings as the contextual meanings in the relevant technical field and will not be interpreted as having idealized meanings or overly formal meanings unless clearly defined in the various embodiments of the present application.

[0064] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0065] The embodiment of the present application proposes a method for automatically allocating device addresses, which can be applied to communication systems in different fields such as industrial control, smart home, and the Internet of Things. Figure 2The communication system may include multiple communication devices in cascade arrangement, for example, the output of communication device A is connected to communication device B, the output of communication device B is connected to communication device C, the output of communication device C is connected to communication device D, and so on. It can be understood that when more communication devices need to be added to the communication system, they can be connected in cascade at the position of the last communication device, and of course, they can also be arranged in series at the middle position, which is not limited here.

[0066] It can be understood that there is a master device in the communication system, and other communication devices are slave devices. For example, communication device A is the master device, and communication device B, communication device C, communication device D...communication device N are all slave devices. These communication devices are also connected through a communication bus for data transmission. For example, a 485 bus, a CAN bus, etc. can be used, and the specific bus type is not limited here.

[0067] It can be understood that in the above-mentioned communication system, for the first communication device, it is usually used as a master device, and there is no connected upper-level communication device; for the last communication device, it is used as the last slave device, and there is no lower-level communication device; for each communication device except the first and last, there is a connected upper-level communication device and a lower-level communication device.

[0068] In order to facilitate data communication between the master device and each slave device in the communication system, the present application needs to first allocate a unique address (referred to as addressing) to each communication device. It is worth noting that if the added communication device is used as a new master device, then the addresses of all communication devices need to be reallocated at this time; if the added communication device is used as a slave device, it can be determined whether to reallocate the address based on the position where it is added. For example, if it is set at the end of the cascade, the upper-level communication device can trigger the addressing operation; if it is set at any position in the middle of the cascade, the master device can trigger all communication devices to re-address.

[0069] It should be noted that, during the automatic address allocation process, for one of the communication devices in the communication system, it usually needs to receive an addressing instruction from the upper-level communication device, and after addressing itself, generate a new addressing instruction and send it to the lower-level communication device. Therefore, in order to distinguish the above two different addressing instructions, from the perspective of the current communication device, the addressing instruction sent to the lower-level communication device is recorded as the first addressing instruction, and the addressing instruction received from the upper-level communication device is recorded as the second addressing instruction.

[0070] For example, for the first communication device, since there is no upper-level communication device, it will not receive the second addressing instruction and can only issue the first addressing instruction, which is also called the initial addressing instruction; for each communication device in the middle, it can both receive the second addressing instruction and issue the first addressing instruction; for the last communication device, since there is no lower-level communication device, it can only receive the second addressing instruction and will not issue the first addressing instruction.

[0071] The following will illustrate the implementation of automatic allocation of device addresses of the present application with some specific embodiments.

[0072] Exemplarily, the embodiments of the present application will design an address allocation circuit in each communication device so that adjacent communication devices can realize cascade settings and single-line transmission of address allocation signals based on the address allocation circuit. Furthermore, each communication device also uses an agreed preset communication protocol to describe the transmission signal during address allocation to achieve step-by-step addressing.

[0073] Figure 3 A structural schematic diagram of the address allocation circuit 10 of the embodiment of the present application is shown. The address allocation circuit 10 is applied to any communication device in the communication system. Exemplarily, the address allocation circuit 10 includes an address receiving unit 11, a processing unit 12 and an address sending unit 13, wherein the address receiving unit 11 includes an input terminal ADD_IN (as an input terminal of the address allocation circuit 10), which is used to connect to an existing upper-level communication device to receive a second addressing instruction issued from the upper-level communication device. The address sending unit 13 includes an output terminal ADD_OUT (as an output terminal of the address allocation circuit 10), which is used to connect to an existing lower-level communication device to send the generated first addressing instruction to the lower-level communication device, thereby triggering the automatic addressing of the lower-level communication device. The processing unit 12, as a core component for implementing address allocation, includes an input terminal MCU_ADD_IN for connecting to the address receiving unit 11, and an output terminal MCU_ADD_OUT for connecting to the address sending unit 13.

[0074] Among them, the processing unit 12 can be used to obtain corresponding device addressing information from the second addressing instruction after receiving it through the address receiving unit 11 to perform the addressing operation of the device itself; at the same time, if it is detected that a next-level communication device is connected, the processing unit 12 will also send the first addressing instruction carrying the device addressing information of the device itself or the next-level communication device through the address sending unit 13 to the existing next-level communication device after the addressing is completed.

[0075] It can be understood that, since the address allocation circuit can be provided in each communication device, each communication device can be configured as a master device or a slave device in different scenarios. If the communication device is configured as a master device, the input terminal ADD_IN of the address receiving unit 11 can be set to a suspended state or a specified level state without connecting to other communication devices.

[0076] Furthermore, the communication device can use this feature to configure the device attributes. For example, when the input terminal ADD_IN of the address receiving unit 11 is set to a suspended state or a set level state, the state of the input terminal MCU_ADD_IN output to the processing unit 12 changes accordingly, such as being set to a high level state for a preset time, etc., so that the processing unit 12 can determine its own device attributes by detecting the state of the input terminal MCU_ADD_IN. Among them, the types of the above-mentioned device attributes include master devices and slave devices.

[0077] If the communication device is configured as a slave device, the output terminal ADD_OUT of the address sending unit 13 will be in a suspended state, that is, it is not connected to other communication devices.

[0078] In the present application, the address receiving unit 11 and the address sending unit 13 are used together to perform signal detection and level conversion at the input end and the output end of the address allocation circuit respectively.

[0079] For example, both the address receiving unit 11 and the address sending unit 13 can be implemented by a circuit composed of an optical coupler. It can be understood that the address receiving unit 11 and the address sending unit 13 in the device address allocation circuit utilize the short propagation delay characteristics of the optical coupler so that the optical signal can be quickly converted into an electrical signal, reducing the dead time during the signal transmission process and improving the response speed and efficiency of the communication device; it can also effectively isolate the addressing instructions during the reception and transmission process to avoid being affected by interference signals, thereby improving the accuracy of the first addressing instruction issued during the transmission process and / or the second addressing instruction received. Among them, regarding the type of optical coupler, it can be a common optical coupler or a high-speed optical coupler, etc., which is not limited here.

[0080] For example, in an optional embodiment, Figure 4 As shown, the address receiving unit 11 includes a first optical coupler U1 and required peripheral auxiliary components (such as capacitors C1-C2, resistors R1, R2, R3 and R4, and a voltage regulator ZD1). Figure 5 As shown, the address sending unit 13 includes a second optical coupler U2 and required peripheral auxiliary components (such as capacitor C3, resistors R5 and R6, voltage regulator diode ZD2, etc.) Wherein, the first optical coupler U1 and the second optical coupler U2 are both common optical couplers.

[0081] In another alternative, if Figure 6 As shown, the address receiving unit 11 includes a third optical coupler U3 and required peripheral auxiliary components (such as capacitor C4, resistors R7 and R8, etc.). Figure 7 As shown, the address sending unit 13 includes a fourth optical coupler U4 and required peripheral auxiliary components (such as capacitor C5, resistors R9, R10 and R11, etc.) Wherein, the third optical coupler U3 and the fourth optical coupler U4 are both high-speed optical couplers.

[0082] It can be understood that the basic principles of high-speed optocouplers and ordinary optocouplers are the same, but they are different in specific implementation methods and material selection. Using high-speed optocouplers instead of ordinary optocouplers can change the signal transmission timing of the preset communication protocol from ms to ns, greatly improving the transmission speed of the device address allocation circuit, thereby achieving a Gbps-level transmission rate, which far exceeds the traditional electrical transmission method and can provide more powerful support for high-speed digital and analog signal transmission systems.

[0083] Based on the above-mentioned address allocation circuit structure, each communication device in the communication system can not only implement its own addressing operation, but also synchronously trigger the addressing operation of other cascaded communication devices, thereby realizing efficient and accurate allocation of addresses of all communication devices in the entire communication system.

[0084] The method for automatically allocating device addresses is described below in conjunction with some specific embodiments. It is understandable that the method for automatically allocating device addresses can be run on any communication device in the above communication system, for example, it can be the first communication device as a master device, or it can be an intermediate communication device or the last communication device as a slave device, which is not limited here.

[0085] Figure 8 A flow chart of a method for automatically allocating device addresses according to an embodiment of the present application is shown. Exemplarily, the method for automatically allocating device addresses includes the following steps:

[0086] S100, responding to the addressing trigger operation, reading the address input signal to determine the device attribute according to the address input signal.

[0087] Among them, the addressing trigger operation refers to a trigger event used to cause the communication device to enter automatic address allocation. For example, it can be the power-on operation of the communication system, that is, when the system is powered on, it will trigger all communication devices to enter the addressing standby state, etc.; or, it can be receiving an initialization instruction after an addressing exception, etc., which is not limited here.

[0088] Among them, the address input signal is used for the current communication device to judge the device attributes. For example, the address allocation circuit 10 in the communication device can judge whether there is a connection to the next-level communication device by reading the state of the input terminal ADD_IN of the address receiving unit 11 or reading the state of the input terminal MCU_ADD_IN of the processing unit 12, and then determine its own device attributes.

[0089] It is understandable that the present application does not specifically limit the level representation of the address input signal. In one embodiment, the address input signal can be represented by a one-level signal, or a two-level signal, etc. Exemplarily, if the read address input signal is in the first preset state, the device attribute is determined to be a master device; if the read address input signal is in the second preset state, or the address input signal is not in the first preset state, the device attribute is determined to be a slave device.

[0090] For example, assuming that the address input signal is represented by a one-bit level signal, when the communication device detects that the level signal of its own address input signal maintains a high level state within a set time, it determines that its own device attribute is a master device. The above-mentioned setting time can be determined based on the startup time and level detection time of the communication device. For example, the setting time includes but is not limited to 5ms or 6ms. On the contrary, when it is detected that the maintenance time of the high level state of the level signal of its own address input signal is less than the set time or the level signal is in a low level state, it determines that its own device attribute is a slave device. In this example, the first preset state is to maintain a high level state within a set time, and the second preset state is that the maintenance time of the high level state is less than the set time or the level signal is in a low level state.

[0091] For example, assuming that the address input signal is represented by a two-bit level signal, when the level signal of the address input signal is 11, the device attribute itself is determined to be a master device, when the level signal of the address input signal is 00, the device attribute itself is a slave device, or when the level signal of the address input signal is 00, 01 or 10, that is, the level signal is not 11, the device attribute itself is a slave device; in this example, the first preset state is 11, the second preset state is 00, and the first preset state is not 00, 01 or 10.

[0092] S200: Determine the addressing method and perform addressing according to the device attributes.

[0093] It can be understood that for different device attributes, the corresponding addressing methods are also different. For example, in one embodiment, if the communication device detects that its own device attribute is a master device, it will be addressed according to the preset address. For example, if the preset address is 0 or 1, the communication device as the master device will set its own address to 0 or 1 accordingly. Furthermore, for subsequent communication devices, 1 will be added to the address of the master device in sequence to obtain a unique address. It can be understood that the description form of the address in this embodiment is not limited, and address serial number, address ID, address label, etc. can also be used, that is, as long as these communication devices can be uniquely identified and located.

[0094] Optionally, if the communication device detects that its own device attribute is a slave device, it will be addressed according to the second addressing instruction issued by the upper-level communication device. For example, after receiving the second addressing instruction issued by the communication device A, the communication device B will be addressed according to the second addressing instruction; after receiving the second addressing instruction issued by the communication device B, the communication device C will be addressed according to the second addressing instruction, etc. Taking the address sequence number of the above-mentioned master device (i.e., communication device A) as 1 as an example, the address of the communication device B is 2, and the address of the communication device C is 3, that is, after receiving the second addressing instruction issued by the upper-level communication device, the slave device is addressed according to the second addressing instruction.

[0095] As an optional solution, if the communication device is configured as a slave device, the addressing process of the slave device is illustrated below.

[0096] like Fig. 9 As shown, the slave device performs addressing according to the second addressing instruction, including the following steps:

[0097] S210, parsing the second addressing instruction to obtain device addressing information.

[0098] The device addressing information carried in the second addressing instruction may be the addressed information of the upper-level communication device, or may be the to-be-addressed information of the current communication device. Furthermore, after the current communication device obtains the above-mentioned device addressing information by parsing the second addressing instruction, it may confirm its own address based on the address of the upper-level communication device (for example, if the address of the upper-level communication device is 2, then it can be known that its own address is 3), or directly obtain its own address from the second addressing instruction (for example, the address in the second addressing instruction is 3).

[0099] Optionally, after obtaining the above-mentioned device addressing information, in order to ensure the correctness of the addressing, the communication device may first send its own information to be addressed to the master device so that the master device can confirm whether there is an address conflict with other communication devices.

[0100] Exemplarily, after step S210, steps S220-S230 may also be included:

[0101] S220, sending an address confirmation request to the master device, so that the master device can determine whether the addresses conflict according to the address confirmation request.

[0102] The address confirmation request includes the communication device's own addressing information. The master device determines whether there is a conflict with the address of other communication devices based on the device addressing information in the address confirmation request. When it is confirmed that the device addressing information does not conflict, the communication device to be addressed is allowed to be addressed, that is, step S230 is executed. On the contrary, when a conflict is confirmed, further addressing is not allowed.

[0103] In one implementation, when the master device determines whether an address conflicts, it can compare the device addressing information with the addresses of all known communication devices (including the master device itself). For example, before addressing, communication device C will send its own addressing information (such as address 3) to the master device (i.e., communication device A) through a communication bus (such as a CAN bus, etc.). Then, the master device determines that there is no other communication device whose address conflicts with 3, so it confirms that there is no conflict. On the contrary, if the master device determines that the address of the existing communication device is 3, it confirms that there is a conflict.

[0104] Optionally, if the master device determines that there is an address conflict, each slave device needs to be re-addressed. At this time, the master device will send an initialization instruction to the next-level communication device to instruct the next-level communication device to enter a standby state to wait for the initial addressing instruction again, wherein the initial addressing instruction sent again is used to trigger the next-level communication device to re-address, and accordingly, other subsequent communication devices will also be re-addressed in turn.

[0105] As an optional solution, if the master device detects that the heartbeat packet of the communication device has timed out, addressing is not allowed. After reconnecting, the master device will send an initialization command to the next-level communication device to instruct the next-level communication device to enter a standby state to wait for the initial addressing command again, and then trigger the re-addressing of subsequent communication devices in turn.

[0106] S230: If the address non-conflict information returned by the master device is received, addressing is performed according to the second addressing instruction.

[0107] Exemplarily, after receiving the address non-conflict information returned by the master device, the communication device will obtain its own information to be addressed for addressing.

[0108] S300, after addressing is completed, a first addressing instruction carrying device addressing information is issued to an existing next-level communication device; the first addressing instruction is used to instruct the next-level communication device to perform addressing.

[0109] Exemplarily, except for the communication device at the end of the cascade, each of the other communication devices will receive the second addressing instruction sent by the upper-level communication device, perform addressing according to the second addressing information, and send the first addressing instruction after the addressing is completed. It can be understood that for the lower-level communication device, the second addressing instruction it receives is the same as the device addressing information of the first addressing instruction sent by the upper-level communication device.

[0110] In an optional implementation, when performing the addressing operation in step S300, the method for automatically allocating device addresses further includes:

[0111] Send a wake-up signal to the next-level communication device to make the next-level communication device enter the addressing instruction waiting state.

[0112] Exemplarily, while the current communication device is addressing, it can also synchronously send a wake-up signal to the next-level communication device to put the next-level communication device into a standby state to wait for the addressing trigger operation, that is, the next-level communication device enters an addressing instruction waiting state to save time.

[0113] For example, Figure 2 The communication device A in the communication system is the master device, and the communication devices B, C and D are slave devices; when the communication device A is addressed according to the preset address, it will simultaneously send a wake-up signal to the communication device B, so that the communication device B enters the addressing instruction waiting state; then, when the communication device B receives the first addressing instruction issued, it will address according to the first addressing instruction, and at the same time send a wake-up signal to the communication device C, so that the communication device C enters the addressing instruction waiting state, and so on.

[0114] Optionally, during the automatic addressing process, if the communication device is configured as a master device, it is also possible to determine whether all slave devices are successfully assigned addresses after the current addressing cycle ends. The method further includes:

[0115] After the current addressing cycle ends, preset frame data is sent to each other communication device through the communication bus to detect whether there is a communication device that has not been successfully addressed.

[0116] The current addressing cycle refers to the total time to correctly complete the address allocation of all communication devices once, which can be obtained through pre-testing or estimation according to the number of communication devices, etc.

[0117] Among them, the preset frame data is used to test whether all slave devices can normally receive the information of the master device. The specific content is not limited, and it mainly serves the purpose of testing whether each slave device can be identified. Exemplarily, after the current addressing cycle ends, the master device can send a frame of test data to other communication devices, that is, all slave devices, through the communication bus. If the feedback information of all slave devices cannot be received, it means that there are slave devices that have not been successfully addressed. At this time, it means that re-addressing is required. For example, the master device can resend the initial addressing instruction carrying the addressing information to the next-level communication device, wherein the re-sent initial addressing instruction is used to trigger the next-level communication device to re-address.

[0118] It is worth noting that in the present application, both the first addressing instruction and the second addressing instruction are generated according to the agreed preset communication protocol. The preset communication protocol is described in detail below.

[0119] For example, Fig.10 As shown, the preset communication protocol mainly includes the agreed synchronization signal, device address data signal, address verification data signal and stop signal; wherein, the synchronization signal is located at the head of the addressing instruction, and is used to identify the start transmission of the addressing instruction; the device address data signal is used to describe the device addressing information of the corresponding communication device; the address verification data signal is used to determine the correctness of the device addressing information of the corresponding communication device; the stop signal is located at the end of the addressing instruction, and is used to identify the end transmission of the addressing instruction. Of course, before the stop signal, the user can also add some other custom signals according to needs, which are not limited here.

[0120] It is worth noting that, since the addressing instruction generated by the preset communication protocol is transmitted through the above-mentioned address allocation circuit, each data is described by a corresponding level signal. By using different representation methods and combinations of these level signals, different preset communication protocols can be designed.

[0121] The following description is made by taking the representation of the device address data signal as an example. It is understandable that there are also multiple representations for the representation of the synchronization signal, the stop signal and the address verification data signal, which are not limited here.

[0122] Exemplarily, the device address data signal can be described by a level signal unit of a preset number of bits and in a preset transmission order. For example, in one embodiment, the device address data signal can be described by an 8-bit level signal unit, that is, the preset number of bits is 8 bits (Bit0-Bit7); at this time, a maximum of 255 devices can be communicated and addressed. As other implementations, the preset number of bits can also be set to 4 bits, 8 bits, 16 bits, etc., which can be specifically determined according to the number range of communication devices and is not limited here. It can be understood that when the number of parallel devices in the communication system is greater than 255, it is only necessary to increase the number of bits of the device address data signal in the preset communication protocol, without changing the hardware device or upgrading the entire communication system.

[0123] Furthermore, the multi-bit level signal unit in the device address data signal can be defined as a high bit and a low bit (for example, Bit 0 is defined as a low bit, and Bit 7 is defined as a high bit). When the position order of the high bit and the low bit is different, different addressing instructions will be generated. Exemplarily, different addressing instructions can be formed by the high bit first and the low bit last (i.e., transmission starts from the high bit) or the low bit first and the high bit last (i.e., transmission starts from the low bit).

[0124] Wherein, each level signal unit represents 1 bit, and the value of the bit can be represented in different forms. Exemplarily, each level signal unit can be obtained by combining different level intervals, for example, by combining the first level of the first duration and the second level of the second duration, and the signal duration of all level signal units is the same, wherein the sum of the first duration and the second duration is equal to the signal duration. It can be understood that the above-mentioned first level and second level can be a high level or a low level, which can be specifically distinguished by binary 0 or 1. Usually, a high level can be represented by 1 and a low level can be represented by 0. It can be understood that by combining different first durations, second durations, first levels and second levels, a description of a level signal unit can be achieved, and different combinations can also represent different values ​​of the level signal unit.

[0125] In one embodiment, Fig.11As shown, for the device address data signal in the preset communication protocol, for example, the first level (corresponding to the high level) of the level signal unit Bit0 corresponds to a first duration of 2ms, the second level (corresponding to the low level) corresponds to a second duration of 3ms, and the signal duration of the level signal unit Bit0 is 5ms, which indicates that the value of the level signal unit Bit0 is a low level (i.e., Bit0=0); the first level (corresponding to the high level) of the level signal unit Bit1 corresponds to a first duration of 3ms, the second level (corresponding to the low level) corresponds to a second duration of 2ms, and the signal duration of the level signal unit Bit1 is 5ms, which indicates that the level signal unit Bit1 is a high level (i.e., Bit1=1); similarly, the signal duration of each level signal unit of the level signal units Bit2-Bit7 is 5ms. Among them, the above signal duration is not limited to 5ms, and can also be set to other values, which are not limited here.

[0126] In addition, the preset communication protocol can also be expressed in many other ways. For example, in some embodiments, when the synchronization signal and the stop signal are expressed in the same way, a single level signal unit in the device address data signal uses the same expression form (i.e., Fig.11 The values ​​represented by the first level being in front and the second level being in the back, and the time lengths corresponding to the first level and the second level respectively remain unchanged) are different. Fig.12 and Fig.11 The preset communication protocols shown differ in that Fig.12 The first time length corresponding to the first level (high level) is 2ms and the second time length corresponding to the second level (low level) is 3ms, which indicates that the value of the level signal unit Bit0 is high level (ie, Bit0=1).

[0127] For example, in some embodiments, the synchronization signal and the stop signal are represented in the same manner, and a single level signal unit in the device address data signal uses the above-mentioned representation form, and the position order of each level signal unit in the device address data signal is changed (to change the transmission timing) to form different communication protocols. Fig.13 and Fig.11 The preset communication protocols shown differ in that Fig.11 The multiple level signal units of the preset number of bits in the device address data signal in the device address data signal are described in the order of low bit first and high bit last. Fig.13 The device address data signal in is described in the order of high bit first and low bit last.

[0128] For another example, in some implementations, when the synchronization signal and the stop signal are represented in the same manner, different communication protocols are formed by changing the value represented by the expression form of a single level signal unit in the device address data signal and changing the position order of each level signal unit. Fig.14 and Fig.11 The preset communication protocols shown differ in that Fig.14 The multiple level signal units in the device address data signal are in the order of high bit first and low bit last, and for the value of the level signal unit, the first time length corresponding to the first level (high level) is 2ms and the second time length corresponding to the second level (low level) is 3ms. At this time, it indicates that the value of the level signal unit Bit7 is a high level (that is, Bit7=1).

[0129] Understandably, Figure 11-Figure 14 The common point is that the first level in a single level signal unit is a high level and the second level is a low level. Similarly, if the description method of the first level in a single level signal unit is a low level and the second level is a high level is adopted, several other possible communication protocols can be obtained.

[0130] like Figure 15-18 As shown, Fig.15 and Fig.11 The representation of a single level signal unit in is completely opposite, but the representation of the value of a single level signal unit (Bit) is the same; Fig.16 and Fig.15 The difference is that a single level signal unit (Bit) represents different values ​​in the same representation form; Fig.17 and Fig.15 The difference is that the position order of the high and low bits of the level signal unit is adjusted; Fig.18 and Fig.15 The difference is that a single level signal unit (Bit) represents different values ​​in the same representation form, and the position sequence of the high and low bits of the level signal unit is adjusted.

[0131] It can be understood that by optimizing the data transmission format and timing of the device address data signal in the preset communication protocol, communication protocols of different formats can be formed, which can improve communication efficiency and reliability, and can also adapt to the diverse needs of automatic address allocation. In addition, for other signals, different level signals can also be used to represent them, which is not limited here.

[0132] The automatic device address allocation technology of this application has the following effects:

[0133] (1) Compared with the traditional scheme of using DIP switch addressing, the present application avoids the need for operators to understand "hexadecimal" and avoids the problem of being unable to perform DIP sequence without a corresponding switch drawing, thereby reducing the probability of error;

[0134] (2) In the case of insufficient technical support or personnel training, this application only needs to ensure that the communication connection on the hardware is normal to automatically allocate addresses, which reduces the training cost for technical personnel and the limitations of installers, that is, reduces the dependence on manual operation; in application scenarios with high addressing change frequency, it can also greatly reduce the cost of manual maintenance;

[0135] (3) Compared with the traditional DIP switch addressing solution, the automatic allocation method of the present application does not need to identify the levels of multiple IOs. It only needs to identify the two IO interfaces (i.e., input terminal ADD_IN and output terminal ADD_OUT) of the address allocation circuit based on the preset communication protocol, thereby reducing the interference of environmental factors;

[0136] (4) The addressing sequence of the DIP switches in the traditional solution is not necessarily coherent (1, 2, 3), and there may be a working condition of (1, 3, 2), which will increase the labor maintenance cost. However, in the automatic allocation method of the present application, all device addresses are coherent and sequentially addressed. The corresponding addressed device can be quickly located using the communication bus, and it is no longer necessary to look up the hexadecimal DIP table as in the traditional solution, which greatly reduces the labor cost;

[0137] (5) The automatic allocation method of the present application is based on a preset communication protocol. When a new communication device needs to be incorporated, the number of allocations can be effectively expanded by simply changing the preset communication protocol for transmission. This method can be flexibly applied to communication systems of different sizes. In addition, the preset communication protocol greatly increases the effectiveness and accuracy of communication information by means of verification.

[0138] (6) The automatic allocation method of the present application can also enable the communication system to have a fault detection function through a complete conflict detection and re-addressing resolution mechanism, so as to timely discover and handle problems such as disconnection of the slave device, thereby ensuring that the communication system can stably transmit the addressing instructions.

[0139] The embodiments of the present application also provide a communication device, which may be, for example, various sensor devices, central control devices, etc. in different fields such as industrial control, smart home, Internet of Things, etc., and is not limited here.

[0140] Exemplarily, the communication device includes the device address allocation circuit in the above embodiment, wherein the communication device is used to implement the device address automatic allocation method in the above embodiment based on the device address allocation circuit in the above embodiment. In addition, the communication device also includes a processor and a memory, etc., wherein the memory is used to store computer programs, and the processor is used as a core component of the communication device to support the control of multiple functions of the communication device. Optionally, the processor and the processing unit 12 in the device address allocation circuit can be shared or separately provided, which is not limited here.

[0141] Among them, the processor can be an integrated circuit chip with signal processing capabilities. The processor can be a general-purpose processor, including a central processing unit (CPU), a graphics processing unit (GPU) and a network processor (NP), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or at least one of other programmable logic devices, discrete gates or transistor logic devices, and discrete hardware components. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc., which can implement or execute the disclosed methods, steps and logic block diagrams in the embodiments of the present application.

[0142] The memory may be, but is not limited to, a random access memory (RAM), a read only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), etc. The memory is used to store a computer program, and the processor may execute the computer program accordingly after receiving an execution instruction.

[0143] The present application also provides a computer-readable storage medium for storing the computer program used in the above communication device. For example, the computer-readable storage medium may include, but is not limited to, various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0144] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can also be implemented in other ways. The device embodiments described above are merely schematic. For example, the flowcharts and structure diagrams in the accompanying drawings show the possible architecture, functions and operations of the devices, methods and computer program products according to multiple embodiments of the present application. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, a program segment or a part of a code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in an alternative implementation, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the structure diagram and / or the flow diagram, and the combination of boxes in the structure diagram and / or the flow diagram, can be implemented with a dedicated hardware-based system that performs a specified function or action, or can be implemented with a combination of dedicated hardware and computer instructions.

[0145] In addition, the functional modules or units in the various embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

[0146] If the functions are implemented in the form of software function modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a smart phone, a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application.

[0147] The above description is only a specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.

Claims

1. A method for automatically allocating device addresses, characterized in that: Applicable to a communication device in a cascade setting, the method comprising: In response to the addressing trigger operation, the address input signal is read to determine the device attribute of the device according to the address input signal; Determine the addressing method and perform addressing according to the device attributes; After the addressing is completed, a first addressing instruction carrying device addressing information is issued to the existing next-level communication device; the first addressing instruction is used to instruct the next-level communication device to perform addressing.

2. The method for automatically allocating device addresses according to claim 1, characterized in that: Determining the addressing mode and performing addressing according to the device attributes thereof includes: If the device attribute is a master device, addressing is performed according to a preset address; If the device attribute is a slave device, after receiving the second addressing instruction sent by the upper-level communication device, addressing is performed according to the second addressing instruction.

3. The method for automatically allocating device addresses according to claim 1, characterized in that: The addressing also includes: A wake-up signal is sent to the next-level communication device, wherein the wake-up signal is used to instruct the next-level communication device to enter an addressing instruction waiting state.

4. The method for automatically allocating device addresses according to claim 2, characterized in that: If the device attribute is a slave device, after receiving the second addressing instruction sent by the upper-level communication device, the method further includes: Parsing the second addressing instruction to obtain device addressing information for indicating addressing, and sending an address confirmation request to the master device; wherein the device addressing information includes the addressed information of the upper-level communication device or the to-be-addressed information of the current slave device itself; If the address non-conflict information returned by the master device is received, addressing is performed according to the device addressing information.

5. The method for automatically allocating device addresses according to claim 2, characterized in that: If the device attribute is a primary device, the method further includes: After the current addressing cycle ends, preset frame data is sent to each other communication device through the communication bus to detect whether there is a communication device that has not been successfully addressed; If it exists, the initial addressing instruction carrying the addressing information is sent again to the next-level communication device, and the re-sent initial addressing instruction is used to trigger the next-level communication device to re-address.

6. The method for automatically allocating device addresses according to claim 2, characterized in that: If the device attribute is a primary device, the method further includes: If an address confirmation request is received from other communication devices to be addressed, when it is detected that the addressing information of at least two communication devices is the same, an initialization instruction is sent to the next-level communication device, and the initialization instruction is used to instruct the next-level communication device to enter a standby state to wait for the initial addressing instruction again.

7. The method for automatically allocating device addresses according to any one of claims 1 to 6, characterized in that: The reading of the address input signal to determine the device attribute of the device according to the address input signal includes: If the read address input signal is in the first preset state, determining its own device attribute as a master device; If the read address input signal is in the second preset state, or the address input signal is not in the first preset state, it is determined that the device attribute itself is a slave device.

8. The method for automatically allocating device addresses according to any one of claims 1 to 6, characterized in that: Each of the addressing instructions is generated according to a preset communication protocol; The preset communication protocol includes a pre-agreed synchronization signal, a device address data signal, an address verification data signal and a stop signal; wherein the device address data signal is used to describe the device addressing information of the corresponding communication device.

9. The method for automatically allocating device addresses according to claim 8, characterized in that: The device address data signal is described by a level signal unit with a preset number of bits in a preset transmission order; Each of the level signal units is obtained by combining a first level of a first duration and a second level of a second duration, and all the level signal units have the same signal duration, wherein the sum of the first duration and the second duration is equal to the signal duration.

10. The method for automatically allocating device addresses according to claim 2, characterized in that: The communication device is provided with an address allocation circuit, and the communication device receives the second addressing instruction sent by the upper-level communication device and / or sends the first addressing instruction to the lower-level communication device through the address allocation circuit.

11. An address allocation circuit, characterized in that: Applied to a communication device, the address allocation circuit comprises: An address receiving unit, used to connect to an existing upper-level communication device to receive a second addressing instruction issued by the upper-level communication device; a processing unit, configured to perform addressing according to the second addressing instruction, and generate a first addressing instruction according to the device addressing information when a next-level communication device exists; The address sending unit is used to connect to the existing next-level communication device to send the first addressing instruction to the next-level communication device; wherein the first addressing instruction is used to instruct the next-level communication device to perform addressing.

12. The address allocation circuit according to claim 11, characterized in that: The address receiving unit includes a first optical coupler, the address sending unit includes a second optical coupler, and both the first optical coupler and the second optical coupler are connected to the processing unit.

13. A communication device, characterized in that: The communication device comprises the address allocation circuit as claimed in claim 11 or 12, and is used to implement the device address automatic allocation method according to any one of claims 1 to 10 based on the address allocation circuit.

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