High-voltage GaN high-electron-mobility transistor with stepped electric field auxiliary voltage-withstanding layer

Abstract

The invention belongs to the technical field of semiconductors, relates to a high electron mobility transistor (HEMT), and particularly provides a high-voltage GaN high electron mobility transistor with a stepped electric field auxiliary voltage-resistant layer, which is used for solving the problems of low breakdown voltage, high specific on-resistance, current collapse effect and the like of the traditional GaN HEMT device. The invention creatively provides a stepped electric field auxiliary voltage-withstanding layer structure for improving the breakdown voltage of the device, so that the electric field distribution between the grid electrode and the drain electrode of the device is more uniform, and the problem of electric field concentration caused by the fact that polarized charges are attracted by the grid electrode is solved, thereby greatly improving the breakdown voltage of the device and improving the reliability of the device. On the basis, the influence of current collapse on the device is weakened, and the reliability of the device is improved; according to the invention, a new design direction and thought are provided for the high-voltage GaN HEMT device, and commercial application of the high-voltage GaN HEMT device is facilitated.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor technology, relates to a high electron mobility transistor (HEMT), and specifically provides a high-voltage GaN high electron mobility transistor with a novel structure having a stepped electric field assisted voltage-withstanding layer. Background Art

[0002] With the continuous development of power electronics, the limitations of traditional Si-based materials have become increasingly greater, and they can no longer meet the requirements of current devices. The most intuitive manifestation is the Si limit, which can no longer meet the balance requirements of breakdown voltage and on-resistance at the same time, and its role in the high-end application market has begun to become increasingly weak. With the progress of the times, scientific researchers have gradually shifted their attention to the third-generation semiconductors with better performance and more perfect performance. As a third-generation semiconductor, GaN is widely regarded as the most promising semiconductor material after the first-generation semiconductors Si and Ge and the second-generation semiconductors GaAs and InSb. It has outstanding advantages such as wide bandgap, high electron drift velocity, high thermal conductivity, high breakdown electric field, high heat resistance, and high radiation resistance. It can work under high temperature conditions and has higher breakdown voltage and better breakdown characteristics. These characteristics determine that GaN is an excellent material for manufacturing high-temperature, high-voltage, high-power, and radiation-resistant semiconductor devices. At present, GaN-based devices have played an important role in application fields such as electric vehicles, smart homes, and mobile communications.

[0003] High Electron Mobility Transistor (HEMT) is a heterojunction field effect transistor. HEMT based on AlGaN / GaN has become the representative of GaN electronic devices. HEMT devices use AlGaN / GaN materials to form a heterojunction. At the same time, the spontaneous and piezoelectric polarization effects of HEMT form a positively polarized charge bending energy band distribution at the interface and form a quantum potential well. The electrons distributed in the quantum potential well can move freely along the heterojunction interface, while the electron movement in the direction perpendicular to the heterojunction interface is restricted, thereby forming a two-dimensional electron gas, and the surface density of the electron gas is very high. Even under undoped conditions, the surface density can reach 1x10 13 cm -2 In addition, since the electron gas is on the intrinsic semiconductor side, there is no scattering effect of ionized impurities, making the AlGaN / GaN HEMT device have a high 2 / (V×S) electron mobility is much higher than 900cm 2 / (V×S) of body mobility, thus ensuring that the device has excellent forward characteristics. It can be seen that the high electron mobility and high carrier surface density characteristics of AlGaN / GaN HEMT devices make them suitable for high-frequency applications, while the wide bandgap, high breakdown field strength, and high electron saturation rate characteristics make them suitable for microwave / millimeter wave high-power device applications; in addition, the AlGaN / GaN HEMT structure can be grown on high thermal conductivity substrates such as SiC and diamond, thereby making up for the lack of low thermal conductivity of the material itself, so that the device has better heat dissipation; and the AlGaN / GaN HEMT structure can also be grown on low-priced, mature process, and large-diameter Si substrates, while having the advantages of high performance and low cost; therefore, AlGaN / GaNHEMT devices have become the currently recognized ideal power switching devices.

[0004] After the AlGaN / GaN HEMT device structure was first proposed, the focus of scientific researchers was mainly on the material research and growth process of GaN. During this process, AlGaN / GaN HEMT withstand voltage devices were proposed, but due to various constraints, the breakdown voltage of the devices was not high. Specifically, when the two-dimensional electron gas in the channel of the HEMT device is depleted in the off state, a positive fixed polarization charge will be left. The electric lines emitted from the positive polarization charge will be attracted by the gate, which can easily cause the gate electric field to concentrate, resulting in uneven distribution of the electric field between the gate and the drain of the device. The electric field is concentrated at the edge of the gate, which can easily cause the device to break down here, resulting in the device itself with a low withstand voltage. In addition, the low withstand voltage of the HEMT device is also affected by the growth process. The substrate for preparing GaN HEMT is usually heteroepitaxially grown on sapphire, silicon carbide or silicon as the substrate. The lattice mismatch between GaN and it is 13%, 3.4% and 17% respectively. The huge lattice mismatch makes the defect density of GaN grown on the substrate large (>10 7 cm -2 ); In addition, in the blocking state, when a high voltage is applied to the drain, defects and impurities will become the medium of electrical conduction, and a new conductive channel will be generated in the buffer layer, causing device breakdown. Moreover, when the material growth process is not mature enough, the gate Schottky leakage current will also cause device breakdown. It can be seen that since the HEMT device was proposed, the voltage-withstand structure has always been an unavoidable problem. Therefore, the present invention proposes a high-voltage GaN high electron mobility transistor with a new structure of a stepped electric field-assisted voltage-withstand layer. Summary of the invention

[0005] The purpose of the present invention is to provide a high-voltage GaN high electron mobility transistor with a new structure of a stepped electric field assisted voltage-withstanding layer, so as to solve the problems of low breakdown voltage, high specific on-resistance and current collapse effect existing in traditional GaN HEMT devices. The present invention creatively proposes a stepped electric field assisted voltage-withstanding layer structure to increase the breakdown voltage of the device, so that the electric field distribution between the gate and the drain of the device is more uniform, and solves the problem of electric field concentration caused by polarized charges being attracted by the gate, thereby greatly increasing the breakdown voltage of the device, and on this basis, reducing the influence of current collapse on the device, and improving the reliability of the device; the present invention provides a new design direction and idea for high-voltage GaN HEMT devices, which is conducive to the commercial application of high-voltage GaN HEMT devices.

[0006] To achieve the above object, the technical solution adopted by the present invention is:

[0007] A high-voltage GaN high electron mobility transistor with a stepped electric field assisted withstand voltage layer comprises: a substrate 1, a GaN buffer layer 2 arranged on the substrate, a GaN channel layer 3 arranged on the GaN buffer layer, an AlGaN barrier layer 4 arranged on the GaN channel layer, a stepped electric field assisted withstand voltage layer 5 arranged on the AlGaN barrier layer, a gate electrode 6, a source electrode 7 and a drain electrode 8; characterized in that:

[0008] The source electrode 7 and the drain electrode 8 are located on both sides of the device and form ohmic contacts with the AlGaN barrier layer 4 respectively; the step electric field auxiliary voltage-withstanding layer 5 is located between the source electrode 7 and the drain electrode 8, and the step electric field auxiliary voltage-withstanding layer adopts a stepped structure with decreasing height along the direction from the source electrode to the drain electrode; the gate electrode 6 is arranged on the step electric field auxiliary voltage-withstanding layer 5, and is located at the maximum height of the step electric field auxiliary voltage-withstanding layer, and the gate electrode forms an ohmic contact with the step electric field auxiliary voltage-withstanding layer.

[0009] A high-voltage GaN high electron mobility transistor with a self-bias circuit and a stepped electric field assisted withstand voltage layer, comprising: a substrate 1, a GaN buffer layer 2 arranged on the substrate, a GaN channel layer 3 arranged on the GaN buffer layer, an AlGaN barrier layer 4 arranged on the GaN channel layer, a stepped electric field assisted withstand voltage layer 5 arranged on the AlGaN barrier layer, a gate electrode 6, a source electrode 7, a drain electrode 8, a P-GaN layer 9 and a P-top electrode 10, and an off-chip silicon-based Schottky diode D0 and a capacitor C0; characterized in that:

[0010] The source electrode 7 and the drain electrode 8 are located on both sides of the device and form ohmic contacts with the AlGaN barrier layer 4 respectively; the step electric field auxiliary voltage-bearing layer 5 is located between the source electrode 7 and the drain electrode 8, and the step electric field auxiliary voltage-bearing layer adopts a step-like structure with decreasing height from the source electrode to the drain electrode; the P-GaN layer 9 is located between the source electrode 7 and the step electric field auxiliary voltage-bearing layer 5, the gate electrode 6 is arranged on the P-GaN layer 9, and forms an ohmic contact with the P-GaN layer; the P-top electrode 10 is arranged on the step electric field auxiliary voltage-bearing layer 5, and is located at the maximum height of the step electric field auxiliary voltage-bearing layer, and the P-top electrode forms an ohmic contact with the step electric field auxiliary voltage-bearing layer; the positive electrode of the Schottky diode D0 is connected to the gate electrode 6, the negative electrode is connected to the source electrode 7 after being connected in series with the capacitor C0, and the P-top electrode 10 is connected to the negative electrode of the Schottky diode D0.

[0011] Furthermore, the two high-voltage GaN high electron mobility transistors further include: a dielectric passivation layer 11, which is disposed between the AlGaN barrier layer 4 and the P-GaN step electric field auxiliary withstand voltage layer 5, and the dielectric passivation layer is connected to the drain electrode 8 on the drain side and avoids the bottom of the gate electrode 6 on the gate side. Furthermore, the dielectric passivation layer uses an insulating medium SiN, SiO2 or Al2O3.

[0012] Furthermore, in the above two types of high-voltage GaN high electron mobility transistors, the number of steps of the step electric field auxiliary voltage-withstanding layer 5 is Q, and the value range of Q is: Q≥2.

[0013] Furthermore, in the above two high-voltage GaN high electron mobility transistors, the step electric field auxiliary voltage-withstanding layer 5 is made of P-GaN, P-NiO, SiC, High-K or oxide layer material.

[0014] Furthermore, in the above two high-voltage GaN high electron mobility transistors, the substrate is made of sapphire, Si, SiC or GaN.

[0015] Based on the above technical solution, the beneficial effects of the present invention are:

[0016] 1. Conventional GaN HEMT devices are depletion-mode devices, and the threshold voltage when the channel is turned on is negative, that is, when no voltage is applied to the gate, the device is in the on state (i.e., turned on), which brings inconvenience during use and also reduces the integration and efficiency of the device; therefore, the present invention adds a P-GaN structure under the gate to achieve an enhanced device design;

[0017] Based on the traditional depletion-type GaN high electron mobility transistor, a heavily doped P-type GaN layer is introduced under the gate. After insertion, the gate and the barrier layer form an ohmic contact, and the energy band is increased at zero gate voltage so that the electrons in the channel under the gate are consumed, thereby optimizing it into an enhancement-type device. At the same time, in the on state, the holes of the ohmic contact P-GaN are injected into the drift region, which enhances impurity scattering, reduces the electron mobility of the device, and effectively improves the current collapse effect.

[0018] 2. Considering the voltage resistance of GaN HEMT devices, since the two-dimensional electron gas in the channel is depleted in the off state, the positive fixed polarization charge left behind will be attracted by the gate, thereby concentrating the gate electric field and causing the device to easily break down; the present invention creatively proposes a stepped electric field assisted voltage resistance layer technology, introducing a stepped electric field assisted voltage resistance layer (P-GaN cap layer) on the surface of the drift region, the thickness of the stepped electric field assisted voltage resistance layer decreases with the increase of the distance from the gate, and the stepped electric field assisted voltage resistance layer helps to deplete the 2DEG, making the electric field on the surface of the device more uniform, thereby increasing the breakdown voltage; combined with the process flow of HEMT, a layer of heavily doped stepped electric field assisted voltage resistance layer can be preferentially formed on the surface of the device, and through a multi-step etching process, the thickness of the stepped electric field assisted voltage resistance layer is reduced with the increase of the distance from the gate, thereby forming a multi-layer stepped voltage resistance layer;

[0019] At the same time, the present invention connects an off-chip Schottky diode D0 and a capacitor C0 between the gate and the source, and the P-top electrode is connected to the cathode electrode of the diode; therefore, the potential of the P-GaN cap in the drift region is clamped by the P-top electrode; in the forward conduction state (V G =6V), the diode is turned on, C0 is charged to about 5.7V, and P-GaN is self-biased to about 5.7V, ensuring that the 2DEG in the drift region is not depleted; in the off state (V G <0V), D0 is turned off to prevent C0 from discharging. As V DS The P-GaN cap helps to deplete the 2DEG, and the electric flux density generated by the positive charges in the GaN channel layer (including the interface of GaN and AlGaN) and the negative charges in the P-GaN cap of the electric field assist layer compensate each other, making the surface electric field of the device almost uniform and reducing the peak electric field on the gate side.

[0020] In addition, a stepped P-GaN cap layer is set on the dielectric passivation layer between the gate and the drain, which optimizes the electric field distribution between the gate and the drain, thereby greatly reducing the peak electric field at the gate edge, thereby improving the breakdown voltage of the entire device. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 Schematic diagram of the structure of a novel high-voltage GaN high electron mobility transistor with a stepped electric field assisted voltage-withstanding layer in Example 1 of the present invention.

[0022] Figure 2 It is a schematic structural diagram of a novel high-voltage GaN high electron mobility transistor having a stepped electric field assisted voltage-withstanding layer with a self-bias circuit in Example 2 of the present invention.

[0023] Figure 3 Schematic diagram of the structure of a novel high-voltage GaN high electron mobility transistor with step electric field assisted voltage-withstand layer passivation in Example 3 of the present invention. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and beneficial effects of the present invention more clearly understood, the present invention is clearly and completely described below in conjunction with the drawings and embodiments; it is obvious that the described embodiments are only part of the implementation methods of the present invention, rather than all the implementation methods.

[0025] Example 1

[0026] This embodiment provides a novel high-voltage GaN high electron mobility transistor device with a stepped electric field auxiliary voltage-withstanding layer, and its structure is as follows: Figure 1 As shown, it includes: a substrate 1, a GaN buffer layer 2 arranged on the substrate, a GaN channel layer 3 arranged on the GaN buffer layer, an AlGaN barrier layer 4 arranged on the GaN channel layer, a P-GaN step electric field auxiliary voltage-bearing layer 5, a gate electrode 6, a source electrode 7 and a drain electrode 8 arranged on the AlGaN barrier layer; wherein the source electrode 7 and the drain electrode 8 are located on both sides of the device, and form ohmic contacts with the AlGaN barrier layer 4 respectively; the P-GaN step electric field auxiliary voltage-bearing layer 5 is located between the source electrode 7 and the drain electrode 8, and the P-GaN step electric field auxiliary voltage-bearing layer adopts a stepped structure with decreasing height along the direction from the source electrode to the drain electrode; the gate electrode 6 is arranged on the P-GaN step electric field auxiliary voltage-bearing layer 5, and is located at the maximum height of the P-GaN step electric field auxiliary voltage-bearing layer, and the gate electrode forms an ohmic contact with the P-GaN step electric field auxiliary voltage-bearing layer.

[0027] It should be noted that: in this embodiment, the P-GaN voltage-resistant layer adopts a three-step stepped structure, and along the direction from the source electrode to the drain electrode, there are the first step, the second step and the third step, the width of the first step is L1, and the height is t1, the width of the second step is L2, and the height is t2, the width of the third step is L3, and the height is t3; among them, L1≥L2≥L3, t1>t2>t3, the height difference between the steps can be the same or different, the width difference between the steps can be the same or different, and the width difference between the steps can be the same or different. On the premise that the width and height of each step meet the size relationship, the adaptive simulation optimization can be modified according to the actual application.

[0028] For the above-mentioned novel high-voltage GaN high electron mobility transistor device, the working principle of this embodiment is:

[0029] In the above-mentioned new high-voltage GaN high electron mobility transistor device, 2DEG conduction is formed through the polarization effect; in the forward conduction state, 2DEG is formed in the channel below the gate, thereby forming an electron flow path from the source to the drain, and the device is turned on; the step electric field auxiliary voltage-resistant layer (P-GaN cap) forms an ohmic contact with the gate electrode, and hole injection occurs, which effectively improves the current collapse effect of the device; in the off state, the energy band of the GaN channel layer below the gate is pulled up, and no potential well region is formed, so there is no 2DEG, the device cannot be turned on, and is in a blocking state; as V DS With the increase of , the P-GaN cap layer helps to deplete 2DEG, and the thickness of the P-GaN cap layer decreases with the increase of the distance from the gate. The P-GaN cap layer is thicker at the electric field concentration at the gate edge, and the P-GaN cap layer is thinner away from the gate electrode. The P-GaN cap layer assists in depleting the 2DEG at the channel, making the surface electric field of the device more uniform, thereby increasing the breakdown voltage.

[0030] Example 2

[0031] This embodiment provides a novel high-voltage GaN high electron mobility transistor with a stepped electric field assisted withstand voltage layer having a self-bias circuit. On the basis of Embodiment 1, this embodiment sets a P-GaN layer to realize an enhanced structure, which can effectively reduce the gate capacitance of the device, thereby reducing the switching loss of the device; at the same time, the matching self-bias circuit realizes potential guidance, more effectively realizes the hole injection effect, and improves the current collapse effect of the device; specifically, its structure is as follows Figure 2As shown, it includes: a substrate 1, a GaN buffer layer 2 arranged on the substrate, a GaN channel layer 3 arranged on the GaN buffer layer, an AlGaN barrier layer 4 arranged on the GaN channel layer, a P-GaN step electric field auxiliary withstand voltage layer 5 arranged on the AlGaN barrier layer, a gate electrode 6, a source electrode 7, a drain electrode 8, a P-GaN layer 9 and a P-top electrode 10, and an off-chip silicon-based Schottky diode D0 and a capacitor C0; wherein the source electrode 7 and the drain electrode 8 are located on both sides of the device and form ohmic contacts with the AlGaN barrier layer 4 respectively; the P-GaN step electric field auxiliary withstand voltage layer 5 is located between the source electrode 7 and the drain electrode 8, and the P-GaN step electric field auxiliary withstand voltage layer 5 is located between the source electrode 7 and the drain electrode 8, and the P-GaN step electric field auxiliary withstand voltage layer 5 is located between the source electrode 7 and the drain electrode 8. The layer adopts a stepped structure with decreasing height from the source electrode to the drain electrode; the P-GaN layer 9 is located between the source electrode 7 and the P-GaN step electric field auxiliary voltage-resistant layer 5, and the gate electrode 6 is arranged on the P-GaN layer 9 and forms an ohmic contact with the P-GaN layer; the P-top electrode 10 is arranged on the P-GaN step electric field auxiliary voltage-resistant layer 5, and is located at the maximum height of the P-GaN step electric field auxiliary voltage-resistant layer, and the P-top electrode forms an ohmic contact with the P-GaN step electric field auxiliary voltage-resistant layer; the positive electrode of the Schottky diode D0 is connected to the gate electrode 6, the negative electrode is connected to the source electrode 7 after being connected in series with the capacitor C0, and the P-top electrode 10 is connected to the negative electrode of the Schottky diode D0.

[0032] For the above-mentioned novel high-voltage GaN high electron mobility transistor device, the working principle of this embodiment is:

[0033] In the novel high-voltage GaN high-electron-mobility transistor device with a step-electric field-assisted voltage-withstanding layer having a self-bias circuit, 2DEG conduction is formed by polarization effect; in the forward conduction state, the gate voltage of the device is set to V G =6V, 2DEG is formed in the channel below the gate, and then an electron flow path from the source to the drain is formed, and the device is turned on; at this time, the diode D0 is turned on, and C0 is charged to about 5.7V. Therefore, the P-top potential is 5.7V, and the P-GaN cap layer is self-biased at about 5.7V to ensure that the 2DEG in the drift region is not depleted; in the off state (V G <0V), the energy band of the GaN channel layer below the gate is pulled up, no potential well region is formed, and there is no 2DEG; at this time, the external D0 is turned off to prevent C0 from discharging; as V DSThe increase of the stepped electric field auxiliary withstand layer (P-GaN cap) helps to deplete the 2DEG, and the electric flux density generated by the positive charges in the GaN channel layer (including the interface between GaN and AlGaN) and the negative charges in the P-GaN cap layer compensates each other, so that the surface electric field of the device is almost uniform, reducing the peak electric field on the gate side; it is worth noting that the gate electrode forms an ohmic contact with the P-GaN layer, and the P-top electrode forms an ohmic contact with the P-GaN cap layer. When forward conduction occurs, hole injection occurs, which effectively improves the current collapse effect of the device, thereby providing holes for the location where negative surface traps appear in the AlGaN barrier layer, preventing the influence of negative surface traps from reaching the 2DEG layer. Furthermore, compared with Example 1, the P-GaN cap layer is not directly connected to the gate electrode, but is connected to the P-top electrode. This structure effectively reduces the gate capacitance, reduces the switching loss, improves the switching time, and greatly improves the efficiency of the system. On the other hand, in the device blocking state, the gate potential in Example 1 is 0V, and the P-GaN cap layer potential is biased to 0V. At this time, the electric field under the gate is the highest, while in the blocking state in Example 2, the P-top electrode is about 5V, and the P-GaNcap layer potential is larger, which attracts more electric lines and alleviates the electric field spikes at the gate edge. The electric field on the device surface is more uniform, and the device withstand voltage level is also higher.

[0034] Example 3

[0035] This embodiment provides a novel high-voltage GaN high electron mobility transistor device with step electric field assisted voltage-withstand layer passivation. On the basis of Embodiment 1, a passivation layer is introduced to improve the reliability of the internal electric field of the device, relieve the surface state of the device, and thus improve the threshold voltage stability of the device; specifically, its structure is as follows Figure 3As shown, it includes: a substrate 1, a GaN buffer layer 2 arranged on the substrate, a GaN channel layer 3 arranged on the GaN buffer layer, an AlGaN barrier layer 4 arranged on the GaN channel layer, a P-GaN step electric field auxiliary withstand voltage layer 5 arranged on the AlGaN barrier layer, a gate electrode 6, a source electrode 7, a drain electrode 8 and a SIN passivation layer 11; wherein the source electrode 7 and the drain electrode 8 are located on both sides of the device and form ohmic contacts with the AlGaN barrier layer 4 respectively; the P-GaN step electric field auxiliary withstand voltage layer 5 is located between the source electrode 7 and the drain electrode 8, and the P-GaN step electric field auxiliary withstand voltage layer is arranged along the source electrode to the drain electrode 8. The drain electrode direction adopts a stepped structure with decreasing height; the gate electrode 6 is arranged on the P-GaN step electric field auxiliary voltage-bearing layer 5, and is located at the maximum height of the P-GaN step electric field auxiliary voltage-bearing layer, and the gate electrode forms an ohmic contact with the P-GaN step electric field auxiliary voltage-bearing layer; the SIN passivation layer 11 is arranged between the AlGaN barrier layer 4 and the P-GaN step electric field auxiliary voltage-bearing layer 5, and the right SIN passivation layer is connected to the drain electrode 8 on the drain side and avoids the bottom of the gate electrode 6 on the gate side, and the left SIN passivation layer is connected to the source electrode 7 on the source side and avoids the bottom of the gate electrode 6 on the gate side.

[0036] For the above-mentioned novel high-voltage GaN high electron mobility transistor device, the working principle of this embodiment is:

[0037] In the above-mentioned novel high-voltage GaN high electron mobility transistor device with step electric field assisted voltage-withstand layer passivation, 2DEG conduction is formed through polarization effect; in the forward conduction state, 2DEG is formed in the channel below the gate, thereby forming an electron flow path from the source to the drain, and the device is turned on; the step electric field assisted voltage-withstand layer (P-GaN cap) forms an ohmic contact with the gate electrode, and hole injection occurs, which effectively improves the current collapse effect of the device; in the off state, the energy band of the GaN channel layer below the gate is pulled up, and no potential well region is formed, so there is no 2DEG, the device cannot be turned on, and is in a blocking state; as V DS As the gate electrode increases, the P-GaN cap layer helps to deplete the 2DEG. The thickness of the P-GaN cap layer decreases as the distance from the gate increases. The P-GaN cap layer is thicker at the electric field concentration at the gate edge and thinner away from the gate electrode. The P-GaN cap layer assists in depleting the 2DEG at the channel, making the device surface electric field more uniform, thereby increasing the breakdown voltage. Furthermore, the introduction of the SiN dielectric layer improves the reliability of the internal electric field of the device, alleviates the surface state of the device, and improves the threshold voltage stability.

[0038] The above description is only a specific implementation mode of the present invention. Any feature disclosed in this specification, unless otherwise stated, can be replaced by other alternative features that are equivalent or have similar purposes; all the disclosed features, or all the steps in the methods or processes, except for mutually exclusive features and / or steps, can be combined in any way.

Claims

1. A high-voltage GaN high electron mobility transistor with a stepped electric field assisted voltage-withstanding layer, comprising: A substrate (1), a GaN buffer layer (2) disposed on the substrate, a GaN channel layer (3) disposed on the GaN buffer layer, an AlGaN barrier layer (4) disposed on the GaN channel layer, a stepped electric field auxiliary withstand voltage layer (5) disposed on the AlGaN barrier layer, a gate electrode (6), a source electrode (7) and a drain electrode (8); characterized in that: The source electrode (7) and the drain electrode (8) are located on both sides of the device and form ohmic contacts with the AlGaN barrier layer (4) respectively; the step electric field auxiliary voltage-resistant layer (5) is located between the source electrode (7) and the drain electrode (8), and the step electric field auxiliary voltage-resistant layer adopts a step-shaped structure with decreasing height from the source electrode to the drain electrode; the gate electrode (6) is arranged on the step electric field auxiliary voltage-resistant layer (5) and is located at the maximum height of the step electric field auxiliary voltage-resistant layer, and the gate electrode forms an ohmic contact with the step electric field auxiliary voltage-resistant layer.

2. A high-voltage GaN high electron mobility transistor with a self-bias circuit and a stepped electric field assisted voltage-withstanding layer, comprising: A substrate (1), a GaN buffer layer (2) arranged on the substrate, a GaN channel layer (3) arranged on the GaN buffer layer, an AlGaN barrier layer (4) arranged on the GaN channel layer, a step electric field auxiliary withstand voltage layer (5) arranged on the AlGaN barrier layer, a gate electrode (6), a source electrode (7), a drain electrode (8), a P-GaN layer (9) and a P-top electrode (10), and an off-chip silicon-based Schottky diode D0 and a capacitor C0; characterized in that: The source electrode (7) and the drain electrode (8) are located on both sides of the device and form ohmic contacts with the AlGaN barrier layer (4) respectively; the step electric field auxiliary voltage-resistant layer (5) is located between the source electrode (7) and the drain electrode (8), and the step electric field auxiliary voltage-resistant layer adopts a step-shaped structure with decreasing height from the source electrode to the drain electrode; the P-GaN layer (9) is located between the source electrode (7) and the step electric field auxiliary voltage-resistant layer (5), and the gate electrode (6) is arranged on the P- The invention relates to a Schottky diode D0, wherein the positive electrode of the Schottky diode D0 is connected to the gate electrode (6), the negative electrode is connected to the source electrode (7) after being connected in series with the capacitor C0, and the P-top electrode (10) is connected to the negative electrode of the Schottky diode D0.

3. The high voltage GaN high electron mobility transistor according to claim 1 or 2, characterized in that: The high-voltage GaN high electron mobility transistor further comprises: a dielectric passivation layer (11), wherein the dielectric passivation layer (11) is arranged between the AlGaN barrier layer (4) and the P-GaN step electric field auxiliary withstand voltage layer (5), and the dielectric passivation layer is connected to the drain electrode (8) on the drain side and avoids the area directly below the gate electrode (6) on the gate side.

4. The high-voltage GaN high electron mobility transistor according to claim 3, characterized in that: The dielectric passivation layer is made of insulating dielectric SiN, SiO2 or Al2O3.

5. The high voltage GaN high electron mobility transistor according to claim 1 or 2, characterized in that: In the above two high-voltage GaN high electron mobility transistors, the number of steps of the step electric field auxiliary voltage-withstanding layer is Q, and the value range of Q is: Q≥2.

6. The high-voltage GaN high electron mobility transistor according to claim 1 or 2, characterized in that: In the above two high-voltage GaN high electron mobility transistors, the step electric field auxiliary voltage-withstanding layer is made of P-GaN, P-NiO, SiC, High-K or oxide layer material.

7. The high voltage GaN high electron mobility transistor according to claim 1 or 2, characterized in that: In the above two high-voltage GaN high electron mobility transistors, the substrate is made of sapphire, Si, SiC or GaN.

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