Low-cost thermally enhanced gallium nitride Schottky barrier diode and preparation method thereof

Abstract

The invention discloses a low-cost thermally enhanced gallium nitride Schottky barrier diode and a preparation method thereof. The low-cost thermally enhanced gallium nitride Schottky barrier diode comprises a transmission layer; the drift layer is arranged on the lower surface of the transmission layer; the positive electrode is arranged in the middle area of the lower surface of the drift layer; the negative electrode is arranged in the middle area of the upper surface of the transmission layer; the first dielectric layer is arranged on the lower surface of the residual drift layer and the side wall and part of the lower surface of the positive electrode; the second dielectric layer is arranged on the upper surface of the remaining transmission layer and the side wall and part of the upper surface of the negative electrode; one part of the positive electrode thickening layer is arranged on the lower surface of the first dielectric layer and the lower surface of the remaining negative electrode, and the other part of the positive electrode thickening layer is exposed out of the first dielectric layer; the heat dissipation substrate is arranged on the lower surface of the positive electrode thickening layer; the negative electrode thickening layer is arranged on the upper surface of a part of the second dielectric layer and the upper surface of the remaining negative electrode. According to the gallium nitride Schottky barrier diode, the gallium nitride Schottky barrier diode with the full-vertical structure, which has larger forward current and higher heat dissipation capability, is realized.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductors, and in particular relates to a low-cost thermally enhanced gallium nitride Schottky barrier diode and a preparation method thereof. Background Art

[0002] Gallium nitride (GaN) materials have excellent properties such as large bandgap, high breakdown field strength, high electron mobility and high thermal conductivity. The devices made from it have excellent performances that traditional silicon-based materials do not have, such as strong voltage resistance, low on-resistance, fast switching speed, high frequency and high temperature resistance, which meet the needs of people under the rapid development of modern high-tech. GaN-based Schottky barrier diodes are components that control conduction and shutdown through the Schottky barrier formed by the contact between metal and semiconductor. They are basic components in power conversion systems and are widely used in switching power supplies, frequency converters, inverters and other circuits. They are also developing rapidly with emerging fields such as 5G communications and wireless fast charging.

[0003] The traditional quasi-vertical planar structure GaN Schottky barrier diode has a lateral current path. The current is concentrated to the edge due to the lateral resistance of the path, resulting in a current edge gathering effect. This phenomenon will become more serious as the metal area of ​​the anode electrode increases. Furthermore, when the current passes through the surface of the material layer, the surface defects of the material can act as traps to capture electrons or holes, thereby reducing the effective conductive carriers and directly reducing the forward conduction current of the device. However, GaN Schottky barrier diodes with a fully vertical current path have higher requirements for device heat dissipation due to the larger forward current density. In high-power applications, a larger power density will be generated, resulting in local high temperature. In addition, the heat dissipation surface of the fully vertical device is mainly concentrated on the bottom electrode. The heat needs to be effectively dissipated in the substrate and packaging materials to ensure the stability of the device and its service life.

[0004] In summary, the conventional quasi-vertical planar structure GaN Schottky barrier diode will produce a phenomenon of reduced forward current due to the influence of current edge collection effect and material surface defects, while the GaN Schottky barrier diode with a full vertical current path requires the device to have better heat dissipation performance due to the larger forward current. Therefore, researching and developing higher current and lower cost thermally enhanced GaN-based Schottky barrier diodes has become one of the key research directions at home and abroad. Realizing GaN Schottky barrier diodes with high forward current, low on-resistance, low preparation cost, and thermally enhanced performance has become an urgent problem to be solved. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a low-cost thermally enhanced gallium nitride Schottky barrier diode and a preparation method thereof. The technical problem to be solved by the present invention is achieved by the following technical solutions:

[0006] In a first aspect, an embodiment of the present invention provides a low-cost thermally enhanced gallium nitride Schottky barrier diode, the diode comprising a transmission layer, a drift layer, an anode electrode, a first dielectric layer, an anode electrode thickening layer, a heat dissipation substrate, a cathode electrode, a second dielectric layer and a cathode electrode thickening layer; wherein,

[0007] The drift layer is arranged on the lower surface of the transmission layer;

[0008] The anode electrode is arranged in the middle area of ​​the lower surface of the drift layer;

[0009] The cathode electrode is disposed in the middle area of ​​the upper surface of the transmission layer;

[0010] The first dielectric layer is disposed on the lower surface of the remaining drift layer, and the side wall and a portion of the lower surface of the anode electrode;

[0011] The second dielectric layer is disposed on the upper surface of the remaining transmission layer, and the side wall and a portion of the upper surface of the cathode electrode;

[0012] A portion of the anode electrode thickening layer is disposed on the lower surface of the first dielectric layer, and the remaining portion is disposed on the lower surface of the cathode electrode, and another portion of the anode electrode thickening layer is exposed on the first dielectric layer;

[0013] The heat dissipation substrate is arranged on the lower surface of the anode electrode thickening layer;

[0014] The cathode electrode thickening layer is arranged on a portion of the upper surface of the second dielectric layer and the upper surface of the remaining cathode electrode.

[0015] In one embodiment of the present invention, the thickness of the anode electrode thickening layer is 0.5 μm to 10 μm.

[0016] In one embodiment of the present invention, the heat dissipation substrate is a SiC substrate, a Si / Al substrate on which a diamond film is deposited. 2 O 3 substrate or polycrystalline diamond substrate.

[0017] In one embodiment of the present invention, the heat dissipation substrate has a thickness of 50 μm to 150 μm.

[0018] In one embodiment of the present invention, the thickness of the cathode thickening layer is 0.5 μm to 10 μm.

[0019] In a second aspect, an embodiment of the present invention provides a method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode, the method comprising:

[0020] Obtaining an epitaxial wafer including a substrate layer, a nucleation layer, a transport layer and a drift layer stacked sequentially from bottom to top;

[0021] forming an anode electrode on the upper surface of the drift layer;

[0022] Depositing a dielectric material on the upper surface of the drift layer and the anode electrode, and etching a dielectric opening above the anode electrode to form a first dielectric layer;

[0023] forming an anode electrode thickening layer on the upper surfaces of the anode electrode and the first dielectric layer;

[0024] Obtaining a heat dissipation substrate, and permanently bonding the anode electrode thickening layer to the heat dissipation substrate;

[0025] Flipping the permanently bonded device structure, and etching away the substrate layer and the nucleation layer;

[0026] forming a cathode electrode on the upper surface of the transmission layer, wherein the cathode electrode is located directly above the anode electrode;

[0027] Depositing a dielectric material on the upper surface of the transmission layer and the cathode electrode, and etching a dielectric opening above the cathode electrode to form a second dielectric layer;

[0028] forming a cathode electrode thickening layer on the upper surface of the cathode electrode and a portion of the second dielectric layer;

[0029] The dielectric layer on one side is etched until the upper surface of the anode thickening layer, so that the anode thickening layer is exposed on the first dielectric layer; wherein after etching, the anode is located in the middle area of ​​the lower surface of the drift layer.

[0030] In one embodiment of the present invention, forming an anode electrode thickening layer on the upper surface of the anode electrode and the first dielectric layer includes:

[0031] An electroplating process is adopted to form an anode electrode thickening layer with a thickness of 0.5 μm to 10 μm on the upper surfaces of the anode electrode and the first dielectric layer.

[0032] In one embodiment of the present invention, the heat dissipation substrate obtained is a SiC substrate, a Si / Al substrate on which a diamond film is deposited. 2 O 3 substrate or polycrystalline diamond substrate.

[0033] In one embodiment of the present invention, before the anode electrode thickening layer is permanently bonded to the heat dissipation substrate, the method further comprises:

[0034] The heat dissipation substrate is electroplated with the same metal as the anode electrode thickening layer.

[0035] In one embodiment of the present invention, forming a cathode electrode thickening layer on the upper surface of the cathode electrode and a portion of the second dielectric layer includes:

[0036] An electroplating process is adopted to form a cathode electrode thickening layer with a thickness of 0.5 μm to 10 μm on the upper surface of the cathode electrode and part of the second dielectric layer.

[0037] Beneficial effects of the present invention:

[0038] The low-cost thermally enhanced GaN Schottky barrier diode proposed in the present invention innovatively prepares an anode electrode at the bottom of the drift layer, and introduces an anode electrode thickening layer and a heat dissipation substrate, thereby realizing a fully vertical structure GaN Schottky barrier diode with a wider conductive channel, a larger forward current and a higher heat dissipation capability, avoiding the phenomenon that the forward current of the conventional quasi-vertical planar structure GaN Schottky barrier diode is reduced due to the current gathering effect, and the heat dissipation substrate effectively solves the heat dissipation problem of the fully vertical structure GaN Schottky barrier diode caused by the large power density, thereby ensuring the reliability, service life and low cost of preparation of the device, and compared with the conventional heterogeneous substrate quasi-vertical planar structure GaN Schottky barrier diode, the thicker and less conductive substrate layer is stripped, the anode electrode thickening layer makes up for the deficiency that a large on-resistance is easily generated if the electrode is directly prepared at the bottom of the substrate layer, and the heat dissipation substrate solves the support problem of the device after the substrate layer is stripped. In general, the embodiment of the present invention is a fully vertical structure gallium nitride Schottky barrier diode, which improves the forward current density and reduces the on-resistance, and the introduced heat dissipation substrate improves the heat dissipation performance of the device; this fully vertical structure gallium nitride Schottky barrier diode with a heat dissipation substrate further promotes the application of gallium nitride Schottky barrier diodes in high frequency, high voltage and high power fields with the advantages of large current, thermal enhancement and low cost.

[0039] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 It is a schematic structural diagram of a low-cost thermally enhanced gallium nitride Schottky barrier diode provided by an embodiment of the present invention;

[0041] Figure 2 It is a schematic flow chart of a method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode provided by an embodiment of the present invention;

[0042] Figure 3a to Figure 3j It is a schematic diagram of the structure corresponding to the preparation process of the low-cost thermally enhanced gallium nitride Schottky barrier diode provided by an embodiment of the present invention.

[0043] Description of reference numerals:

[0044] 1-substrate layer; 2-nucleation layer; 3-transmission layer; 4-drift layer; 5-anode electrode; 6-first dielectric layer; 7-anode electrode thickening layer; 8-heat dissipation substrate; 9-cathode electrode; 10-second dielectric layer; 11-cathode electrode thickening layer. DETAILED DESCRIPTION

[0045] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0046] First, see Figure 1 The embodiment of the present invention provides a low-cost thermally enhanced gallium nitride Schottky barrier diode, the diode comprising a transmission layer 3, a drift layer 4, an anode electrode 5, a first dielectric layer 6, an anode electrode thickening layer 7, a heat dissipation substrate 8, a cathode electrode 9, a second dielectric layer 10 and a cathode electrode thickening layer 11; wherein,

[0047] The drift layer 4 is arranged on the lower surface of the transmission layer 3;

[0048] The anode electrode 5 is arranged in the middle area of ​​the lower surface of the drift layer 4;

[0049] The cathode electrode 9 is arranged in the middle area of ​​the upper surface of the transmission layer 3;

[0050] The first dielectric layer 6 is disposed on the lower surface of the remaining drift layer 4, and the side wall and a part of the lower surface of the anode electrode 5;

[0051] The second dielectric layer 10 is disposed on the upper surface of the remaining transmission layer 3, and the side wall and a part of the upper surface of the cathode electrode 9;

[0052] A portion of the anode electrode thickening layer 7 is disposed on the lower surface of the first dielectric layer 6 and the lower surface of the remaining cathode electrode 9, and another portion of the anode electrode thickening layer 7 is exposed on the first dielectric layer 6;

[0053] The heat dissipation substrate 8 is arranged on the lower surface of the anode electrode thickening layer 7;

[0054] The cathode electrode thickening layer 11 is disposed on the upper surface of a portion of the second dielectric layer 10 and the upper surface of the remaining cathode electrode 9 .

[0055] In the embodiment of the present invention, the materials of the transmission layer 3 and the drift layer 4 are both GaN. The transmission layer 3 is n-type heavily doped GaN with a thickness of 0.5 μm to 5 μm and a silicon doping concentration of 1×10 18 cm -3 ~1×10 20 cm -3 The heavily doped transmission layer 3 can relieve the lattice mismatch stress and reduce the on-resistance. The drift layer 4 is an n-type lightly doped GaN drift layer with a thickness of 0.1 μm to 10 μm and a silicon doping concentration of 1×10 15 cm -3~5×10 17 cm -3 The lightly doped drift layer 4 makes the distribution of the electric field in the device more uniform, ensuring a higher breakdown voltage; the materials of the first dielectric layer 6 and the second dielectric layer 10 both include Al 2 O 3 、SiO 2 , or one or more of SiN.

[0056] The embodiment of the present invention selects Ni / Au (50nm / 150nm) metal, Pt / Au (50nm / 150nm) metal, W / Au (50nm / 150nm) metal or Mo / Au (50nm / 150nm) metal as the anode electrode 5 of the gallium nitride Schottky barrier diode. This is because: metal Ni, Pt, W, Mo can form a high-quality Schottky contact on the surface of the GaN material due to its excellent adhesion; at the same time, the introduction of the Au layer not only effectively improves the conductivity of the diode; but also because of the chemical inertness of Au, it prevents the oxidation of the underlying metal (Ni, Pt, W, Mo), thereby enhancing the reliability of the device. Finally, a good Schottky contact is formed between the anode electrode 5 and the transmission layer 3.

[0057] The embodiment of the present invention selects Ti / Al / Ni / Au (20nm / 140nm / 50nm / 40nm) metal as the cathode electrode 10 of this gallium nitride Schottky barrier diode. This is because: selecting metal Ti with a lower work function as the contact layer is conducive to the formation of an ideal ohmic contact at the Au semi-contact interface, reducing the contact resistance; metal Al optimizes the interface bonding effect by promoting the solid phase reaction between N atoms and Ti atoms; metal Ni acts as a barrier layer to prevent interpenetration between different metal layers; metal Au is used to protect the underlying metal from oxidation, thereby enhancing the reliability of the device. Finally, a good ohmic contact is formed between the cathode electrode 10 and the transmission layer 3.

[0058] The material of the anode electrode thickening layer 7 of the embodiment of the present invention is not limited, for example, it can be Ti / Au metal, which is used to thicken the anode electrode 5, and the thickness of the anode electrode thickening layer 7 is 0.5μm to 10μm. At the same time, the material of the cathode electrode thickening layer 11 is not limited, for example, it can be Ti / Au metal, which is used to thicken the cathode electrode 10, and the thickness of the cathode electrode thickening layer 12 is 0.5μm to 10μm. To facilitate the application of bias, the anode electrode thickening layer 7 of the embodiment of the present invention is exposed to the first dielectric layer 6. The embodiment of the present invention applies bias to the low-cost thermally enhanced gallium nitride Schottky barrier diode through the anode electrode thickening layer 7 and the cathode electrode thickening layer 11.

[0059] The thickness of the heat dissipation substrate 8 in the embodiment of the present invention is 50 μm to 150 μm; the material of the heat dissipation substrate 8 is SiC substrate, Si / Al substrate with diamond film deposited on it, 2 O3 Substrate or polycrystalline diamond substrate. Since the full vertical structure has the advantages of larger forward current and higher current density, but the larger power density will cause heat dissipation problems, the heat dissipation substrate 8 is a material with high thermal conductivity, and can effectively improve the heat dissipation capacity of the device, effectively solving the heat dissipation problem caused by the large full vertical gallium nitride Schottky barrier diode, which is conducive to industrialization. The surface of the heat dissipation substrate 8 bonded to the anode electrode thickening layer 7 is provided with the same metal as the anode electrode thickening layer 7, and the metal is used to ensure a good bonding effect between the heat dissipation substrate 8 and the anode electrode thickening layer 7.

[0060] In summary, the low-cost thermally enhanced GaN Schottky barrier diode provided by the embodiment of the present invention innovatively prepares the anode electrode 5 at the bottom of the drift layer 4, and introduces the anode electrode thickening layer 7 and the heat dissipation substrate 8, thereby realizing a fully vertical structure GaN Schottky barrier diode with a wider conductive channel, a larger forward current and a higher heat dissipation capacity, avoiding the phenomenon that the forward current of the conventional quasi-vertical planar structure GaN Schottky barrier diode is reduced due to the current gathering effect, and the heat dissipation substrate 8 effectively solves the heat dissipation problem of the fully vertical structure GaN Schottky barrier diode caused by the large power density, thereby ensuring the reliability, service life and low cost of preparation of the device, and compared with the conventional heterogeneous substrate quasi-vertical planar structure GaN Schottky barrier diode, the thicker and less conductive substrate layer is peeled off, the anode electrode thickening layer 7 makes up for the deficiency that a large on-resistance is easily generated if the electrode is directly prepared at the bottom of the substrate layer, and the heat dissipation substrate 8 solves the support problem of the device substrate layer after peeling off. In general, the embodiment of the present invention is a fully vertical structure gallium nitride Schottky barrier diode, which improves the forward current density and reduces the on-resistance, and the introduced heat dissipation substrate improves the heat dissipation performance of the device; this fully vertical structure gallium nitride Schottky barrier diode with a heat dissipation substrate further promotes the application of gallium nitride Schottky barrier diodes in high frequency, high voltage and high power fields with the advantages of large current, thermal enhancement and low cost.

[0061] Second, see Figure 2 The embodiment of the present invention provides a method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode, the method comprising:

[0062] S10, obtaining an epitaxial wafer including a substrate layer 1, a nucleation layer 2, a transmission layer 3 and a drift layer 4 stacked in sequence from bottom to top.

[0063] The embodiment of the present invention obtains Figure 3aThe epitaxial wafer shown includes a substrate layer 1, a nucleation layer 2, a transmission layer 3 and a drift layer 4 stacked in sequence from bottom to top. The material of the substrate layer 1 is Si or sapphire, and the production technology is mature and the cost is low; the material of the nucleation layer 2 is one or more of AlN, AlGaN, and GaN, and its thickness is 30nm to 90nm; the transmission layer 3 is n-type heavily doped GaN, with a thickness of 0.5μm to 5μm and a silicon doping concentration of 1×10 18 cm -3 ~1×10 20 cm -3 The drift layer 4 is an n-type lightly doped GaN drift layer with a thickness of 0.1 μm to 10 μm and a silicon doping concentration of 1×10 15 cm -3 ~5×10 17 cm -3 The epitaxial wafer may be obtained by epitaxial growth through a MOCVD (Metal-organic Chemical Vapor Deposition) process, or may be directly obtained from an existing epitaxial wafer of the structure.

[0064] Next, the epitaxial wafer is organically cleaned to remove the surface oxide layer. Specifically: first, the epitaxial wafer is immersed in an acetone solution and ultrasonically cleaned for 5 minutes to remove organic pollutants on the surface of the epitaxial wafer; then, the epitaxial wafer is placed in an isopropanol solution and ultrasonically cleaned for 5 minutes to effectively remove the residual acetone on the surface of the epitaxial wafer, and then the epitaxial wafer is rinsed in deionized water to remove the isopropanol residue attached to the surface of the epitaxial wafer, and finally the surface of the epitaxial wafer is blown dry with high-purity nitrogen to ensure that there is no residual liquid on the epitaxial wafer; then, the surface oxide layer of the epitaxial wafer is removed, and the epitaxial wafer is placed in a 1:7 BOE (Buffered Oxide Etch) solution for 30 seconds, and then rinsed with a large amount of deionized water, and finally the deionized water on the surface of the epitaxial wafer is blown dry with high-purity nitrogen to complete the entire cleaning process of the epitaxial wafer. Cleaning of the epitaxial wafer is a necessary process before preparing the device, which can reduce the interference of oxidation and contamination on the subsequent process of the device and the impact on the performance of the device.

[0065] S20 : ​​forming an anode electrode 5 on the upper surface of the drift layer 4 .

[0066] In the embodiment of the present invention, the upper surface of the drift layer 4 is subjected to coating, baking, exposure, and development, and an anode electrode region is defined in the middle of the upper surface of the drift layer 4. Then, an electron beam evaporation technique is used to grow a Ni / Au (50nm / 150nm) metal, a Pt / Au (50nm / 150nm) metal, a W / Au (50nm / 150nm) metal, or a Mo / Au (50nm / 150nm) metal layer in the anode electrode region, and then organic cleaning is performed to remove residual adhesive and excess metal to form an anode electrode 5. Figure 3b As shown, the anode electrode 5 forms a Schottky contact with the drift layer 4. In order to reduce the influence of the Au semi-contact interface state and suppress reverse leakage, the epitaxial wafer formed with the anode electrode 5 is annealed at 450° C. for 5 minutes in a nitrogen atmosphere.

[0067] S30 , depositing dielectric material on the upper surfaces of the drift layer 4 and the anode electrode 5 , and etching a dielectric opening above the anode electrode 5 to form a first dielectric layer 6 .

[0068] In the embodiment of the present invention, a layer of Al with a thickness of 20 nm is deposited on the upper surface of the drift layer 4 and the sidewall and upper surface of the anode electrode 5 by using a PECVD (Plasma Enhanced Chemical Vapor Deposition) process. 2 O 3 、SiO 2 Or SiN dielectric material, passivate the surface of the device structure obtained by S20 to reduce the influence of the surface state on the device performance, and effectively prevent the surface of the epitaxial wafer from being contaminated by external impurities. After the first dielectric layer 6 is deposited, the anode area is dry-etched by RIE (Reactive Ion Etching) process, and the etching gas is F-based gas, such as CF 4 and SF 6 , a portion of the first dielectric layer 6 is etched away to open necessary anode electrode contact holes on the upper surface of the first dielectric layer 6, such as Figure 3c shown.

[0069] S40 , forming an anode electrode thickening layer 7 on the upper surfaces of the anode electrode 5 and the first dielectric layer 6 .

[0070] In the embodiment of the present invention, the device structure obtained in S30 is immersed in acetone and isopropanol solutions in turn, and ultrasonic cleaning is carried out for 5 minutes respectively, and then rinsed with deionized water and blown dry with high-purity nitrogen gas; after the cleaning is completed, an anode thickening layer 7 with a thickness of 0.5μm to 10μm is formed on the upper surface of the first dielectric layer 6 and the upper surface of the anode electrode 5 by using an electroplating process: in the electroplating tank, by controlling process parameters such as current density, temperature and solution composition, the thickness and uniformity of the metal layer are accurately controlled, the anode electrode in the anode electrode area is thickened to the required thickness, and defects in the deposition process are eliminated by annealing, and the crystal quality of the metal layer is increased to obtain an anode thickening layer 7 with a thickness of 0.5μm to 10μm, as shown in FIG. Figure 3d shown.

[0071] S50 , obtaining a heat dissipation substrate 8 , and permanently bonding the anode electrode thickening layer 7 to the heat dissipation substrate 8 .

[0072] In the embodiment of the present invention, a heat dissipation substrate 8 is first obtained. The heat dissipation substrate 8 obtained is a SiC substrate, a Si / Al substrate on which a diamond film is deposited. 2 O 3 Substrate or polycrystalline diamond substrate. Then, the same metal as the anode thickening layer 7 is electroplated on the heat dissipation substrate 8 by electroplating process; and the surface of the heat dissipation substrate 8 with the metal electroplated on the upper surface of the anode thickening layer 7 is permanently bonded by bonding technology, and the device structure obtained is as follows Figure 3e More specifically: the obtained heat dissipation substrate 8 is cleaned, and after cleaning, the same metal as the anode thickening layer 7 is electroplated on the surface of the heat dissipation substrate 8 bonded to the anode thickening layer 7 by using an electroplating process, and the metal is used to ensure a good bonding effect between the heat dissipation substrate 8 and the anode thickening layer 7, and then the bonding technology is used to heat the anode thickening layer 7 and the surface of the heat dissipation substrate 8 electroplated with the metal to a temperature higher than its recrystallization temperature, and the local metal is plastically deformed, and the metal is combined at the metal contact interface through diffusion and bonding by applying external pressure.

[0073] S60 , flipping the permanently bonded device structure, and etching away the substrate layer 1 and the nucleation layer 2 .

[0074] In the embodiment of the present invention, the entire device structure obtained in S50 is firstly flipped; then, the substrate layer 1 is etched: when the substrate layer 1 is a Si substrate, a mechanical grinding process is used to quickly reduce most of the thickness of the substrate layer 1, and then a deep silicon etching is used to completely remove the substrate layer; and when the substrate layer 1 is an Al substrate, a mechanical grinding process is used to quickly reduce most of the thickness of the substrate layer 1, and then a deep silicon etching is used to completely remove the substrate layer. 2 O 3When the substrate is removed, the substrate layer is removed by laser lift-off technology. Finally, the nucleation layer 2 is precisely etched by ICP (Inductively Coupled Plasma, inductively coupled plasma etching) technology. Cl 2 / BCl 3 The mixed gas etches the material, Cl 2 The flow rate is 10sccm, BCl 3 The flow rate is 25sccm, the ICP power is 150W, the RF power is 50W, and the material etching rate is about 55nm / min. Then it is blown dry with nitrogen to ensure the etching selectivity and accurate removal of the material. Finally, high-purity nitrogen is used to Figure 3f The device structure with the substrate layer 1 and the nucleation layer 2 removed is dried to ensure that there is no residual liquid or contaminants on the surface.

[0075] S70 , forming a cathode electrode 9 on the upper surface of the transmission layer 3 , and the cathode electrode 9 is located directly above the anode electrode 5 .

[0076] In the embodiment of the present invention, the upper surface of the transmission layer 3 is coated, baked, exposed, and developed, and a cathode electrode region is defined in the middle of the upper surface of the transmission layer 3. Then, Ti / Al / Ni / Au (20nm / 140nm / 50nm / 40nm) metal is grown in the cathode electrode region by electron beam evaporation technology, and then residual glue and excess metal are removed by organic cleaning to form a cathode electrode 9. Figure 3g As shown, the cathode electrode 9 forms an ohmic contact with the transmission layer 3, and the cathode electrode 9 is located directly above the anode electrode 5. In order to reduce the influence of the Au semi-contact interface state and suppress reverse leakage, the device structure formed with the cathode electrode 10 is annealed at 850° C. for 5 minutes in a nitrogen atmosphere to form a good ohmic contact.

[0077] S80 , depositing a dielectric material on the upper surface of the transmission layer 3 and the cathode electrode 9 , and etching a dielectric opening above the cathode electrode 9 to form a second dielectric layer 10 .

[0078] The embodiment of the present invention uses a PECVD process to deposit a layer of Al with a thickness of 20 nm on the upper surface of the transmission layer 3 and the sidewall and upper surface of the cathode electrode 9. 2 O 3 、SiO 2 Or SiN dielectric material, the surface of the transmission layer 3 and the cathode 9 is passivated to reduce the impact of the surface state on the device performance, and at the same time effectively prevent the surface of the transmission layer 3 from being contaminated by external impurities. After the second dielectric layer 10 is deposited, the cathode region is dry-etched by RIE process to open the necessary electrode contact holes on the second dielectric layer 10, such as Figure 3h shown.

[0079] S90 , forming a cathode electrode thickening layer 11 on the upper surface of the cathode electrode 9 and a portion of the second dielectric layer 10 .

[0080] In the embodiment of the present invention, the device structure obtained in S80 is immersed in acetone and isopropanol solutions in turn, and ultrasonically cleaned for 5 minutes respectively, and then rinsed with deionized water and dried with high-purity nitrogen. After cleaning, an electroplating process is used to form a cathode thickening layer 11 with a thickness of 0.5μm to 10μm on the upper surface of the cathode electrode 9 and part of the upper surface of the second dielectric layer 10: In the electroplating tank, by controlling process parameters such as current density, temperature and solution composition, precise control of the thickness and uniformity of the metal layer is achieved, and the metal electrode area is thickened to the required thickness. Annealing is used to eliminate defects in the deposition process and increase the crystallization quality of the metal layer, thereby obtaining a cathode thickening layer 11 with a thickness of 0.5μm to 10μm, such as Figure 3i shown.

[0081] S100 , etching the dielectric layer 10 on one side until the upper surface of the anode thickened layer 7 , so that the anode thickened layer 7 is exposed to the first dielectric layer 6 ; wherein, after etching, the anode 5 is located in the middle area of ​​the lower surface of the drift layer 4 .

[0082] In the embodiment of the present invention, the dielectric layer 10 at one end of the device obtained by etching S90 using ICP technology is etched until the upper surface of the anode thickening layer 7, so that the anode thickening layer 7 is exposed to the first dielectric layer 6, so as to facilitate the application of bias voltage to the low-cost thermally enhanced gallium nitride Schottky barrier diode through the anode thickening layer 7. 2 / BCl 3 The mixed gas etches the material, Cl 2 The flow rate is 10sccm, BCl 3 The flow rate is 25sccm, the ICP power is 150W, the RF power is 50W, and the material etching rate is about 55nm / min. Finally, the etched epitaxial wafer is organically cleaned and then blown dry with nitrogen to ensure that there is no residual liquid or contaminants on the surface.

[0083] The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode provided in an embodiment of the present invention is based on the innovative design of the device structure of the first aspect, so that in the preparation process, a traditional silicon substrate or sapphire substrate and an epitaxial wafer grown by gallium nitride nucleation technology can be used, thereby avoiding the use of a high-cost gallium nitride homogeneous substrate. This not only effectively reduces the device preparation cost, but also the prepared device solves the current crowding effect of the traditional heterogeneous substrate quasi-vertical planar structure gallium nitride Schottky barrier diode, which is conducive to industrial application.

[0084] As for the preparation method embodiment of the second aspect, since it is basically similar to the structural embodiment of the first aspect, the description is relatively simple, and the relevant parts may refer to the partial description of the structural embodiment of the first aspect.

[0085] In the description of the present invention, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0086] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the specification and its drawings. In the specification, the word "comprising" does not exclude other components or steps, and "a" or "one" does not exclude multiple situations. Certain measures are recorded in different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0087] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A low-cost thermally enhanced gallium nitride Schottky barrier diode, characterized in that: The diode comprises a transmission layer (3), a drift layer (4), an anode electrode (5), a first dielectric layer (6), an anode electrode thickening layer (7), a heat dissipation substrate (8), a cathode electrode (9), a second dielectric layer (10) and a cathode electrode thickening layer (11); wherein: The drift layer (4) is arranged on the lower surface of the transmission layer (3); The anode electrode (5) is arranged in the middle area of ​​the lower surface of the drift layer (4); The cathode electrode (9) is arranged in the middle area of ​​the upper surface of the transmission layer (3); The first dielectric layer (6) is arranged on the lower surface of the remaining drift layer (4), and the side wall and a part of the lower surface of the anode electrode (5); The second dielectric layer (10) is arranged on the upper surface of the remaining transmission layer (3), as well as the side wall and a part of the upper surface of the cathode electrode (9); A portion of the anode electrode thickening layer (7) is disposed on the lower surface of the first dielectric layer (6), and the remaining portion is disposed on the lower surface of the cathode electrode (9), and another portion of the anode electrode thickening layer (7) is exposed on the first dielectric layer (6); The heat dissipation substrate (8) is arranged on the lower surface of the anode electrode thickening layer (7); The cathode electrode thickening layer (11) is arranged on a portion of the upper surface of the second dielectric layer (10) and the remaining upper surface of the cathode electrode (9).

2. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the anode electrode thickening layer (7) is 0.5 μm to 10 μm.

3. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The heat dissipation substrate (8) is a SiC substrate, a Si / Al2O3 substrate on which a diamond film is deposited, or a polycrystalline diamond substrate.

4. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the heat dissipation substrate (8) is 50 μm to 150 μm.

5. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the cathode electrode thickening layer (11) is 0.5 μm to 10 μm.

6. A method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode, characterized in that: The preparation method comprises: Obtaining an epitaxial wafer comprising a substrate layer (1), a nucleation layer (2), a transmission layer (3) and a drift layer (4) stacked in sequence from bottom to top; forming an anode electrode (5) on the upper surface of the drift layer (4); Depositing a dielectric material on the upper surfaces of the drift layer (4) and the anode electrode (5), and etching a dielectric opening above the anode electrode (5) to form a first dielectric layer (6); forming an anode electrode thickening layer (7) on the upper surfaces of the anode electrode (5) and the first dielectric layer (6); Obtaining a heat dissipation substrate (8), and permanently bonding the anode electrode thickening layer (7) to the heat dissipation substrate (8); Flipping the permanently bonded device structure, and etching away the substrate layer (1) and the nucleation layer (2); A cathode electrode (9) is formed on the upper surface of the transmission layer (3), and the cathode electrode (9) is located directly above the anode electrode (5); Depositing a dielectric material on the upper surface of the transmission layer (3) and the cathode electrode (9), and etching a dielectric opening above the cathode electrode (9) to form a second dielectric layer (10); forming a cathode electrode thickening layer (11) on the upper surface of the cathode electrode (9) and a portion of the second dielectric layer (10); The dielectric layer (10) on one side is etched until the upper surface of the anode thickening layer (7), so that the anode thickening layer (7) is exposed on the first dielectric layer (6); wherein, after etching, the anode (5) is located in the middle area of ​​the lower surface of the drift layer (4).

7. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: An anode thickening layer (7) is formed on the upper surface of the anode electrode (5) and the first dielectric layer (6), comprising: An anode thickening layer (7) having a thickness of 0.5 μm to 10 μm is formed on the upper surfaces of the anode electrode (5) and the first dielectric layer (6) by using an electroplating process.

8. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: The heat dissipation substrate (8) obtained is a SiC substrate, a Si / Al2O3 substrate with a diamond film deposited thereon, or a polycrystalline diamond substrate.

9. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: Before permanently bonding the anode electrode thickening layer (7) to the heat dissipation substrate (8), the method further comprises: The heat dissipation substrate (8) is electroplated with the same metal as the anode electrode thickening layer (7).

10. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: A cathode electrode thickening layer (11) is formed on the upper surface of the cathode electrode (9) and a portion of the second dielectric layer (10), comprising: An electroplating process is used to form a cathode electrode thickening layer (11) with a thickness of 0.5 μm to 10 μm on the upper surface of the cathode electrode (9) and part of the second dielectric layer (10).

Images