Short stripe repair in memory systems

Abstract

Aspects of the present disclosure configure a memory subsystem controller to provide adaptive repair of short stripes. The memory controller groups a plurality of chunks of a group of memory components into respective chunk strips. The memory controller: calculates an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold; and determining that a first one of the block stripes contains a less number of blocks than the average number of blocks associated with a reliability level exceeding the threshold. The memory controller associates one or more blocks in a second one of the block stripes with the first block stripe in response to determining that the first block stripe includes a smaller number of the blocks than the average number of blocks.

Description

Technical Field

[0001] Embodiments of the present disclosure relate generally to memory subsystems, and more particularly, to providing adaptive media management for memory components, such as memory dies. Background Art

[0002] The memory subsystem may be a storage system such as a solid state drive (SSD), and may include one or more memory components that store data. The memory components may be, for example, non-volatile memory components and volatile memory components. In general, the host system may utilize the memory subsystem to store data on the memory components and retrieve data from the memory components. BRIEF DESCRIPTION OF THE DRAWINGS

[0003] The present disclosure will be more fully understood from the detailed description given below and from the accompanying drawings of various embodiments of the present disclosure.

[0004] Figure 1 is a block diagram illustrating an example computing environment including a memory subsystem according to some embodiments of the present disclosure.

[0005] Figure 2 is a block diagram of an example media operations manager according to some embodiments of the present disclosure.

[0006] Figure 3 is a block diagram of an example block slice repair operation according to some embodiments of the present disclosure.

[0007] Figure 4 , 5A 5B are flowcharts of example methods for performing a block slice repair operation according to some embodiments of the present disclosure.

[0008] Figure 6 is a block diagram illustrating a diagrammatic representation of a machine in the form of a computer system within which a set of instructions may be executed for causing the machine to perform any one or more of the methodologies discussed herein according to some embodiments of the present disclosure. DETAILED DESCRIPTION

[0009] Aspects of the present disclosure configure system components (e.g., a memory subsystem controller) to perform block slice repair operations. The memory subsystem controller may calculate an average width across multiple block stripes, which represents an average number of good blocks across the multiple block stripes. Each block stripe may contain a group of blocks. In some cases, each block stripe is referred to as a super block. The average width is compared to the width of a first block stripe to determine whether the first block stripe contains a number or number of good blocks that is less than the average number of good blocks across all block stripes. If so, the controller associates one or more blocks from a second block stripe with the first block stripe to replace one of the bad blocks in the first block stripe, which repairs the first block stripe. This ensures that the performance of the memory system remains optimal by allowing memory operations to be performed on block stripes having at least the average width (e.g., the block stripe on which the memory operation is performed contains at least the average number or number of good blocks). This improves the overall efficiency of operating the memory subsystem. As described in the present disclosure, a good block is a block associated with a reliability level that exceeds a reliability threshold, and a bad block is a block associated with a reliability level that drops below the reliability threshold or fails to exceed the reliability threshold.

[0010] The memory subsystem may be a storage device, a memory module, or a mixture of a storage device and a memory module. Figure 1 Examples of storage devices and memory modules are described. In general, a host system may utilize a memory subsystem that includes one or more memory components, such as memory devices (e.g., memory dies) that store data. The host system may send access requests (e.g., write commands, read commands) to the memory subsystem, such as to store data at the memory subsystem and read data from the memory subsystem. Data (or data sets) specified by the host are referred to below as "host data," "application data," or "user data."

[0011] The memory subsystem may initiate media management operations, such as write operations, on host data stored on the memory device. For example, as part of a junk collection management operation, the firmware of the memory subsystem may overwrite previously written host data from a location on the memory device to a new location. The data that is overwritten (e.g., initiated by the firmware) is referred to below as "junk collection data." "User data" may include host data and junk collection data. "System data" refers below to data created and / or maintained by the memory subsystem for performing operations in response to host requests and for media management. Examples of system data include, but are not limited to, system tables (e.g., logical to physical address mapping tables), data from logging, scratch pad data, and the like.

[0012] Many different media management operations may be performed on a memory device. For example, media management operations may include different scan rates, different scan frequencies, different wear leveling, different read disturb management, different near error error correction (ECC), and / or different dynamic data refreshes. Wear leveling ensures that all blocks in a memory component approach their defined erase cycle budget at the same time, rather than some blocks approaching the erase cycle budget earlier. Read disturb management counts all read operations of a memory component. If a certain threshold is reached, the surrounding area is refreshed. Near error ECC refreshes all data read by an application that exceeds a configured error threshold. As a background operation, dynamic data refresh scans read all data and identifies error states for all blocks. If a certain error threshold per block or ECC unit is exceeded in this scan-read, a refresh operation is triggered.

[0013] The memory device may be a non-volatile memory device. A non-volatile memory device is a package of one or more dice / dies. Each die may include one or more planes. For some types of non-volatile memory devices (e.g., NAND devices), each plane includes a set of physical blocks. For some memory devices, a block is the smallest area that can be erased. Each block includes a set of pages. Each page includes a set of memory cells that store data bits. The memory device may be a raw memory device (e.g., NAND) that is externally managed by an external controller, for example. The memory device may be a managed memory device (e.g., managed NAND), which is a raw memory device combined with a local embedded controller for memory management within the same memory device package.

[0014] There are challenges in efficiently managing typical memory devices or performing media management operations on them. Specifically, some memory devices, such as NAND flash devices, include large die-to-die reliability (RWB) variations. As the technology of such memory devices continues to shrink, this die-to-die reliability variation becomes more pronounced and problematic when performing memory management. Current memory systems, such as SSD hard drives or die packaging systems, associate all memory devices in the memory system with a specific reliability specification. In some cases, each block of each memory device is associated with a reliability level or specification for determining whether the block is a good block or a bad block. A good block is a block with a reliability level above a reliability threshold, and a bad block is a block with a reliability level below a reliability threshold. The reliability level can be set when the memory device is manufactured or during its operation, such as by measuring data retention and / or error rates associated with a particular block.

[0015] Typical memory systems utilize superblocks or block stripes (BS) that are sets of blocks across memory planes and / or dies. That is, each superblock may be of equal size and may include a corresponding set of blocks across multiple planes and / or dies. When allocated, a superblock allows the controller to simultaneously write data to a large portion of the memory that spans multiple blocks (across multiple planes and / or dies) with a single address. Sometimes, a superblock includes bad blocks or blocks with a reliability level below a threshold. These blocks may be referred to as incomplete superblocks, short stripes, or short block stripes. Typical systems allocate these incomplete superblocks in the same manner as complete superblocks (e.g., superblocks that only include good blocks with a reliability level above a threshold). This typically results in poor memory performance because performing memory operations on incomplete superblocks may result in a greater number of errors or unreliable memory behavior. In addition, some bad blocks in the incomplete superblock cannot be used to perform memory operations. This further reduces the efficiency of allocating such incomplete superblocks because less memory space is available to perform memory operations (e.g., memory operations can only be performed on good blocks of the incomplete superblock). Thus, applying a general approach to a memory system with a mix of complete and incomplete Super Blocks is inefficient and results in poor or unreliable memory performance.

[0016] Aspects of the present disclosure address the above and other disadvantages by providing a memory controller that can repair a short block stripe by replacing bad blocks in the short block stripe with good blocks in other block stripes. In some cases, this replacement is performed in response to detecting that the number of good blocks in an individual block stripe is less than the average number of good blocks across multiple block stripes (e.g., differs by more than a threshold amount). In such cases, the memory controller can select a target block stripe from which one or more blocks are selected based on a determination that the target block stripe contains more than a threshold number of good blocks, but not the average number of good blocks. In this case, the memory controller can associate one or more good blocks of the target block stripe with the individual block stripe to repair and extend the width of the individual block stripe.

[0017] For example, the memory controller may group multiple groups of blocks of a set of memory components into respective block stripes and calculate an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold. The memory controller may determine that a first block stripe of the block stripes includes fewer than the average number of blocks associated with a reliability level exceeding a threshold. In response, the memory controller may associate one or more blocks in a second block stripe of the block stripes with the first block stripe. Thus, the memory controller may tailor memory management operations to the memory components according to their specific reliability levels without having to sacrifice performance by assigning memory operations to short block stripes. This improves the efficiency of operating the memory system.

[0018] In some examples, the memory controller obtains a plurality of widths of the block stripes, each of the plurality of widths representing a number of blocks within the respective block stripe that is associated with a reliability level that exceeds a threshold. The memory controller determines that an individual width of the second block stripe is at least one block greater than an average width and selects the second block stripe in response to determining that the individual width of the second block stripe is greater than the average width.

[0019] In some examples, the memory controller calculates the average width based on an average of a plurality of widths of the block stripes.The memory controller associates one or more blocks in a third block stripe of the block stripes with the first block stripe.

[0020] In some examples, the memory controller generates a replacement table that includes a first block identifier of a first block in a first block stripe associated with a reliability level that falls below a threshold. The memory controller may associate second block identifiers of one or more blocks in a second block stripe that have been associated with the first block stripe with the first block identifier. The replacement table may be stored in DRAM.

[0021] In some examples, the memory controller generates a bad block table including a first block identifier of a first block in a first block stripe associated with a reliability level that falls below a threshold. The memory controller associates an indication of whether the first block in the first block stripe has been repaired with the first block identifier.

[0022] In some examples, a memory controller receives a write operation associated with a first block stripe. The memory controller accesses a group of blocks in the first block stripe and determines that a first block in the group of blocks in the first block stripe is associated with a bad block indication, the bad block indication representing a block associated with a reliability level below a threshold. The memory controller determines whether the first block is associated with a repaired indication. In response to determining that the first block in the group of blocks in the first block stripe is not associated with the repaired indication, the memory controller skips writing to the first block and obtains a second block in the group of blocks adjacent to the first block. In response to determining that the first block in the group of blocks in the first block stripe is associated with the repaired indication, the memory controller accesses a second block in one or more blocks in a second stripe identified in a replacement table and performs a write operation on the second block.

[0023] In some examples, the memory controller accesses configuration data. The configuration data includes a table associating individual blocks of a set of memory components with respective reliability levels, wherein the reliability level describes at least one of a data retention parameter, a read disturbance parameter, an error rate, a leakage current, a cross-temperature parameter, or an endurance parameter. A set of blocks in a first block stripe may be distributed across multiple memory dies or across multiple memory planes. Each of the block stripes may be of equal size and include a respective set of blocks across multiple planes and / or dies.

[0024] In some examples, the memory controller performs determining that the first block stripe includes fewer blocks than an average number of blocks by determining that the first block stripe includes a threshold number of blocks that is fewer than an average number of blocks.

[0025] In some examples, the second block stripe includes individual blocks associated with virtual defects. In such cases, the memory controller removes the virtual defects from being associated with the individual blocks in response to associating one or more blocks in the second block stripe with the first block stripe.

[0026] In some examples, determining by the memory controller that a first block stripe in the block stripes includes fewer blocks is performed when the first block stripe is in a discarded state or an erased state. The second block stripe may be selected from a pool of discarded block stripes or a pool of free block stripes. The memory controller may associate one or more blocks in the second block stripe with a third block stripe instead of the first block stripe after a period of time. The one or more blocks in the second block stripe may be selected in response to determining that a program-erase count (PEC) of the one or more blocks is lower than a PEC count of a group of blocks in the first block stripe.

[0027] Although various embodiments are described herein as being implemented with respect to a memory subsystem (eg, a controller of a memory subsystem), some or all portions of the embodiments may be implemented with respect to a host system, such as a software application or operating system of the host system.

[0028] Figure 1 An example computing environment 100 including a memory subsystem 110 is illustrated according to some examples of the present disclosure. The memory subsystem 110 may include media, such as memory components 112A-112N (also referred to below as "memory devices"). The memory components 112A-112N may be volatile memory devices, non-volatile memory devices, or a combination of such devices. The memory components 112A-112N may be implemented by individual dies, such that a first memory component 112A may be implemented by a first memory die (or a first set of memory dies) and a second memory component 112N may be implemented by a second memory die (or a second set of memory dies).

[0029] In some examples, a first memory component 112A, a block or page of a first memory component 112A, or a group of memory components including the first memory component 112A may be associated with a first reliability (capability) level, value, or measurement. The terms "reliability level," "value," and "measurement" may be used interchangeably throughout and may have the same meaning. A second memory component 112N, or a group of memory components including the second memory component 112N, may be associated with a second reliability (capability) level, value, or measurement. In some examples, each memory component 112A to 112N may store respective configuration data specifying respective reliability levels. In some examples, a memory or register may be associated with all memory components 112A to 112N, the memory or register may store a table mapping different groups, bins, or groups of memory components 112A to 112N to respective reliability levels. In some examples, a memory or register may be associated with all memory components 112A to 112N, the memory or register storing a table indicating which blocks in each block stripe are good and which blocks are bad. In some cases, the table may indicate the number of good blocks in each block stripe.

[0030] In some embodiments, blocks within the first memory component 112A may be grouped together with blocks within the second memory component 112N to form a super block or a block stripe. A super block (or block stripe) may be commonly addressed using a single address. In such cases, the LTP table may store the association between the single address and each of the blocks of the first memory component 112A and the second memory component 112N associated with the single address. In some embodiments, some blocks of a super block (or block stripe) may have a reliability level below a reliability threshold. These blocks may be referred to as bad blocks. In some embodiments, some blocks in a super block (or block stripe) may have a reliability level above a reliability threshold. These blocks may be referred to as good blocks. A super block (or block stripe) containing one or more bad blocks may be referred to as an incomplete super block or a short stripe. A super block or block stripe that does not contain bad blocks and only contains good blocks is referred to as a complete super block or a complete block stripe.

[0031] In some embodiments, the memory subsystem 110 is a storage system. The memory subsystem 110 may be a storage device, a memory module, or a mixture of a storage device and a memory module. Examples of storage devices include solid state drives (SSDs), flash drives, universal serial bus (USB) flash drives, embedded multimedia controller (eMMC) drives, universal flash storage (UFS) drives, and hard disk drives (HDDs). Examples of memory modules include dual in-line memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and non-volatile dual in-line memory modules (NVDIMMs).

[0032] The computing environment 100 may include a host system 120 coupled to a memory system. The memory system may include one or more memory subsystems 110. In some embodiments, the host system 120 is coupled to memory subsystems 110 of different types. Figure 1 An example of a host system 120 coupled to one memory subsystem 110 is illustrated. The host system 120 uses the memory subsystem 110, for example, to write data to the memory subsystem 110 and read data from the memory subsystem 110. As used herein, "coupled to" generally refers to a connection between components, which can be an indirect communication connection or a direct communication connection (e.g., without intervening components), whether wired or wireless, including connections such as electrical, optical, magnetic, etc.

[0033] The host system 120 may be a computing device such as a desktop computer, a laptop computer, a network server, a mobile device, an embedded computer (e.g., an embedded computer included in a vehicle, industrial equipment, or a networked commercial device), or such a computing device that includes a memory and a processing device. The host system 120 may include or be coupled to the memory subsystem 110 so that the host system 120 can read data from the memory subsystem 110 or write data to the memory subsystem 110. The host system 120 may be coupled to the memory subsystem 110 via a physical host interface. Examples of the physical host interface include, but are not limited to, a Serial Advanced Technology Attachment (SATA) interface, a Peripheral Component Interconnect Express (PCIe) interface, a Universal Serial Bus (USB) interface, a Fibre Channel interface, a Serial Attached SCSI (SAS) interface, and the like. The physical host interface may be used to transfer data between the host system 120 and the memory subsystem 110. When the memory subsystem 110 is coupled to the host system 120 through the PCIe interface, the host system 120 may further utilize an NVM Express (NVMe) interface to access the memory components 112A to 112N. The physical host interface may provide an interface for passing control, address, data, and other signals between the memory subsystem 110 and the host system 120 .

[0034] Memory components 112A to 112N may include any combination of different types of non-volatile memory components and / or volatile memory components. Examples of non-volatile memory components include NAND-type flash memory. Each of memory components 112A to 112N may include one or more memory cell arrays, such as single-level cells (SLC) or multi-level cells (MLC) (e.g., TLC or QLC). In some embodiments, a particular memory component 112 may include both an SLC portion and an MLC portion of memory cells. Each of the memory cells may store one or more data bits (e.g., blocks) used by a host system 120. Although non-volatile memory components (e.g., NAND-type flash memory) are described, memory components 112A to 112N may be based on any other type of memory, such as volatile memory. In some embodiments, the memory components 112A to 112N may be, but are not limited to, random access memory (RAM), read-only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), phase change memory (PCM), magnetoresistive random access memory (MRAM), "NOR" (NOR) flash memory, electrically erasable programmable read-only memory (EEPROM), and a cross-point array of nonvolatile memory cells.

[0035] The cross-point array of nonvolatile memory cells may perform bit storage based on bulk resistance changes in conjunction with a stacked cross-grid data access array. Additionally, in contrast to many flash-based memories, the cross-point nonvolatile memory may perform write-in-place operations, where nonvolatile memory cells may be programmed without previously erasing the nonvolatile memory cells. Furthermore, the memory cells of the memory components 112A-112N may be grouped into memory pages or blocks, which may refer to a unit of the memory components 112 for storing data. For example, a single first row spanning the memory components 112A-112N may correspond to or be grouped as a first block stripe, and a single second row spanning the memory components 112A-112N may correspond to or be grouped as a second block stripe. If the single first row includes all good blocks (e.g., each block in the single first row has a reliability level above a threshold), then the first block stripe is a first complete block stripe. If the single first row contains some bad blocks (eg, one or more blocks in the single first row have a reliability level below a threshold), then the first block stripe is a first short block stripe.

[0036] The memory subsystem controller 115 may communicate with the memory components 112A-112N to perform memory operations, such as reading data, writing data, or erasing data and other such operations at the memory components 112A-112N. The memory subsystem controller 115 may communicate with the memory components 112A-112N to perform various memory management operations, such as different scan rates, different scan frequencies, different wear leveling, different read disturb management, different near error ECC operations, and / or different dynamic data refreshes.

[0037] The memory subsystem controller 115 may include hardware, such as one or more integrated circuits and / or discrete components, buffer memory, or a combination thereof. The memory subsystem controller 115 may be a microcontroller, a dedicated logic circuit system (e.g., a field programmable gate array (FPGA), an application-specific integrated circuit (ASIC), etc.), or another suitable processor. The memory subsystem controller 115 may include a processor (processing device) 117 configured to execute instructions stored in a local memory 119. In the illustrated example, the local memory 119 of the memory subsystem controller 115 includes an embedded memory configured to store instructions for executing various processes, operations, logic flows, and routines for controlling the operation of the memory subsystem 110, including handling communications between the memory subsystem 110 and the host system 120. In some embodiments, the local memory 119 may include memory registers that store memory pointers, extracted data, etc. The local memory 119 may also include a read-only memory (ROM) for storing microcode. Although it has been described herein, the local memory 119 may be a memory register that stores memory pointers, extracted data, etc. Figure 1 The example memory subsystem 110 in FIG. 1 is illustrated as including a memory subsystem controller 115, but in another embodiment of the present disclosure, the memory subsystem 110 may not include the memory subsystem controller 115, but may instead rely on external control (e.g., provided by an external host, or by a processor 117 or controller separate from the memory subsystem 110).

[0038] In general, the memory subsystem controller 115 may receive commands or operations from the host system 120 and may convert the commands or operations into instructions or appropriate commands to achieve the desired access to the memory components 112A-112N. In some examples, the commands or operations received from the host system 120 may specify configuration data for the memory components 112N-112N. The configuration data may describe different groups of memory components 112N-112N and / or different blocks within each of the memory components 112N-112N. In some cases, the reliability level is dynamic and may be updated by the memory subsystem controller 115 during operation of the memory subsystem 110 in response to determining that certain error rates exceeding an error rate threshold (e.g., a reliability threshold) are reached. For example, if a good block begins to have an error rate exceeding a reliability threshold, the good block may become a bad block. In such a case, the configuration data is updated and any block stripes that include the now bad block are marked as short block stripes.

[0039] The memory subsystem controller 115 may be responsible for other memory management operations such as wear leveling operations, garbage collection operations, error detection and error correction code (ECC) operations, encryption operations, cache operations, and address translation. The memory subsystem controller 115 may further include a host interface circuit system to communicate with the host system 120 via a physical host interface. The host interface circuit system may convert commands received from the host system 120 into command instructions to access the memory components 112A-112N, and also convert responses associated with the memory components 112A-112N into information for the host system 120.

[0040] The memory subsystem 110 may also include additional circuitry or components not illustrated. In some embodiments, the memory subsystem 110 may include a cache or buffer (e.g., a DRAM or other temporary storage location or device) and address circuitry (e.g., a row decoder and a column decoder) that may receive addresses from the memory subsystem controller 115 and decode the addresses to access the memory components 112A-112N.

[0041] The memory device may be, for example, a raw memory device (e.g., NAND) that is externally managed by an external controller (e.g., memory subsystem controller 115). The memory device may be a managed memory device (e.g., managed NAND), which is a raw memory device combined with a local embedded controller (e.g., a local media controller) within the same memory device package for memory management. Any of the memory components 112A-112N may include a media controller (e.g., media controller 113A and media controller 113N) for managing memory cells of the memory component (e.g., for performing one or more memory management operations), communicating with the memory subsystem controller 115, and executing memory requests (e.g., reads or writes) received from the memory subsystem controller 115.

[0042] The memory subsystem controller 115 may include a media operations manager 122. The media operations manager 122 may be configured to group multiple groups of blocks of a set of memory components into respective block stripes and calculate an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold. The memory subsystem controller 115 may determine that a first block stripe of the block stripes includes a number of blocks that are associated with a reliability level exceeding a threshold that is less than the average number of blocks. In response, the memory subsystem controller 115 may associate one or more blocks in a second block stripe of the block stripes with the first block stripe. Thus, the memory subsystem controller 115 may customize memory management operations according to the memory components' specific reliability levels without having to sacrifice performance by assigning memory operations to short block stripes. This improves the efficiency of operating the memory system.

[0043] Depending on the embodiment, the media operations manager 122 may include logic (e.g., a set of transient or non-transient machine instructions, such as firmware) or one or more components that enable the media operations manager 122 to perform the operations described herein. The media operations manager 122 may include tangible or non-tangible units capable of performing the operations described herein. Additional details regarding the operation of the media operations manager 122 are described below.

[0044] Figure 2 2 is a block diagram of an example media operations manager 200 (which represents the media operations manager 122) according to some embodiments of the present disclosure. As illustrated, the media operations manager 122 includes configuration data 220, a block stripe assignment table 230, a replacement table 240, and a bad block table 250. For some embodiments, the media operations manager 122 is similar in components or arrangement to the media operations manager 120. Figure 2 The difference (e.g., fewer or more components) described in the description.

[0045] Configuration data 220 accesses and / or stores configuration data associated with memory components 112A-112N. In some examples, configuration data 220 is programmed into media operations manager 122. For example, media operations manager 122 may communicate with memory components 112A-112N to obtain configuration data and store configuration data 220 locally on media operations manager 122. In some examples, media operations manager 122 communicates with host system 120. Host system 120 receives input from an operator or user specifying parameters including reliability levels of different bins, groups, blocks, block stripes, and / or groups of memory components 112A-112N. Media operations manager 122 receives configuration data from host system 120 and stores the configuration data in configuration data 220.

[0046] In some examples, the media operations manager 122 performs one or more test operations on different groups or blocks of memory components 112A to 112N. The test operations are configured to determine the reliability of each block of memory components 112A to 112N. Based on the results of the test operations, the media operations manager 122 may store or update the reliability levels stored in the configuration data 220 of the different groups or blocks of memory components 112A to 112N. In some examples, the media operations manager 122 may perform the test operations periodically or routinely. The media operations manager 122 may determine that the individual memory component 112A is associated with a first reliability level based on the configuration data 220. The media operations manager 122 may perform a set of test operations on the individual memory component 112A and may determine that the reliability level of the individual memory component 112A has increased or decreased and is now at a second reliability level based on the results of the test operations. The media operations manager 122 may, in response, transition the individual memory component 112A from being associated with the first group of individual memory components 112A-112N to being associated with the second group of individual memory components 112A-112N associated with the second reliability level.

[0047] In some examples, the media operations manager 122 processes the configuration data 220 to generate a block stripe designation table 230 that lists block stripe addresses and corresponding indications of the number or number of good blocks and / or bad blocks contained in each block stripe. For example, a first address in the table may be associated with a first row of good and / or bad blocks representing a first block stripe across multiple dies or planes. A second address in the table may be associated with a second row of good and / or bad blocks representing a second block stripe across multiple dies or planes. Specifically, if Figure 3 , a configuration of memory components 112A to 112N is provided. The configuration includes a group of dies 0 to 15 (eg, memory components 112A to 112N).

[0048] The media operations manager 122 processes the configuration data 220 to determine that a first row of blocks across a plurality of planes 0 to 3 of a group of dies 0 to 15 has a reliability level corresponding to a reliability threshold (e.g., has an error rate below a specified error rate threshold). In such a case, the media operations manager 122 stores an indication that the first block stripe includes all good blocks and stores an address or identifier of the first block stripe in the block stripe designation table 230. The identifier of the first block stripe may include an address to access all blocks across planes 0 to 3 of a group of dies 0 to 15. Similarly, the media operations manager 122 associates other block stripe identifiers with other rows of good blocks (across a plurality of planes 0 to 3 of a group of dies 0 to 15).

[0049] In some cases, the media operations manager 122 identifies a bad block 322 in a block of an individual row in a block stripe that also contains a set of good blocks. In response, the media operations manager 122 stores an indication in the block stripe designation table 230 of the short block stripe 320 along with the number of good or bad blocks contained in the short block stripe 320.

[0050] In some examples, the media operations manager 122 may generate or calculate an average width of the block stripes across the memory components 112A to 112N. To do this, the media operations manager 122 may access the block stripe designation table 230 to generate a width indication for each block stripe. Specifically, the block stripe designation table 230 may store a first number or first quantity of first widths representing the total number of good blocks in a first block stripe and may store a second number or second quantity of second widths representing the total number of good blocks in a second block stripe (e.g., the short block stripe 320). The media operations manager 122 may calculate an average of all widths or quantities of good blocks available across all block stripes. The media operations manager 122 stores this average width in association with the block stripe designation table 230. This generates an initial configuration 310 of the block stripes in the memory components 112A to 112N.

[0051] Periodically or in response to detecting that a given block stripe includes bad blocks, the media operations manager 122 may perform a set of repair operations to generate a second configuration 330 of block stripes in the memory components 112A to 112N. For example, the media operations manager 122 may obtain a width of a given block stripe that represents the total number of good blocks available in the given block stripe. The media operations manager 122 compares the width of the given block stripe to an average width stored in the block stripe designation table 230. In response to determining that the width of the given block stripe is less than the average width, the media operations manager 122 may perform a repair operation to associate good blocks from another block stripe with the given block stripe. In some cases, the media operations manager 122 performs a repair operation in response to determining that the width of the given block stripe is less than the average width by more than a threshold value. That is, the media operations manager 122 may determine that the given block stripe includes fewer good blocks than the average width by more than a threshold value.

[0052] In some examples, the media operations manager 122 generates a bad block table 250 that includes block identifiers of blocks in the block stripes that are associated with a reliability level that falls below a threshold. Specifically, the media operations manager 122 may add an identifier of a bad block 322 in the short block stripe 320 in the bad block table 250 to the bad block table 250. The media operations manager 122 may also store, in association with the bad block 322, an indication of whether the bad block 322 has been repaired.

[0053] To repair a given block stripe, the media operations manager 122 searches the widths of other block stripes in the block stripe designation table 230. The media operations manager 122 may set a threshold value (e.g., 2 or greater) based on which block stripe is selected for repairing a given block stripe. That is, the media operations manager 122 may compare the width of the second block stripe (indicating the number of good blocks) with the average width. In response to determining that the width of the second block stripe is less than or equal to the average width, the media operations manager 122 abandons the selection of the second block stripe and accesses the width of the third block stripe. The media operations manager 122 may compare the width of the third block stripe (indicating the number of good blocks) with the average width. In response to determining that the width of the second block stripe is greater than the average width by no more than a threshold value (e.g., only 1 more good block instead of 2 good blocks), the media operations manager 122 abandons the selection of the third block stripe and accesses the width of the fourth block stripe. The media operations manager 122 may compare the width of the fourth block stripe (indicating the number of good blocks) with the average width. In response to determining that the width of the fourth block stripe is greater than the average width by at least the threshold, the media operations manager 122 selects the fourth block stripe to repair the given block stripe.

[0054] In some examples, the media operations manager 122 identifies good blocks in the selected fourth block stripe. For example, the media operations manager 122 may identify that the block stripe 350 includes a width that is at least a threshold greater than the average width and may identify good blocks 352 included in the block stripe 350. The media operations manager 122 may replace the bad blocks 324 in the block stripe 320 (e.g., a given block stripe) with the good blocks 352 of the block stripe 350. In some cases, the media operations manager 122 updates an indication associated with the bad blocks 324 in the bad block table 250 to specify that the bad blocks 324 have been repaired. The media operations manager 122 also generates a replacement table 240 to identify the good blocks 352 that have been used to replace the bad blocks 324. The replacement table 240 may be stored off-chip, such as in DRAM.

[0055] In some examples, the media operations manager 122 may select a good block from the fourth block stripe based on the PEC count of each of the good blocks in the fourth block stripe. That is, the media operations manager 122 may access the PEC counts of the good blocks in the fourth block stripe. The media operations manager 122 may select a good block from the fourth block stripe to be used to replace a bad block in a given block stripe based on the PEC count being a minimum or maximum value among the PEC counts of the good blocks in the fourth block stripe. In some cases, the media operations manager 122 may obtain an average PEC count of good blocks from a given block stripe (which includes the bad blocks to be repaired). The media operations manager 122 selects a good block from the fourth block stripe that is associated with an average PEC count of good blocks corresponding to the given stripe or a PEC count within a threshold difference of the average PEC count. In some examples, the good block is selected in response to determining that the PEC count of the good block is lower than the PEC of the given block stripe. In some instances, the media operations manager 122 determines that the fourth block stripe is currently in the discarded item pool of the block stripe to be erased, rather than in the free block stripe pool that has been erased and is ready to be written. In such cases, the media operations manager 122 may erase the fourth block stripe or the selected good block before or after associating the selected good block with the bad block in the given block stripe. The good blocks in the block stripe used to replace the bad blocks in other block stripes may also be referred to as "victim blocks" or "victim physical blocks."

[0056] In some examples, the media operations manager 122 may store an indication in the replacement table 240 of the bad block 324 and store a reference to the good block 352. In this way, when subsequent memory operations (e.g., read / write / discarded item collection) are performed on a given block stripe (e.g., block stripe 320), the media operations manager 122 may perform memory operations on all good blocks in the given block stripe and any blocks (e.g., good blocks 352) in different block stripes associated with the bad blocks in the given block stripe. In some examples, in order to reduce the size of the replacement table 240, a hash table may be used. The key value in the hash table may be a block stripe index. Each entry in the hash table may include the number of replaced blocks and a next entry pointer. The next point may be up to 34 bits to represent a larger than 4GB DRAM. 6 bytes may be used to represent the next pointer. In the case of a 2-byte replaced block index, a total of 8 bytes may be stored in each hash table entry. The following is an example of a hash table:

[0057]

[0058] In some examples, the media operations manager 122 determines that the fourth block stripe 350 from which good blocks are selected to repair bad blocks in a given block stripe includes one or more virtual defects. Virtual defects can be introduced by the media operations manager 122 into one or more block stripes to prevent access to such blocks when performing memory operations on block stripes with virtual defects. These virtual defects can be regarded as bad blocks for a short period of time. Virtual defects can be introduced to maintain a specific geometry provided to the host, where all block stripes have a similar number of blocks despite some block stripes having real bad blocks and some block stripes having virtual defects or virtual bad blocks. In response to determining that the fourth block stripe 350 includes virtual defects, the media operations manager 122 can remove the virtual defects after associating good blocks with the given block stripe. This continues to maintain the geometry provided to the host. That is, because good blocks have been removed from the fourth block stripe 350 to repair different block stripes, the media operations manager 122 can now make the virtually detected blocks available for use as good blocks to keep the same number of good blocks available in the fourth block stripe 350.

[0059] Specifically, if the block stripe widths differ due to real defects, the host and SSD can quickly lose synchronization, which can lead to undesirable garbage collection and significant increases in write amplification. By including a variable number of virtual defects in all block stripes that are reduced whenever a growing bad block is added, the logical block stripe size can be kept constant throughout the life of the SSD and across all drives.

[0060] In some cases, in the case of virtual defects, if the location of the virtual defects is fixed, those physical blocks are not used until a real defect is detected or until a good block in the block stripe with the virtual defect is used to repair another bad block. In order to wear evenly across the block stripe with the virtual defect, the starting offset of the virtual defect within the block stripe can be incremented based on the physical PEC. In an example, the offset can be calculated according to the following equation:

[0061] Offset = Physical PEC% (Physical BS Width – Badly Grown Blocks)

[0062] Virtual defects may skip real defect locations within a block stripe and may be spread out at a fixed cadence to ensure that they do not cluster, for example, on the same NAND channel. In some cases, the physical PEC of a block stripe is higher than the actual PEC of each block. Thus, the adjusted PEC of a block stripe may be maintained separately to account for the dilution of virtual defects. The adjusted PEC to support a block stripe with 256 dies may be split into two components (an adjusted PEC upper component that may include 8 bits and an adjusted PEC lower component that may include 8 bits). Each erase of a block stripe may cause the adjusted PEC lower component to be incremented by 1 and compared to (physical BS width - growth bad block). If the adjusted PEC lower component is equal to the difference between the physical block stripe width and the growth bad block, then the adjusted PEC upper component is incremented by 1 and the adjusted PEC lower component is reset to 0. To calculate the final adjusted PEC for a block stripe, the following equation may be used:

[0063] Adjusted PEC = (Adjusted PEC upper * logical BS width) + minimum (Adjusted PEC lower, logical BS width)

[0064] In such cases, as long as the logical block stripe width is constant throughout the life of the SSD, the adjusted PEC represents the actual PEC of each individual block in the block stripe.

[0065] The media operations manager 122 may also update the width stored in the block stripe designation table 230 of the given block stripe to increment the number of good blocks resulting from replacing bad blocks with good blocks from another block stripe. Similarly, the media operations manager 122 may also update the width stored in the block stripe designation table 230 of the block stripe 350 to decrement the number of good blocks resulting from replacing bad blocks with good blocks from the fourth block stripe 350. That is, because one or more good blocks of the fourth block stripe 350 have been allocated or used to repair bad blocks in the given block stripe, the width of the fourth block stripe 350 is reduced by the number of good blocks that have been allocated to other block stripes.

[0066] In some examples, the media operations manager 122 may recalculate the average width based on the width stored in the block stripe designation table 230. The media operations manager 122 may determine that a given block stripe still includes fewer good blocks than the average width even after being repaired. In such a case, the media operations manager 122 may identify another block stripe from which good blocks are obtained to repair other bad blocks in the given block stripe. For example, the media operations manager 122 may determine that the fifth block stripe 340 includes a good block 342 that can be used to repair the bad block 322. In such a case, after being repaired, the bad block 322 is now associated with the good block 342 in the replacement table 240 and becomes referred to as the first repair block 328 in the repaired block stripe 326. That is, the repaired block stripe 326 includes a first repair block 328 based on the association between the bad block 322 in the block stripe 320 and the good block 342 in the fifth block stripe 340 and includes a second repair block 329 based on the association between the bad block 324 in the block stripe 320 and the good block 352 in the fourth block stripe 350.

[0067] In some examples, the media operations manager 122 may associate the good block 352 with a different bad block of a different block stripe than the block stripe 326. This results in the block stripe 326, which was previously repaired with the good block 352, returning to have the bad block 324 and the different block stripe having the repaired block. The media operations manager 122 may update the bad block table 250 to indicate that the bad block 324 was not repaired and may update the replacement table 240 to remove the association between the bad block 324 and the good block 352.

[0068] In some examples, the media operations manager 122 may initiate a search for a target block stripe to be repaired and a victim block to be used to replace a bad block during device manufacturing. That is, the media operations manager 122 may receive a command from the host, which includes a low-level format process or other vendor-specific command. In response, the media operations manager 122 performs operations to calculate an average width and search for a block stripe that includes a width less than the average width to repair the bad blocks in the block stripe with good blocks in other block stripes.

[0069] In some examples, a given block stripe may be repaired while in any of several states. For example, a given block stripe may be repaired while the given block stripe is in a discard pool and waiting to be erased. A given block stripe may be repaired after being erased while in an open state and ready to be written. A given block stripe may be repaired after being written and after being in a closed state.

[0070] In some examples, once the correct victim candidate block stripe is found, the media operations manager 122 can trigger the collapse to move the candidate block stripe from the closed state to the abandoned project state and then apply the repair process. Before the candidate BS can be released to the abandoned project pool, the media operations manager 122 can keep the shorter stripe in the free pool.

[0071] In some examples, the media operations manager 122 may determine that the read / write operation is a random memory operation rather than a sequential memory operation. That is, if the memory operation does not utilize a large number or more than a threshold number of good blocks of a block stripe, the media operations manager 122 may assign such memory operations to a block stripe having a width that is less than the average width (e.g., the memory operation is assigned to a short block stripe). This reserves the full block stripe for memory operations that are sequential and utilize all or substantially all or more than a threshold number of blocks of the block stripe. In some cases, data that is read more frequently or at a particular read frequency may be moved or maintained in a block stripe having a width greater than a particular threshold or greater than the width of most or all other block stripes to improve quality of service (QoS) due to fewer die conflicts.

[0072] Figure 4 is a flow chart of an example method 400 for repairing a block stripe according to some embodiments of the present disclosure. The method 400 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, a dedicated logic, a programmable logic, a microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executing on a processing device), or a combination thereof. In some embodiments, the method 400 is performed by Figure 1 The media operations manager 122 of the embodiment of the present invention is executed. Although the processes are shown in a specific sequence or order, unless otherwise specified, the order of the processes can be modified. Therefore, the illustrated embodiments should be understood as examples only, and the illustrated processes can be performed in different orders, and some processes can be performed in parallel. In addition, one or more processes can be omitted in various embodiments. Therefore, not all processes are required in every embodiment. Other process flows are possible.

[0073] Reference now Figure 4, the method (or process) 400 begins at operation 405, where the media operations manager 122 of a memory subsystem (e.g., the memory subsystem 110) groups a plurality of groups of blocks of a set of memory components into respective block stripes. Next, at operation 410, the media operations manager 122 of the memory subsystem calculates an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold. Thereafter, at operation 415, the media operations manager 122 determines that a first block stripe of the block stripes contains a number of blocks that is less than the average number of blocks associated with a reliability level exceeding a threshold. At operation 420, the media operations manager 122 associates one or more blocks in a second block stripe of the block stripes with the first block stripe in response to determining that the first block stripe contains a number of blocks that is less than the average number of blocks.

[0074] Figure 5A is a flow chart of an example method 501 for writing to a repaired block stripe according to some embodiments of the present disclosure. The method 501 may be performed by processing logic, which may include hardware (e.g., a processing device, circuitry, dedicated logic, programmable logic, microcode, hardware of a device, integrated circuit, etc.), software (e.g., instructions running or executing on a processing device), or a combination thereof. In some embodiments, the method 501 is performed by Figure 1 The media operations manager 122 of the embodiment of the present invention is executed. Although the processes are shown in a specific sequence or order, unless otherwise specified, the order of the processes can be modified. Therefore, the illustrated embodiments should be understood as examples only, and the illustrated processes can be performed in different orders, and some processes can be performed in parallel. In addition, one or more processes can be omitted in various embodiments. Therefore, not all processes are required in every embodiment. Other process flows are possible.

[0075] Reference now Figure 5A , the method (or process) 501 begins at operation 511, where the media operations manager 122 of the memory subsystem (e.g., memory subsystem 110) receives a command from the host to write to a specified block stripe. In response, at operation 521, the media operations manager 122 checks whether the block within the specified block stripe is associated with a bad block and / or has been repaired, such as by accessing information from the bad block table 250. At operation 531, the media operations manager 122 determines whether the bad block bit has been set in the bad block table 250. In response to determining that the bad block table 250 indicates that the block within the specified block stripe is bad, at operation 551, the media operations manager 122 determines whether the bad block table 250 includes an indication that the block has been repaired. In response to determining that the bad block table 250 indicates that the block within the specified block stripe is not bad or is good, at operation 541, the media operations manager 122 performs a memory operation on the block and sorts the blocks in the order of the specified block stripe to select the next block.

[0076] If the media operations manager 122 determines at operation 551 that the repair bit is set for the block, then at operation 571 the media operations manager 122 accesses the replacement table 240. At operation 581, the media operations manager 122 obtains a reference or identifier of a good block associated with the bad block from the replacement table 240. The media operations manager 122 performs a memory operation on the identified good block associated with the bad block and then selects the next block in the sequential order of the specified block stripe. If the media operations manager 122 determines at operation 551 that the repair bit is not set for the block, then at operation 561 the media operations manager 122 skips performing the memory operation on the block and accesses the next block in the sequential order of the specified block stripe. In some examples, if the media operations manager 122 determines at operation 551 that the repair bit is not set for the block, then the media operations manager 122 performs Figure 5B Method 502 to repair bad blocks.

[0077] Figure 5B is a flow chart of an example method 502 for repairing a block stripe according to some embodiments of the present disclosure. The method 502 may be performed by processing logic, which may include hardware (e.g., a processing device, a circuit system, a dedicated logic, a programmable logic, a microcode, hardware of a device, an integrated circuit, etc.), software (e.g., instructions running or executing on a processing device), or a combination thereof. In some embodiments, the method 502 is performed by Figure 1 The processes are performed by the media operations manager 122 of the embodiment of the present invention. Although the processes are shown in a specific sequence or order, unless otherwise specified, the order of the processes may be modified. Therefore, the illustrated embodiments should be understood as examples only, and the illustrated processes may be performed in a different order, and some processes may be performed in parallel. In addition, one or more processes may be omitted in various embodiments. Therefore, not every embodiment requires all processes. Other process flows are possible.

[0078] Reference now Figure 5B , the method (or process) 502 begins with operation 512, where the media operations manager 122 of the memory subsystem (e.g., the memory subsystem 110) identifies a short block stripe (e.g., a block stripe having at least one bad block and having a width less than the average width of all block stripes). Next, at operation 522, the media operations manager 122 searches for the victim block stripe in the abandoned items or free pool. At operation 532, the media operations manager 122 determines that all block stripes have been processed to find the victim block stripe or victim block. If found, the media operations manager 122 terminates the repair operation.

[0079] In response to determining that there are more block stripes to be processed, at operation 552, the media operations manager 122 determines whether the next block stripe meets the repair condition. That is, the media operations manager 122 may determine whether the width of the next block stripe (the number of good blocks) is greater than the average width of all block stripes (the average number of good blocks) by at least a threshold amount. In response to determining at operation 552 that the next block stripe fails to meet the repair condition, the media operations manager 122 returns to operation 522 to search for another block stripe. In response to determining at operation 552 that the next block stripe meets the repair condition, the media operations manager 122 applies a replacement at operation 562, such as by selecting a good block (e.g., a victim block) from the next block stripe and associating the selected good block with the bad block in the short block stripe identified at operation 512. At operation 572, the media operations manager 122 determines whether the victim block is from a discarded item pool. If so, the media operations manager 122 erases the victim block associated with the bad block in the short block stripe at operation 542.

[0080] In view of the above disclosure, various examples are set forth below. It should be noted that within the disclosure of this application, one or more features of the examples should be considered alone or in combination.

[0081] Example 1: A system comprising: a set of memory components of a memory subsystem; and a processing device operably coupled to the set of memory components, the processing device configured to perform operations comprising: grouping a plurality of groups of blocks of the set of memory components into respective block stripes; calculating an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold; determining that a first block stripe of the block stripes includes a number of blocks associated with a reliability level exceeding the threshold that is less than the average number of blocks; and in response to determining that the first block stripe includes a number of the blocks that is less than the average number of blocks, associating one or more blocks in a second block stripe of the block stripes with the first block stripe.

[0082] Example 2: The system of example 1, wherein the operations comprise obtaining a plurality of widths of the block stripes, each of the plurality of widths representing a number of blocks within the respective block stripe associated with the reliability level exceeding the threshold.

[0083] Example 3: The system of example 1 or 2, wherein the operation comprises: determining that the individual widths of the second block strips are at least one block larger than the average width; and selecting the second block strip in response to determining that the individual widths of the second block strips are larger than the average width.

[0084] Example 4: The system of any of examples 1 to 3, wherein the operations include calculating the average width based on an average of the plurality of widths of the block stripes.

[0085] Example 5: The system of any of examples 1 to 4, wherein the operation comprises associating one or more blocks in a third block stripe in the block stripes with the first block stripe.

[0086] Example 6: A system according to any one of Examples 1 to 5, wherein the operation includes: generating a replacement table including a first block identifier of a first block in the first block stripe associated with a reliability level that exceeds (e.g., falls below) the threshold; and associating second block identifiers of the one or more blocks in the second block stripe that are already associated with the first block stripe with the first block identifier.

[0087] Example 7: The system of example 6, wherein the substitution table is stored in DRAM.

[0088] Example 8: A system according to any one of Examples 1 to 7, wherein the operation includes: generating a bad block table including a first block identifier of a first block in the first block stripe associated with the reliability level that falls below the threshold; and associating an indication of whether the first block in the first block stripe has been repaired with the first block identifier.

[0089] Example 9: A system according to any of Examples 1 to 8, wherein the operation includes: receiving a write operation associated with the first block stripe; accessing a group of blocks in the first block stripe; determining that a first block in the group of blocks in the first block stripe is associated with a bad block indication, the bad block indication representing a block associated with a reliability level below the threshold; and determining whether the first block is associated with a repaired indication.

[0090] Example 10: The system of Example 9, wherein the operations include: in response to determining that the first block of the group of blocks of the first block stripe is not associated with the repaired indication, skipping writing to the first block and obtaining a second block of the group of blocks adjacent to the first block.

[0091] Example 11: A system according to any of Examples 1 to 10, wherein the operation includes: in response to determining that the first block in the group of blocks of the first block stripe is associated with the repaired indication, accessing a second block in the one or more blocks in the second stripe identified in a replacement table; and performing the write operation on the second block.

[0092] Example 12: A system according to any of Examples 1 to 11, wherein the operation includes: accessing configuration data, wherein the configuration data includes a table that associates individual blocks of the set of memory components with corresponding reliability levels, wherein the reliability levels describe at least one of a data retention parameter, a read disturbance parameter, an error rate, a leakage current, a cross-temperature parameter, or an endurance parameter.

[0093] Example 13: The system of any of examples 1 to 12, wherein the determining that the first block stripe includes a number of the blocks that is less than the average number of blocks comprises determining that the first block stripe includes a threshold number of blocks that is less than the average number of blocks.

[0094] Example 14: The system of any of Examples 1 to 13, wherein the set of blocks of the first block stripe is distributed across multiple memory dies or across multiple memory planes, and wherein each of the block stripes is of equal size and includes a respective set of blocks across multiple planes or dies.

[0095] Example 15: A system according to any of Examples 1 to 14, wherein the second block stripe includes individual blocks associated with virtual defects, and wherein the operation includes: in response to associating the one or more blocks in the second block stripe with the first block stripe, removing the virtual defects so that they are not associated with the individual blocks.

[0096] Example 16: A system according to any one of Examples 1 to 15, wherein the determining that the first block stripe in the block stripes includes the smaller number of blocks is performed when the first block stripe is in a discarded item state or an erased state, and wherein the second block stripe is selected from a discarded item block stripe pool or a free block stripe pool.

[0097] Example 17: The system of any of examples 1-16, wherein the operation comprises associating the one or more blocks in the second block stripe with a third block stripe instead of the first block stripe after a period of time.

[0098] Example 18: The system of any of Examples 1 to 17, wherein the one or more blocks in the second block stripe are selected in response to determining that a program-erase count (PEC) of the one or more blocks is lower than a PEC count of a group of blocks in the first block stripe.

[0099] Methods and computer-readable storage media having instructions for performing any of the above examples.

[0100] Figure 6An example machine is illustrated in the form of a computer system 600 within which a set of instructions for causing the machine to perform any one or more of the methodologies discussed herein may be executed. In some embodiments, the computer system 600 may correspond to a host system (e.g., Figure 1 ) that includes, is coupled to, or utilizes a memory subsystem (e.g., Figure 1 110) or can be used to perform operations of the controller (for example, to execute an operating system to execute a corresponding Figure 1 In some embodiments, the machine may be connected (e.g., using a network) to other machines in a local area network (LAN), an intranet, an extranet, and / or the Internet. The machine may operate in the capacity of a server or a client user machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or a client user machine in a cloud computing infrastructure or environment.

[0101] The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a cellular phone, a network appliance, a server, a network router, a network switch or bridge, or any machine capable of executing (sequentially or otherwise) a set of instructions that specify actions to be taken by the machine. Furthermore, while a single machine is described, the term "machine" shall also be taken to include any collection of machines that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies discussed herein.

[0102] The example computer system 600 includes a processing device 602, a main memory 604 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM)), etc.), a static memory 606 (e.g., flash memory, static random access memory (SRAM), etc.), and a data storage system 618, which communicate with each other via a bus 630.

[0103] The processing device 602 represents one or more general purpose processing devices, such as a microprocessor, a central processing unit, or the like. More specifically, the processing device 602 may be a complex instruction set computing (CISC) microprocessor, a reduced instruction set computing (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, a processor implementing other instruction sets, or multiple processors implementing a combination of instruction sets. The processing device 602 may also be one or more special purpose processing devices, such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), a network processor, or the like. The processing device 602 is configured to execute instructions 626 for performing the operations and steps discussed herein. The computer system 600 may further include a network interface device 608 to communicate over a network 620.

[0104] The data storage system 618 may include a machine-readable storage medium 624 (also referred to as a computer-readable medium) on which is stored one or more sets of instructions 626 or software embodying any one or more of the methodologies or functions described herein. The instructions 626 may also reside, completely or at least partially, within the main memory 604 and / or the processing device 602 during execution thereof by the computer system 600, the main memory 604 and the processing device 602 also constituting machine-readable storage media. The machine-readable storage medium 624, the data storage system 618, and / or the main memory 604 may correspond to Figure 1 Memory subsystem 110.

[0105] In one embodiment, instruction 626 implements the Figure 1 The functionality of the media operations manager 122 of the present disclosure is provided. Although the machine-readable storage medium 624 is shown as a single medium in the example embodiment, the term "machine-readable storage medium" should be taken to include a single medium or multiple media storing one or more sets of instructions. The term "machine-readable storage medium" should also be taken to include any medium capable of storing or encoding a set of instructions for execution by a machine and causing the machine to perform any one or more of the methodologies of the present disclosure. Therefore, the term "machine-readable storage medium" should be taken to include, but not be limited to, solid-state memory, optical media, and magnetic media.

[0106] Some portions of the foregoing detailed description have been presented in terms of algorithms and symbolic representations of operations on data bits within a computer memory. These algorithmic descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. An algorithm is generally conceived here to be a self-consistent sequence of operations leading to a desired result. Operations are those requiring physical manipulation of physical quantities. Typically, but not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, combined, compared, and otherwise manipulated. It has proven convenient at times, primarily for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.

[0107] It should be remembered, however, that all of these and similar terms should be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. The present disclosure may involve the actions and processes of computer systems or similar electronic computing devices that manipulate and transform data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system's memories or registers or other such information storage systems.

[0108] The present disclosure also relates to an apparatus for performing the operations herein. This apparatus may be specially constructed for the intended purpose, or it may comprise a general purpose computer selectively activated or reconfigured by a computer program stored in the computer. This computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of magnetic disk, including floppy disks, optical disks, CD-ROMs, and magneto-optical disks; read-only memory (ROM); random access memory (RAM); erasable programmable read-only memory (EPROM); EEPROM; magnetic or optical cards; or any type of medium suitable for storing electronic instructions, each coupled to a computer system bus.

[0109] The algorithms and displays presented herein are not inherently related to any particular computer or other device. Various general purpose systems may be used in conjunction with the programs according to the teachings herein, or it may prove convenient to construct more specialized devices to perform the methods. The structures of various of these systems will appear as set forth in the description above. In addition, the present disclosure is not described with reference to any particular programming language. It should be appreciated that various programming languages ​​may be used to implement the teachings of the present disclosure described herein.

[0110] The present disclosure may be provided as a computer program product or software that may include a machine-readable medium having instructions stored thereon, which instructions may be used to program a computer system (or other electronic device) to perform a process according to the present disclosure. A machine-readable medium includes any mechanism for storing information in a form that can be read by a machine (e.g., a computer). In some embodiments, a machine-readable (e.g., computer-readable) medium includes a machine-readable (e.g., computer-readable) storage medium, such as a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium, an optical storage medium, a flash memory component, etc.

[0111] In the foregoing description, embodiments of the present disclosure have been described with reference to specific example embodiments of the present disclosure. It should be understood that various modifications may be made to the present disclosure without departing from the broader spirit and scope of the embodiments of the present disclosure as set forth in the appended claims. Therefore, the description and drawings should be viewed in an illustrative rather than a restrictive sense.

Claims

1. A system comprising: A set of memory components of a memory subsystem; and a processing device operably coupled to the set of memory components, the processing device configured to perform operations comprising: grouping the plurality of groups of blocks of the set of memory components into respective block stripes; calculating an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold; determining that a first one of the block stripes contains a number of blocks that is associated with a reliability level exceeding the threshold that is less than the average number of blocks; and In response to determining that the first block stripe includes a smaller number of the blocks than the average number of blocks, one or more blocks in a second one of the block stripes are associated with the first block stripe.

2. The system of claim 1, wherein the operations comprise: A plurality of widths of the block stripe are obtained, each of the plurality of widths representing a number of blocks within the respective block stripe associated with the reliability level exceeding the threshold.

3. The system of claim 2, wherein the operations include: determining that the individual widths of the second block strips are at least one block greater than the average width; and The second block of stripes is selected in response to determining that the individual widths of the second block of stripes are greater than the average width.

4. The system of claim 2, wherein the operations comprise: The average width is calculated based on an average of the plurality of widths of the block stripes.

5. The system of claim 1, wherein the operations comprise: One or more blocks in a third one of the block stripes are associated with the first block stripe.

6. The system of claim 1, wherein the operations comprise: generating a replacement table containing first block identifiers of first blocks in the first block stripe associated with a reliability level that falls below the threshold; and A second block identifier of the one or more blocks in the second block stripe that was associated with the first block stripe is associated with the first block identifier.

7. The system of claim 6, wherein the substitution table is stored in DRAM.

8. The system of claim 6, wherein the operations comprise: generating a bad block table including a first block identifier of a first block in the first block stripe associated with the reliability level falling below the threshold; and An indication of whether the first block in the first block stripe has been repaired is associated with the first block identifier.

9. The system of claim 1, wherein the operations comprise: receiving a write operation associated with the first stripe; accessing a group of blocks in the first block stripe; determining that a first block of the set of blocks of the first block stripe is associated with a bad block indication, the bad block indication representing a block associated with a reliability level below the threshold; and A determination is made as to whether the first block is associated with a repaired indication.

10. The system of claim 9, wherein the operations include: In response to determining that the first block of the set of blocks of the first block stripe is not associated with the repaired indication, writing to the first block is skipped and a second block of the set of blocks adjacent to the first block is obtained.

11. The system of claim 9, wherein the operations comprise: responsive to determining that the first block of the set of blocks of the first stripe of blocks is associated with the repaired indication, accessing a second block of the one or more blocks in the second stripe identified in a replacement table; and The write operation is performed on the second block.

12. The system of claim 1, wherein the operations comprise: Accessing configuration data, wherein the configuration data comprises a table associating individual blocks of the set of memory components with respective reliability levels, wherein the reliability levels describe at least one of a data retention parameter, a read disturb parameter, an error rate, a leakage current, a cross-temperature parameter, or an endurance parameter.

13. The system of claim 1, wherein the determining that the first block stripe contains a smaller number of the blocks than the average number of blocks comprises determining that the first block stripe contains a threshold number of blocks that is smaller than the average number of blocks.

14. The system of claim 1, wherein a set of blocks in the first block stripe is distributed across multiple memory dies or across multiple memory planes, and wherein each of the block stripes is of equal size and includes a respective set of blocks across multiple planes or dies.

15. The system of claim 1, wherein the second block stripe includes individual blocks associated with virtual defects, and wherein the operations comprise: Responsive to associating the one or more blocks in the second block stripe with the first block stripe, removing the virtual defects from being associated with the individual blocks.

16. The system of claim 1, wherein the determining that the first of the block stripes includes the smaller number of blocks is performed when the first block stripe is in a discarded state or an erased state, and wherein the second block stripe is selected from a discarded block stripe pool or a free block stripe pool.

17. The system of claim 1, wherein the operations include associating the one or more blocks in the second block stripe with a third block stripe instead of the first block stripe after a period of time.

18. The system of claim 1, wherein the one or more blocks in the second block stripe are selected in response to determining that a program-erase count (PEC) of the one or more blocks is lower than a PEC count of a group of blocks in the first block stripe.

19. A computerized method comprising: grouping a plurality of groups of blocks of a set of storage components into respective block stripes; calculating an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold; determining that a first one of the block stripes contains a number of blocks that is associated with a reliability level exceeding the threshold that is less than the average number of blocks; and In response to determining that the first block stripe includes a smaller number of the blocks than the average number of blocks, one or more blocks in a second one of the block stripes are associated with the first block stripe.

20. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising: grouping a plurality of groups of blocks of a set of storage components into respective block stripes; calculating an average width across the block stripes, the average width representing an average number of blocks within each of the block stripes associated with a reliability level exceeding a threshold; determining that a first one of the block stripes contains a number of blocks that is associated with a reliability level exceeding the threshold that is less than the average number of blocks; and In response to determining that the first block stripe includes a smaller number of the blocks than the average number of blocks, one or more blocks in a second one of the block stripes are associated with the first block stripe.

Images