Power module packaging structure of integrated protection circuit

Abstract

The invention discloses a power module packaging structure of an integrated protection circuit, and relates to the technical field of semiconductor packaging, the packaging structure comprises a supporting substrate, and a first DBC substrate and a second DBC substrate arranged on the supporting substrate; at least one power chip is arranged on the first DBC substrate; the second DBC substrate comprises a capacitor integration area, and at least one capacitor module is arranged in the capacitor integration area; the capacitor module comprises a first insulating dielectric layer prepared on the capacitor integration region and a first conductive layer prepared on the first insulating dielectric layer; and forming a protection capacitor based on the capacitor integration region, the first insulating dielectric layer and the first conductive layer, wherein the protection capacitor is electrically connected between the first electrode and the second electrode of the power chip. The protection circuit can be integrated in the packaging structure, and the protection capacitor in the protection circuit is formed through the stacked first insulating dielectric layer and the first conductive layer, so that the preparation process is simplified, and the preparation cost is saved.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor packaging, and in particular to a power module packaging structure with an integrated protection circuit. Background Art

[0002] A power module is a module formed by combining power electronic devices according to certain functions and then encapsulating them. The IGBT power module formed by IGBT (insulated gate bipolar transistor) in the power module has been widely used in inverters, electric vehicles, switching power supplies and other fields due to its advantages such as high withstand voltage, high current and low loss. However, IGBT is prone to voltage spikes when turned off, causing device damage, so IGBT power modules usually need to be used in conjunction with protection circuits.

[0003] At present, the traditional power module packaging layout is compact, and it is not easy to set up additional protection circuits in the original packaging structure. In addition, capacitors are usually set in the protection circuit, but capacitors are not easy to be soldered on the DBC substrate. They need to be reflowed with the help of tooling and jigs, which is cumbersome to prepare and increases the preparation cost. Summary of the invention

[0004] In view of the above problems and technical requirements, the inventors have proposed a power module packaging structure with an integrated protection circuit. The technical solution of the present invention is as follows:

[0005] A power module packaging structure with an integrated protection circuit includes a support substrate and a first DBC substrate and a second DBC substrate disposed on the support substrate;

[0006] At least one power chip is disposed on the first DBC substrate;

[0007] The second DBC substrate comprises a capacitor integration region, wherein at least one capacitor module is arranged in the capacitor integration region;

[0008] The capacitor module includes a first insulating dielectric layer formed on the capacitor integration region, and a first conductive layer formed on the first insulating dielectric layer;

[0009] A protection capacitor is formed based on the capacitor integration region, the first insulating medium layer and the first conductive layer. The protection capacitor is electrically connected between the first electrode and the second electrode of the power chip.

[0010] A further technical solution is that a third DBC substrate is further provided on the support substrate, and the third DBC substrate includes a resistor integrated region;

[0011] The first DBC substrate comprises an electrical connection area, the power chip is arranged in the electrical connection area, and at least one protection resistor is arranged in the resistor integration area;

[0012] The second electrode of the power chip is electrically connected to the electrical connection area, the electrical connection area is electrically connected to one end of the protection resistor, the other end of the protection resistor is electrically connected to the first conductive layer, and the capacitor integration area is electrically connected to the first electrode of the power chip.

[0013] A further technical solution is that the second DBC substrate further includes a grounding region, and the grounding region is electrically connected to the capacitor integrated region;

[0014] A grounding through hole is provided in the grounding region, and the grounding through hole penetrates the second DBC substrate and the supporting substrate. A grounding column is filled in the grounding through hole, and the grounding region is grounded through the grounding column.

[0015] A further technical solution is that the first DBC substrate further includes an electrode lead-out region, and the electrode lead-out region is electrically connected to the first electrode of the power chip.

[0016] A further technical solution is that it also includes a first electrode terminal, a second electrode terminal and a grounding terminal, wherein the first electrode terminal is electrically connected to the electrode lead-out area, the second electrode terminal is electrically connected to the electrical connection area, and the grounding terminal is electrically connected to the grounding area.

[0017] A further technical solution is that the power chip is an IGBT chip or a SiC MOSFET chip.

[0018] A further technical solution is that when the power chip is an IGBT chip, at least one diode chip is also arranged on the first DBC substrate, the anode of the diode chip is electrically connected to the first electrode of the power chip, and the cathode of the diode chip is electrically connected to the second electrode of the power chip.

[0019] A further technical solution is that the first DBC substrate includes a plurality of first electrode lead wires and a plurality of third electrode lead wires;

[0020] The first electrode lead is electrically connected to the first electrode of the power chip, and the third electrode lead is electrically connected to the third electrode of the power chip.

[0021] A further technical solution is that a second insulating medium layer is disposed above the first DBC substrate, and a conductive layer group is disposed on the second insulating medium layer;

[0022] The second insulating medium layer is arranged above the first electrode lead wire and the third electrode lead wire, the power chip is arranged above the conductive layer group, and the conductive layer group includes the second conductive layer and the third conductive layer;

[0023] A plurality of first conductive pillars and a plurality of second conductive pillars are disposed in the second insulating medium layer, and the first conductive pillars and the second conductive pillars penetrate the second insulating medium layer;

[0024] One end of the first conductive column is in contact with the first electrode lead wire, the other end of the first conductive column is in contact with one side of the second conductive layer, and the other side of the second conductive layer is in contact with the first electrode of the power chip;

[0025] One end of the second conductive column contacts the third electrode lead wire, the other end of the second conductive column contacts one surface of the third conductive layer, and the other surface of the third conductive layer contacts the third electrode of the power chip.

[0026] A further technical solution is that the materials of the first conductive layer, the second conductive layer and the third conductive layer include copper.

[0027] The beneficial technical effects of the present invention are:

[0028] The present invention sets a second DBC substrate in the packaging structure, and sets a capacitor integration area on the second DBC substrate, and uses the capacitor integration area, the first insulating dielectric layer prepared on the capacitor integration area, and the first conductive layer prepared on the first insulating dielectric layer to form a protection capacitor connected between the first electrode and the second electrode of the power chip. The present invention integrates a protection circuit in the original packaging structure, thereby effectively suppressing voltage spikes and improving the current carrying capacity and stability of the module. At the same time, the protection capacitor in the protection circuit is formed by stacking insulating dielectric layers and conductive layers, and can be prepared using the existing module preparation process, without the need to solder the capacitor through reflow soldering, which simplifies the preparation process and saves preparation costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a top view schematic diagram of the power module packaging structure in the first embodiment of the present invention.

[0030] Figure 2 It is a schematic cross-sectional view of the power module packaging structure in the first embodiment of the present invention.

[0031] Figure 3 It is a schematic cross-sectional view of the second DBC substrate at the grounding through hole in the first embodiment of the present invention.

[0032] Figure 4 It is a schematic top view of the first DBC substrate in the second embodiment of the present invention.

[0033] Figure 5 It is a side view schematic diagram of the first DBC substrate in the second embodiment of the present invention.

[0034] Reference numerals:

[0035] 1-support substrate, 2-first electrode terminal, 3-second electrode terminal, 4-ground terminal;

[0036] 10-first DBC substrate, 11-electrical connection layer, 12-power chip, 13-diode chip, 14-electrode lead area, 15-first electrode lead wire, 16-third electrode lead wire, 17-second insulating medium layer, 18-first conductive column, 19-second conductive column, 201-second conductive layer, 202-third conductive layer;

[0037] 20 - second DBC substrate, 21 - capacitor integration area, 22 - first insulating dielectric layer, 23 - first conductive layer, 24 - grounding area, 25 - grounding column, 26 - grounding through hole;

[0038] 30 - third DBC substrate, 31 - resistor integration region, 32 - protection resistor. DETAILED DESCRIPTION

[0039] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.

[0040] The present invention provides a power module packaging structure with an integrated protection circuit, comprising a support substrate 1 and a first DBC substrate 10 and a second DBC substrate 20 disposed on the support substrate 1;

[0041] At least one power chip 12 is disposed on the first DBC substrate 10;

[0042] The second DBC substrate 20 includes a capacitor integrated area 21, and at least one capacitor module is disposed in the capacitor integrated area 21;

[0043] The capacitor module includes a first insulating dielectric layer 22 formed on a capacitor integrated region 21, and a first conductive layer 23 formed on the first insulating dielectric layer 22;

[0044] A protection capacitor is formed based on the capacitor integrated region 21 , the first insulating medium layer 22 and the first conductive layer 23 . The protection capacitor is electrically connected between the first electrode and the second electrode of the power chip 12 .

[0045] Specifically, the first DBC (Direct Bonded Copper) substrate and the second DBC substrate are in the same form as in the prior art, and the DBC substrate generally includes a top copper layer, a ceramic layer, and a bottom copper layer stacked in sequence from top to bottom, the top copper layer is divided into a plurality of different conductive regions after being patterned, and the bottom copper layer is soldered to the support substrate 1 by solder. The capacitor integrated region 21 is a conductive region formed after the top copper layer of the second DBC substrate 20 is patterned.

[0046] Figure 1 and Figure 2 A schematic diagram of the power module packaging structure in the first embodiment of the present invention is shown, and the integrated protection circuit includes at least one protection capacitor. The present invention utilizes the capacitor integration area 21 and the first conductive layer 23 as the electrode plates of the protection capacitor, and utilizes the first insulating medium layer 22 as the dielectric layer of the protection capacitor to form a protection capacitor. The protection capacitor is electrically connected between the first electrode and the second electrode of the power chip 12, and can suppress the voltage spike generated when the power chip 21 is turned off, thereby improving the overall stability of the power module.

[0047] The material of the first conductive layer 23 can be copper, and the material of the first insulating dielectric layer 22 is the same as the material of the ceramic layer in the DBC substrate, that is, the first insulating dielectric layer 22 and the first conductive layer 23 in the capacitor module can both be made of the material for preparing the DBC substrate. The protection capacitor can be prepared using the original preparation process and fixture of the power module, without the need to add additional process steps such as reflow soldering and supporting process fixtures. While integrating the protection circuit into the power module, the preparation process is simplified and the preparation cost is saved. The specific manner in which the protection capacitor is electrically connected between the first electrode and the second electrode of the power chip 12 can be referred to the following description. A plurality of capacitor modules can be arranged on the capacitor integration area 21 to form a plurality of protection capacitors. In specific implementation, the number of capacitor modules and the connection relationship between the plurality of protection capacitors can be determined according to the circuit topology of the required protection circuit.

[0048] Furthermore, a third DBC substrate 30 is also disposed on the support substrate 1, and the third DBC substrate 30 includes a resistor integrated region 31;

[0049] The first DBC substrate 10 includes an electrical connection area 11, the power chip 12 is arranged in the electrical connection area 11, and at least one protection resistor 32 is arranged in the resistor integration area 31;

[0050] The second electrode of the power chip 12 is electrically connected to the electrical connection area 11, the electrical connection area 11 is electrically connected to one end of the protection resistor 32, the other end of the protection resistor 32 is electrically connected to the first conductive layer 23, and the capacitor integrated area 21 is electrically connected to the first electrode of the power chip 12.

[0051] Specifically, the electrical connection area 11 is a conductive area formed by patterning the top copper layer of the first DBC substrate 10, and the resistor integrated area 31 is a conductive area formed by patterning the third DBC substrate 30. The protection resistor 32 can be a vertical resistor. In the first embodiment, the protection circuit includes a protection resistor 32 and a protection capacitor formed based on the above capacitor module. One end of the protection resistor 32, i.e., the first pin, is welded to the resistor integrated area 31. The resistor integrated area 31 is electrically connected to the electrical connection area 11 through a bonding wire. The electrical connection area 11 is electrically connected to the second electrode of the power chip 12. The other end of the protection resistor 32, i.e., the second pin, is electrically connected to the first conductive layer 23 through a bonding wire. The capacitor integrated area 21 is electrically connected to the first electrode of the power chip 12, so that the first electrode of the power chip 12 is connected to the second electrode of the power chip 12 through the protection capacitor and the protection resistor 32 in sequence, so that the protection circuit is integrated into the power module. In a specific implementation, a plurality of protection resistors 32 may be disposed on the resistor integrated region 31 , and the number of the protection resistors 32 and the connection relationship of the plurality of protection resistors 32 may be determined according to the circuit topology structure of the required protection circuit.

[0052] The power chip 12 is an IGBT chip or a SiC MOSFET chip. For the IGBT chip, the first electrode is an emitter, the second electrode is a collector, and the IGBT chip also includes a gate. The IGBT / SiC MOSFET chip includes a front side and a back side corresponding to the front side. Generally, the IGBT chip has a gate and an emitter on the front side, and a collector on the back side; the SiC MOSFET chip has a gate and a source on the front side, and a drain on the back side.

[0053] When the power chip 12 is an IGBT chip, at least one diode chip 13 for freewheeling is further arranged on the electrical connection area 11 of the first DBC substrate 10. The diode chip 13 is connected in reverse parallel with the IGBT chip, that is, the anode of the diode chip 13 is electrically connected to the first electrode, i.e., the emitter, of the IGBT chip, and the cathode of the diode chip 13 is electrically connected to the second electrode, i.e., the collector, of the IGBT chip. Specifically, the diode chip 13 also includes a front side and a back side corresponding to the front side. Generally, the anode is arranged on the front side of the diode chip 13, and the cathode is arranged on the back side of the diode chip 13.

[0054] In the first embodiment, the power chip 12 is an IGBT chip, and the back of the IGBT chip is soldered to the electrical connection area 11 by solder, so that the collector of the IGBT chip is electrically connected to the electrical connection area 11. The back of the diode chip 13 is soldered to the electrical connection area 11 by solder, so that the cathode of the diode chip 13 is electrically connected to the electrical connection area 11, and thus electrically connected to the collector of the IGBT chip. The collector of the IGBT chip is electrically connected to the anode of the diode chip 13 by a bonding wire, and the capacitor integrated area 21 is electrically connected to the anode of the diode chip 13 by a bonding wire, so that one end of the protection capacitor is electrically connected to the emitter of the IGBT chip.

[0055] In the first embodiment, the first DBC substrate 10 further includes an electrode lead-out region 14, and the electrode lead-out region 14 is electrically connected to the first electrode of the power chip 12. The electrode lead-out region 14 and the electrical connection region 11 are both conductive regions formed by patterning the top copper layer of the first DBC substrate 10, and the electrode lead-out region 14 is electrically connected to the anode of the diode chip 13 through a bonding wire, thereby being electrically connected to the first electrode of the power chip 12.

[0056] Furthermore, the second DBC substrate 20 further includes a grounding region 24, and the grounding region 24 is electrically connected to the capacitor integrated region 21;

[0057] A grounding through hole 26 is provided in the grounding region 24 . The grounding through hole 26 penetrates the second DBC substrate 20 and the supporting substrate 1 . A grounding column 25 is filled in the grounding through hole 26 . The grounding region 24 is grounded through the grounding column 25 .

[0058] Specifically, the grounding region 24 and the capacitor integrated region 21 are both conductive regions formed by patterning the top copper layer of the second DBC substrate 20, and the grounding region 24 is electrically connected to the capacitor integrated region 21 through bonding wires. Figure 3 As shown, the grounding through hole 26 passes through the second DBC substrate 20 and the supporting substrate 1, and the grounding through hole 26 is filled with a grounding column 25. The grounding column 25 provides a grounding path for the power module. The grounding column 25 contacts the grounding area 24 so that the grounding area 24 is grounded through the grounding column 25. The specific form of the grounding column 25 can be consistent with the prior art.

[0059] To facilitate the electrode lead-out of the power module, the power module also includes a first electrode terminal 2, a second electrode terminal 3 and a ground terminal 4. In embodiment 1, the first electrode terminal 2 is welded on the electrode lead-out area 14, the second electrode terminal 3 is welded on the electrical connection area 11, and the ground terminal 4 is welded on the grounding area 24.

[0060] In the first embodiment, the back of the power chip 12 is welded to the electrical connection layer 11 of the first DBC substrate 10, and the first electrode on the front of the power chip 12 is connected to the anode of the diode chip 13 through a bonding wire, and is electrically connected to the electrode lead-out area 14 through a bonding wire. However, the bonding wire is prone to breakage, which reduces the stability of the electrode lead-out. In order to improve the stability of the electrode lead-out and enhance the reliability of the power module, another electrode lead-out method for the power chip 12 is provided in the second embodiment of the present invention.

[0061] The difference between the second embodiment and the first embodiment is that the first DBC substrate 10 includes a plurality of first electrode lead wires 15 and a plurality of third electrode lead wires 16; the first electrode lead wires 15 are electrically connected to the first electrodes of the power chip 12, and the third electrode lead wires 16 are electrically connected to the third electrodes of the power chip 12.

[0062] A second insulating dielectric layer 17 is also arranged above the first DBC substrate 10, and a conductive layer group is arranged on the second insulating dielectric layer 17; the second insulating dielectric layer 17 is arranged above the first electrode lead 15 and the third electrode lead 16, and the power chip 12 is arranged above the conductive layer group, and the conductive layer group includes a second conductive layer 201 and a third conductive layer 202.

[0063] A plurality of first conductive pillars 18 and a plurality of second conductive pillars 19 are arranged in the second insulating dielectric layer 17, and the first conductive pillars 18 and the second conductive pillars 19 penetrate the second insulating dielectric layer 17. One end of the first conductive pillar 18 contacts the first electrode lead 15, and the other end of the first conductive pillar 18 contacts one side of the second conductive layer 201, and the other side of the second conductive layer 201 contacts the first electrode of the power chip 12; one end of the second conductive pillar 19 contacts the third electrode lead 16, and the other end of the second conductive pillar 19 contacts one side of the third conductive layer 202, and the other side of the third conductive layer 202 contacts the third electrode of the power chip 12. The third electrode of the power chip 12 represents the gate of the IGBT chip or the SiCMOSFET chip.

[0064] Figure 4 and Figure 5 A schematic diagram of the first DBC substrate 10 in the second embodiment of the present invention is shown. The first electrode lead wire 15 and the third electrode lead wire 16 are both conductive patterns formed after the top copper layer of the first DBC substrate 10 is patterned. In the second embodiment, two first electrode lead wires 15 and one third electrode lead wire 16 are arranged in parallel on the ceramic layer of the first DBC substrate 10, and the third electrode lead wire 16 is arranged between the two first electrode lead wires 15.

[0065] The second insulating dielectric layer 17 is arranged to cover the first electrode lead wire 15 and the third electrode lead wire 16, and the first electrode lead wire 15 and the third electrode lead wire 16 partially extend from below the second insulating dielectric layer 17 along the ceramic layer of the first DBC substrate 10 to the outside of the second insulating dielectric layer 17 to facilitate the lead-out of the electrodes.

[0066] The first conductive column 18 and the second conductive column 19 are perpendicular to the surface of the second insulating dielectric layer 17 and penetrate the second insulating dielectric layer 17. The first conductive column 18 and the second conductive column 19 can be obtained by setting a through hole in the second insulating dielectric layer 17 and filling the conductive medium. In this embodiment, two columns of first conductive columns 18 and one second conductive column 19 are provided, and the second conductive column 19 is located between the two columns of first conductive columns 18. Each column of first conductive columns 18 corresponds to a first electrode lead 15, and any column of first conductive columns 18 is provided with three first conductive columns 18 arranged at intervals along the length direction of the first electrode lead 15. One end of the first conductive column 18 is welded to the corresponding first electrode lead 15, and one end of the second conductive column 19 is welded to the third electrode lead 16.

[0067] The power chip 12 is arranged on the conductive layer group with the front side facing the conductive layer group. The second conductive layer 201 and the third conductive layer 202 have the same thickness and are insulated and isolated from each other. The other end of the first conductive column 18 is welded to one side of the second conductive layer 201. The first electrode arranged on the front side of the power chip 12 is welded to the other side of the second conductive layer 201 to lead out the first electrode of the power chip 12 through the second conductive layer 201, the first conductive column 18 and the first electrode lead wire 15.

[0068] The other end of the second conductive column 19 is welded to one side of the third conductive layer 202, and the third electrode disposed on the front of the power chip 12 is welded to the other side of the third conductive layer 202, so as to lead out the third electrode of the power chip 12 through the third conductive layer 202, the second conductive column 19 and the third electrode lead 16. The second electrode disposed on the power chip 12 can be led out through the copper frame in the prior art. The power chip 12 in the second embodiment adopts a SiC MOSFET chip, and the diode chip 13 may not be provided at this time.

[0069] Leading out the electrodes of the power chip 12 in the manner described in the second embodiment can not only reduce the number of bonding wires used and reduce the risk of failure caused by the breakage of the bonding wires, but also expand the heat dissipation path of the power chip 12 through the conductive layer group, expand the heat dissipation area, and further improve the reliability of the power module. In the second embodiment, one end of the protection resistor 32 can be directly electrically connected to the third electrode of the power chip 12 through a bonding wire, and the capacitor integrated area 21 can be electrically connected to the first electrode lead wire 15 through a bonding wire to set the protection circuit between the first electrode and the second electrode of the power chip 12. In the second embodiment, the first electrode terminal 2 can be welded to the first electrode lead wire 15, the second electrode terminal 3 can be welded to the second electrode on the back of the power chip 12, and the grounding terminal 4 can be welded to the grounding area 24. The material of the second insulating dielectric layer 17 can be the same as the material of the DBC substrate ceramic layer, and the material of the second conductive layer 201 and the third conductive layer 202 can be selected from copper.

[0070] It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the above description refer to directions in the drawings of the present application specification, and the words "front" and "back", "inner" and "outer" refer to directions toward or away from a specific component, respectively. In addition, the terms "first", "second" and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features.

[0071] The above is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiments. It is understood that other improvements and changes directly derived or associated by those skilled in the art without departing from the spirit and concept of the present invention should be considered to be included in the protection scope of the present invention.

Claims

1. A power module packaging structure with an integrated protection circuit, characterized in that: It includes a supporting substrate and a first DBC substrate and a second DBC substrate disposed on the supporting substrate; At least one power chip is disposed on the first DBC substrate; The second DBC substrate comprises a capacitor integration region, wherein at least one capacitor module is arranged in the capacitor integration region; The capacitor module includes a first insulating dielectric layer formed on the capacitor integration region, and a first conductive layer formed on the first insulating dielectric layer; A protection capacitor is formed based on the capacitor integration region, the first insulating medium layer and the first conductive layer. The protection capacitor is electrically connected between the first electrode and the second electrode of the power chip.

2. The power module packaging structure of the integrated protection circuit according to claim 1, characterized in that: A third DBC substrate is also disposed on the support substrate, and the third DBC substrate includes a resistor integrated region; The first DBC substrate comprises an electrical connection area, the power chip is arranged in the electrical connection area, and at least one protection resistor is arranged in the resistor integration area; The second electrode of the power chip is electrically connected to the electrical connection area, the electrical connection area is electrically connected to one end of the protection resistor, the other end of the protection resistor is electrically connected to the first conductive layer, and the capacitor integration area is electrically connected to the first electrode of the power chip.

3. The power module packaging structure with integrated protection circuit according to claim 1, characterized in that: The second DBC substrate further includes a grounding region, wherein the grounding region is electrically connected to the capacitor integrated region; A grounding through hole is provided in the grounding region, and the grounding through hole penetrates the second DBC substrate and the supporting substrate. A grounding column is filled in the grounding through hole, and the grounding region is grounded through the grounding column.

4. The power module packaging structure with integrated protection circuit according to claim 3, characterized in that: The first DBC substrate further includes an electrode lead-out region, and the electrode lead-out region is electrically connected to the first electrode of the power chip.

5. The power module packaging structure with integrated protection circuit according to claim 4, characterized in that: It also includes a first electrode terminal, a second electrode terminal and a grounding terminal, the first electrode terminal is electrically connected to the electrode lead-out area, the second electrode terminal is electrically connected to the electrical connection area, and the grounding terminal is electrically connected to the grounding area.

6. The power module packaging structure with integrated protection circuit according to claim 1, characterized in that: The power chip is an IGBT chip or a SiC MOSFET chip.

7. The power module packaging structure with integrated protection circuit according to claim 6, characterized in that: When the power chip is an IGBT chip, at least one diode chip is further arranged on the first DBC substrate, the anode of the diode chip is electrically connected to the first electrode of the power chip, and the cathode of the diode chip is electrically connected to the second electrode of the power chip.

8. The power module packaging structure with integrated protection circuit according to claim 1, characterized in that: The first DBC substrate includes a plurality of first electrode lead wires and a plurality of third electrode lead wires; The first electrode lead is electrically connected to the first electrode of the power chip, and the third electrode lead is electrically connected to the third electrode of the power chip.

9. The power module packaging structure with integrated protection circuit according to claim 8, characterized in that: A second insulating medium layer is disposed above the first DBC substrate, and a conductive layer group is disposed on the second insulating medium layer; The second insulating medium layer is arranged above the first electrode lead wire and the third electrode lead wire, the power chip is arranged above the conductive layer group, and the conductive layer group includes the second conductive layer and the third conductive layer; A plurality of first conductive pillars and a plurality of second conductive pillars are disposed in the second insulating medium layer, and the first conductive pillars and the second conductive pillars penetrate the second insulating medium layer; One end of the first conductive column is in contact with the first electrode lead wire, the other end of the first conductive column is in contact with one side of the second conductive layer, and the other side of the second conductive layer is in contact with the first electrode of the power chip; One end of the second conductive column contacts the third electrode lead wire, the other end of the second conductive column contacts one surface of the third conductive layer, and the other surface of the third conductive layer contacts the third electrode of the power chip.

10. The power module packaging structure with integrated protection circuit according to claim 9, characterized in that: The materials of the first conductive layer, the second conductive layer and the third conductive layer include copper.

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