The invention relates to a
through silicon via stack-based three-stack memory structure. According to the
through silicon via stack-based three-stack memory structure, a
CMOS circuit comprises a firstsilicon substrate and a first insulating layer on the first
silicon substrate, a plurality of first external pads being arranged in the first insulating layer; a
memory cell array includes a second
silicon substrate and a second insulating layer on the second
silicon substrate, a plurality of second external pads being arranged in the second insulating layer; the
CMOS circuit further comprises through silicon vias which pass through the first insulating layer and the first silicon substrate and are electrically connected with the first external pads; and the first silicon substrate and the second insulating layer contact with each other, the through silicon vias are bonded to the second external pads, and therefore,
electrical connection between the
CMOS circuit and the
memory cell arraycan be realized. According to the
through silicon via stack-based three-stack memory structure provided by the embodiments of the invention, the through silicon vias are formed on the CMOS circuit; the first ends of the through silicon vias are connected with the first external pads on the CMOS circuit, and the second ends of the through silicon vias are bonded to the second external pads of the
memory cell array, so that the
electrical connection between the CMOS circuit and the memory
cell array is realized, and therefore, storage density can be improved, and wiring density can be decreased.