Layout pattern processing method and device, equipment, medium and product

Abstract

The application discloses a layout pattern processing method, device, equipment, medium and product, and belongs to the technical field of pattern processing. The method comprises the following steps: acquiring a first layout pattern, the first layout pattern being a pattern processed by an optical proximity effect correction algorithm, wherein the edges of the first layout pattern comprise a plurality of non-variable edges and a plurality of variable edges, and each non-variable edge is connected between two adjacent variable edges; performing a merging operation on the edges in the first layout pattern, converting the plurality of non-variable edges into a plurality of new variable edges, and obtaining a second layout pattern; and performing optimization on at least part of the edges in the second layout pattern, and obtaining a third layout pattern. By converting the non-variable edges in the first layout pattern into variable edges, and then optimizing the second layout pattern comprising the plurality of new variable edges to obtain the third layout pattern, the quality of the pattern after real exposure of the third layout pattern can be improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of graphics processing, and particularly relates to a layout pattern processing method and device, equipment, medium and product. BACKGROUND

[0002] In the production process of integrated chips, the pattern manufacturing of a mask plate is very important. In the prior art, the pattern of the mask plate is often simulated and manufactured to optimize the pattern of the mask plate. For example, after obtaining an original design pattern of a mask plate, the original design pattern is corrected based on an optical proximity correction (OPC) algorithm to obtain a corrected pattern. However, the corrected pattern obtained based on the above-mentioned OPC algorithm may have a ripple phenomenon, so that the difference between the corrected pattern and the pattern of the mask plate is large, and the accuracy of the pattern is low. SUMMARY

[0003] The embodiments of the present application provide a layout pattern processing method, device, equipment, medium and product, which can improve the accuracy of the pattern of the generated mask plate.

[0004] In a first aspect, the embodiments of the present application provide a layout pattern processing method, comprising:

[0005] obtaining a first layout pattern, the first layout pattern being a pattern processed by an optical proximity correction algorithm, wherein the edges of the first layout pattern comprise a plurality of non-variable edges and a plurality of variable edges, and each non-variable edge is connected between two adjacent variable edges;

[0006] performing a merging operation on the edges in the first layout pattern to convert the plurality of non-variable edges into a plurality of new variable edges, to obtain a second layout pattern;

[0007] optimizing at least part of the edges in the second layout pattern to obtain a third layout pattern.

[0008] In a second aspect, the embodiments of the present application provide a layout pattern processing device, comprising:

[0009] an obtaining module configured to obtain a first layout pattern, the first layout pattern being a pattern processed by an optical proximity correction algorithm, wherein the edges of the first layout pattern comprise a plurality of non-variable edges and a plurality of variable edges, and each non-variable edge is connected between two adjacent variable edges;

[0010] a merging module configured to perform a merging operation on the edges in the first layout pattern to convert the plurality of non-variable edges into a plurality of new variable edges, to obtain a second layout pattern;

[0011] An optimization module is configured to optimize at least part of the edges in the second layout pattern to obtain a third layout pattern.

[0012] In a third aspect, an electronic device is provided, and the device includes:

[0013] a processor and a memory storing computer program instructions;

[0014] The processor, when executing the computer program instructions, is configured to execute the layout pattern processing method of the first aspect.

[0015] In a fourth aspect, a computer storage medium is provided, and the computer storage medium stores computer program instructions. When the computer program instructions are executed by a processor, the layout pattern processing method of the first aspect is implemented.

[0016] In a fifth aspect, a computer program product is provided, and the computer program product includes a computer program. When the computer program is processed by a processor, the layout pattern processing method of the first aspect is implemented.

[0017] The layout pattern processing method, device, electronic device, medium and product provided by the embodiments of the present application can obtain a first layout pattern processed by an optical proximity effect correction algorithm, convert a plurality of non-variable edges into variable edges by performing a merging operation on the edges in the first layout pattern to obtain a second layout pattern, and then optimize at least part of the edges in the second layout pattern, so as to reduce the contour fluctuation phenomenon in the layout pattern and make the pattern after actual exposure of a third layout pattern closer to a reference pattern. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly introduced. Those skilled in the art can obtain other drawings according to these drawings without creating any creative labor.

[0019] Figure 1 A partial schematic diagram of an example to-be-optimized pattern is provided for some embodiments of the present application.

[0020] Figure 2 A partial schematic diagram of an example exposure pattern is provided for some embodiments of the present application.

[0021] Figure 3 A flowchart of a layout pattern processing method is provided for some embodiments of the present application.

[0022] Figure 4 A partial schematic diagram of an example first layout pattern is provided for some embodiments of the present application.

[0023] Figure 5 Another exemplary partial view of an exposure pattern is provided for some embodiments of the present application.

[0024] Figure 6 Another exemplary flow chart of a layout pattern processing method is provided for some embodiments of the present application.

[0025] Figure 7 Another exemplary flow chart of a layout pattern processing method is provided for some embodiments of the present application.

[0026] Figure 8 An exemplary schematic diagram of a layout pattern processing apparatus is provided for some embodiments of the present application.

[0027] Figure 9 An exemplary hardware structure diagram of an electronic device is provided for some embodiments of the present application. DETAILED DESCRIPTION

[0028] The features and exemplary embodiments of various aspects of the present application will be described in detail below with reference to the drawings. To make the purposes, technical solutions and advantages of the present application more clear, the present application will be further described in detail below with reference to the drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, but not to limit the present application. The present application can be implemented without some of the specific details by those skilled in the art. The following description of the embodiments is only intended to provide a better understanding of the present application by showing examples of the present application.

[0029] It should be noted that, in this document, relational terms such as first and second, and the like, are used solely to distinguish one entity or action from another entity or action, without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises", "comprising", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but can include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without more limitations, an element preceded by "comprises... a" does not, without more constraints, foreclose the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0030] Before the technical solutions provided by the embodiments of the present application are described, the problems existing in the related art will be described in detail to facilitate the understanding of the embodiments of the present application.

[0031] During the integrated circuit manufacturing process, a mask pattern to be optimized is obtained. The optical proximity correction (OPC) algorithm is used to correct the pattern to be optimized, resulting in the image shown below. Figure 1 The layout pattern shown may include invariant edge 101 and variable edge 102. Then, simulated exposure can be performed on the first layout pattern to obtain... Figure 2 The exposure pattern shown. However, based on, as... Figure 1 After the simulated exposure of the pattern shown, there may be significant differences in the edge offset errors of adjacent sides of the exposed pattern, and there may be instances where the signs are opposite. For example, Figure 2 , Figure 2 To address the above, as follows Figure 1 The exposed pattern obtained by simulating exposure of the aforementioned map graphic. Figure 2 The edge placement error (EPE) of edge 201 is -2.25, and the edge placement error of edge 202 is 1.5. The absolute value of the difference between -2.25 and 1.5 is greater than the threshold of 3, i.e. Figure 2 The simulated exposure pattern exhibits a ripple effect. This phenomenon may result in the presence of pinch lines or bridges in the actual exposed pattern obtained after exposure.

[0032] It is worth noting that the thresholds and edge placement errors mentioned above are merely exemplary values.

[0033] Based on this, embodiments of this application provide a method, apparatus, device, medium, and product for processing layout graphics, which can solve the above-mentioned problems. The following is a detailed description of a layout graphics processing method provided by embodiments of this application.

[0034] In some embodiments, such as Figure 3 As shown, this application embodiment provides a method for processing layout graphics, which may include the following steps S310-S320:

[0035] S310: Obtain the first layout graphic. The first layout graphic is a graphic processed by the optical proximity effect correction algorithm. The edges of the first layout graphic include multiple invariant edges and multiple variable edges 401 and 402. Each invariant edge connects two adjacent variable edges.

[0036] It can obtain the first map image, for example, it can obtain... Figure 4A partial view of a first layout pattern is shown. The first layout pattern is processed by an optical proximity correction algorithm. The first layout pattern can include non-var edges and var edges. The non-var edges can be connected between two adjacent var edges. Figure 4 In some examples, the non-var edges 401 are connected between two var edges 402.

[0037] In some examples, the var edges or the non-var edges can be straight lines or curves. Figure 4 The first layout pattern shown is an example layout pattern.

[0038] S320: performing a merging operation on the edges in the first layout pattern to convert the non-var edges into new var edges, to obtain a second layout pattern.

[0039] The merging operation can be performed on the edges in the first layout pattern to convert the non-var edges into new var edges, to obtain a second layout pattern. The merging operation can be performed on the edges in the first layout pattern by a merge command in a layout processing script file.

[0040] In some examples, the merging operation on the edges in the first layout pattern can further include merging overlapping and intersecting patterns in the first layout pattern, to obtain the second layout pattern.

[0041] S330: performing an optimization on at least part of the edges in the second layout pattern, to obtain a third layout pattern.

[0042] The optimization can be performed on at least part of the edges in the second layout pattern, for example, the optimization can be performed on both the var edges and the first var edges, or the optimization can be performed only on the first var edges, to obtain the third layout pattern.

[0043] In some examples, when the optimization is performed on both the var edges and the first var edges, the optimization can be performed first on the first var edges, and then on the var edges.

[0044] In some embodiments, the optimization tool of the layout can be employed to optimize at least part of the edges in the second layout pattern to obtain a third layout pattern. For example, a global optimizer can be employed to optimize the variable edges and the first variable edges, or a local optimizer can be employed to optimize only the first variable edges or the variable edges. Here, when the optimization tool is employed to optimize the edges in the second layout pattern, the optimization target and the constraint condition can be manually input in the control interface of the optimization tool. For example, the identification of the first variable edge can be input as the optimization target, and the distance between the edge and the preset edge frame can be input as the constraint condition for the translation of the edge to optimize at least part of the edges.

[0045] In some examples, after the second layout pattern is simulated to expose to obtain an exposure pattern, at least part of the edges in the second layout pattern can be optimized based on the edge placement error of the exposure pattern and the reference pattern. Here, the optimization tool described above can also be employed to optimize the second layout pattern. For example, the absolute value of the difference between the edge placement error of the first variable edge and the edge placement error of the adjacent edge thereof can be less than a threshold value to optimize the first variable edge. By employing the optimization tool to optimize the second layout pattern, the optimization efficiency of the layout pattern can be improved. The edge placement error is an index for measuring the correction quality. The smaller the edge placement error, the closer the exposure pattern is to the reference pattern.

[0046] In some examples, the optimization operation includes, but is not limited to, translation, deformation, shortening, lengthening, and rotation of part of the edges.

[0047] For example, after at least part of the edges in the second layout pattern are optimized to obtain a third layout pattern, Figure 5 , Figure 5 the pattern obtained after the third layout pattern is simulated to expose, Figure 5 , the edge placement errors of the adjacent edges 501 and 502 are -0.75 and 1.25, respectively. The absolute value of the difference between -0.75 and 1.25 is less than or equal to a threshold value 3, which achieves a significant optimization effect. The smaller the absolute value of the difference between the edge placement errors of the adjacent edges, the higher the quality of the layout after actual exposure. It can be envisaged that the threshold value and the edge placement error are only exemplary, and the actual threshold value can be set artificially.

[0048] The embodiments of the present application obtain a first layout pattern processed by an optical proximity effect correction algorithm, convert a plurality of non-variable edges into variable edges by merging the edges in the first layout pattern to obtain a second layout pattern, and then optimize at least part of the edges in the second layout pattern, which can reduce the contour fluctuation phenomenon in the layout pattern and make the pattern after actual exposure of the third layout pattern closer to the reference pattern.

[0049] In some embodiments, optimizing at least some of the edges in the second layout graph to obtain a third layout graph can include:

[0050] optimizing the new variable edges in the second layout graph to obtain the third layout graph.

[0051] Here, the new variable edges in the second layout graph can be optimized to obtain the third layout graph, for example, based on the global optimizer or the local optimizer described above.

[0052] In some examples, optimizing at least some of the edges in the second layout graph to obtain a third layout graph can include:

[0053] optimizing the variable edges and the new variable edges in the second layout graph to obtain the third layout graph.

[0054] Here, the variable edges and the new variable edges in the second layout graph can be optimized simultaneously, for example, based on the global optimizer described above to obtain the third layout graph.

[0055] It is contemplated that based on the variable edges and the new variable edges in the second layout graph, one of the variable edges can be optimized based on the global optimizer or the local optimizer to obtain a sub-layout graph, and then the other variable edge can be optimized based on the global optimizer or the local optimizer to obtain the third layout graph.

[0056] In some examples, the optimization of at least some of the edges in the second layout graph to obtain a third layout graph can include:

[0057] optimizing the variable edges in the second layout graph to obtain a first sub-layout graph including the optimized variable edges and the new variable edges, and optimizing the new variable edges in the first sub-layout graph to obtain the third layout graph.

[0058] Here, the variable edges in the second layout graph can be optimized first to obtain optimized variable edges, and then a first sub-layout graph including the optimized variable edges and the new variable edges can be obtained, and then the new variable edges in the first sub-layout graph can be optimized to obtain the third layout graph.

[0059] In some examples, the new variable edges in the second layout graph can be optimized first to obtain optimized edges, and then a second sub-layout graph including the optimized edges and the variable edges can be obtained, and then the variable edges in the second sub-layout graph can be optimized to obtain the third layout graph.

[0060] The above-mentioned optimization operation includes, but is not limited to, translation, deformation, shortening, lengthening, rotation and the like of the partial edges.

[0061] The embodiment of the present application obtains the third layout pattern by optimizing the new variable edges in the second layout pattern, or obtains the third layout pattern by optimizing the new variable edges and the variable edges in the second layout pattern, or obtains the first sub-layout pattern including the optimized variable edges and the new variable edges by optimizing the variable edges in the second layout pattern, and obtains the third layout pattern by optimizing the new variable edges in the first sub-layout pattern. The flexibility of optimization can be improved by optimizing at least part of the edges in the above-mentioned second layout pattern in three different optimization manners. Figure 6 As shown in the figure, the step S310 of obtaining the first layout pattern can include the following steps S610-S630:

[0062] S610: Obtain a to-be-corrected pattern.

[0063] The to-be-corrected pattern can be obtained, and the to-be-corrected pattern can include a main resolution pattern of a layout.

[0064] S620: Generate a plurality of breakpoints in the edges of the to-be-corrected pattern by an optical proximity correction algorithm.

[0065] The optical proximity correction (OPC) is a technology of adjusting the topological structure of a light-transmitting region pattern on a photomask, or adding a small sub-resolution auxiliary pattern on the mask, so that the imaging result in the photoresist is as close as possible to the mask pattern. The to-be-corrected pattern can be processed by the optical proximity correction algorithm based on a template pattern, a plurality of breakpoints can be generated in the edges of the to-be-corrected pattern, and the edges of the to-be-corrected pattern are broken into a plurality of line segments based on the plurality of endpoints.

[0066] S630: Generate a first layout pattern including a plurality of non-variable edges and a plurality of variable edges based on the plurality of breakpoints.

[0067] The plurality of line segments generated based on the plurality of breakpoints can be moved, deformed, or rotated to generate variable edges, and a plurality of non-variable edges connecting any two adjacent variable edges are generated.

[0068] In some examples, the OPC processing on the to-be-corrected pattern can further include pattern moving, pattern shrinking, pattern enlarging, pattern rotating, pattern combining, pattern deleting, pattern edge processing, and the like.

[0069] In some examples, the OPC processing on the to-be-corrected pattern can further include pattern moving, pattern shrinking, pattern enlarging, pattern rotating, pattern combining, pattern deleting, pattern edge processing, and the like.

[0070] The embodiments of the present application can generate a plurality of breakpoints in the edges of the to-be-corrected pattern by performing OPC processing on the to-be-corrected pattern, and generate a first layout pattern of non-variable edges and variable edges based on the plurality of breakpoints, thereby correcting the to-be-corrected pattern and improving the accuracy of pattern processing.

[0071] In some embodiments, the merging operation on the edges in the first layout pattern includes:

[0072] Merging the non-variable edges into the variable set of variable edges.

[0073] In the process of the OPC processing on the to-be-corrected pattern, the newly generated variable edges and non-variable edges can be located in different sets, and the set of non-variable edges can be merged into the variable set of variable edges, thereby converting the non-variable edges into variable edges.

[0074] In some embodiments, a layout processing script file can be used to perform the merging operation on the edges of the first layout pattern, for example, the set of non-variable edges can be merged into the variable set of variable edges based on a merge operation command (merge) in the layout processing script file.

[0075] The embodiments of the present application can convert the non-variable edges into variable edges by merging the non-variable edges into the variable set of variable edges, and facilitate the optimization of the non-variable edges, thereby solving the ripple phenomenon that can occur after actual exposure of the layout.

[0076] It is conceivable that when at least part of the edges in the second layout pattern are optimized to obtain a third layout pattern, the second layout pattern can be simulated to exposure, and the second layout pattern can be optimized based on the deviation between the exposure pattern obtained by the simulation and a reference pattern to obtain the third layout pattern.

[0077] In some embodiments, as Figure 7As shown in the above step S330, the at least part of the edges in the second layout pattern is optimized to obtain a third layout pattern, which can include the following steps S710-S740:

[0078] S710: Obtain a reference pattern, the reference pattern being a pattern after the template pattern is simulated exposure.

[0079] Here, the template pattern can be simulated exposure first to obtain a reference pattern. The reference pattern obtained after the template pattern is simulated exposure can be obtained.

[0080] S720: Simulate exposure of the second layout pattern to obtain an exposure pattern.

[0081] The second layout pattern can be simulated exposure to obtain an exposure pattern. It is conceivable that the same working condition information as when the template pattern is simulated exposure can be used when the second layout pattern is simulated exposure. The second layout pattern is exposed to obtain an exposure pattern. In some examples, the working condition information can include the type of photoresist such as positive or negative resist and light source information such as light source illumination position, etc.

[0082] S730: Determine the pattern deviation based on the exposure pattern and the reference pattern.

[0083] The pattern deviation can be determined based on the exposure pattern and the reference pattern. Here, the pattern deviation can be the edge offset error of the exposure pattern and the reference pattern or the square value of the Euler distance of the pixel matrix of the exposure pattern and the pixel matrix of the reference pattern.

[0084] In some examples, a first pixel value of each pixel point in the exposure pattern can be determined to determine a first pixel matrix, and a second pixel value of each pixel point in the reference pattern can be determined to determine a second pixel matrix. The square value of the Euler distance is determined based on the first pixel matrix and the second pixel matrix. Here, the square value of the Euler distance of the pixel matrix and the pixel matrix of the reference pattern can be calculated based on the following expression:

[0085]

[0086] Where F is the square value of the Euler distance of the pixel matrix and the pixel matrix of the reference pattern, M and N represent the number of rows and columns of pixel points in the exposure pattern, i and j are row index and column index, a is the first pixel value, and b is the second pixel value.

[0087] S740: In the case where the pattern deviation is greater than or equal to a threshold value, the at least part of the edges in the second layout pattern is optimized based on the pattern deviation to obtain a third layout pattern.

[0088] In a case where the pattern deviation is greater than or equal to the threshold value, at least part of the edges in the second layout pattern can be optimized based on the pattern deviation, to obtain a third layout pattern.

[0089] In some examples, the pattern deviation can be an average or a weighted average of edge placement errors of different edges corresponding to the exposure pattern and the reference pattern. In a case where the average or the weighted average of the edge placement errors of different edges corresponding to the exposure pattern and the reference pattern is greater than or equal to a threshold value, the first variable edge and the variable edge in the second layout pattern can be optimized based on the pattern deviation, to obtain a third layout pattern.

[0090] In some examples, the pattern deviation can be or a square value of an Euler distance between a pixel matrix of the exposure pattern and a pixel matrix of the reference pattern. In a case where the square value of the Euler distance is greater than or equal to a threshold value, the first variable edge and the variable edge in the second layout pattern can be optimized based on the square value of the Euler distance, to obtain a third layout pattern.

[0091] In some examples, the pattern deviation can include an edge placement error of a target edge in the exposure pattern and a corresponding edge in the reference pattern. In a case where the edge placement error of the target edge in the exposure pattern and the corresponding edge in the reference pattern is greater than or equal to a threshold value, an edge corresponding to the target edge in the second layout pattern can be optimized, to obtain a third layout pattern.

[0092] Embodiments of the present application obtain a reference pattern after simulating exposure of a template pattern, simulate exposure of a second layout pattern to obtain an exposure pattern, optimize at least part of the edges in the second layout pattern based on a pattern deviation between the exposure pattern and the reference pattern, to obtain a third layout pattern. The part of the edges in the second layout pattern is optimized based on the exposure pattern after simulating exposure, so that a pattern after real exposure of the third layout pattern is closer to the reference pattern, and ripple phenomenon is avoided.

[0093] In some embodiments, the step S740 of optimizing at least part of the edges in the second layout pattern based on the pattern deviation, to obtain a third layout pattern, can include:

[0094] The at least part of the edges in the second layout pattern is translated based on the pattern deviation, to obtain a third layout pattern.

[0095] Here, based on the above-mentioned pattern deviation, at least part of the edges in the second layout pattern can be translated to obtain a third layout pattern. For example, when the average value of the edge placement error of the different edges corresponding to the exposure pattern and the reference pattern is greater than or equal to a preset threshold, the first variable edge and the variable edge in the second layout pattern can be translated to obtain the third layout pattern.

[0096] In some examples, the translation distance of the translation of the first variable edge and the variable edge in the second layout pattern can be determined based on the average value of the edge placement error, and the first variable edge and the variable edge can be translated based on the translation distance.

[0097] The embodiments of the present application can effectively improve the ripple phenomenon that may exist in the pattern after real exposure by translating at least part of the edges in the second layout pattern based on the above-mentioned pattern deviation to obtain a third layout pattern, thereby achieving the purpose of optimizing the layout.

[0098] In some embodiments, based on the pattern deviation, at least part of the edges in the second layout pattern can be translated to obtain a third layout pattern, comprising:

[0099] Based on the pattern deviation, the translation distance is determined, and based on the translation distance, at least part of the edges in the second layout pattern is translated to obtain a third layout pattern.

[0100] Here, based on the pattern deviation, the translation distance of part of the edges in the second layout pattern can be determined, and based on the translation distance, at least part of the edges in the second layout pattern can be translated to obtain a third layout pattern.

[0101] In some examples, a plurality of corresponding relationships between the pattern deviation and the translation distance can be established in advance, and the translation distance corresponding to the pattern deviation can be determined based on the above-mentioned corresponding relationship.

[0102] In some examples, when the above-mentioned pattern deviation includes the average value of the edge placement error of the different edges corresponding to the exposure pattern and the reference pattern or the square value of the Euler distance of the pixel matrix of the exposure pattern and the pixel matrix of the reference pattern, the translation distance can be the distance of the translation of the first variable edge and the variable edge in the second layout pattern, and the first variable edge and the variable edge in the second layout pattern can be translated by the above-mentioned translation distance to obtain the third layout pattern.

[0103] In some examples, in a case where the above-mentioned pattern deviation includes an edge placement error of a target edge in an exposure pattern and a corresponding edge of a reference pattern, the above-mentioned translation distance can include only a translation distance of an edge corresponding to the target edge in the second layout pattern, and the edge corresponding to the target edge in the above-mentioned second layout pattern can be translated by the above-mentioned translation distance to obtain a third layout pattern.

[0104] In some examples, to improve the accuracy of the translation of the edge, the at least part of the edges in the second layout pattern can be translated based on a layout optimization tool, such as a global optimizer or a local optimizer, to obtain a third layout pattern.

[0105] Embodiments of the present application can improve the accuracy of the optimization of the second layout pattern by determining the translation distance based on the pattern deviation, and translating at least part of the edges in the second layout pattern based on the translation distance to obtain a third layout pattern.

[0106] Based on the same inventive concept, embodiments of the present application also provide a layout pattern processing device.

[0107] As shown in Figure 8 Embodiments of the present application provide a layout pattern processing device, which can include:

[0108] The obtaining module 801 is configured to obtain a first layout pattern, the first layout pattern being a pattern processed by an optical proximity correction algorithm, wherein edges of the first layout pattern include a plurality of non-variable edges and a plurality of variable edges, and each non-variable edge is connected between two adjacent variable edges.

[0109] The merging module 802 is configured to perform a merging operation on the edges in the first layout pattern to convert the plurality of non-variable edges into a plurality of new variable edges corresponding to the non-variable edges, to obtain a second layout pattern.

[0110] The optimization module 803 is configured to optimize at least part of the edges in the second layout pattern to obtain a third layout pattern.

[0111] Embodiments of the present application can obtain a first layout pattern processed by an optical proximity correction algorithm through the obtaining module, convert a plurality of non-variable edges into variable edges through the merging module to obtain a second layout pattern, and then optimize at least part of the edges in the second layout pattern through the optimization module, so as to reduce the contour fluctuation phenomenon in the layout pattern and make the pattern after the actual exposure of the third layout pattern closer to a reference pattern.

[0112] In some embodiments, the obtaining module is specifically configured to:

[0113] obtain a to-be-corrected pattern;

[0114] generating a plurality of breakpoints in edges of the to-be-corrected pattern by an optical proximity correction algorithm;

[0115] generating a first layout pattern including non-variable edges and variable edges based on the plurality of breakpoints.

[0116] In some embodiments, the merging module is specifically configured to:

[0117] merge the non-variable edges into the variable set of the variable edges.

[0118] In some embodiments, the optimization module is specifically configured to:

[0119] obtain a reference pattern, the reference pattern being a pattern after simulated exposure of the template pattern;

[0120] perform simulated exposure on the second layout pattern to obtain an exposure pattern;

[0121] determine a pattern deviation based on the exposure pattern and the reference pattern;

[0122] in a case where the pattern deviation is greater than or equal to a threshold, optimize at least part of the edges in the second layout pattern based on the pattern deviation to obtain a third layout pattern.

[0123] In some embodiments, the optimization module is specifically configured to:

[0124] translate at least part of the edges in the second layout pattern based on the pattern deviation to obtain a third layout pattern.

[0125] In some embodiments, the optimization module is specifically configured to:

[0126] determine a translation distance based on the pattern deviation;

[0127] translate at least part of the edges in the second layout pattern based on the translation distance to obtain a third layout pattern.

[0128] In some embodiments, the optimization module is specifically configured to:

[0129] optimize the new variable edges in the second layout pattern to obtain a third layout pattern; or

[0130] optimize the variable edges and the new variable edges in the second layout pattern to obtain a third layout pattern; or

[0131] The new variable edges in the second layout pattern are optimized to obtain a first sub-layout pattern including the optimized variable edges and the variable edges, and the new variable edges in the first sub-layout pattern are optimized to obtain a third layout pattern. The apparatus of the above embodiment is used to implement the layout pattern processing method of the corresponding mask in any of the above embodiments, and has the beneficial effects of the corresponding method embodiments, which will not be described here.

[0132] Figure 9 A hardware structure schematic diagram of an electronic device is provided in the application embodiment.

[0133] The electronic device 900 can include a processor 901 and a memory 902 storing computer program instructions.

[0134] Specifically, the processor 901 can include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the application embodiment.

[0135] The memory 902 can include a mass storage for data or instructions. By way of example and not limitation, the memory 902 can include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. Where appropriate, the memory 902 can include removable or non-removable (or fixed) media. Where appropriate, the memory 902 can be internal or external to the integrated gateway disaster recovery device. In a particular embodiment, the memory 902 is a non-volatile solid-state memory.

[0136] In a particular embodiment, the memory 902 includes read-only memory (ROM). Where appropriate, this ROM can be mask-programmed ROM, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), electrically alterable ROM (EAROM), or flash memory, or a combination of two or more of these.

[0137] The memory can include read-only memory (ROM), random access memory (RAM), magnetic disk storage mediums devices, optical storage mediums devices, flash memory devices, electrical, optical, or other physical / tangible memory storage devices. Thus, generally, the memory includes one or more tangible (non-transitory) computer-readable storage mediums (e.g., memory devices) encoded with software that, when executed (e.g., by one or more processors), is operable to perform the operations described with reference to the method according to the first aspect of the present application.

[0138] The processor 901 implements the layout pattern processing method of any of the above-described embodiments by reading and executing computer program instructions stored in the memory 902.

[0139] In one example, the electronic device can further include a communication interface 903 and a bus 904. Wherein, as Figure 9 The processor 901, the memory 902, the communication interface 903 are connected through the bus 904 and complete the communication between each other.

[0140] The communication interface 903 is mainly used to realize the communication between the modules, devices, units and / or equipment in the embodiments of the present application.

[0141] The bus 904 includes hardware, software or both to couple components of the online data traffic billing device to each other. By way of example, and not limitation, the bus can include an accelerated graphics port (AGP) or other graphics bus, an enhanced industry standard architecture (EISA) bus, a front-side bus (FSB), a HyperTransport (HT) interconnect, an industry standard architecture (ISA) bus, an infiniband interconnect, a low pin count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a peripheral component interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a serial advanced technology attachment (SATA) bus, a video electronics standards association local (VLB) bus, or another suitable bus or a combination of two or more of these. Where suitable, the bus 904 can include one or more buses. Although specific buses are described and shown in the embodiments of the present application, the present application contemplates any suitable bus or interconnect.

[0142] The electronic device of the above-described embodiments is used to implement the layout pattern processing method of any of the above-described embodiments, and has the beneficial effects of the corresponding method embodiments, which are not described here again.

[0143] In addition, in combination with the layout pattern processing method in the above embodiments, the embodiments of the present application can provide a computer storage medium for implementation. The computer storage medium has computer program instructions stored thereon; the computer program instructions are executed by a processor to implement any one of the layout pattern processing methods in the above embodiments.

[0144] In addition, in combination with the layout pattern processing method in the above embodiments, the embodiments of the present application can provide a computer program product for implementation. The computer program product is executed by a processor of an electronic device to implement any one of the layout pattern processing methods in the above embodiments.

[0145] Those skilled in the art should understand that the above discussion of any of the embodiments is only exemplary, and is not intended to imply that the scope (including claims) of the present application is limited to these examples; the above embodiments or technical features among different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of brevity.

[0146] The functional blocks shown in the structural block diagrams described above can be implemented as hardware, software, firmware, or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a functional card, etc. When implemented in software, the elements of the present application are program or code segments used to perform the required tasks. The program or code segments can be stored in a machine-readable medium or transmitted through a data signal carried in a carrier wave over a transmission medium or communication link. The "machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segments can be downloaded via a computer network such as the Internet, an intranet, etc.

[0147] It should also be noted that the exemplary embodiments mentioned in the present application describe some methods or devices based on a series of steps or devices. However, the present application is not limited to the order of the above steps, that is, the steps can be executed in the order mentioned in the embodiments, or in an order different from the embodiments, or several steps can be executed simultaneously.

[0148] The computer program instructions can also be loaded onto a computer, other programmable data processing apparatus, or other processing device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other processing device to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions / acts specified in the flowchart and / or block diagram block or blocks.

[0149] The person skilled in the art can clearly understand the specific working process of the apparatus, module and unit described above for the sake of brevity and conciseness of description, and can refer to the corresponding process in the foregoing method embodiments, which will not be described herein again. It should be understood that the protection scope of the present application is not limited in this way, and any person skilled in the art can easily think of various equivalent modifications or replacements within the technical range disclosed in the present application, and these modifications or replacements shall be covered within the protection scope of the present application.

Claims

1. A method of processing a layout pattern, characterized by, The method comprises the following steps: obtaining a first layout pattern, wherein the first layout pattern is a pattern processed by an optical proximity correction algorithm, and edges of the first layout pattern comprise a plurality of non-variable edges and a plurality of variable edges, wherein each non-variable edge is connected between two adjacent variable edges; the variable edges are generated by the following method: based on optical proximity correction algorithm processing on a to-be-corrected pattern in a template image, a plurality of breakpoints are generated in edges of the to-be-corrected pattern; based on the plurality of breakpoints, the edges of the to-be-corrected pattern are broken into a plurality of line segments; and the plurality of line segments are processed to generate a plurality of variable edges; performing a merging operation on the edges in the first layout pattern to convert the plurality of non-variable edges into a plurality of new variable edges, to obtain a second layout pattern; optimizing at least part of the edges in the second layout pattern to obtain a third layout pattern; the optimization of at least part of the edges in the second layout pattern to obtain the third layout pattern comprises: optimizing the new variable edges in the second layout pattern to obtain the third layout pattern; or optimizing the variable edges and the new variable edges in the second layout pattern to obtain the third layout pattern; or optimizing the variable edges in the second layout pattern to obtain a first sub-layout pattern comprising optimized variable edges and new variable edges, and optimizing the new variable edges in the first sub-layout pattern to obtain the third layout pattern; or optimizing the new variable edges in the second layout pattern to obtain a second sub-layout pattern comprising optimized edges and variable edges, and optimizing the variable edges in the second sub-layout pattern to obtain the third layout pattern.

2. The method of processing a layout pattern according to claim 1, wherein, the merging operation on the edges in the first layout pattern comprises: merging the non-variable edges into a variable set of the variable edges.

3. The method of claim 1, wherein, the optimization of at least part of the edges in the second layout pattern to obtain the third layout pattern comprises: obtaining a reference pattern, wherein the reference pattern is a pattern after simulated exposure on a template pattern; performing simulated exposure on the second layout pattern to obtain an exposure pattern; determining a pattern deviation based on the exposure pattern and the reference pattern; in a case where the pattern deviation is greater than or equal to a threshold value, optimizing at least part of the edges in the second layout pattern based on the pattern deviation to obtain the third layout pattern.

4. The method of processing a layout pattern according to claim 3, wherein, the optimization of at least part of the edges in the second layout pattern based on the pattern deviation to obtain the third layout pattern comprises: based on the pattern deviation, translating at least part of the edges in the second layout pattern to obtain the third layout pattern.

5. The method of processing a layout pattern according to claim 4, wherein, the translation of at least part of the edges in the second layout pattern based on the pattern deviation to obtain the third layout pattern comprises: based on the pattern deviation, determining a translation distance; based on the translation distance, translating at least part of the edges in the second layout pattern to obtain the third layout pattern.

6. An electronic device, comprising: the device comprises a processor and a memory storing computer program instructions. The processor reads and executes the computer program instructions to implement the layout pattern processing method according to any one of claims 1 to 5.

7. A readable storage medium, characterized by, The readable storage medium stores computer program instructions, and the computer program instructions are executed by the processor to implement the layout pattern processing method according to any one of claims 1 to 5.

8. A computer program product comprising a computer program, characterized in that, The computer program is processed by the processor to implement the layout pattern processing method according to any one of claims 1 to 5.

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