Three-level SVG multistage WARD equivalent modeling method based on L / C constant admittance model

Abstract

The invention relates to a three-level SVG multistage WARD equivalent modeling method based on an L / C constant admittance model. An ANPC type three-level converter model is an important part of various types of power electronic equipment, and is applied to scenes such as a three-level static var generator (SVG) and the like. In small-step offline simulation, an existing simulation modeling technology cannot consider precision and efficiency at the same time. Aiming at the problem that the simulation speed is extremely low in an offline simulation platform, a three-level SVG electromagnetic transient simulation acceleration model equivalent to a multi-stage nested fast simultaneous solution algorithm is provided based on a device Norton equivalent circuit. Firstly, an L / C equivalent constant admittance model is used for carrying out equivalent processing on a switching device, first-time WARD equivalence is carried out, then an equivalent circuit is connected with other transformer and filter inductance circuit parts, WARD equivalence is carried out again, and finally a Norton form equivalent circuit is formed.

Description

Technical Field

[0001] The invention relates to a three-level SVG multi-level WARD equivalent modeling method based on an L / C constant admittance model, and belongs to the technical field of power electronic equipment simulation in a power system. Background Art

[0002] With the development of large-scale renewable energy, renewable energy power generation has become an important support for achieving the "dual carbon" goal. Static Reactive Power Generator (SVG), as a new type of reactive power compensation device, has been widely used in reactive power compensation scenarios of renewable energy such as wind turbines and photovoltaics. The three-level SVG contains structures such as ANPC converters and transformers, with many internal nodes. The electromagnetic transient simulation speed of detailed devices is very slow and cannot meet the simulation requirements.

[0003] Aiming at the requirements of efficiency and accuracy of three-level SVG in electromagnetic transient simulation of large-scale regional power grid, the present invention proposes a small-step microsecond-level efficient electromagnetic transient simulation model based on fast nested solution method. The method first introduces the modeling and value selection method of L / C constant admittance switch, and uses WARD equivalent to represent internal nodes by external node information. The internal node information is obtained by inverse solution, and the external equivalent model of the three-level SVG as a whole is formed through two-level WARD equivalent, which avoids the inversion of ultra-high-order matrices and speeds up the electromagnetic transient simulation. Summary of the invention

[0004] The present invention proposes a three-level SVG multi-level WARD equivalent modeling method based on an L / C constant admittance model, and the modeling method comprises the following steps:

[0005] Step 1: To construct the overall equivalent circuit of the three-level SVG model, the IGBT and its anti-parallel diode in the ANPC converter are equivalent to the L / C constant admittance model; the DC capacitor and filter inductor are discretized using the trapezoidal integration method; the transformer is discretized and the equivalent model of the transformer is derived, thereby obtaining the companion circuit of the three-level SVG.

[0006] Step 2: Label the nodes of the three-level ANPC converter, write the node voltage equations and eliminate the internal nodes to obtain the equivalent model of the ANPC converter with four external nodes.

[0007] Step 3: Connect the filter inductor and transformer to the equivalent model of the ANPC converter, and eliminate the internal nodes of the overall topology again to obtain a three-level SVG equivalent model equivalent to four external nodes.

[0008] Step 4: Substitute the obtained three-level SVG equivalent model into the external circuit to solve the external node voltage and current information, and inversely solve the node voltage and branch current information inside the three-level SVG and the ANPC converter, and update the historical current source of each component for initialization of the next long simulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1 This is the ANPC type three-level SVG topology diagram.

[0010] Figure 2 Discretization of inductance and capacitance.

[0011] Figure 3 This is the equivalent circuit diagram of the T-type transformer.

[0012] Figure 4 It is the equivalent circuit of a single-phase transformer.

[0013] Figure 5 This is the equivalent process of L / C switch.

[0014] Figure 6 It is the equivalent model of L / C switch.

[0015] Figure 7 It is the equivalent topology map accompanying the whole SVG.

[0016] Figure 8 The figure is the equivalent topology diagram of ANPC converter.

[0017] Fig. 9 This is the equivalent circuit after the WARD equivalent value is eliminated.

[0018] Fig.10 It is the accompanying equivalent topological diagram after the first equivalence.

[0019] Fig.11 To test the system.

[0020] Fig.12 This is the SVG multi-level WARD equivalent modeling process based on the L / C constant admittance model (with abstract attached). DETAILED DESCRIPTION

[0021] The present invention provides a three-level SVG multi-stage WARD equivalent modeling method based on an L / C constant admittance model; the modeling steps of the present invention will be further described in detail below.

[0022] Step 1:

[0023] Figure 1 The topological structure diagram of the ANPC type three-level SVG can be divided into a double-winding transformer, a filter inductor, an ANPC converter, a DC capacitor and a load.

[0024] The process of discretizing inductors and capacitors is as follows: Figure 2 As shown, it can be equivalent to a historical current source in parallel with an equivalent conductance. The capacitor and inductor in the three-level SVG are discretized to obtain a formula containing a historical current source. The iterative formula for the current passing through the capacitor at each moment is

[0025] i c (t) = G C u c (t)+j h (t-Δt) (1)

[0026] j h (t-Δt)=-G C u c (t-Δt)-i c (t-Δt) (2)

[0027] Where: Δt is the simulation step length; G C =2C / Δt is the transient equivalent conductance of the capacitor; j h (t-Δt) is the historical current source reflecting the calculation content of the previous step.

[0028] The iterative formula for the current passing through the inductor at each moment is:

[0029] i L (t) = G L u L (t)+j h (t-Δt) (3)

[0030] j h (t-Δt)=G L u L (t-Δt)+i L (t-Δt) (4)

[0031] Where: G L =Δt / 2L is the transient equivalent conductance of the inductor.

[0032] Figure 3 It is the T-type equivalent circuit of the transformer. Among them: L1, L2 represent the primary and secondary leakage reactance of the transformer respectively; L m Indicates the transformer excitation reactance. Figure 3 The transformer T-type equivalent circuit writes the port differential equation KVL, and uses the trapezoidal integration method to arrange it into the form of I = YU + J to obtain equation (5), and then obtains Figure 4 Discretized equivalent circuit of the transformer.

[0033]

[0034] In order to solve the problem of uncertain admittance of IGBT and its anti-parallel diode in the ANPC detailed model and repeatedly solve the node admittance matrix, the L / C constant admittance switch modeling method is adopted. It uses a small inductor to simulate the switch on state and a small capacitor in series with a resistor to simulate the switch off state. The role of the resistor is to reduce the oscillation problem caused by the switch action, such as Figure 5 shown.

[0035] When the inductance is discretized in the on state, we can get

[0036]

[0037] In the off state, the capacitance is discretized and substituted into the resistance expression to obtain

[0038]

[0039] In summary, the update expression of the L / C switch model in a single step size can be obtained as follows, and the corresponding equivalent model is Figure 6 .

[0040] By choosing reasonable values ​​for the parameters, the equivalent admittance Y sw It is a constant value when the switch is on or off, thus achieving constant admittance switching during switch action.

[0041]

[0042] The parameters of the L / C switch equivalent model are designed. The corresponding formula takes the trapezoidal integral method as an example. The value selection process can be divided into the following steps:

[0043] 1) Determine the on-resistance R of the switch that needs to be equal on Based on this, the corresponding equivalent inductance L is calculated. s size.

[0044] 2) For DC, after simulation test, the frequency in the formula is about three times the switching frequency, that is, the frequency f is three times the triangular wave frequency. Due to the existence of virtual loss, calculate L s Formula R on =X L =ωL=2πf·L, a comprehensive correction coefficient α needs to be introduced. After repeated optimization, the coefficient α that is more compatible with the current model is obtained.

[0045]

[0046] 3) Select a suitable damping ratio ζ, which is usually 0.85 to 1.3333. Then the corresponding damping coefficient F can be calculated according to the following formula, with a corresponding value range of 1.08 to 1.5:

[0047]

[0048] 4) Calculate the capacitance C in the corresponding off state according to the formula s and resistor R s The value of the capacitor and resistor is different from the off resistor R off There is no obvious relationship between them, so the corresponding off resistance can be set to any value.

[0049]

[0050] The ANPC three-level model uses a three-level carrier co-phase stacked modulation method to compare the modulation wave of each phase with the two carriers to obtain the trigger signal of the six switch tubes of each phase at each moment. Figure 7 For the corresponding Figure 1 The overall discretization adjoint equivalent circuit of the three-level SVG.

[0051] Step 2:

[0052] Using the idea of ​​fast nested solution algorithm, the node voltage equation is divided into internal and external nodes and expressed by matrix, which can be written as:

[0053]

[0054] Using U EX To represent U IN get:

[0055]

[0056] Substituting formula (14) into formula (13), we get:

[0057] Y EQ U EX =J EQ +I EX (15)

[0058] in

[0059]

[0060] Taking the converter neutral point as the reference node, Figure 7 The total number of nodes in the SVG adjoint circuit is as high as 17. When the matrix is ​​directly processed using WARD, there are 14 internal nodes. 22 The number of elements in the matrix is ​​as many as 196. Too many matrix elements lead to excessive calculation. Since the ANPC converter is three-phase symmetrical and has many internal nodes, it is considered to perform WARD equalization twice. First, perform WARD equalization on the ANPC converter once to reduce the number of nodes. Figure 8The discretized circuit diagram of the three-level ANPC converter is shown in Figure 2. The nodes are divided into internal and external nodes, and the node voltage equations are listed as follows:

[0061]

[0062] Figure 8 The ANPC converter has 8 internal nodes, Y 22 The number of elements in the matrix is ​​64. The ANPC converter is subjected to WARD equivalence, and the equivalent circuit in Norton form is obtained after equivalence. Fig. 9 ,This circuit contains three external port nodes and a ground node, and the number of nodes is reduced.

[0063] Step 3:

[0064] The ANPC converter equivalent circuit is connected to the filter inductor and the double-winding transformer, as shown in Fig.10 As shown. This circuit has only 9 nodes, only 6 internal nodes, Y 22 The number of elements in the matrix is ​​reduced to 36. The internal nodes of the circuit are further eliminated and the second-level WARD equivalent is performed. The number of elements in the matrix will be greatly reduced, and the SVG equivalent circuit with four external nodes is finally obtained. Fig. 9 , you can connect an external circuit for simulation. The matrix order of this equivalent circuit is greatly reduced, greatly improving the simulation efficiency.

[0065] Step 4:

[0066] Connect this SVG equivalent circuit to the external network for EMT solution, such as Fig.11 The voltage of each node in the external network can be obtained by establishing a node admittance matrix and inverting it, using the formula U = Y -1 J is calculated, and the voltage and current information of the internal nodes is updated by inverse solution. The specific inverse solution process is also carried out in multiple times. First, the internal nodes of SVG are inversely solved. The internal nodes of SVG contain the external nodes of ANPC converter, and then the internal nodes of ANPC converter are inversely solved. Therefore, all the internal node information of the model is retained, and accurate equivalent modeling is achieved.

[0067] Finally, it should be noted that the described embodiments are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

Claims

1. A three-level SVG multi-level WARD equivalent modeling method based on the L / C constant admittance model. It is characterized by: The present invention provides a new high-speed electromagnetic transient hierarchical modeling method for ANPC type three-level SVG, which proves that the simulation speed of the model is significantly improved while the accuracy remains unchanged. The method comprises the following steps: Step 1: Construct a three-level SVG topology diagram, discretize the DC capacitor, filter inductor, and dual-winding transformer in the three-level SVG using the trapezoidal integration method, model the IGBT and its anti-parallel diode using the L / C constant admittance model, and obtain the discretized three-level SVG companion topology diagram. Step 2: Write the node voltage equations of the three-level ANPC converter, eliminate the internal nodes, and obtain the equivalent model of the ANPC converter companion circuit equivalent to four external nodes. Step 3: Connect the filter inductor and transformer to the equivalent model of the ANPC converter, eliminate the internal nodes again, and obtain a three-level SVG equivalent model equivalent to four external nodes. Step 4: Substitute the obtained equivalent circuit into the external circuit to solve it, and inversely solve it to update the internal circuit.

2. The three-level SVG multi-level WARD equivalent modeling method based on the L / C constant admittance model according to claim 1 is characterized in that: From step 1 to step 4, the previous step is the basis for the execution of the next step. These four modeling steps are closely linked to each other and executed sequentially, forming an organic and indivisible whole.

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