System and method for power module for inverter for electric vehicle

Abstract

A system includes: an inverter, where the inverter includes: a power module, the power module including: a flexible layer including gate traces; a first substrate; a second substrate comprising a source plane and a gate plane separated from the source plane by a full trench, the source plane comprising a stepped trench, and the gate plane comprising an electrical connection through the gate trace of the flexible layer to a gate input connection of the power module; a semiconductor die disposed between the first substrate and the second substrate, the step trench being formed in a portion of the source plane corresponding to an edge of the semiconductor die, and the semiconductor die including a gate connected to the gate plane; and a sintered element disposed between the semiconductor die and the second substrate to connect the semiconductor die to the second substrate; a battery; and a motor.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. non-provisional patent application No. 18 / 344,379 filed on June 29, 2023, which claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, and U.S. Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure generally relate to a power module for an inverter for an electric vehicle, and more particularly to a power module including a groove that enables flexible sintered element size adjustment. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible for, for example, converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. In an inverter, a power module may include devices that generate a large amount of heat. The layout and design of the power module affects the operation of the device and the thermal characteristics of the power module. Improper device operation or overheating of the power module may impair the operation of the inverter. In addition, some components or materials used in the power module design may offset the advantages of using such components or materials and thus constrain design flexibility.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power into AC power, wherein the inverter comprises: a power module comprising: a first substrate; a second substrate comprising a source plane and a gate plane separated from the source plane by a full trench, the source plane comprising a stepped trench, and the gate plane comprising an electrical connection to a gate input connection of the power module through the second substrate; a semiconductor grain disposed between the first substrate and the second substrate, the stepped trench being formed in a portion of the source plane corresponding to an edge of the semiconductor grain, and the semiconductor grain comprising a gate connected to the gate plane; and a sintered element disposed between the semiconductor grain and the second substrate to connect the semiconductor grain to the second substrate; a battery configured to supply DC power to the inverter; and a motor configured to receive AC power from the inverter to drive the motor.

[0007] In some aspects, the technology described herein relates to a system wherein the thickness of the sintered element is in a range from about 25 μm to about 50 μm.

[0008] In some aspects, the technology described herein relates to a system in which a power module is configured to exhibit a drain-to-source isolation voltage of at least 1200 volts.

[0009] In some aspects, the technology described herein relates to a power module, comprising: a first substrate having a first outer layer and a first inner layer; a semiconductor grain coupled to a surface of the first inner layer; a second substrate having a second outer layer and a second inner layer, the semiconductor grain coupled to a surface of the second inner layer; and a sintered element disposed between the semiconductor grain and the second inner layer, wherein the second inner layer comprises a body comprising a source plane and a gate plane separated from the source plane by a full trench, and wherein the body comprises a stepped trench in a portion of the body corresponding to an edge of the semiconductor grain.

[0010] In some aspects, the technology described herein relates to a power module wherein the thickness of the sintered component is in a range from about 25 μm to about 50 μm.

[0011] In some aspects, the technology described herein relates to a power module wherein the thickness of the sintered element is approximately 25 μm.

[0012] In some aspects, the technology described herein relates to a power module wherein a depth of the step trench from a surface of a sintered element attached to the second inner layer to a bottom of the step trench ranges from about 50 μm to about 75 μm.

[0013] In some aspects, the technology described herein relates to a power module wherein a depth from a surface of a semiconductor die attached to a sintered element to a bottom surface of a stepped trench as defined by a body of a second inner layer ranges from about 75 μm to about 100 μm.

[0014] In some aspects, the technology described herein relates to a power module wherein a step trench is in a portion of a body corresponding to an edge of a semiconductor die such that a line extending from the edge of the semiconductor die to the body in a direction normal to a surface of a second inner layer intersects the step trench.

[0015] In some aspects, the technology described herein relates to a power module wherein a width of the stepped trench is in a range from about 400 μm to about 500 μm.

[0016] In some aspects, the technology described herein relates to a power module wherein: a full trench extends through a body to an insulating layer of a second substrate, and a stepped trench has a depth that is less than a thickness of the body.

[0017] In some aspects, the technology described herein relates to a power module in which stepped trenches are disposed in a source plane and a gate plane.

[0018] In some aspects, the technology described herein relates to a power module wherein the semiconductor die includes a source connector, wherein the source connector is coupled to a source plane of a second inner layer of a second substrate.

[0019] In some aspects, the technology described herein relates to a power module wherein the second substrate further includes an intermediate layer between the second inner layer and the second outer layer, wherein the intermediate layer includes ceramic, wherein the second outer layer includes metal, and wherein the second inner layer includes a direct bond copper metallization layer.

[0020] In some aspects, the technology described herein relates to a power module in which a stepped trench is in a direct bond copper metallization layer.

[0021] In some aspects, the technology described herein relates to an inverter that includes a power module.

[0022] In some aspects, the technology described herein relates to a vehicle that includes an inverter.

[0023] In some aspects, the technology described herein relates to a power module comprising: a first substrate; a second substrate comprising a first trench extending through a conductor of the second substrate to an insulator of the second substrate, and the second substrate comprising a second trench extending from a surface of the second substrate into the conductor of the second substrate and at a depth less than a thickness of the conductor; a semiconductor grain disposed between the first substrate and the second substrate, the semiconductor grain having a drain connector coupled to the first substrate and a source connector coupled to the second substrate; and a sintered element disposed between the semiconductor grain and the second substrate, the sintered element having a thickness in a range of 25 μm to 50 μm; wherein a surface of the second substrate is attached to the sintered element.

[0024] In some aspects, the technology described herein relates to a power module in which a second trench is etched into an electrical conductor of a second substrate in a portion of the second substrate corresponding to an edge of a semiconductor die.

[0025] In some aspects, the technology described herein relates to a power module wherein a width of the second trench is in a range of 400 μm to 500 μm.

[0026] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power to AC power, wherein the inverter comprises: a power module comprising: a flexible layer comprising a gate trace; a first substrate; a second substrate comprising a source plane and a gate plane separated from the source plane by a full trench, the source plane comprising a stepped trench, and the gate plane comprising an electrical connection to a gate input connection of the power module through the gate trace of the flexible layer; a semiconductor die disposed between the first substrate and the second substrate, the stepped trench being formed in a portion of the source plane corresponding to an edge of the semiconductor die, and the semiconductor die comprising a gate connected to the gate plane; and a sintered element disposed between the semiconductor die and the second substrate to connect the semiconductor die to the second substrate; a battery configured to supply DC power to the inverter; and a motor configured to receive AC power from the inverter to drive the motor.

[0027] In some aspects, the technology described herein relates to a system wherein the thickness of the sintered element is in a range from about 25 μm to about 50 μm.

[0028] In some aspects, the technology described herein relates to a system in which a power module is configured to exhibit a drain-to-source isolation voltage of at least 1200 volts.

[0029] In some aspects, the technology described herein relates to a power module, comprising: a signal layer, the signal layer comprising a gate trace; a first substrate, the first substrate having a first outer layer and a first inner layer; a semiconductor grain, the semiconductor grain coupled to a surface of the first inner layer; a second substrate, the second substrate having a second outer layer and a second inner layer, the semiconductor grain coupled to a surface of the second inner layer; and a sintered element, the sintered element disposed between the semiconductor grain and the second inner layer, wherein the second inner layer comprises a body, the body comprising a source plane and a gate plane separated from the source plane by a full trench, the gate plane being connected to the gate trace, and wherein the body comprises a stepped trench in a portion of the body corresponding to an edge of the semiconductor grain.

[0030] In some aspects, the technology described herein relates to a power module wherein the thickness of the sintered component is in a range from about 25 μm to about 50 μm.

[0031] In some aspects, the technology described herein relates to a power module wherein the thickness of the sintered element is approximately 25 μm.

[0032] In some aspects, the technology described herein relates to a power module wherein a depth of the step trench from a surface of a sintered element attached to the second inner layer to a bottom of the step trench ranges from about 50 μm to about 75 μm.

[0033] In some aspects, the technology described herein relates to a power module wherein a depth from a surface of a semiconductor die attached to a sintered element to a bottom surface of a stepped trench as defined by a body of a second inner layer ranges from about 75 μm to about 100 μm.

[0034] In some aspects, the technology described herein relates to a power module wherein a step trench is in a portion of a body corresponding to an edge of a semiconductor die such that a line extending from the edge of the semiconductor die to the body in a direction normal to a surface of a second inner layer intersects the step trench.

[0035] In some aspects, the technology described herein relates to a power module wherein a width of the stepped trench is in a range from about 400 μm to about 500 μm.

[0036] In some aspects, the technology described herein relates to a power module in which a signal layer is coupled to a gate plane.

[0037] In some aspects, the technology described herein relates to a power module wherein the signal layer includes a flexible layer including an insulating material and a conductive material, and wherein the conductive material of the flexible layer is a gate trace and is coupled to a gate of a semiconductor die.

[0038] In some aspects, the technology described herein relates to a power module wherein the semiconductor die includes a source connector, wherein the source connector is coupled to a source plane of a second inner layer of a second substrate.

[0039] In some aspects, the technology described herein relates to a power module wherein the second substrate further includes an intermediate layer between the second inner layer and the second outer layer, wherein the intermediate layer includes ceramic, wherein the second outer layer includes metal, and wherein the second inner layer includes a direct bond copper metallization layer.

[0040] In some aspects, the technology described herein relates to a power module in which a stepped trench is in a direct bond copper metallization layer.

[0041] In some aspects, the technology described herein relates to an inverter that includes a power module.

[0042] In some aspects, the technology described herein relates to a vehicle that includes an inverter.

[0043] In some aspects, the technology described herein relates to a power module comprising: a signal layer comprising a gate trace; a first substrate; a second substrate comprising a first trench extending through a conductor of the second substrate to an insulator of the second substrate, and the second substrate comprising a second trench extending from a surface of the second substrate into the conductor of the second substrate and at a depth less than a thickness of the conductor; a semiconductor grain disposed between the first substrate and the second substrate, the semiconductor grain having a drain connector coupled to the first substrate, a source connector coupled to the second substrate, and a gate coupled to the gate trace; and a sintered element disposed between the semiconductor grain and the second substrate, the sintered element having a thickness in a range of 25 μm to 50 μm; wherein a surface of the second substrate is attached to the sintered element.

[0044] In some aspects, the technology described herein relates to a power module in which a second trench is etched into an electrical conductor of a second substrate in a portion of the second substrate corresponding to an edge of a semiconductor die.

[0045] In some aspects, the technology described herein relates to a power module wherein a width of the second trench is in a range of 400 μm to 500 μm.

[0046] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power into AC power, wherein the inverter comprises: a power module comprising: a flexible layer comprising a gate trace that provides an electrical connection to a gate input connection of the power module; a first substrate; a second substrate comprising a source plane, the source plane comprising a stepped trench; a semiconductor die disposed between the first substrate and the second substrate, the stepped trench being formed in a portion of the source plane corresponding to an edge of the semiconductor die, and the semiconductor die comprising a gate connected to the gate trace; and a sintered element disposed between the semiconductor die and the second substrate to connect the semiconductor die to the second substrate; a battery configured to supply DC power to the inverter; and a motor configured to receive AC power from the inverter to drive the motor.

[0047] In some aspects, the technology described herein relates to a system wherein the thickness of the sintered element is in a range from about 25 μm to about 50 μm.

[0048] In some aspects, the technology described herein relates to a system in which a power module is configured to exhibit a drain-to-source isolation voltage of at least 1200 volts.

[0049] In some aspects, the technology described herein relates to a power module, comprising: a signal layer, the signal layer comprising a gate trace; a first substrate, the first substrate having a first outer layer and a first inner layer; a semiconductor grain, the semiconductor grain coupled to a surface of the first inner layer, the semiconductor grain comprising a gate connected to the gate trace; a second substrate, the second substrate having a second outer layer and a second inner layer, the semiconductor grain coupled to a surface of the second inner layer; and a sintered element, the sintered element disposed between the semiconductor grain and the second inner layer, wherein the second inner layer comprises a body, the body comprising a stepped groove formed in a portion of the body corresponding to an edge of the semiconductor grain.

[0050] In some aspects, the technology described herein relates to a power module wherein the thickness of the sintered component is in a range from about 25 μm to about 50 μm.

[0051] In some aspects, the technology described herein relates to a power module wherein the thickness of the sintered element is approximately 25 μm.

[0052] In some aspects, the technology described herein relates to a power module wherein a depth of the step trench from a surface of a sintered element attached to the second inner layer to a bottom of the step trench ranges from about 50 μm to about 75 μm.

[0053] In some aspects, the technology described herein relates to a power module wherein a depth from a surface of a semiconductor die attached to a sintered element to a bottom surface of a stepped trench as defined by a body of a second inner layer ranges from about 75 μm to about 100 μm.

[0054] In some aspects, the technology described herein relates to a power module wherein a step trench is in a portion of a body corresponding to an edge of a semiconductor die such that a line extending from the edge of the semiconductor die to the body in a direction normal to a surface of a second inner layer intersects the step trench.

[0055] In some aspects, the technology described herein relates to a power module wherein a width of the stepped trench is in a range from about 400 μm to about 500 μm.

[0056] In some aspects, the technology described herein relates to a power module in which a signal layer is disposed on a body.

[0057] In some aspects, the technology described herein relates to a power module wherein the signal layer includes a flexible layer including an insulating material and a conductive material, and wherein the conductive material of the flexible layer is a gate trace and is coupled to a gate of a semiconductor die.

[0058] In some aspects, the technology described herein relates to a power module wherein the semiconductor die includes a source connector, wherein the source connector is coupled to a body of a second inner layer of a second substrate.

[0059] In some aspects, the technology described herein relates to a power module wherein the second substrate further includes an intermediate layer between the second inner layer and the second outer layer, wherein the intermediate layer includes ceramic, wherein the second outer layer includes metal, and wherein the second inner layer includes a direct bond copper metallization layer.

[0060] In some aspects, the technology described herein relates to a power module in which a stepped trench is in a direct bond copper metallization layer.

[0061] In some aspects, the technology described herein relates to an inverter that includes a power module.

[0062] In some aspects, the technology described herein relates to a vehicle that includes an inverter.

[0063] In some aspects, the technology described herein relates to a power module comprising: a signal layer comprising a gate trace; a first substrate; a second substrate comprising a trench extending from a surface of the second substrate into an electrical conductor of the second substrate and at a depth less than a thickness of the electrical conductor; a semiconductor grain disposed between the first substrate and the second substrate, the semiconductor grain having a drain connection coupled to the first substrate, a source connection coupled to the second substrate, and a gate coupled to the gate trace; and a sintered element disposed between the semiconductor grain and the second substrate, the sintered element having a thickness in a range of 25 μm to 50 μm; wherein a surface of the second substrate is attached to the sintered element.

[0064] In some aspects, the technology described herein relates to a power module in which a trench is etched into an electrical conductor of a second substrate in a portion of the second substrate corresponding to an edge of a semiconductor die.

[0065] In some aspects, the technology described herein relates to a power module wherein the width of the trench is in a range of 400 μm to 500 μm.

[0066] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0067] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0068] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0069] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0070] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0071] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0072] Figure 4A Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0073] Figure 4B Describes a method for Figure 4A An exemplary system infrastructure of an upper power module.

[0074] Figure 5 Depicted is a cross section of an exemplary architecture for a power module having a sintering configuration and including trenches according to one or more embodiments.

[0075] Figure 6 Depicted are components of an exemplary power module including a substrate layer and a flex layer according to one or more embodiments.

[0076] Figure 7 Depicted is a cross-sectional view of an exemplary architecture for a power module having a sintering configuration and including a flexible layer and trenches according to one or more embodiments.

[0077] Fig. 8A and Figure 8B Describes a method for Figure 7 Components of an exemplary power module.

[0078] Fig. 9 Depicted is a layout of an exemplary power module including full depth trenches and step etched trenches according to one or more embodiments.

[0079] Fig.10 Depicted is a layout of an exemplary power module including full depth trenches, step etch trenches, and a flex layer according to one or more embodiments.

[0080] Fig.11 Depicted is a layout of an exemplary power module including step-etched trenches and a compliant layer according to one or more embodiments. DETAILED DESCRIPTION

[0081] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0082] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0083] Various embodiments of the present disclosure generally relate to a power module for an inverter for an electric vehicle, and more particularly to a power module including etched grooves that enable flexible sintered element size adjustment.

[0084] Inverters (such as those used to drive motors in electric vehicles) are responsible for converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three half-H-bridge switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the half-H-bridge switches. The half-H-bridge switches may drive the phase voltages. The inverter may include an isolation barrier between a low voltage plane and a high voltage plane. The signal may be passed from the PWM controller to the half-H-bridge switch by passing through the isolation barrier, which may employ optical, converter-based, or capacitor-based isolation. The PWM signal may be distorted when passing through the glue logic, which may include resistive, capacitive, or other types of filtering. Due to the electrical isolation barrier and other delays within the gate driver, the PWM signal may be distorted when passing through the gate driver. The PWM signal may be distorted when the signal is processed by the half-H switching element via the gate driver output.

[0085] Gate drivers withstand common-mode transients that occur during field effect transistor (FET) switching and when one side of a floating high voltage terminal is shorted to ground or subjected to electrostatic discharge. These voltage transients can cause fast edges that can form common-mode current bursts through electrical isolation. Gate drivers may need to demonstrate common-mode transient immunity (CMTI) in order to be effective and safe.

[0086] The gate driver may have a high voltage domain in common with the voltage plane of the associated FET. Further, the high voltage plane may be supplied by a flyback converter, which may be isolated from the low voltage plane by a transformer. The high voltage domain power supply may be used to provide power to such a circuit that sources and sinks gate current to drive the FET and can detect FET faults, thereby acting on the faults and / or transmitting the faults to the low voltage domain. The gate driver may include an electrical channel dedicated to FET commands, and one or more bidirectional or unidirectional electrical channels dedicated to FET communications.

[0087] High current switching transients can form strong electromagnetic (EM) fields that can couple into nearby metal traces. The magnitude and frequency of the coupled current can depend on the layout of the FET packaging solution and the direction and length of the metal traces between the FET and the control integrated circuit (IC). For example, a typical value for the coupled current can be up to 1A at an AC frequency of up to 100MHz. Typically, within the circuit, the gate driver IC can be placed far enough away from the FET so that the high EM field is not directly coupled into the internal metal traces within the gate driver IC. The gate driver is placed at a distance from the EM field so that the induced current within the circuit is below the level that will cause the gate driver to malfunction, or a metal shield is placed between the gate driver and the source of the EM field to protect the gate driver circuit. The output terminals of the gate driver connected to the FET are exposed to the EM field at a point where the output terminals are no longer covered by the shield. The gate driver switches large currents (e.g., such as 5A to 15A) through these exposed terminals. The large currents switched are usually larger in magnitude than the EM induced current. The gate driver can overdrive the induced current to maintain control of the FET. The gate driver and the high side of the FET may share a common ground and gate control signal trace, both of which may be susceptible to coupled currents.

[0088] The gate driver can turn on low resistance switches to source and sink gate current. Sometimes a series resistor can be added to limit the gate current. The switched gate current can be greater than the coupling current in order to maintain control of their respective FETs.

[0089] The gate driver may be able to sense the FET operating voltage or current in order to provide feedback and react to faults. An overcurrent fault may typically be detected by sensing the FET drain to source voltage and comparing the sensed voltage to a reference value. The sensed voltage may be heavily filtered to reject coupled currents. Filtering may slow the response to a fault condition, causing a delay in response. For example, the rate of current increase due to a low resistance short may reach damaging levels before being detected by a heavily filtered drain to source voltage detection strategy. The resulting short may damage the FET or the vehicle before being detected and cut off.

[0090] According to one or more embodiments, a FET driver circuit may provide fast overcurrent detection by shunt current sensing, or by diverting a portion of the load current through a parallel FET that may have a current sensing circuit. Utilizing either strategy may require a "point of use IC" in which the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not yet been used in high EM field applications. High EM fields can be fields that (i) induce a current within the IC that exceeds the operating current of the IC and causes a malfunction, or (ii) induce a differential voltage within the IC that exceeds the operating differential voltage and causes a malfunction. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0091] The choice of a half-bridge topology for a power module can operate with lower loop inductance, less ringing and voltage overshoot than other topologies. The use of silicon carbide metal oxide semiconductor field effect transistors (SiC MOSFETs) can result in shortened switching times relative to, for example, some silicon insulated gate bipolar transistors (Si IGBTs), and the reduced inductance of the half-bridge module can be sought to fully exploit this capability.

[0092] Half-bridge circuits can be used in power electronics to apply a pulse width modulated voltage to control the current applied to an inductive load such as a motor. In such circuits, the source and its associated circuitry can most naturally be on opposite substrates for the two switches in the half-bridge. That is, in a half-bridge circuit, the source connection of the upper switch and the drain connection of the lower switch can share a common connection with the load, and the source and drain can be on opposite sides of the bare die for use in power applications. For high voltage double-sided cooling applications, the source and drain can be cooled through an insulating substrate, with the drain on one substrate and the source on the other.

[0093] Each power device in a half-bridge may have a circuit that references the source connection. However, having the source on opposite substrates in a double-sided cooled package may make assembly difficult. For example, bottom-up assembly for a double-sided cooled module may be compromised because each substrate and its source reference circuit must be assembled independently and then assembled together. In addition, the die associated with the lower substrate will be reversed from the die associated with the upper substrate, but the source and drain interconnects may have different voltage isolation requirements, resulting in height differences at the interconnects, which may cause coplanarity issues during assembly. Such difficulties during assembly may result in lower yields and higher costs. In addition, some devices may face efficiency issues related to the paths for heat and current.

[0094] Substrates incorporated into power modules, such as substrates forming sources (e.g., lower substrates, source-side substrates), can be physically and electrically connected to semiconductor (e.g., silicon carbide (SiC)) dies using solder preforms / forms or sintered elements (e.g., sintered pads, sintered films, sintered preforms). In some examples, solder preforms / forms function within the power module to mitigate high voltage potentials between the edges of the semiconductor dies and the substrate to which the source is connected. These solder preforms / forms can have a finished thickness greater than 75 μm.

[0095] Providing a sintered component with a final thickness of 75 μm (which may be required to ensure the high voltage isolation required within the power module) rather than a soldered preform may increase cost. The thermal performance of the power module may be negatively affected by the thicker thermal bond wires that may result from incorporating a sintered component of the aforementioned thickness. Providing a sintered component with a final thickness of less than 75 μm may inhibit the ability to meet voltage isolation requirements (e.g., such as 1200 volt isolation requirements). A final sintered component thickness of less than 75 μm may constrain the flow of overmolding material, such as into the gap between the die and the substrate during the power module assembly process.

[0096] An alternative to using a solder preform may include using a tall (1.5 to 2.0 mm) spacer on the source side of the semiconductor die. Although using a tall spacer may allow for wire bonding to the gate, such a configuration requires multiple (e.g., 2X or 3X) more sintered elements (e.g., sintered films) than those configurations without the tall spacer. In addition, thermal performance within a power module incorporating a tall spacer configuration may be significantly reduced.

[0097] One or more embodiments may provide a sintered element thickness of less than 75 μm by adding structural features to the metallization layer of the substrate. More specifically, the potential high voltage between the grain surface of one or more SiC grains and the metallization layer of the lower substrate connected to the source can be mitigated by a groove formed (e.g., step etching) through the metallization surface and into the body of the metallization layer. The location of the groove in the metallization layer may correspond to the edge of the semiconductor grain. The groove may be in a portion of the metallization layer corresponding to the edge of the semiconductor grain, so that a line extending from the edge of the semiconductor grain to the metallization layer in a direction orthogonal to the surface of the inner layer of the metallization layer intersects the groove.

[0098] The trench may have a first depth measured from the metallization surface to the body of the metallization layer and to the bottom surface of the trench, which may be in the range of about 75 μm to about 100 μm. The trench may have a second depth measured from the surface of the semiconductor grain facing the metallization layer including the trench to the bottom surface of the trench, which may be in the range of about 100 μm to about 125 μm. The trench may have a width from one sidewall to the oppositely facing sidewall, which may be in the range of about 400 μm to about 500 μm.

[0099] Structural features including grooves such as those described herein can reduce the cost of constructing a power module as a sintered component. More specifically, because the grooves provide the required isolation voltage, the need to construct a power module with a sintered component having a final thickness of 75 μm or greater to achieve this purpose can be avoided. In some examples, a sintered component having a final thickness of about 25 μm to about 50 μm can be incorporated into a power module that includes a groove routed around or more generally relative to the edge of a semiconductor die.

[0100] Furthermore, providing a sintered element with a thickness of less than 75 μm may provide thinner thermal bonding wires than sintered elements with a thickness of 75 μm or more. Due to the thinner bonding wires, thermal performance of a power switch of a power module may be improved relative to configurations including sintered elements with a thickness of 75 μm or more.

[0101] Including structural features such as trenches can allow for a reduction in sintered element thickness while also allowing the overmold material to properly flow into the gap between the die and the source substrate metallization layer. Additionally, low aspect ratio sintered materials can be used to construct the exemplary power modules of the present disclosure without compromising the ability to have gate and source connections to copper on the same plane, which enables and is necessary to avoid cracked semiconductor die.

[0102] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0103] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 3 14). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor in the pair carries a complementary data signal from the other capacitor in the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0104] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0105] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0106] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0107] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0108] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0109] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0110] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0111] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0112] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0113] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0114] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0115] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0116] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between and through the modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0117] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0118] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0119] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0120] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0121] Figure 4A Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4A Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0122] Figure 4B Describes a method for Figure 4A Example system infrastructure for the upper power module. For example, Figure 4B Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and respective lower phase power modules of lower phase power module 145 may include components related to Figure 4B The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0123] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 4B As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 4B More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0124] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0125] General aspects of an exemplary power module according to the present disclosure will now be described. An exemplary power module according to one or more embodiments of the present disclosure may provide a high current interconnect between a base substrate and a cover substrate. However, while some embodiments herein are referred to as "double-sided cooled," it is contemplated that the devices disclosed herein may be used in "single-sided cooled" applications or in a combined active / passive cooling configuration. An exemplary power module according to one or more embodiments may include: an upper and lower substrate, both having a ceramic intermediate layer, such as silicon nitride (Si3N4), with a thick metallized outer layer, such as direct bond copper (DBC) or active metal brazing (AMB); a semiconductor (e.g., silicon carbide (SiC)) die with a drain connection to the upper substrate; a source connection attached to the lower substrate; a polyimide or flexible circuit including a base polyimide material with an internal copper layer, thereby providing a second metal layer between the semiconductor die and, for example, the lower substrate; a lead frame connection for a positive supply voltage (e.g., from a battery); a lead frame connection for a negative supply voltage; and a dielectric material overmolded onto the power module assembly. Specific features (e.g., a metallization layer including grooves, a flexible portion on a substrate) that may be incorporated into one or more embodiments according to the present disclosure will now be described.

[0126] Figure 5 A cross-section of an exemplary architecture for an exemplary power module 500 having a sintering configuration and including trenches 590 is depicted in accordance with one or more embodiments. Figure 5 As shown, the power module 500 according to one or more embodiments may include an upper substrate 505U and a lower substrate 505L. The upper substrate 505U may be a ceramic substrate, such as silicon nitride (Si3N4), which has a thick metallization layer, such as direct bonded copper (DBC) or active metal brazing (AMB) (hereinafter referred to as "DBC 510A"), at least on one side of the upper substrate 505U facing the SiC grains 515 and the lower substrate 505L. The DBC 510A may define an inner layer of the upper substrate 505U. The lower substrate 505L may be a ceramic substrate, such as silicon nitride (Si3N4), which has a thick metallization portion, such as DBC, which includes a trench 590 (including the metallization portion of the trench 590, hereinafter referred to as "DBC 510B") disposed on the side of the lower substrate 505L facing the upper substrate 505U. DBC 510B may define an inner layer of lower substrate 505L.

[0127] The power module 500 may further include a plurality (eg, such as eight) of SiC dies 515. The source connection to the SiC dies 515 may be provided by a first sintered element 570, such as Figure 5505L. The gate connection to the SiC die 515 may be provided by a gate sintered element 525 that may be attached to the lower substrate 505L. The gate sintered element 525 may be electrically separate from the source connection of the first sintered element 570, but may be considered to be part of the first sintered element 570. The drain connection to the SiC die 515 may be provided by a second sintered element 575 that may be attached to the upper substrate 505U. Figure 5 In addition to those components shown, in some examples, the power module 500 may additionally include, for example, surface mount components such as, for example, a temperature sensor, a thermistor, a capacitor, a resistor, or another integrated circuit (IC) such as a gate driver.

[0128] In contrast to other power modules that may use welded components, Figure 5 The illustrated power module 500 shows a sintered assembly including: (1) a first sintered element 570 disposed on the lower substrate side of the SiC die 515; and (2) a second sintered element 575 disposed on the upper substrate side of the SiC die 515. In one or more embodiments, the first sintered element 570 and the second sintered element 575 may be provided by a sintered preform, a sintered film, or a sintered pad. For example, the first sintered element 570 may be formed by a sintered preform, and the second sintered element 575 may be formed by a sintered film.

[0129] Grooves 590 may be formed or otherwise disposed in the surface of DBC 510B that faces SiC grains 515. In one example, grooves 590 may be etched in DBC 510B. Grooves 590 may include step-etched grooves 590A and full-depth grooves 590B. As described below, grooves 590 enable power module 500 to be constructed with a sintered preform (or film) having a thickness of less than 75 μm without compromising the ability of power module 500 to exhibit drain-to-source voltage isolation requirements. In one example, Figure 5 The illustrated power module 500 may exhibit a drain-to-source isolation voltage of 1200 volts.

[0130] By incorporating the grooves 590, the first sintered element 570 can have a thickness 580 that is less than 75 μm, as described above. In one example, the thickness 580 can range from about 25 μm to about 50 μm. For example, the thickness 580 can be about 25 μm.

[0131] like Figure 5As shown, the step-etched groove 590A may extend into the DBC 510B (extending from the first surface of the DBC 510B to the bottom surface 591 defined by the DBC 510B) and at a first depth 595A. The first depth 595A may be in the range of about 50 μm to about 75 μm. The distance from the grain surface of the SiC grain 515 to the bottom surface 591 of the step-etched groove 590A disposed in the DBC 510B may be a second depth 595B. The second depth 595B may be in the range of about 75 μm to about 125 μm. The width 595C of the groove 590 may be in the range of about 400 μm to about 500 μm. As used herein, the width of the groove corresponds to the distance between the sidewalls of the groove, which is the dimension of the groove measured along the following axis: the axis is perpendicular to the axis along which the depth of the groove is measured and extends perpendicular to the longitudinal axis of the groove. Full depth trench 590B may extend through DBC 510B (extending from the first surface of DBC 510B to lower substrate 505L). The depth of full depth trench 590B may be, for example, about 500 μm and corresponds to the thickness of DBC 510B. Full depth trench 590B may separate DBC 510B into a gate layer including gate sintered element 525 and a source layer including first sintered element 570 that does not include gate sintered element 525.

[0132] As described above, the first sintered element 570 and the second sintered element 575 may be incorporated into the power module 500 instead of a solder preform / form. In one example, instead of a solder preform / form on the lower substrate side of the SiC die 515, the power module 500 may include a sintered preform for the first sintered element 570. In addition, Figure 5 The illustrated exemplary power module 500 does not incorporate a solder preform / form for mitigating high voltage potentials between the edge of one side of the SiC die 515 and the underlying substrate 505L. Instead, the potential high voltages between the die surface of one or more of the SiC die 515 and the DBC 510B of the underlying substrate 505L are mitigated by structural features of the DBC 510B, such as trenches 590, which may be etched through the surface and into the body of the DBC 510B.

[0133] In addition to the advantages previously discussed, including structural features (such as trenches 590) in the surface of a metallization layer (e.g., DBC 510B) disposed between a source side substrate (such as lower substrate 505L) and a semiconductor grain (such as SiC grain 515) can reduce the cost of constructing a power module as a sintered assembly. More specifically, because trenches 590 provide the desired isolation voltage, the need to construct a power module (such as power module 500) with a final thickness of sintered components of 75 μm or more to achieve this purpose can be avoided. Using (being able to use) sintered components with a final thickness of about 25 μm to about 50 μm can be much less expensive than providing sintered components with a final thickness of about 75 μm.

[0134] Furthermore, providing a sintered element having a thickness of less than 75 μm, and in particular in the range of about 25 μm to about 50 μm, in turn provides a thinner thermal bond wire than a sintered element having a thickness of 75 μm or more. Due to the thinner bond wire, the thermal performance of the power switching element of the power module can be improved relative to a configuration including a sintered element having a thickness of 75 μm or more on the source side.

[0135] Including such as Figure 5 The structural features of the trench 590 shown can allow for a reduction in sintered thickness while also allowing the overmold material to properly flow into the gap between the die (e.g., SiC die 515) and the source substrate metallization layer (e.g., DBC 510B). In addition, low aspect ratio sintered materials can be used to construct exemplary power modules of the present disclosure (such as power module 500) without compromising the ability to have gate and source connections to copper (e.g., connections between DBC 510B and gate sintered element 525) on the same plane, which enables and is necessary to avoid cracked die (e.g., SiC die 515).

[0136] Figure 6 Depicted are components of an exemplary power module 600 including a substrate 605 and a flexible layer 660 according to one or more embodiments. For power module and switch applications where high power density is desired, a routing layer may be employed so that the gate connection does not interfere with (a) the current capability of the source connection, or (b) the thermal performance of the substrate by increasing the thermal resistance of the substrate.

[0137] Figure 6 The hierarchical structure for the power module is depicted. Figure 6As shown, a power module 600 according to one or more embodiments may include a substrate 605 and a polyimide flexible layer 660. The flexible layer 660 may include a metal layer 664 that provides gate wiring, and the metal layer 664 may constitute a second metal layer disposed between the substrate and the die in the exemplary power module described herein. The first metal layer may be provided by a metallization of a ceramic, such as DBC 510B. For example, the opening 661 may receive the first sintered element 570. The substrate 605 may be combined with the flexible layer 660 to form a flexible portion on a substrate 668. The flexible portion on the substrate 668 may guide the gate connector and may reduce or eliminate cuts in the source plane that may otherwise be required to guide the gate signal.

[0138] Although the use of a polyimide layer is described as an example implementation, alternative constructions utilizing printed and fired conductive layers (such as, for example, silver (Ag) alloys) may also be used. A power module according to one or more embodiments may utilize sintered interconnection of various components, although other methods of interconnecting components, such as soldering, may also be used.

[0139] A power module according to one or more embodiments may represent a hybrid dielectric approach to multilayer board construction, which may be similar in some respects to a rigid-flex construction, but with different materials and purposes. For example, a high current thermally conductive substrate, such as copper-bonded DBC or AMB on Si3N4, aluminum nitride (AlN), aluminum oxide 96% (Al2O3), or other ceramics, may be used for thermal performance, and a flexible circuit laminated on top of the substrate may be used for low-level signal interconnects.

[0140] A power module including a flexible portion on substrate (also referred to herein as “FoS”) according to one or more embodiments can allow full utilization of the source thermal path by using openings (e.g., openings 661) in a dielectric (e.g., flexible layer 660) to connect directly to the underlying substrate copper. For example, Figure 6 As shown, a thin layer of polyimide can be routed underneath the die to form the gate connector.

[0141] An exemplary FoS configuration according to one or more embodiments can eliminate the need to cut into the source plane with a gate runner, and thus can allow a planar copper to be directly connected to the source for a low impedance electrical connection. That is, in some embodiments, the source plane or source material of the substrate and power module does not include any electrical connections to the gate. Removing the cutouts in the source plane for the purpose of providing a gate connection leaves more area to modify the source plane for other purposes, such as providing a trench. As discussed below, the incorporation of the trench can allow a power module including a sintered preform with a reduced thickness to still exhibit the desired drain-to-source voltage isolation.

[0142] Additionally, exemplary FoS configurations according to one or more embodiments can further insulate gate connectors routed under the die, across the die edge (where high cutoff may be required due to the presence of drain voltage), and around the perimeter of the die. The presence of polyimide can increase the dielectric strength at this point, which can reduce the overall thickness and thermal resistance of the assembly.

[0143] An exemplary FoS configuration according to one or more embodiments may allow circuits, SiC gates, and other die to reference the source plane to obtain a smaller loop area. The return path of the generated signal may return to the signal source along the source plane present below the guide path.

[0144] A power module according to one or more embodiments may represent a general approach and resulting topology shift to maximize the load current capability of high current power modules used in bridge applications such as three-phase traction inverters without compromising double-sided cooling and overall material thickness within the cooling paths.

[0145] The limits of any semiconductor power switching device are based on the allowed temperature rise of the die, the temperature capability of the die attach material, and the temperature of the cooling system. The loss of power relative to switching the desired load current affects the conduction thermal resistance and causes a temperature rise at the SiC FET / IGBT junction. This temperature rise must be limited and must be kept within the allowed temperature limits. The limit at the high end may be slightly lower than the maximum die temperature. For example, the module may have transient offsets and temperature sensing accuracy limitations that result in uncertainty in the actual junction temperature, making the power derating need to be done at about 25 degrees below the maximum. The limit at the low end may be limited by the 65C maximum coolant temperature, but the fluid temperature in the cooling rail may increase so that 75C is the lower limit.

[0146] The straightforward way to extend the limit is to move the upper limit, as it may not be limited by customer requirements but by supplier requirements. For example, some suppliers allow the maximum junction temperature of the die to increase from 175C to 185C, but the die attach and the rest of the thermal stack should be considered.

[0147] Another way to increase current density is to reduce switching losses. SiC die can reduce switching times. However, to take advantage of this improvement, improved gate control is needed. Improved gate control can reduce switching times while controlling overshoot by dynamically controlling gate current during turn-on and turn-off events. The problem of voltage drop across the source plane is inherent at high currents.

[0148] Improved gate control relies on being able to dynamically control current during turn-on and turn-off, and requires lower gate loop inductance. A power module according to one or more embodiments may employ a second metal layer disposed between the substrate and the die, the second metal layer comprising a polyimide flex material bonded to the source DBC / AMB copper, thereby being able to reduce the loop area for the gate current and its return current.

[0149] A power module according to one or more embodiments can utilize a void region in the polyimide to enable a direct connection of the source to the source plane of the DBC, while the gate layer is connected to the second metal of the polyimide flex circuit. In general, a reduction in the thickness of the power module and the use of materials with higher thermal conductivity also allow for increased current capabilities. On the other hand, the use of clips and spacers in series with the source and drain connections can increase thermal resistance.

[0150] A power module according to one or more embodiments may increase the upper temperature limit condition by utilizing a SiC MOSFET with a higher junction temperature to increase the upper temperature limit and increase the grain size to, for example, 5.5 mm x 5.5 mm, and modify the thermal stack so that the material does not exceed the specified capability. A power module according to one or more embodiments may utilize an internal ASIC for temperature sensing without the need for custom SiC FETs or thermistors. Such a configuration may support temperature sensing of the upper and lower phases of a semi-H switching element without the use of thermistors, which may have poor accuracy. One or more embodiments may use an ASIC to accurately sense temperature, but does not exclude the use of thermistors or SiC / IGBT devices with temperature sensing.

[0151] A power module according to one or more embodiments can reduce switching losses by adopting an ASIC for dynamic gate control. The power module can further support multiple pins for gate control. A power module according to one or more embodiments can use a second metal layer disposed between the substrate and the die for gate wiring to achieve dynamic control of the gate voltage. Such a second metal layer can achieve low gate loop inductance and can make the source plane an effective signal return path. Polyimide has an extremely high dielectric breakdown performance of 200kV / mm.

[0152] A power module according to one or more embodiments can achieve reduced thermal resistance through reduced material thickness and use of high thermal conductivity materials to allow high currents in switching devices. Polyimide avoids attaching the drain or source connections to anything other than the DBC and does not require spacers from the source to the substrate surface or the use of wire bonds or clips.

[0153] An exemplary FoS configuration according to one or more embodiments may further allow for greater trace routing density than conventional DBC or AMB designs, which may require signal routing and may have limited lines and spaces due to copper thickness. Figure 7 A cross-sectional view of a power module 700 having a sintered configuration and including a flexible layer provided by a polyimide or flexible circuit 760 is depicted in accordance with one or more embodiments. Additionally, as discussed in more detail below, Figure 7 An exemplary architecture for a power module 700 is depicted, including trenches 790 formed in a metallization of a substrate, according to one or more embodiments.

[0154] like Figure 7 As shown, the power module 700 according to one or more embodiments may include an upper substrate 705U and a lower substrate 705L. The upper substrate 705U may be a ceramic substrate, for example, silicon nitride (Si3N4), which has a thick metallization, for example, direct bond copper (DBC) or active metal brazing (AMB) (hereinafter referred to as "DBC 710") on a first side 705U-1 and a second side 705U-2. The first side 705U-1 and the corresponding DBC 710A face the lower substrate 705L and define the inner layer of the upper substrate 705U. The second side 705U-2 and the corresponding DBC 710 face away from the lower substrate 705L and define the outer layer of the upper substrate 705U.

[0155] The lower substrate 705L may be a ceramic substrate, such as silicon nitride (Si3N4), having: (1) a thick metallization, such as a DBC, including a trench 790 disposed on a first side 705L-1 of the lower substrate 705L facing the upper substrate 705U (the metallization including the trench 790 is hereinafter referred to as "DBC 712A"); and (2) a thick DBC 712 disposed on a second side 705L-2 facing away from the upper substrate 705U. The DBC 712A defines an inner layer of the lower substrate 705L, and the DBC 712 on the second side 705L-2 defines an outer layer of the lower substrate 705L.

[0156] The power module 700 may further include a plurality (eg, such as eight) of SiC grains 715, each of which may have a drain connection 720 to the upper substrate 705U. Figure 7 As shown, source connector 730 may be attached to lower substrate 705L. The flexible layer provided by polyimide or flex circuit 760 may include a base polyimide layer 762 with an inner copper layer 764 that may provide an interconnect to a gate connector 725 of a SiC MOSFET including SiC die 715. Figure 7In addition to those components shown, in some examples, the power module 700 may further include, for example, surface mount components such as, for example, a temperature sensor, a thermistor, a capacitor, a resistor, or another integrated circuit (IC) such as a gate driver.

[0157] like Figure 7 As shown, the power module 700 may further include a lead frame connector 750 for the drain (on the upper substrate 705U) and a lead frame connector 755 for the source (on the lower substrate 705L). The assembly may be overmolded with a dielectric material 740. The polyimide layer 762 may provide a through-hole connector 765 from the internal copper layer 764 to the source plane. As used herein, a through-hole connector may include an electrical connector between metal layers in a circuit. The lead frame connector 750 and the lead frame connector 755 may be sintered, soldered, or ultrasonically welded to the power module 700.

[0158] In contrast to other power modules that may use welded components, Figure 7 The illustrated power module 700 shows a sintered assembly including: (1) a through-hole connection 765 to a DBC 712; (2) a first sintered element 770 disposed on a lower substrate side of a SiC die 715; and (3) a second sintered element 775 disposed on an upper substrate side of the SiC die 715. In one or more embodiments, the first sintered element 770 and the second sintered element 775 may be provided by a sintered preform, a sintered film, or a sintered pad. In one example, the first sintered element 770 may be formed by a sintered preform, and the second sintered element 775 may be formed by a sintered film.

[0159] The trench 790 may be formed or otherwise disposed in the surface 712B of the DBC 712A facing the SiC grains 715. In one example, the trench 790 may be etched in the DBC 712A. As described below, the trench 790 enables the power module 700 to be constructed with a sintered preform (or film) having a thickness of less than 75 μm without compromising the ability of the power module 700 to perform drain-to-source voltage isolation requirements. In one example, Figure 7 The illustrated power module 700 may exhibit a drain-to-source isolation voltage of 1200 volts.

[0160] By incorporating the grooves 790, the first sintered element 770 can have a thickness 780 that is less than 75 μm, as described above. In one example, the thickness 780 can range from about 25 μm to about 50 μm. For example, the thickness 780 can be about 25 μm.

[0161] like Figure 7As shown, the groove 790 extends into the body of the DBC 712A (extending from the first DBC surface 712B to the bottom surface 791 defined by the DBC 712A) and at a first depth 795A. The first depth 795A may be in the range of from about 50 μm to about 75 μm. The distance from the first grain surface 716 of the SiC grain 715 to the bottom surface 791 of the groove 790 disposed in the body of the DBC 712A may be a second depth 795B. The second depth 795B may be in the range of from about 75 μm to about 125 μm. The width 795C of the groove 790 may be in the range of from about 400 μm to about 500 μm. As used herein, the width of the groove corresponds to the distance between the sidewalls of the groove, which is the dimension of the groove measured along a first axis, which extends perpendicular to the axis along which the depth of the groove is measured.

[0162] As described above, the first sintered element 770 and the second sintered element 775 may be incorporated into the power module 700 instead of a solder preform / form. In one example, instead of a solder preform / form on the lower substrate side of the SiC die 715, the power module 700 may include a sintered preform for the first sintered element 770. In addition, Figure 7 The exemplary power module 700 shown does not incorporate a method for mitigating the edge of the side of the SiC grain 715 corresponding to the first grain surface 716 from the side of the SiC grain 715. Figure 7 In contrast, the potential high voltage between the first grain surface 716 of one or more of the SiC grains 715 and the DBC 712A of the lower substrate 705L is mitigated by structural features of the DBC 712A, such as trenches 790, which may be etched through surface 712B and into the body of the DBC 712A.

[0163] In addition to the advantages previously discussed, including structural features (such as trenches 790) in a surface (e.g., surface 712B) of a metallization layer (e.g., DBC 712A) disposed between a source side substrate (such as lower substrate 705L) and a semiconductor grain (such as SiC grain 715) can reduce the cost of constructing a power module including a flexible layer as a sintered component. More specifically, because the trenches (such as trenches 790) provide the desired isolation voltage, the need to construct a power module (such as power module 700, which includes a flexible layer provided by polyimide or flexible circuit 760) with a final thickness of 75 μm or more to achieve this purpose can be avoided. Using (being able to use) a sintered component with a final thickness of about 25 μm to about 50 μm can be much less expensive than providing a sintered component with a final thickness of about 75 μm.

[0164] Furthermore, providing a sintered element having a thickness of less than 75 μm, and in particular in the range of about 25 μm to about 50 μm, can in turn provide a thinner thermal bond wire than a sintered element having a thickness of 75 μm or more. Due to the thinner bond wire, the thermal performance of the power switching element of the power module can be improved relative to a configuration including a sintered element having a thickness of 75 μm or more on the source side.

[0165] Including such as Figure 7 The structural features of the trench 790 shown can allow for reduced sintering thickness while also allowing the overmold material to properly flow into the gap between the die (e.g., SiC die 715) and the source substrate metallization layer (e.g., DBC 712A). In addition, low aspect ratio sintered materials can be used to construct exemplary power modules of the present disclosure (such as power module 700) without compromising the ability to have gate and source connections to copper (e.g., connections between DBC 712A and (1) gate connection 725 and (2) lead frame connection 755) on the same plane, which enables and is necessary to avoid cracked die (e.g., SiC die 715).

[0166] Fig. 8A and Figure 8B Depicted is a diagram of a method according to one or more embodiments Figure 7 Components of an exemplary power module 700 that includes a DBC 712A and has a sintered configuration. Fig. 8A and Figure 8B Depicted are various layers of a power module 700 using sintered components and assembling the layers into a complete device according to one or more embodiments. Fig. 8A As shown, the upper substrate 705U and the lower substrate 705L can be assembled separately and then integrated to form the power module 700. In one example, an intermediate stage of assembling the power module 700 may include combining the lower substrate 705L with a flexible layer provided by polyimide or flexible circuit 760, and thereby defining Fig. 8A FoS 768 is shown. The polyimide or flex circuit 760 may include an opening 761 that accommodates the source connection 730 between the SiC die 715 and the lower substrate 705L.

[0167] Fig. 9 Depicted is a layout of an exemplary power module including full depth trenches and step etched trenches according to one or more embodiments.

[0168] For example, power module 900 may be a specific implementation of upper phase power module 140 and / or lower phase power module 145. Power module 900 may have similar elements to power module 500. Power module 900 may have elements arranged differently from power module 500. Power module 900 may include lower substrate 905L, DBC 910B, gate sintered element 925, first sintered element 970 (including elements 970A, 970B and 970C) and trench 990. Trench 990 may include step trench 990A and full trench 990B. Similar to step etch trench 590A, step trench 990A may have a depth of about 75 μm in DBC 910B. DBC 910B may be separated into gate plane 910B-1 and source plane 910B-2 by full trench 990B. The stepped trench 990A may be disposed in both the gate plane 910B- 1 and the source plane 910B- 2 .

[0169] like Fig. 9 As shown, an electrical connection to the switch gate through the gate sintered element 925 can be provided in the wiring of the DBC 910B (which can be an AMB / DBC copper layer). The gate sintered element 925 on the gate plane 910B-1 can be completely separated from the source plane 910B-2 by the full groove 990B, and the desired high voltage isolation can be generated with the stepped groove 990A along the edge of the first sintered element 970 to enable the thickness of the sintered element to be reduced. The stepped groove 990A and the full groove 990B can be filled with an overmolding compound for electrical isolation of the components.

[0170] Fig.10 Depicted is a layout of an exemplary power module including full depth trenches, step etch trenches, and a flex layer according to one or more embodiments.

[0171] For example, power module 1000 may be a specific implementation of upper phase power module 140 and / or lower phase power module 145. Power module 1000 may have similar elements to power module 500. Power module 1000 may have elements arranged differently from power module 500. Power module 1000 may include lower substrate 1005L, DBC 1010B, gate sintered element 1025, first sintered element 1070 (including elements 1070A, 1070B and 1070C) and trench 1090. Trench 1090 may include step trench 1090A and full trench 1090B. Similar to step etched trench 590A, step trench 1090A may have a depth of about 75 μm in DBC 1010B. The DBC 1010B may be separated into a gate plane 1010B-1 and a source plane 1010B-2 by a full trench 1090B. A stepped trench 1090A may be provided in both the gate plane 1010B-1 and the source plane 1010B-2.

[0172] like Fig.10 As shown, the full trench 1090B completely separates the gate plane 1010B-1 from the source plane 1010B-2. Figure 7 The power module 1000 may include a gate trace 1099 to provide an electrical connection to the gate of the switch through the gate frit element 1025. The power module 1000 may include a through hole 1098.

[0173] Fig.11 Depicted is a layout of an exemplary power module including step-etched trenches and a compliant layer according to one or more embodiments.

[0174] For example, power module 1100 may be a specific implementation of upper phase power module 140 and / or lower phase power module 145. Power module 1100 may have similar elements to power module 500. Power module 1100 may have elements arranged differently from power module 500. Power module 1100 may include DBC 1110B, gate sintered element 1125, first sintered element 1170 (including elements 1170A, 1170B, and 1170C), and trench 1190. Trench 1190 may include stepped trench 1190A. Similar to stepped etched trench 590A, the depth of stepped trench 1190A in DBC 1110B may be about 75 μm. DBC 1110B may include first source plane 1110B-1. The DBC 1110B may include a second source plane 1110B- 2 that is mostly surrounded by the stepped trench 1190A to provide HV isolation for components coupled to the first sintered element 1170 .

[0175] like Fig.11 As shown, the flexible layer (e.g., Figure 7) may include a gate trace 1199 to provide an electrical connection to the switching element gate through a gate frit element 1125.

[0176] One or more embodiments can provide a sintered element thickness of less than 75 μm by adding structural features to the metallization layer of the substrate. More specifically, the potential high voltage between the grain surface of one or more SiC grains and the metallization layer of the lower substrate connected to the source can be mitigated by forming (e.g., step etching) a groove through the metallization surface and into the body of the metallization layer. The location of the groove in the metallization layer can correspond to the edge of the semiconductor grain.

[0177] The trench may have a first depth measured from the metallization surface to the body of the metallization layer and to the bottom surface of the trench, which may be in the range of about 75 μm to about 100 μm. The trench may have a second depth measured from the surface of the semiconductor grain facing the metallization layer including the trench to the bottom surface of the trench, which may be in the range of about 100 μm to about 125 μm. The trench may have a width from one sidewall to the oppositely facing sidewall, which may be in the range of about 400 μm to about 500 μm.

[0178] Structural features including grooves such as those described herein can reduce the cost of constructing a power module as a sintered component. More specifically, because the grooves provide the required isolation voltage, the need to construct a power module with a sintered component having a final thickness of 75 μm or greater to achieve this purpose can be avoided. In some examples, a sintered component having a final thickness of about 25 μm to about 50 μm can be incorporated into a power module that includes a groove routed around or more generally relative to the edge of a semiconductor die.

[0179] Furthermore, providing a sintered element with a thickness of less than 75 μm may provide thinner thermal bonding wires than sintered elements with a thickness of 75 μm or more. Due to the thinner bonding wires, thermal performance of a power switch of a power module may be improved relative to configurations including sintered elements with a thickness of 75 μm or more.

[0180] Including structural features such as trenches can allow for a reduction in sintered element thickness while also allowing the overmold material to properly flow into the gap between the die and the source substrate metallization layer. Additionally, low aspect ratio sintered materials can be used to construct the exemplary power modules of the present disclosure without compromising the ability to have gate and source connections to copper on the same plane, which enables and is necessary to avoid cracked semiconductor die.

[0181] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power into AC power, wherein the inverter comprises: A power module, the power module comprising: a flexible layer, the flexible layer comprising a gate trace, a first substrate; a second substrate comprising a source plane and a gate plane separated from the source plane by a full trench, the source plane comprising a stepped trench, and the gate plane comprising an electrical connection through the gate trace of the flexible layer to a gate input connection of the power module, a semiconductor grain disposed between the first substrate and the second substrate, the stepped trench being formed in a portion of the source plane corresponding to an edge of the semiconductor grain, and the semiconductor grain including a gate connected to the gate plane, and a sintering element disposed between the semiconductor die and the second substrate to connect the semiconductor die to the second substrate; a battery configured to supply the DC power to the inverter; and A motor is configured to receive the AC power from the inverter to drive the motor. 2 . The system of claim 1 , wherein the sintered element has a thickness in a range from about 25 μm to about 50 μm.

3. The system of claim 2, wherein the power module is configured to exhibit a drain-to-source isolation voltage of at least 1200 volts.

4. A power module, comprising: a signal layer, the signal layer comprising a gate trace; a first substrate having a first outer layer and a first inner layer; a semiconductor grain coupled to a surface of the first inner layer; a second substrate having a second outer layer and a second inner layer, the semiconductor grain being coupled to a surface of the second inner layer; as well as a sintered element, the sintered element being disposed between the semiconductor grain and the second inner layer, wherein the second inner layer comprises a body, the body comprising a source plane and a gate plane separated from the source plane by a full trench, the gate plane being connected to the gate trace, and The body includes a stepped trench in a portion of the body corresponding to an edge of the semiconductor grain. 5 . The power module of claim 4 , wherein the thickness of the sintered element is in the range from about 25 μm to about 50 μm. 6 . The power module of claim 4 , wherein the sintered element has a thickness of approximately 25 μm. 7 . The power module according to claim 4 , wherein a depth of the step groove from a surface of the sintered element attached to the second inner layer to a bottom of the step groove ranges from about 50 μm to about 75 μm. 8 . The power module of claim 4 , wherein a depth from a surface of the semiconductor die attached to the sintered element to a bottom surface of the stepped trench as defined by the body of the second inner layer ranges from about 75 μm to about 100 μm.

9. The power module according to claim 4, wherein the step groove is in the portion of the body corresponding to the edge of the semiconductor grain so that a line extending from the edge of the semiconductor grain to the body in a direction orthogonal to the surface of the second inner layer intersects the step groove. 10 . The power module of claim 4 , wherein a width of the stepped trench is in a range from about 400 μm to about 500 μm.

11. The power module of claim 4, wherein the signal layer is coupled to the gate plane.

12. The power module of claim 11, wherein the signal layer comprises a flexible layer, the flexible layer comprising an insulating material and a conductive material, and wherein the conductive material of the flexible layer is the gate trace and is coupled to a gate of the semiconductor die. 13 . The power module of claim 4 , wherein the semiconductor die comprises a source connection, wherein the source connection is coupled to the source plane of the second inner layer of the second substrate.

14. The power module according to claim 4, wherein the second substrate further comprises an intermediate layer between the second inner layer and the second outer layer, wherein the intermediate layer comprises ceramic, wherein the second outer layer comprises a metal, and The second inner layer includes a direct bond copper metallization layer.

15. The power module of claim 14, wherein the stepped trench is in the direct bond copper metallization layer.

16. An inverter comprising the power module according to claim 4.

17. A vehicle comprising the inverter according to claim 16.

18. A power module, comprising: a signal layer, the signal layer comprising a gate trace; a first substrate; a second substrate comprising a first trench extending through an electrical conductor of the second substrate to an insulator of the second substrate, and the second substrate comprising a second trench extending from a surface of the second substrate into the electrical conductor of the second substrate at a depth less than a thickness of the electrical conductor; a semiconductor die disposed between the first substrate and the second substrate, the semiconductor die having a drain connection coupled to the first substrate, a source connection coupled to the second substrate, and a gate coupled to the gate trace; as well as a sintered element disposed between the semiconductor die and the second substrate, the sintered element having a thickness in a range of 25 μm to 50 μm; wherein the surface of the second substrate is attached to the sintered element.

19. The power module of claim 18, wherein the second trench is etched into the electrical conductor of the second substrate in a portion of the second substrate corresponding to an edge of the semiconductor die. 20 . The power module of claim 18 , wherein a width of the second trench is in a range of 400 μm to 500 μm.

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