Phase-locked loop based on multistage filtering and compensation and control method

Abstract

The invention belongs to the technical field of power electronics, and particularly discloses a phase-locked loop based on multistage filtering and compensation and a control method. According to the invention, the method comprises the steps: firstly collecting the voltage when a power grid is unbalanced or abnormal, then obtaining the d-axis and q-axis components of a positive sequence, a negative sequence, a third harmonic and a fifth harmonic through the positive and negative sequence separation, then designing a high-pass filter to filter out the negative sequence, the third harmonic and the fifth harmonic, and finally carrying out the amplitude and phase compensation of the filtered d-axis and q-axis components. And the information is sent to a traditional phase-locked loop for phase locking control, so that more accurate power grid phase information can be quickly obtained. According to the invention, under the conditions of unbalanced power grid voltage, harmonic interference and phase and frequency abrupt change, interference signals of third and fifth harmonics can be filtered out only by designing a set of filtering and compensation parameters, the phase locking speed is not slowed down while the phase locking precision is improved, and in practical application, the application has a wide application prospect. The method has the advantages of high dynamic response speed, simple parameter design, high reliability and the like.

Description

Technical Field

[0001] The present application belongs to the field of power electronics technology, and more specifically, relates to a phase-locked loop and a control method based on multi-stage filtering and compensation. Background Art

[0002] In power electronic grid-connected devices such as photovoltaic grid-connected inverters, PCS (Power Conversion System, energy storage converter) and UPQC (Unified Power Quality Conditioner, unified power quality conditioner), the phase-locked synchronization link is one of the important links, and its speed and accuracy have a crucial impact on the indicators of the entire power system. Although my country has established national standards and industry specifications related to power quality, limiting the allowable fluctuation range of grid voltage and frequency, due to the access of different forms of loads (capacitive loads or inductive loads) in the power system, as well as the dynamic balance of various instantaneous power, active power, and reactive power, the power grid will inevitably have power quality problems such as voltage deviation from the sine wave, amplitude and frequency deviation from the rated value. And the abnormal fluctuation of the power grid will put higher requirements on power electronic grid-connected equipment.

[0003] The traditional three-phase synchronous phase-locked loop SRF-PLL is mainly composed of a phase detector PD, a loop filter LF and a voltage-controlled oscillator VCO. When the power grid is unbalanced or distorted, the traditional three-phase phase-locked loop can only effectively lock the phase by reducing the system bandwidth, but reducing the system bandwidth will affect its dynamic response speed. In scenarios with special requirements for the dynamic performance of the power grid phase-locking, the traditional three-phase synchronous phase-locked loop SRF-PLL has unsatisfactory phase-locking accuracy and phase-locking speed, and cannot meet the power system with higher reliability requirements. Summary of the invention

[0004] In view of the defects of the prior art, the purpose of this application is to provide a phase-locked loop and control method based on multi-stage filtering and compensation, aiming to solve the problem that the traditional three-phase synchronous phase-locked loop SRF-PLL cannot take into account both phase-locking accuracy and phase-locking speed at the same time.

[0005] To achieve this objective, in a first aspect, the present application provides a phase-locked loop based on multi-stage filtering and compensation, comprising: Clark converter, used to convert the collected three-phase AC input voltage of the power grid into a voltage in a two-phase stationary coordinate system through Clark conversion, and send it to the multi-stage filtering and compensation module; The K-level filtering and compensation module is used to filter out the negative sequence component, the third harmonic component, and the Subharmonic components, after each stage of filtering, the d-axis and q-axis components of the filtered fundamental positive sequence components are subjected to amplitude and phase compensation, and then used as the compensation input for the next stage of filtering; The PLL phase-locked loop is used to receive the voltage value of the fundamental positive sequence component after K-level filtering and compensation in a two-phase stationary coordinate system, perform control phase locking, and obtain the phase information of the three-phase AC power grid.

[0006] Preferably, the K-level filtering and compensation module includes: a negative sequence component filtering and compensation submodule, a third harmonic filtering and compensation submodule... and Subharmonic filtering and compensation submodule; The negative sequence component filtering and compensation submodule is used to adjust the voltage in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. , The positive and negative sequence are separated to obtain the positive and negative sequence components of the fundamental wave. After the negative sequence component is filtered out by high-pass filtering, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after primary filtering and compensation. ; The third harmonic filtering and compensation submodule is used to adjust the voltage value of the fundamental positive sequence component after primary filtering and compensation in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. Perform 3 times Rotational transformation is performed to obtain the third harmonic voltage component. After high-pass filtering to remove the third harmonic voltage component, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after secondary filtering and compensation. ; Said The subharmonic filtering and compensation submodule is used to adjust the harmonics according to the phase of the phase-locked loop output. Voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after level filtering and compensation conduct Second-rate Rotation transformation, we get Subharmonic voltage components are filtered out by high-pass filtering After the subharmonic voltage components are obtained, amplitude and phase compensation and inverse Park transformation are performed to obtain Voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after level filtering and compensation , and sent to the PLL phase-locked loop.

[0007] Preferably, the submodules have the same structure but different parameters.

[0008] Preferably, the submodule includes: Park converter, used to utilize the phase information of the phase-locked loop output , the voltage values ​​of the α-axis and β-axis in the two-phase stationary coordinate system are Convert to d-axis and q-axis components in the rotating coordinate system , respectively sent to the d-axis high-pass filter and the q-axis high-pass filter; The d-axis high-pass filter is used to The interference signal in the form of DC is filtered out, and the compensation Axis Component sent to the d-axis phase amplitude compensator; The q-axis high-pass filter is used to The interference signal in the form of DC is filtered out, and the compensation Axis Component sent to the q-axis phase amplitude compensator; d-axis phase amplitude compensator, used for Perform phase amplitude compensation and Axis Component Send to the anti-Park converter; The q-axis phase amplitude compensator is used to Perform phase amplitude compensation and Axis Component Send to the anti-Park converter; Inverse Park converter to utilize the phase information of the phase-locked loop output , reverse the rotation transformation of the compensated d-axis and q-axis negative sequence components to obtain the voltage value of the two-phase stationary coordinate system after filtering and compensation .

[0009] Preferably, the negative sequence component Park transformation is specifically as follows:

[0010]

[0011] The positive sequence component Park transform is as follows:

[0012]

[0013] The Park transform of the h-th harmonic component is as follows:

[0014]

[0015] in, , Positive sequence components In the coordinate system , Axis component; Negative sequence components In the coordinate system , Axis component; They are the hth harmonic components respectively In the coordinate system , Axis component, They are the positive sequence component Park transformation matrix, the negative sequence component Park transformation matrix, and the hth harmonic component Park transformation matrix, is the αβ axis component of the positive sequence component in the two-phase stationary coordinate system, is the αβ axis component of the negative sequence component in the two-phase stationary coordinate system, is the αβ axis component of the hth harmonic in the two-phase stationary coordinate system, is the amplitude of the fundamental positive sequence component, is the amplitude of the fundamental negative sequence component, is the amplitude of the hth harmonic component, is the fundamental positive sequence phase of the grid voltage, is the phase of the negative sequence fundamental wave of the grid voltage, is the grid angular frequency, For time, is the harmonic order.

[0016] Preferably, the transfer function of the high-pass filter is ,in, is the complex frequency in the Laplace transform, is the high-pass filter cutoff frequency constant, is the cut-off frequency, and in the negative sequence fundamental component filtering, , in the negative sequence third harmonic component filtering, take , in negative sequence Subharmonic filtering .

[0017] Preferably, the compensation calculation formula is as follows:

[0018] in, , Before compensation , Axis component, After compensation , Axis component, is the high-pass filter cutoff frequency constant, is the harmonic order.

[0019] Preferably, the PLL phase-locked loop comprises: Park converter is used to convert the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after multi-stage filtering and compensation to obtain the d-axis voltage value of the fundamental positive sequence component. and q-axis voltage value , sent to the PLL module; The PLL module includes a PI controller and an integral link, where: The PI controller is used to convert the q-axis voltage value of the fundamental positive sequence component After PI control, the current error angular frequency is obtained , and compare it with the grid angular frequency feedforward control signal Superposition is performed to obtain the angular frequency , sent to the points link; The integration link is used to convert the angular frequency Convert to The signal is sent to the Park converter for phase-locked control.

[0020] To achieve this objective, in a second aspect, the present application provides a control method for a phase-locked loop based on multi-stage filtering and compensation as described in the first aspect, comprising: Get the three-phase AC input voltage of the power grid , , , input it into the Clark transformer; Through Clark transformation, the collected three-phase AC input voltage of the power grid is converted into voltage in a two-phase stationary coordinate system and sent to the multi-stage filtering and compensation module; Filter out the negative sequence component and the third harmonic component in the voltage in the two-phase stationary coordinate system in turn...... Subharmonic components, after each stage of filtering, amplitude and phase compensation is performed on the d-axis and q-axis components of the filtered fundamental positive sequence component; The voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system is sent to the PLL phase-locked loop for control phase locking.

[0021] To achieve this objective, in a third aspect, the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program runs on a processor, the processor executes the control method as described in the second aspect.

[0022] In general, the above technical solutions conceived by this application have the following beneficial effects compared with the prior art: The present application proposes a phase-locked loop and control method based on multi-stage filtering and compensation. Different from the traditional three-phase phase-locked loop that performs rotation transformation and then phase-locks the q-axis component, the present application first collects the voltage when the power grid is unbalanced or abnormal, and then obtains the positive sequence, negative sequence, 3rd and 5th harmonic d-axis and q-axis components through positive and negative sequence separation, and then designs a high-pass filter to filter out the negative sequence, 3rd and 5th harmonic components. Finally, the filtered d-axis and q-axis components are amplitude-phase compensated and sent to the traditional phase-locked loop for control phase locking, so as to quickly obtain more accurate power grid phase information. In the case of unbalanced power grid voltage, harmonic interference, phase and frequency mutation, the present application only needs to design a set of filtering and compensation parameters to filter out the interference signals of the 3rd and 5th harmonics, improve the phase-locking accuracy, and do not slow down the phase-locking speed. In practical applications, it has the advantages of fast dynamic response speed, simple parameter design, and high reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of a phase-locked loop structure based on multi-stage filtering and compensation provided in this application.

[0024] Figure 2 This is a schematic diagram of the negative sequence component filtering and compensation submodule structure provided in this application.

[0025] Figure 3 A flow chart of a control method of a phase-locked loop based on multi-stage filtering and compensation provided in the present application. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0027] The term "and / or" in this article is a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The symbol " / " in this article indicates that the associated objects are in an or relationship, for example, A / B means A or B.

[0028] The terms "first" and "second" in the specification and claims herein are used to distinguish different objects rather than to describe a specific order of the objects. For example, a first response message and a second response message are used to distinguish different response messages rather than to describe a specific order of the response messages.

[0029] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0030] In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more than two. For example, multiple processing units refer to two or more processing units, etc.; multiple elements refer to two or more elements, etc.

[0031] The embodiments of the present application are described below in conjunction with the drawings in the embodiments of the present application.

[0032] like Figure 1 As shown, the present application proposes a phase-locked loop based on multi-stage filtering and compensation, including: a Clark converter 10, a multi-stage filtering and compensation module 20 and a PLL phase-locked loop.

[0033] Clark converter 10 is used to convert the collected three-phase AC input voltage of the power grid into , , Converted to voltage in two-phase stationary coordinate system , , and sent to the multi-stage filtering and compensation module 20.

[0034] The multi-stage filtering and compensation module in the present application includes but is not limited to three-stage filtering and compensation. This embodiment takes the three-stage filtering and compensation module as an example.

[0035] Specifically, the three-stage filtering and compensation module 20 includes: a negative sequence component filtering and compensation submodule 21 , a third harmonic filtering and compensation submodule 22 , and a fifth harmonic filtering and compensation submodule 23 .

[0036] The negative sequence component filtering and compensation submodule 21 is used to adjust the voltage in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. , The positive and negative sequence are separated to obtain the fundamental positive and negative sequence components. After the fundamental negative sequence component is filtered out by high-pass filtering, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after primary filtering and compensation. .

[0037] The third harmonic filtering and compensation submodule 22 is used to adjust the voltage value of the fundamental positive sequence component after primary filtering and compensation in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. Perform 3 times Rotational transformation is performed to obtain the third harmonic voltage component. After high-pass filtering to remove the third harmonic voltage component, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after secondary filtering and compensation. .

[0038] The fifth harmonic filtering and compensation submodule 23 is used to adjust the voltage value of the fundamental positive sequence component after secondary filtering and compensation in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. Perform 5 times Rotational transformation is performed to obtain the 5th harmonic voltage component. After high-pass filtering to remove the 5th harmonic voltage component, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after three-stage filtering and compensation. , and sent to the PLL phase-locked loop for PI control to obtain the phase information of the three-phase AC power grid.

[0039] The structures of these three submodules are the same, and the negative sequence component filtering and compensation submodule 21 is taken as an example for description below.

[0040] like Figure 2 As shown, the negative sequence component filtering and compensation submodule 21 includes a Park converter 211, a d-axis high-pass filter 212, a d-axis phase amplitude compensator 213, an inverse Park converter 214, a q-axis high-pass filter 215, and a q-axis phase amplitude compensator 216. Park converter 211 is used to utilize the phase information output by the phase-locked loop , the voltage values ​​of the α-axis and β-axis in the two-phase stationary coordinate system are Convert to d-axis and q-axis components in the rotating coordinate system , respectively sent to the d-axis high-pass filter 212 and the q-axis high-pass filter 215; The d-axis high-pass filter 212 is used to The interference signal in the form of DC is filtered out, and the compensation Axis Component Sent to the d-axis phase amplitude compensator 213; The q-axis high-pass filter 215 is used to The interference signal in the form of DC is filtered out, and the compensation Axis Component Sent to the q-axis phase amplitude compensator 216; The d-axis phase amplitude compensator 213 is used to Perform phase amplitude compensation and Axis Component Sent to the anti-Park converter 214; The q-axis phase amplitude compensator 216 is used to Perform phase amplitude compensation and Axis Component Sent to the anti-Park converter 214; Inverse Park converter 214 is used to utilize the phase information output by the phase-locked loop , reverse the rotation transformation of the compensated d-axis and q-axis negative sequence components to obtain the voltage value of the two-phase stationary coordinate system after filtering and compensation .

[0041] It should be noted that the negative sequence component Park transformation is as follows:

[0042]

[0043] The positive sequence component Park transform is as follows:

[0044]

[0045] The Park transform of the h-th harmonic component is as follows:

[0046]

[0047] in, , Positive Sequence In the coordinate system , Axis component; Negative sequence In the coordinate system , Axis component; h times respectively In the coordinate system , Axis component, They are the positive sequence component Park transformation matrix, the negative sequence component Park transformation matrix, and the hth harmonic component Park transformation matrix, is the positive sequence component in the two-phase stationary coordinate system αβ, is the negative sequence component in the two-phase stationary coordinate system αβ, is the hth harmonic component in the two-phase stationary coordinate system αβ, is the amplitude of the fundamental positive sequence component, is the amplitude of the fundamental negative sequence component, is the hth harmonic component amplitude (including DC bias amplitude), is the fundamental positive sequence phase of the grid voltage, is the phase of the negative sequence fundamental wave of the grid voltage, is the grid angular frequency, For time, is the harmonic order, which is 3 or 5 in this application.

[0048] The grid voltage fundamental positive sequence component, negative sequence component, third harmonic voltage component, and fifth harmonic voltage component can all be converted into DC components. The present application uses a first-order high-pass filter to filter out interference signals in the form of negative sequence component, third harmonic voltage component, and fifth harmonic voltage component.

[0049] It should be noted that the transfer functions of the d-axis high-pass filter 212 and the q-axis high-pass filter 215 are both ,in, is the complex frequency in the Laplace transform, is the cutoff frequency constant of the high-pass filter, usually 0.2, is the cut-off frequency, and in the negative sequence fundamental component filtering, , in the negative sequence third harmonic component filtering, take , in the negative sequence 5th harmonic component filtering, take .

[0050] Although the fundamental negative sequence component, the third harmonic component and the fifth harmonic component can be filtered out by a high-pass filter, the amplitude and phase of the fundamental component after filtering are changed according to the high-pass filter transfer function. Therefore, it is necessary to compensate the amplitude and phase of the fundamental positive sequence component. Finally, the d-axis component obtained after compensation is and the q-axis component Perform inverse Park transform to obtain the α-axis component and β-axis component of the fundamental wave positive sequence component, which are sent to the PLL phase-locked loop for PI control to obtain the phase information of the three-phase AC power grid.

[0051] It should be noted that the compensation functions of the d-axis phase amplitude compensator 213 and the q-axis phase amplitude compensator 216 are both .

[0052] The compensation calculation formula is as follows:

[0053] in, , Before compensation , Axis component, After compensation , Axis component, is the cutoff frequency constant of the high-pass filter, usually 0.2, is the harmonic order.

[0054] The inverse Park transform matrix in the inverse Park transform 214 is Park Transformer 211 The inverse matrix of .

[0055] The PLL phase-locked loop includes a Park converter 30 and a PLL module 40 .

[0056] The Park converter 30 is used to convert the voltage value of the two-phase stationary coordinate system of the fundamental positive sequence component after three-stage filtering and compensation Perform Park transformation to obtain the d-axis voltage value of the fundamental positive sequence component and q-axis voltage value , sent to the PLL module 40. The PLL module 40 includes a PI controller 41 and an integral link 42, wherein the PI controller 41 is used to convert the q-axis voltage value of the fundamental positive sequence component After PI control, the current error angular frequency is obtained , and compare it with the grid angular frequency feedforward control signal Superposition is performed to obtain the angular frequency , sent to the integration link 42; the integration link 42 is used to convert the angular frequency Convert to The signal is sent to the Park converter 30 for phase-locked control.

[0057] like Figure 3 As shown, the present application provides a control method of a phase-locked loop based on multi-stage filtering and compensation, comprising: Get the three-phase AC input voltage of the power grid , , , input it into the Clark transformer; Through Clark transformation, the collected three-phase AC input voltage of the power grid is converted into voltage in a two-phase stationary coordinate system and sent to the multi-stage filtering and compensation module; Filter out the negative sequence component and the third harmonic component in the voltage in the two-phase stationary coordinate system in turn...... Subharmonic components, after each stage of filtering, amplitude and phase compensation is performed on the d-axis and q-axis components of the filtered fundamental positive sequence component; The voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system is sent to the PLL phase-locked loop for control phase locking.

[0058] It can be understood that the detailed functional implementation of each of the above-mentioned units / modules can be found in the introduction of the aforementioned method embodiment, and will not be repeated here.

[0059] It should be understood that the above-mentioned device is used to execute the method in the above-mentioned embodiment. The implementation principle and technical effect of the corresponding program module in the device are similar to those described in the above-mentioned method. The working process of the device can refer to the corresponding process in the above-mentioned method, which will not be repeated here.

[0060] Based on the method in the above embodiment, an embodiment of the present application provides a computer-readable storage medium, which stores a computer program. When the computer program runs on a processor, the processor executes the method in the above embodiment.

[0061] Based on the method in the above embodiment, an embodiment of the present application provides a computer program product. When the computer program product runs on a processor, the processor executes the method in the above embodiment.

[0062] It is understandable that the processor in the embodiment of the present application may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. The general-purpose processor may be a microprocessor or any conventional processor.

[0063] The method steps in the embodiments of the present application can be implemented by hardware or by a processor executing software instructions. The software instructions can be composed of corresponding software modules, and the software modules can be stored in random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, mobile hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an ASIC.

[0064] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented by software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted through the computer-readable storage medium. The computer instructions may be transmitted from a website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)), etc.

[0065] It should be understood that the various numerical numbers involved in the embodiments of the present application are only used for the convenience of description and are not used to limit the scope of the embodiments of the present application.

[0066] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A phase-locked loop based on multi-stage filtering and compensation, characterized in that: include: Clark converter, used to convert the collected three-phase AC input voltage of the power grid into a voltage in a two-phase stationary coordinate system through Clark conversion, and send it to the multi-stage filtering and compensation module; The K-level filtering and compensation module is used to filter out the negative sequence component, the third harmonic component, and the Subharmonic components, after each stage of filtering, the d-axis and q-axis components of the filtered fundamental positive sequence components are subjected to amplitude and phase compensation, and then used as the compensation input for the next stage of filtering; The PLL phase-locked loop is used to receive the voltage value of the fundamental positive sequence component after K-level filtering and compensation in a two-phase stationary coordinate system, perform control phase locking, and obtain the phase information of the three-phase AC power grid.

2. The phase-locked loop according to claim 1, characterized in that: The K-level filtering and compensation module includes: a negative sequence component filtering and compensation submodule, a third harmonic filtering and compensation submodule... and Subharmonic filtering and compensation submodule; The negative sequence component filtering and compensation submodule is used to adjust the voltage in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. , The positive and negative sequence are separated to obtain the positive and negative sequence components of the fundamental wave. After the negative sequence component is filtered out by high-pass filtering, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after primary filtering and compensation. ; The third harmonic filtering and compensation submodule is used to adjust the voltage value of the fundamental positive sequence component after primary filtering and compensation in the two-phase stationary coordinate system according to the phase of the phase-locked loop output. Perform 3 times Rotational transformation is performed to obtain the third harmonic voltage component. After high-pass filtering to remove the third harmonic voltage component, amplitude phase compensation and inverse Park transformation are performed to obtain the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after secondary filtering and compensation. ; Said The subharmonic filtering and compensation submodule is used to adjust the harmonics according to the phase of the phase-locked loop output. Voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after level filtering and compensation conduct Second-rate Rotation transformation, we get Subharmonic voltage components are filtered out by high-pass filtering After the subharmonic voltage components are obtained, amplitude and phase compensation and inverse Park transformation are performed to obtain Voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after level filtering and compensation , and sent to the PLL phase-locked loop.

3. The phase-locked loop according to claim 2, characterized in that: These submodules have the same structure but different parameters.

4. The phase-locked loop according to claim 3, characterized in that: The submodules include: Park converter, used to utilize the phase information of the phase-locked loop output , the voltage values ​​of the α-axis and β-axis in the two-phase stationary coordinate system are Convert to d-axis and q-axis components in the rotating coordinate system , respectively sent to the d-axis high-pass filter and the q-axis high-pass filter; The d-axis high-pass filter is used to The interference signal in the form of DC is filtered out, and the compensation Axis Component sent to the d-axis phase amplitude compensator; The q-axis high-pass filter is used to The interference signal in the form of DC is filtered out, and the compensation Axis Component sent to the q-axis phase amplitude compensator; d-axis phase amplitude compensator, used for Perform phase amplitude compensation and Axis Component Send to the anti-Park converter; The q-axis phase amplitude compensator is used to Perform phase amplitude compensation and Axis Component Send to the anti-Park converter; Inverse Park converter to utilize the phase information of the phase-locked loop output , reverse the rotation transformation of the compensated d-axis and q-axis negative sequence components to obtain the voltage value of the two-phase stationary coordinate system after filtering and compensation .

5. The phase-locked loop according to claim 4, characterized in that: The negative sequence component Park transformation is as follows: The positive sequence component Park transform is as follows: The Park transform of the h-th harmonic component is as follows: in, , Positive sequence components In the coordinate system , Axis component; Negative sequence components In the coordinate system , Axis component; They are the hth harmonic components respectively In the coordinate system , Axis component, They are the positive sequence component Park transformation matrix, the negative sequence component Park transformation matrix, and the hth harmonic component Park transformation matrix, is the αβ axis component of the positive sequence component in the two-phase stationary coordinate system, is the αβ axis component of the negative sequence component in the two-phase stationary coordinate system, is the αβ axis component of the hth harmonic in the two-phase stationary coordinate system, is the amplitude of the fundamental positive sequence component, is the amplitude of the fundamental negative sequence component, is the amplitude of the hth harmonic component, is the fundamental positive sequence phase of the grid voltage, is the phase of the negative sequence fundamental wave of the grid voltage, is the grid angular frequency, For time, is the harmonic order.

6. The phase-locked loop according to claim 4, characterized in that: The transfer function of the high-pass filter is ,in, is the complex frequency in the Laplace transform, is the high-pass filter cutoff frequency constant, is the cut-off frequency, and in the negative sequence fundamental component filtering, , in the negative sequence third harmonic component filtering, take , in negative sequence Subharmonic filtering .

7. The phase-locked loop according to claim 4, characterized in that: The compensation calculation formula is as follows: in, , Before compensation , Axis component, After compensation , Axis component, is the high-pass filter cutoff frequency constant, is the harmonic order.

8. The phase-locked loop according to claim 1, wherein: The PLL phase-locked loop comprises: Park converter is used to convert the voltage value of the fundamental positive sequence component in the two-phase stationary coordinate system after multi-stage filtering and compensation to obtain the d-axis voltage value of the fundamental positive sequence component. and q-axis voltage value , sent to the PLL module; The PLL module includes a PI controller and an integral link, where: The PI controller is used to convert the q-axis voltage value of the fundamental positive sequence component After PI control, the current error angular frequency is obtained , and compare it with the grid angular frequency feedforward control signal Superposition is performed to obtain the angular frequency , sent to the points link; The integration link is used to convert the angular frequency Convert to The signal is sent to the Park converter for phase-locked control.

9. A control method of a phase-locked loop based on multi-stage filtering and compensation as claimed in any one of claims 1 to 8, characterized in that: include: Get the three-phase AC input voltage of the power grid , , , input it into the Clark transformer; Through Clark transformation, the collected three-phase AC input voltage of the power grid is converted into voltage in a two-phase stationary coordinate system and sent to the multi-stage filtering and compensation module; Filter out the negative sequence component and the third harmonic component in the voltage in the two-phase stationary coordinate system in turn...... Subharmonic components, after each stage of filtering, amplitude and phase compensation is performed on the d-axis and q-axis components of the filtered fundamental positive sequence component; The voltage value of the fundamental positive sequence component after K-level filtering and compensation in the two-phase stationary coordinate system is sent to the PLL phase-locked loop for control phase locking.

10. A computer-readable storage medium storing a computer program, characterized in that: When the computer program is executed on a processor, the processor is caused to execute the control method as claimed in claim 9.

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