Gold wire bonding vertical interconnection structure for packaging superconductive amplitude limiting chip
Through the gold wire bonded vertical interconnect structure and the cascade design of coplanar waveguide transmission line is adopted, the problems of simple limiter functions, difficult to adjust the limiting threshold and limited working bandwidth in the existing superconducting limiting chip packaging technology are solved, and a high-performance, controllable limiting threshold and strong adaptability superconducting limiting chip package is achieved.
Patent Information
- Application Number
- CN202311481553.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-09
- Publication Date
- 2025-05-09
AI Technical Summary
In the existing superconducting limiting chip packaging technology, the function of the limiter is relatively simple, the limiting threshold is difficult to adjust, the working bandwidth is limited, and it is difficult to achieve multi-chip interconnection with complex functions.
Using a gold wire bonded vertical interconnect structure, a reasonable coplanar waveguide transmission line cascade structure is designed to achieve high performance and controllable limiting threshold of the limiter through the first and second coplanar waveguide transmission lines and a single bonded alloy wire.
It improves signal transmission performance, enhances working bandwidth, realizes controllability of limiting thresholds, and adapts to installation environments of different sizes, reducing costs.
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Figure CN119968104A_ABST
Abstract
Description
Technical field: The invention relates to a gold wire bonding vertical interconnection structure for superconducting limiting chip packaging. Background technology: There is an upper limit to the current density of superconducting films. When the current density on the superconducting transmission line exceeds the critical value, the transmission line will change from a superconducting state to a non-superconducting state. Therefore, a superconducting transmission line of a certain width can be used as a limiter with an extremely simple structure. In microwave multi-chip circuits, planar gold wire bonding technology is often used to realize the interconnection between microstrip transmission lines, monolithic microwave integrated circuits and lumped components. The bonding wire model is generally composed of a single or multiple gold wires. The traditional superconducting planar gold wire bonding line model is as follows: Figure 1 As shown, two microstrip transmission line circuits 6 are connected by gold wires 7. The functions that can be realized by this circuit are relatively simple, and due to the limitations of the microstrip line width and characteristic impedance, its limiting threshold is difficult to adjust and its working bandwidth is very limited.
[0003] At present, in the field of superconducting chips, the area of superconducting chips is limited. To realize more complex functions, multiple superconducting chips need to be interconnected. At the same time, considering the size limitation of the chip installation environment, in addition to planar interconnection, each chip needs to be interconnected in three dimensions. In view of this, this case was born. Summary of the invention: The present invention makes improvements on the problems existing in the above-mentioned prior art, that is, the technical problem to be solved by the present invention is to provide a gold wire bonding vertical interconnection structure for superconducting limiting chip packaging, which has a reasonable design, good transmission performance, controllable limiting threshold, and large working bandwidth.
[0005] In order to achieve the above-mentioned purpose, the technical solution adopted by the present invention is: a gold wire bonding vertical interconnection structure for superconducting limiting chip packaging, comprising a first coplanar waveguide transmission line, a second coplanar waveguide transmission line and a bonding gold wire, wherein the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are placed perpendicular to each other, and the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are connected by the bonding gold wire.
[0006] Furthermore, the one coplanar waveguide transmission line comprises a first dielectric substrate, a first superconducting film is arranged on a side of the first dielectric substrate facing the bonding wire; the two coplanar waveguide transmission lines comprise a second dielectric substrate, a second superconducting film is arranged on a side of the second dielectric substrate facing the bonding wire.
[0007] Furthermore, the first dielectric substrate and the second dielectric substrate are both made of lanthanum aluminate material, whose dielectric constant is about 23.6 and thickness is 0.5 mm; the first superconducting film and the second superconducting film are both made of dysprosium barium copper oxide material, whose thickness is 600 nm.
[0008] Furthermore, the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are both formed by cascading three sections of coplanar waveguide transmission lines with different sizes and the same characteristic impedance.
[0009] Furthermore, the characteristic impedance of the three sections of coplanar waveguide transmission lines is 50 ohms.
[0010] Furthermore, the bonding gold wire is a single wire.
[0011] Furthermore, the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are completely consistent in size and material.
[0012] Compared with the prior art, the present invention has the following effects: the present invention is reasonably designed and adopts a coplanar waveguide transmission line to design a limiter, so that only the structure of the transmission line changes but not the impedance, so that the working bandwidth of the limiter is enhanced; at the same time, the width of the central guide band of the coplanar waveguide transmission line can be arbitrarily designed according to the target limiting threshold; in addition, a single number of bonding gold wires are used to connect two mutually perpendicular superconducting chips, which not only ensures the integrity of signal transmission, but also enables the chip to adapt to installation environments of different sizes, and is relatively low in cost. Description of the drawings: Figure 1 It is a traditional superconducting planar gold wire interconnection model; Figure 2 It is a schematic diagram of the structure of an embodiment of the present invention; Figure 3 is a top view of a first coplanar waveguide transmission line in an embodiment of the present invention; Figure 4 This is the insertion loss performance result obtained by simulation in the embodiment of the present invention. Specific implementation method: The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.
[0015] In the description of the present invention, it should be understood that the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicating orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.
[0016] like Figure 1As shown, the present invention is a gold wire bonding vertical interconnection structure for superconducting limiting chip packaging, comprising a first coplanar waveguide transmission line, a second coplanar waveguide transmission line and a single bonding gold wire 5, wherein the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are placed perpendicular to each other, and the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are connected by the single bonding gold wire 5. The characteristic impedance of the coplanar waveguide transmission line is not only related to the width of the central conductive strip, but also to the spacing between the central conductive strip and the ground on both sides, while the limiting threshold is only related to the width of the central conductive strip. This embodiment combines the superconducting limiting chip with the gold wire bonding process to realize signal transmission and improve the adaptability of the chip installation environment.
[0017] In this embodiment, the horizontal distance and the vertical distance between the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are both 1.5 mm.
[0018] In this embodiment, the one coplanar waveguide transmission line comprises a first dielectric substrate 1, and a first superconducting film 2 is provided on a side of the first dielectric substrate surface 1 facing the bonding gold wire 5; the two coplanar waveguide transmission lines comprise a second dielectric substrate 3, and a second superconducting film 4 is provided on a side of the second dielectric substrate surface 3 facing the bonding gold wire 5. Further, the first dielectric substrate and the second dielectric substrate are both made of lanthanum aluminate material, whose dielectric constant is about 23.6 and thickness is about 0.5 mm; the first superconducting film and the second superconducting film are both made of dysprosium barium copper oxide material, whose thickness is about 600 nm.
[0019] In another embodiment, the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are both formed by cascading three sections of coplanar waveguide transmission lines of different sizes and each having a characteristic impedance of 50 ohms. Figure 3 As shown, the three sections of coplanar waveguide transmission lines are respectively the first section central guide strip 21, the second section transition strip 22 and the third section central guide strip 23, wherein the width W1 of the first section central guide strip 21 is 0.18 mm, the length L1 is 5 mm, and the gap distance W2 on both sides is 1.11 mm; the length L2 of the second section transition strip 22 is 5 mm; the width W3 of the third section central guide strip 23 is 0.1 mm, the length L3 is 1 mm, the gap distance W4 on both sides is 0.22 mm, and the characteristic impedance is 50 ohms.
[0020] In this embodiment, the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are completely consistent in size and material.
[0021] Figure 4 The insertion loss results of the present invention in the low frequency band simulation are all within -0.1dB. It can be seen that the vertical interconnection structure not only ensures the signal transmission performance, but also enables the chip to adapt to installation environments of different sizes.
[0022] If the present invention discloses or involves components or structures that are fixedly connected to each other, then, unless otherwise stated, the fixed connection can be understood as: a detachable fixed connection (for example, connection using bolts or screws), and can also be understood as: a non-detachable fixed connection (for example, riveting, welding). Of course, the mutual fixed connection can also be replaced by an integrated structure (for example, manufactured by integrated molding using a casting process) (except when it is obviously impossible to use an integrated molding process).
[0023] In addition, unless otherwise stated, the terms used to indicate positional relationships or shapes in any of the technical solutions disclosed in the present invention include states or shapes that are approximate, similar, or close to them.
[0024] Any component provided by the present invention may be assembled from a plurality of separate components, or may be a separate component manufactured by an integral forming process.
[0025] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, ordinary technicians in the field should understand that the specific implementation methods of the present invention can still be modified or some technical features can be replaced by equivalents without departing from the spirit of the technical solution of the present invention, which should be included in the scope of the technical solution for protection of the present invention.
Claims
1. A gold wire bonding vertical interconnection structure for superconducting limiting chip packaging, characterized in that: It comprises a first coplanar waveguide transmission line, a second coplanar waveguide transmission line and a bonding gold wire. The first coplanar waveguide transmission line and the second coplanar waveguide transmission line are placed perpendicular to each other, and the first coplanar waveguide transmission line and the second coplanar waveguide transmission line are connected by the bonding gold wire.
2. The gold wire bonding vertical interconnect structure for superconducting limiting chip packaging according to claim 1, characterized in that: The one coplanar waveguide transmission line comprises a first dielectric substrate, a first superconducting film is arranged on a side of the first dielectric substrate facing the bonding wire; the two coplanar waveguide transmission lines comprise a second dielectric substrate, a second superconducting film is arranged on a side of the second dielectric substrate facing the bonding wire.
3. The gold wire bonding vertical interconnect structure for superconducting limiting chip packaging according to claim 2, characterized in that: The first dielectric substrate and the second dielectric substrate are both made of lanthanum aluminate material, whose dielectric constant is about 23.6 and thickness is 0.5 mm; the first superconducting film and the second superconducting film are both made of dysprosium barium copper oxide material, whose thickness is 600 nm.
4. The gold wire bonding vertical interconnect structure for superconducting limiting chip packaging according to claim 1, characterized in that: The first coplanar waveguide transmission line and the second coplanar waveguide transmission line are both formed by cascading three sections of coplanar waveguide transmission lines with different sizes and the same characteristic impedance.
5. The gold wire bonding vertical interconnect structure for superconducting limiting chip packaging according to claim 4, characterized in that: The characteristic impedance of the three sections of coplanar waveguide transmission lines is 50 ohms.
6. The gold wire bonding vertical interconnect structure for superconducting limiting chip packaging according to claim 1, characterized in that: The bonding gold wire is a single wire.
7. The gold wire bonding vertical interconnect structure for superconducting limiting chip packaging according to claim 1, characterized in that: The first coplanar waveguide transmission line and the second coplanar waveguide transmission line are completely consistent in size and material.