LoRa data packet detection method for logical channel based on window sliding, medium and equipment

Through the window-sliding-based logical channel LoRa packet detection method, the low SNR and poor SINR problems faced by LoRa gateways in large-scale networks are solved, high-quality and high-capacity communication is achieved, and the expansion capability and channel quality feedback capability of LoRa gateway are enhanced.

CN119996135AActive Publication Date: 2025-05-13SHENZHEN UNIV

Patent Information

Application Number
CN202510296077.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-03-13
Publication Date
2025-05-13
Estimated Expiration
2045-03-13

AI Technical Summary

Technical Problem

LoRa gateways face extremely low SNR and poor SINR problems in large-scale networks, resulting in increased packet collision frequency and deterioration of channel conditions, limiting their expansion capabilities.

Method used

The logical channel LoRa packet detection method based on window sliding is adopted. By tracking the changing patterns of multiple peaks in a continuous time window, the peak sequence is extracted, the characteristics of the data packet are identified, the LoRa parameters, including the spreading factor and bandwidth, and the demodulation window is aligned to evaluate the carrier frequency offset.

Benefits of technology

Under harsh channel conditions, LoRa packets from multiple logical channels can be detected simultaneously, achieving high-quality and high-capacity communication, enhancing the expansion capability and channel quality feedback capability of the LoRa gateway.

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Abstract

The invention discloses a logical channel LoRa data packet detection method based on window sliding, a medium and equipment, and belongs to the technical field of network communication. The method comprises the following steps: for a received data packet, extracting peak values from the same symbol by tracking a change mode of a plurality of peak values in a continuous time window, and generating a corresponding peak value sequence by matching the peak values of the symbols to obtain a plurality of peak value sequences; identifying the characteristics of the same data packet in the frequency domain and the time domain, and matching the plurality of peak sequences to obtain a matched peak sequence; extracting LoRa parameters of the data packet by combining the characteristics of the plurality of peak sequences by using the matched peak sequences, the LoRa parameters including a spreading factor and a bandwidth; and aligning the demodulation windows in the frequency domain and the time domain, and evaluating the carrier frequency offset of each data packet. According to the invention, the data packet can be detected more accurately, and high-quality and high-capacity communication is realized.
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Description

Technical Field

[0001] The present invention relates to the field of network communication technology, and more specifically, to a logical channel LoRa data packet detection method, medium and device based on window sliding. Background Art

[0002] In recent years, Low Power Wide Area Networks (LPWANs) have been widely deployed in Internet of Things (IoT) application scenarios. As a highly promising LPWAN communication technology, LoRa (Long Range Radio Standard) operates in the unlicensed ISM sub-1GHz band and is well-known for its low power consumption and long-distance transmission capabilities. LoRa's physical layer (PHY) uses Chirp Spread Spectrum (CSS) modulation technology and performs despreading at the receiving end, which gives LoRa excellent noise resistance, enabling it to work normally in an environment with a signal-to-noise ratio (SNR) as low as -5dB or below, see Figure 1 Furthermore, since each node is limited to a 1% duty cycle and spends most of the time in sleep mode, the lifetime of a single LoRa node can be as long as several years.

[0003] However, due to cost constraints, LoRa uses a very simple medium access control (MAC) protocol, the ALOHA (wireless data communication) protocol, which allows LoRa nodes to start transmitting immediately when they need to send data. As the deployment scale of LoRa nodes in various scenarios continues to expand, the congestion problem of transmission channels has become increasingly serious, resulting in a significant increase in the frequency of packet collisions and aggravated channel conditions. Specifically, when multiple LoRa symbols have the same slope as the target symbol, they are demodulated simultaneously, resulting in a lower signal-to-interference-plus-noise ratio (SINR); while LoRa symbols with different slopes will introduce more background noise, thereby reducing the signal-to-noise ratio (SNR).

[0004] In summary, LoRa gateways face extremely low SNR below -10dB and poor SINR in actual deployment, which limits their scalability in large-scale networks. Summary of the invention

[0005] The object of the present invention is to overcome the defects of the above-mentioned prior art and provide a logical channel LoRa data packet detection method, medium and device based on window sliding.

[0006] According to a first aspect of the present invention, a method for detecting a logical channel LoRa data packet based on window sliding is provided. The method comprises the following steps: For the received data packets, the peak values ​​are extracted from the same symbol by tracking the change patterns of multiple peak values ​​in the continuous time window, and the corresponding peak sequences are generated by matching the peak values ​​of each symbol to obtain multiple peak sequences; In the frequency domain and the time domain, identifying features of the same data packet, and obtaining a matching peak sequence by matching the multiple peak sequences; Utilizing the matched peak sequence, and combining the characteristics of the plurality of peak sequences, extracting LoRa parameters of the data packet, including a spreading factor and a bandwidth; The demodulation window is aligned in the frequency and time domains, and the carrier frequency offset is estimated for each packet.

[0007] According to a second aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored, wherein when the computer program is executed by a processor, the steps of the above-mentioned logical channel LoRa data packet detection method based on window sliding are implemented.

[0008] According to a third aspect of the present invention, there is provided a computer device, comprising a memory and a processor, wherein a computer program that can be run on the processor is stored in the memory, wherein the processor implements the steps of the above-mentioned window sliding-based logical channel LoRa data packet detection method when executing the computer program.

[0009] Compared with the prior art, the advantage of the present invention is that the proposed logical channel LoRa data packet detection method based on window sliding enables the LoRa gateway to simultaneously detect LoRa data packets from multiple logical channels under harsh channel conditions and achieve high-quality and high-capacity communication. The present invention enables the existing LoRa gateway to detect potential data packets from all logical channels in the spectrum and provide timely channel quality feedback to the node.

[0010] Further features and advantages of the present invention will become apparent from the following detailed description of exemplary embodiments of the present invention with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

[0012] Figure 1 is a schematic diagram of physical channels and logical channels in the 915 MHz ISM spectrum specified by LoRaWAN according to one embodiment of the present invention; Figure 2 is a flow chart of a logical channel LoRa data packet detection method based on fine-grained window sliding according to an embodiment of the present invention; Figure 3 is a flow chart of a logical channel LoRa data packet detection method based on fine-grained window sliding according to an embodiment of the present invention; Figure 4 is a schematic diagram of detecting data packets based on a sliding fine-grained demodulation window according to an embodiment of the present invention; Figure 5 is a schematic diagram of cross-logical channel data packet detection without prior knowledge according to an embodiment of the present invention; Figure 6 is a schematic diagram of concurrent data packet transmission within a 1 MHz bandwidth according to an embodiment of the present invention; Figure 7 is a peak regression schematic diagram according to an embodiment of the present invention; Figure 8 is a schematic diagram of FFT results after de-chirping operations are performed in 8 consecutive demodulation windows according to an embodiment of the present invention; In the accompanying drawings, Freq-frequency; Packet-packet; BW-bandwidth; Channel Guard-channel protection; Demodulation Window-demodulation window; PHY Samples-physical layer sampling; CH-channel; SF-spreading factor; Peakheight-peak height; Peak-peak; Window number-window number; recover-recovery; Symbol-symbol; Abs-absolute value; FFT-fast Fourier transform; Win-window. DETAILED DESCRIPTION

[0013] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that the relative arrangement of components and steps, numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present invention unless otherwise specifically stated.

[0014] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.

[0015] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered part of the specification.

[0016] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0017] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0018] In order to be able to efficiently and accurately detect conflicting data packets when multiple logical channels overlap, the present invention provides a novel logical channel LoRa data packet detection method based on fine-grained window sliding. In general, the method includes: detecting data packets from multiple logical channels at the same time under poor channel conditions; detecting by decomposing data packets to achieve detection of data packets from multiple logical channels; reconstructing distorted frequency domain features using fine-grained window offsets and LoRa preamble code structures, and using a larger demodulation window to include the entire LoRa symbol, so that the energy of the entire LoRa symbol is concentrated in a single FFT bin (fast Fourier transform frequency unit), thereby ensuring the best despreading effect. In addition, in order to enhance the performance under poor channel conditions, three algorithms are further proposed to accurately extract frequency domain features to ensure the accuracy of data packet detection.

[0019] Specifically, combined Figure 2 and Figure 3 As shown, the provided LoRa logical channel data packet detection method based on fine-grained window sliding includes the following steps: Step S1, for the received data packet, by tracking the change pattern of multiple peaks in a continuous time window, extracting the peak from the same symbol, by matching the peaks of each symbol, generating a corresponding peak sequence, and obtaining multiple peak sequences.

[0020] Step S1 is used to achieve symbol peak matching by tracking the change pattern of multiple peaks in a continuous window and extracting peaks from the same symbol to form a peak sequence.

[0021] For example, during the demodulation window sliding process, the peak information in each round of FFT is recorded, including the index, value, and window number. The peaks are grouped into the same peak sequence until there are no more peaks in the FFT result.

[0022] Specifically, combined Figure 4 , Figure 5 and Figure 6 As shown in the figure, during the fine-grained sliding process of the demodulation window, the {index, value and window number} of each peak in the FFT result is recorded, and then the phase difference in the continuous demodulation window is tracked. The peaks of the signal are detected and grouped into the same peak sequence. In each round of FFT, a new peak sequence is continuously created or the existing peak sequence is updated until there are no more peaks in the FFT result. For example, the demodulation window size is set to the window size that matches the maximum symbol duration (i.e., the duration corresponding to the symbol of SF=12), and the bandwidth size is the maximum bandwidth of the LoRa symbol, i.e., 500KHz, so that all symbols to be detected can be included in the demodulation window, thereby realizing random detection of the signal. Step S2, identifying the features of the same data packet in the frequency domain and the time domain, and obtaining a matching peak sequence by matching multiple peak sequences.

[0023] Step S2 is used to implement peak sequence matching, identify robust features of the same data packet in the frequency domain and time domain, and match multiple peak sequences.

[0024] Specifically, adjacent peak sequences are matched by the following features. The peak sequences of the adjacent basic uplink linear frequency modulation pulses of the same data packet satisfy the following features: the peaks at the same position should have the same index; the peak difference conforms to a rule, that is, the difference between the values ​​of the peaks at the same position conforms to a specific rule; the peak height pattern is consistent, that is, the heights of all peaks in the sequence should follow the same pattern. Based on the above three features, multiple peak sequences can be matched. For example, when more than six peak sequences are assigned to the same data packet, it is considered that the data packet has been successfully detected.

[0025] Step S3, using the matched peak sequence, by combining the characteristics of multiple peak sequences, extracting the LoRa parameters of the data packet.

[0026] Step S3 is used to extract LoRa parameters after detecting a data packet, for example, by using a matching peak sequence and combining multiple peak sequences to calculate the LoRa parameters of the data packet, such as SF (spreading factor) and BW (bandwidth).

[0027] The traditional method demodulates through pulses with the same symbol duration, while the present invention selects the pulse with the longest duration, thereby improving LoRa parameter extraction and solving the problem caused by the difference in symbol duration.

[0028] Specifically, after a data packet is detected, for subsequent decoding operations, it is necessary to further analyze the LoRa parameters of the data packet, including SF and BW, etc. The traditional data packet detection method only needs to use the basic downlink linear frequency modulation pulse with the same symbol duration as the target detection packet as the demodulation window. Once the data packet is detected, the SF and BW of the basic downlink linear frequency modulation pulse are the SF and BW of the data packet. However, in one embodiment of the present invention, the basic downlink linear frequency modulation pulse with the maximum symbol duration is always used to detect the data packet, which brings new problems. Therefore, further, a novel method is adopted to extract the LoRa parameters, that is, symbols with different LoRa parameters have different durations, resulting in significant differences in the time that the entire symbol remains in the demodulation window during the sliding process.

[0029] Step S4, aligning the demodulation window in the frequency domain and the time domain, and evaluating the carrier frequency offset of each data packet.

[0030] Step S4 is used to implement window alignment and frequency evaluation. To facilitate direct decoding by the decoder, the demodulation window is aligned in the frequency domain and the time domain, and the carrier frequency offset of each data packet is calculated.

[0031] Considering that the preamble may be affected by noise under low signal-to-noise ratio conditions, in one embodiment, it is proposed to perform refined carrier frequency offset (CFO) estimation through the preamble, use a demodulation window consistent with the symbol duration for precise locking, and finally calculate the CFO.

[0032] Specifically, the main function of the preamble in a LoRa packet is to detect the packet and align the demodulation window before decoding the payload. However, under low signal-to-noise ratio channel conditions, the preamble may be affected by noise, which brings many practical challenges. For example, the received signal may contain multiple LoRa packets, which present complex characteristics, mainly manifested in the following aspects: 1) Heterogeneity of center frequency: the received signal may contain LoRa packets from different center frequencies; 2) Time asynchrony: the time at which these LoRa packets arrive at the gateway is significantly different; 3) Diversity of carrier frequency offset: each LoRa packet comes from a different LoRa node. The unique hardware defects of different LoRa nodes, coupled with the different paths to the gateway, cause each LoRa packet to exhibit its own unique carrier frequency offset. The present invention proposes an innovative method for fine-grained CFO (carrier frequency offset) estimation using the preamble, which is based on the following key insights: the fractional bin offset ( ) will cause peak attenuation because the Dirichlet sidelobes are mistaken for peaks and the true peaks are ignored. Therefore, another round of de-frequency modulation is performed after the coarse alignment and calibration is completed. In this round, a demodulation window consistent with the symbol duration of the data packet is used, and zero padding is applied to the FFT operation to accurately lock to the true peak. Finally, the fractional part of the peak generated by the frequency modulation on each reference is extracted and averaged to determine the CFO. Among them, the coarse calibration stage, for example, mainly uses the preamble peak sequence information extracted from the continuous demodulation window to perform window alignment and approximate frequency deviation compensation. At this stage, by analyzing the FFT peaks generated by the same symbol in multiple windows, the integer level offset of the window and the preliminary value of the center frequency can be estimated. Subsequently, in the fine calibration stage, the characteristics of the preamble and SFD are used to further refine and compensate for the frequency deviation, thereby obtaining a more accurate frequency alignment.

[0033] In summary, the present invention realizes cross-logical channel data packet detection without prior knowledge through processes such as symbol peak matching, peak sequence matching, LoRa parameter extraction, window alignment and frequency evaluation, and the detailed parameters of the obtained data packet are used for subsequent demodulation and decoding.

[0034] Furthermore, in order to enhance the reliability of packet detection, three anti-interference algorithms are designed.

[0035] 1) Peak return For example, review the FFT results of the previous few windows, compare the heights and indices of the peaks, perform cross-window matching, and restore the peak sequence.

[0036] See also Figure 7 and Figure 8 As shown in the figure, since the LoRa symbols from the same data packet have similar peak heights and each peak index follows the same pattern, we can review the FFT results of the previous window and compare the peak heights and indices to perform cross-window matching. Finally, we combine multiple FFT results together and fit the sequence between them to restore the actual peak sequence. The number of windows reviewed can be determined according to actual needs or simulation.

[0037] 2) Dynamic constraints on peak matching In one embodiment, the dynamic constraint of the peak matching dynamically adjusts the matching interval according to the peak energy ratio to improve the matching success rate.

[0038] The peak matching process is based on the specific difference between the peak indexes of the FFT results of two consecutive demodulation windows. However, under low signal-to-noise ratio conditions, the peak index is very fragile and easily offset, resulting in matching failure. Therefore, the energy ratio of this peak can be calculated first, that is, the ratio of the height of the peak to the sum of the heights of other bins. According to the difference in the peak energy ratio, the range of the peak index matching can be dynamically adjusted to improve the success rate of peak tracking.

[0039] Specifically, in the dynamic constraints of peak matching, the energy ratio of each FFT peak (i.e., the ratio of the peak to the sum of the energies of all other peaks) is first calculated to measure the reliability of the peak. If the energy ratio of a peak is low, it means that the peak is weak and easily affected by noise. At this time, the constraints can be relaxed, that is, a larger index deviation is allowed when matching in continuous windows; if the energy ratio is high, it means that the peak is strong, then the matching peak index must be closer to the ideal value, that is, the allowed matching range is narrower. In other words, the lower the energy ratio, the larger the allowed peak index matching interval, and the higher the energy ratio, the smaller the matching interval. This can improve the success rate of peak tracking under low SNR conditions while taking into account the accuracy of matching.

[0040] 3) Iterative peak extraction based on dynamic threshold For example, a dynamic threshold is defined and peaks are extracted iteratively until no peak exceeds the threshold.

[0041] Specifically, the maximum peak value in the FFT result is first determined, and a dynamic threshold is defined, which is related to the mean and variance of the FFT result. For example, the dynamic threshold Defined as the mean M of the FFT result plus 4 times the variance ,Right now This means that in each iteration, the mean and variance of the current FFT result are calculated first, and then the formula is used A threshold is set to determine whether there is a sufficiently significant peak to be extracted, and the threshold is updated after the peak is extracted. During each iteration of peak extraction, if the maximum value obtained in this round exceeds the threshold, it is identified as a peak, and then this peak and the surrounding peaks are deleted from the FFT result, and the threshold is recalculated and updated for the next round of peak extraction. This process is iterated until there is no maximum value greater than the threshold.

[0042] In summary, the present invention provides a novel LoRa packet detection method, which can simultaneously detect packets from multiple logical channels under poor channel conditions; uses fine-grained window offset and LoRa preamble structure to reconstruct distorted frequency domain features, and uses a larger demodulation window to include the entire LoRa symbol, so that the energy of the entire LoRa symbol is concentrated in a single FFT bin, ensuring a better despreading effect. In addition, in order to enhance the performance under poor channel conditions, a variety of anti-interference algorithms are designed to accurately extract frequency domain features, effectively improving the accuracy of packet detection.

[0043] The present invention may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present invention.

[0044] Computer readable storage medium can be a tangible device that can hold and store instructions used by an instruction execution device. Computer readable storage medium can be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a convex structure in a groove on which instructions are stored, and any suitable combination thereof. The computer readable storage medium used here is not interpreted as a transient signal itself, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated by a waveguide or other transmission medium (for example, a light pulse by an optical fiber cable), or an electrical signal transmitted by a wire.

[0045] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0046] The computer program instructions for performing the operation of the present invention may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, Python, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer, as a separate software package, partially on the user's computer, partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect through the Internet). In some embodiments, by using the state information of the computer-readable program instructions to personalize an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), the electronic circuit may execute the computer-readable program instructions, thereby implementing various aspects of the present invention.

[0047] Various aspects of the present invention are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to embodiments of the present invention. It should be understood that each box of the flowchart and / or block diagram and the combination of the boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0048] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0049] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0050] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to multiple embodiments of the present invention. In this regard, each box in the flow chart or block diagram can represent a part of a module, a program segment or an instruction, and a part of the module, a program segment or an instruction contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the specified function or action, or can be implemented by a combination of dedicated hardware and computer instructions. It is well known to those skilled in the art that it is equivalent to implement it by hardware, implement it by software, and implement it by combining software and hardware.

[0051] Embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the marketplace, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein. The scope of the present invention is defined by the appended claims.

Claims

1. A logical channel LoRa data packet detection method based on window sliding comprises the following steps: For the received data packets, the peak values ​​are extracted from the same symbol by tracking the change patterns of multiple peak values ​​in the continuous time window, and the corresponding peak value sequences are generated by matching the peak values ​​of each symbol to obtain multiple peak value sequences; In the frequency domain and the time domain, identifying features of the same data packet, and obtaining a matching peak sequence by matching the multiple peak sequences; Utilizing the matched peak sequence, and combining the characteristics of the plurality of peak sequences, extracting LoRa parameters of the data packet, including a spreading factor and a bandwidth; The demodulation window is aligned in the frequency and time domains, and the carrier frequency offset is estimated for each packet.

2. The method according to claim 1, characterized in that The multiple peak sequences are obtained according to the following steps: During the demodulation window sliding process, each peak information in the FFT result is recorded, and the peak information includes an index, a value and a window number; Peaks in consecutive demodulation windows that differ within a set threshold range are tracked and grouped into the same peak sequence.

3. The method according to claim 1, characterized in that The matched peak sequence satisfies the following characteristics: Peaks at the same position have the same index; The difference between the values ​​of the peaks at the same position conforms to the set rules; The heights of all peaks in a peak sequence follow the same pattern.

4. The method according to claim 1, characterized in that: In the process of extracting the LoRa parameters of the data packet, a downlink linear frequency modulation pulse with a maximum symbol duration is used to detect the data packet.

5. The method according to claim 1, characterized in that The evaluating the carrier frequency offset of each data packet comprises: After coarsely aligning and calibrating the data packet, a coarsely calibrated data packet is obtained; For the coarsely calibrated data packet, a demodulation window consistent with the symbol duration of the data packet is used, and zero padding is applied to the FFT operation to lock to the true peak; The fractional portion of the peak value produced by the frequency modulation on each reference is extracted and averaged to determine the carrier frequency offset.

6. The method according to claim 1, characterized in that In the process of matching the multiple peak sequences, cross-window matching is performed by reviewing the FFT results of a set number of previous windows and comparing the peak heights and indexes; then the multiple FFT results are combined together and the sequences between them are fitted to match the peak sequence.

7. The method according to claim 1, characterized in that Matching the multiple peak sequences includes: Calculating a peak energy ratio of a target peak, where the peak energy ratio is a ratio of a height of the target peak to a sum of heights of other frequency units; Based on the peak energy ratio, the interval range of the peak index matching is dynamically adjusted.

8. The method according to claim 1, characterized in that Matching the multiple peak sequences includes: Determine the maximum peak value in the FFT result and define a dynamic threshold value, the dynamic threshold value is related to the mean and variance of the FFT result; During each iteration of peak extraction, if the maximum value obtained in this round exceeds the dynamic threshold, it is identified as a peak, and then the peak and the surrounding peaks are deleted from the FFT result, and the dynamic threshold is recalculated and updated for the next round of peak extraction.

9. A computer-readable storage medium having a computer program stored thereon, wherein: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 8 are implemented.

10. A computer device comprising a memory and a processor, wherein a computer program capable of running on the processor is stored in the memory, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 8 are implemented.

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