Digital quantum voltmeter and voltage measuring method

By designing a digital quantum voltmeter, using quantum voltage reference devices, integrators, hysteresis comparators and controllers, the problem of traceability chain redundancy in the existing technology is solved, and high-precision and accurate voltage measurement are achieved.

CN120085058AActive Publication Date: 2025-06-03NATIONAL INSTITUTE OF METROLOGY CHINA
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Patent Information

Application Number
CN202510585046.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-05-08
Publication Date
2025-06-03
Estimated Expiration
2045-05-08

AI Technical Summary

Technical Problem

The existing digital voltmeter has redundant links in the traceability chain in electrical measurement, resulting in limited accuracy improvement and the inability to achieve zero traceability chain.

Method used

A digital quantum voltmeter is designed, including a quantum voltage reference device, an integrator, a hysteresis comparator and a controller, through which voltage measurements of the zero traceability chain are achieved.

Benefits of technology

It achieves high accuracy and accuracy of voltage measurement, avoids redundancy in traceability chains, and improves the overall accuracy of electrical measurements.

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Abstract

The invention discloses a digital quantum voltmeter and a voltage measurement method, and relates to the field of quantum electricity measurement, and the digital quantum voltmeter comprises a quantum voltage reference device, an integrator, a hysteresis comparator and a controller. The controller is connected with the output end of the hysteresis comparator and the input end of the quantum voltage reference device, and the controller is used for controlling the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; the input end of the integrator is connected with the output end of the detected voltage and the output end of the quantum voltage reference device. And the output end of the integrator is connected with the input end of the hysteresis comparator. According to the invention, a zero traceability chain can be realized, so that the voltage measurement accuracy is improved.
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Description

Technical Field

[0001] This application relates to the field of quantum electrical measurements, and particularly to a digital quantum voltmeter and a voltage measurement method. Background Art

[0002] A digital voltmeter is the core part of a digital multimeter. In the electromagnetic metrology traceability system, a high-precision digital voltmeter is an important link in the traceability chain from a standard voltage source to a voltage reference.

[0003] Currently, the highest digital voltmeter based on conventional electronic technology is 8.5 digits. Such an 8.5-digit multimeter is generally used as a secondary electrical metrology standard. In this context, the existence of redundant links in the quantity traceability chain of electrical measuring instruments has become a problem that needs to be further solved to improve the accuracy of electrical measurements. However, the current highest-precision digital multimeter also requires a traceability chain and cannot achieve a zero traceability chain. Summary of the Invention

[0004] The purpose of this application is to provide a digital quantum voltmeter and a voltage measurement method, which can achieve a zero traceability chain and thus improve the accuracy of voltage measurement.

[0005] To achieve the above purpose, this application provides the following solutions: In a first aspect, this application provides a digital quantum voltmeter, including: a quantum voltage reference device, an integrator, a hysteresis comparator, and a controller; the controller is respectively connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device, and the controller is used to control the polarity of the voltage output by the quantum voltage reference device according to the polarity of the voltage output by the hysteresis comparator; the input end of the integrator is respectively connected to the voltage to be measured and the output end of the quantum voltage reference device; the output end of the integrator is connected to the input end of the hysteresis comparator.

[0006] In an embodiment, the digital quantum voltmeter further includes: a quantum resistance reference device; the input end of the integrator is connected to the voltage to be measured and the output end of the quantum voltage reference device through the quantum resistance reference device.

[0007] In an embodiment, the digital quantum voltmeter further includes: a reference voltage buffer; the quantum resistance reference device and the output end of the quantum voltage reference device are connected through the reference voltage buffer.

[0008] In an embodiment, the digital quantum voltmeter further includes: an input voltage buffer; the quantum resistance reference device and the voltage to be measured are connected through the input voltage buffer.

[0009] In one embodiment, the digital quantum voltmeter further includes: a slope amplifier, and an output end of the integrator is connected to an input end of the hysteresis comparator through the slope amplifier.

[0010] In one embodiment, the digital quantum voltmeter further includes: a charge release circuit; an output end of the slope amplifier and an input end of the hysteresis comparator are both connected to a reference ground or an input end of the integrator through the charge release circuit.

[0011] In one embodiment, the quantum resistance reference device includes: a first quantized Hall resistance and a second quantized Hall resistance.

[0012] A first common end of the first quantized Hall resistance is connected to the voltage to be measured.

[0013] A first common end of the second quantized Hall resistance is connected to an output end of the quantum voltage reference device.

[0014] A second common end of the first quantized Hall resistance and a second common end of the second quantized Hall resistance are both connected to an input end of the integrator.

[0015] In one embodiment, the digital quantum voltmeter further includes: a first switch; an input end of the input voltage buffer is connected to the voltage to be measured and a reference ground through the first switch.

[0016] In a second aspect, the present application provides a voltage measurement method, which is applied to the digital quantum voltmeter provided above. The voltage measurement method includes: after a voltage to be measured is input into the digital quantum voltmeter described above, in M preset periods, a first control step is executed; the first control step is: controlling a polarity of a first preset value voltage output by the quantum voltage reference device according to a target voltage polarity in a first time period; controlling the quantum voltage reference device to output a zero voltage in a second time period; controlling the quantum voltage reference device to output a first preset value voltage having the same polarity as the voltage to be measured in a third time period; controlling the quantum voltage reference device to output a zero voltage in a fourth time period; the first time period, the second time period, the third time period, and the fourth time period form a preset period; a target voltage in an initial preset period is the voltage to be measured; a target voltage in other preset periods except the initial preset period is an output voltage of the hysteresis comparator at the last moment of the fourth time period in the previous preset period; a polarity of the first preset value voltage output by the quantum voltage reference device in the first time period in the initial preset period is opposite to the target voltage, and a polarity of the first preset value voltage output by the quantum voltage reference device in the first time period in other preset periods except the initial preset period is the same as or opposite to the target voltage; M is an integer greater than 1.

[0017] Control the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any moment before the end of the Mth preset period.

[0018] Execute the second control step within n clock cycles; the second control step is: read the polarity of the output voltage of the hysteresis comparator in real time. When the polarity of the output voltage of the hysteresis comparator deflects at the tth moment, determine the duration of the output voltage of the quantum voltage reference device within the current period at the (t + d)th moment, and determine the output voltage of the quantum voltage reference device in the next clock cycle according to the output voltage of the quantum voltage reference device within the current clock cycle; n is an integer greater than 1.

[0019] Calculate the conversion voltage according to the length of the first time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle, and obtain the conversion voltage of the voltage to be measured.

[0020] Obtain the actual voltage of the voltage to be measured based on the conversion voltage of the voltage to be measured and the zero-voltage conversion voltage; the zero-voltage conversion voltage is obtained by converting the voltage to be measured into a zero voltage and inputting it into the above-mentioned digital quantum voltmeter.

[0021] In an embodiment, the specific determination process of the zero-voltage conversion voltage is as follows: after inputting a zero voltage into the above-mentioned digital quantum voltmeter, execute the first control step in M preset periods.

[0022] Control the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any moment before the end of the Mth preset period.

[0023] Execute the second control step within n clock cycles.

[0024] Calculate the conversion voltage according to the length of the second time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle, and obtain the zero-voltage conversion voltage.

[0025] According to the specific embodiments provided by the present application, the present application has the following technical effects: the present application provides a digital quantum voltmeter and a voltage measurement method. Compared with the physical reference, the quantum metrology reference has obvious advantages. First, the macroscopic quantum effect and physical constant exist objectively and will not disappear or change due to the damage of a physical carrier, thereby improving the stability and continuity of the preservation of the value of the basic unit of the International System of Units. Second, the quantum metrology reference can be reproduced at any time and place by appropriate physical technology. Relying on the quantum metrology reference, the pyramid-shaped metrology mode that relied on the physical reference to be transmitted step by step in the past can be changed, and it is expected to overcome the problems of step-by-step degradation of measurement capability, periodic calibration of measuring instruments, and difficulty in tracing measurement results under special environments, thereby realizing the flattening of the traceability link of value transmission and the one-step measurement accuracy. In the related art, there are two ways to implement the quantum reference: one is a quantum voltage standard device based on the Josephson effect to reproduce the voltage unit "volt", and the other is a quantum resistance standard device based on the quantized Hall effect to reproduce the resistance unit "ampere". In general, the measuring instrument or measuring instrument needs to be traced back to the quantum reference step by step. Taking the traceability chain of the current highest-precision digital multimeter as an example, it is also necessary to use a quantum voltage standard device to periodically verify or calibrate it so that it can be traced within the verification period. This is the shortest traceability chain under normal circumstances, but a traceability chain is also required. By setting up a quantum voltage reference device, the present application can avoid the problem of requiring additional periodic verification or calibration by a quantum voltage standard device in the related art, so that it can be traced within the verification period, realizing a zero traceability chain and thus improving the accuracy of voltage measurement. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0027] Figure 1 A schematic diagram of the structure of a digital quantum voltmeter provided in one embodiment of the present application.

[0028] Figure 2 This is a schematic diagram of the single-pole double-throw switch structure.

[0029] Figure 3 A schematic diagram of a quantized Hall resistor connection method provided in one embodiment of the present application.

[0030] Figure 4 This is a timing diagram of the first control step in the voltage measurement method provided in one embodiment of the present application.

[0031] Figure 5 This is the timing diagram of the second control step in the voltage measurement method provided by an embodiment of the present application.

[0032] Reference numerals: First switch - S1, Josephson junction array chip - JJA, input voltage buffer - A1, reference voltage buffer - A2, first cryogenic environment container - 1, second cryogenic environment container - 2, first quantum Hall resistance - R H1 , second quantum Hall resistance - R H2 , second switch - S2, first operational amplifier - A3, second operational amplifier - A4, basic comparator - A5, integrating capacitor - C int , first resistor - R1, second resistor - R2, third resistor - R3, fourth resistor - R4, fifth resistor - R5, sixth resistor - R6, first diode - D1, second diode - D2, negative voltage - V-. Detailed implementation manners

[0033] Next, the technical solutions in the embodiments of the present application will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0034] To make the above objects, features, and advantages of the present application more obvious and understandable, the present application will be further described in detail below in conjunction with the accompanying drawings and specific implementation manners.

[0035] In an exemplary embodiment, as Figure 1 shown, a digital quantum voltmeter is provided, including: a quantum voltage reference device, an integrator, a hysteresis comparator, and a controller; the controller is respectively connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device, and the controller is configured to control the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; the input end of the integrator is respectively connected to the voltage to be measured and the output end of the quantum voltage reference device; the output end of the integrator is connected to the input end of the hysteresis comparator.

[0036] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a clock module, a communication module, and a human-machine interaction module connected to the controller. Specifically, the output end of the clock module is connected to the input end of the controller to provide a clock reference for timing calculation. The human-machine interaction module and the communication module are connected to the controller through an optical isolation module. The communication module is used for data interaction with other devices, and the operator performs data interaction with the controller through the human-machine interaction module. In practical applications, the controller is an FPGA controller.

[0037] In another exemplary embodiment of the present application, the quantum voltage reference device includes: a quantum voltage driver, a microwave source, a Josephson junction array chip JJA, and a first cryogenic environment container 1; the output end of the controller is connected to the input end of the quantum voltage driver, which is used to set the polarity and specific value of the output voltage of the quantum voltage reference device. The output ends of the quantum voltage driver and the microwave source are both connected to the input end of the Josephson junction array chip, and the Josephson junction array chip is arranged in the first cryogenic environment container 1. The quantum voltage reference device can be a Programmable Josephson Voltage Standard (PJVS) or a Josephson Arbitrary Waveform Synthesizer (JAWS), and the quantum voltage driver can be a PJVS quantum voltage driver or a JAWS quantum voltage driver.

[0038] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a quantum resistance reference device; the input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device through the quantum resistance reference device.

[0039] In another exemplary embodiment of the present application, the quantum resistance reference device includes: a first quantum Hall resistance R H1 and a second quantum Hall resistance R H2 ; the first common end of the first quantum Hall resistance R H1 is connected to the measured voltage. The first common end of the second quantum Hall resistance R H2 is connected to the output end of the quantum voltage reference device. The second common end of the first quantum Hall resistance R H1 and the second common end of the second quantum Hall resistance R H2 are both connected to the input end of the integrator.

[0040] In another exemplary embodiment of the present application, as Figure 3 shown, the first quantum Hall resistance R H1The first common terminal of is the first quantum Hall resistance R H1 formed by short - circuiting the first current electrode of and a plurality of voltage electrodes adjacent to it clockwise to a point; the second quantum Hall resistance R H2 The first common terminal of is the second quantum Hall resistance R H2 formed by short - circuiting the first current electrode of and a plurality of voltage electrodes adjacent to it clockwise to a point; the first quantum Hall resistance R H1 The second common terminal of is the first quantum Hall resistance R H1 formed by short - circuiting the second current electrode of and a plurality of voltage electrodes adjacent to it clockwise to a point; the second quantum Hall resistance R H2 The second common terminal of is the second quantum Hall resistance R H2 formed by short - circuiting the second current electrode of and a plurality of voltage electrodes adjacent to it clockwise to a point.

[0041] The reason for the above design is as follows: The usage state of the quantum Hall resistance must strictly meet the four - terminal definition to completely avoid the error introduced by its leads. When the multiple V / I branches of the integrator are summed at the inverting input terminal of the reference voltage buffer A2, the four - terminal definition of the resistor cannot be satisfied (that is, all the current passing through the resistor flows through the current lead, and no current passes through the voltage lead). By adopting the above connection method, according to the Ricketts - Kemeny model of the quantum Hall resistance, the relationship between the single - terminal lead current, lead resistance, and the equivalent resistance between AB terminals is specifically formula (1).

[0042] (1).

[0043] In the formula, I f , I s , I t are the currents of the three lead branches respectively; ε f , ε s , ε t are the relative values of the resistances of the three lead branches to the quantum Hall resistance ( R H / 2); R AB is the resistance between AB nodes; I is the total current flowing into the node.

[0044] Further derivation from formula (1) gives: (2). Where V AB is the voltage between AB nodes, denotes high-order error terms that can be ignored. Equation (2) shows that if the relative value of the lead resistance to the quantum Hall resistance ( R H / 2) is of the order of 10 -4 , then Figure 3 the equivalent resistance R of the connection shown AB is much smaller than the quantum Hall resistance R H and the introduced error is of the order of 10 -12 which can be completely ignored. The above is the analysis of the case where two voltage electrodes are connected to the current electrode. In fact, three adjacent voltage electrodes can also be connected to the current electrode, which can further reduce the lead resistance error.

[0045] In another exemplary embodiment of the present application, the quantum resistance reference device further includes: a second low-temperature environmental container 2; a first quantized Hall resistance R H1 and a second quantized Hall resistance R H2 are arranged in the second low-temperature environmental container 2. Among them, the first low-temperature environmental container 1 and the second low-temperature environmental container 2 can be set to the same low temperature of 4.2K, or different low-temperature temperatures can be selected according to the differences in the types of devices used. Since the magnetic field environments required for the Josephson junction array and the quantized Hall resistance to work are different, the first low-temperature environmental container 1 and the second low-temperature environmental container 2 cannot be combined.

[0046] In another exemplary embodiment of the present application, the integrator includes: a first operational amplifier A3 and an integration capacitor C int . The second common terminal of the first quantized Hall resistance R H1 and the second common terminal of the second quantized Hall resistance R H2 are both connected to the inverting input terminal of the first operational amplifier A3 and the input terminal of the integration capacitor C int in the integrator; the non-inverting input terminal of the first operational amplifier A3 is connected to the reference ground, and the output terminal of the first operational amplifier A3 is connected to the output terminal of the integration capacitor C int . The first operational amplifier A3 should be a high-input-impedance, low-noise type amplifier such as LT1001. The integration capacitor C int should be a low-temperature-drift, low-temperature-coefficient capacitor, such as a polystyrene capacitor.

[0047] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: an input voltage buffer A1; the quantum resistance reference device is connected to the voltage to be measured through the input voltage buffer A1. Specifically, the non-inverting input terminal of the input buffer A1 is connected to the voltage to be measured, and the inverting input terminal and the output terminal of the input buffer A1 are both connected to the first quantized Hall resistance R H1is connected to the first common terminal. In practical applications, the input buffer A1 can generally be constructed by an operational amplifier with unity-gain stability. The purpose of setting the input buffer A1 is to achieve impedance matching. Specifically, it increases the input impedance of the subsequent stage relative to the measured voltage and reduces the output impedance of the previous stage relative to the first quantum Hall resistance.

[0048] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a first switch S1; the input terminal of the input voltage buffer A1 is connected to the measured voltage and the reference ground through the first switch S1. Specifically, the first switch S1 can be a single-pole double-throw switch, and the input terminal of the measured voltage is connected to the non-inverting input terminal of the input buffer A1 through the single-pole double-throw switch. The purpose of setting this switch is to eliminate the measurement errors caused by the offset voltage, thermoelectric potential, etc. in the circuit during the measurement process. During the measurement, the measured voltage and the reference ground potential are respectively connected to the subsequent circuit through the first switch S1, measured and read respectively, and the two readings are subtracted to eliminate the measurement errors caused by the offset voltage, thermoelectric potential, etc.

[0049] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a reference voltage buffer A2; the output terminals of the quantum resistance reference device and the quantum voltage reference device are connected through the reference voltage buffer A2. Specifically, the output terminal of the quantum voltage reference device is connected to the non-inverting input terminal of the reference voltage buffer A2, and the inverting input terminal and the output terminal of the reference voltage buffer A2 are both connected to the first common terminal of the second quantization Hall resistance R H2 is connected.

[0050] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a slope amplifier, the output terminal of the integrator is connected to the input terminal of the hysteresis comparator through the slope amplifier, and the slope amplifier makes the hysteresis comparator more sensitive to the polarity judgment of the output voltage of the integrator.

[0051] In another exemplary embodiment of the present application, the slope amplifier includes: a second operational amplifier A4, a first resistor R1, a second resistor R2, a first diode D1, and a second diode D2. The non-inverting input terminal of the second operational amplifier A4 is connected to the output terminal of the first operational amplifier A3. The inverting input terminal of the second operational amplifier A4 is connected to the reference ground through the second resistor R2. The first resistor R1, the first diode D1, and the second diode D2 are connected in parallel between the inverting input terminal and the output terminal of the second operational amplifier A4, wherein the first diode D1 and the second diode D2 are arranged in opposite polarities. The function of the slope amplifier is that when the output voltage of the integrator is within the ±0.7V voltage limit determined by the first diode D1 and the second diode D2, it will be amplified by the amplification factor determined by the second resistor R2 and the first resistor R1, thereby improving the resolution of the hysteresis comparator for discriminating the output voltage of the integrator. When the output voltage of the integrator exceeds the ±0.7V voltage limit determined by the first diode D1 and the second diode D2, the amplification factor is approximately 1 to avoid saturation.

[0052] In another exemplary embodiment of the present application, the digital quantum voltmeter further includes: a charge release circuit; the output terminal of the slope amplifier and the input terminal of the hysteresis comparator are both connected to the reference ground or the input terminal of the integrator through the charge release circuit.

[0053] In another exemplary embodiment of the present application, the charge release circuit includes: a second switch S2 and a fifth resistor R5. One end of the fifth resistor R5 is respectively connected to the input terminal of the integration capacitor C int and the reference ground through the second switch S2; the other end of the fifth resistor R5 is connected to the output terminal of the slope amplifier, specifically: connected to the output terminal of the second operational amplifier A4, one end of the first resistor R1, the output terminal of the second diode D2, and the input terminal of the first diode D1. When the device is in a non-measurement state, the second switch S2 can connect the input terminal of the integration capacitor C int to the output terminal of the slope amplifier, thereby avoiding integrator saturation.

[0054] In another exemplary embodiment of the present application, the first switch S1 and the second switch S2 are single-pole double-throw switches and have the same structure. As Figure 2 shown, the single-pole double-throw switch is composed of 2 semiconductor switch tubes; one pole of the 2 semiconductor switch tubes serves as input terminal 1 and input terminal 2 respectively, and the other pole of the 2 semiconductor switch tubes is connected as the output terminal; the control signals of the two semiconductor switch tubes are complementary signals; the semiconductor switch can be a MOSFET, a JFET, or an integrated analog switch.

[0055] In another exemplary embodiment of the present application, the hysteresis comparator includes: a basic comparator A5, a third resistor R3, a fourth resistor R4, and a sixth resistor R6; wherein the fourth resistor R4 and the sixth resistor R6 divide the negative voltage V−, and the voltage division point is connected to the non-inverting input terminal of the basic comparator A5. The voltage division point is simultaneously connected to the output terminal of the basic comparator A5 through the third resistor R3. One end of the sixth resistor R6 is connected to the negative voltage V−, and the other end of the sixth resistor R6 is connected to the non-inverting input terminal of the basic comparator A5, one end of the third resistor R3, and one end of the fourth resistor R4. The other end of the fourth resistor R4 is connected to the reference ground. The other end of the third resistor R3 is connected to the output terminal of the basic comparator A5 and the input terminal of the controller. The inverting input terminal of the basic comparator A5 is connected to the output terminal of the second operational amplifier A4. The use of a hysteresis comparator can avoid the oscillation of a general comparator near the zero crossing point.

[0056] The present application directly traces the voltage measurement result to the electrical quantum reference, which can shorten the voltage traceability chain and greatly improve the measurement accuracy, and solve the problem of directly tracing the high-precision voltage measurement to the quantum reference.

[0057] The embodiment of the present application further provides a voltage measurement method applied to the above digital quantum voltmeter. The voltage measurement method is executed by a controller and specifically includes the following steps.

[0058] Step 101: When the voltage to be measured is input into the above digital quantum voltmeter, the first control step is executed under M preset cycles; the first control step is: controlling the polarity of the first preset value voltage output by the quantum voltage reference device according to the target voltage polarity in the first time period; controlling the quantum voltage reference device to output zero voltage in the second time period; controlling the quantum voltage reference device to output the first preset value voltage with the same polarity as the voltage to be measured in the third time period; controlling the quantum voltage reference device to output zero voltage in the fourth time period; the first time period, the second time period, the third time period, and the fourth time period form a preset cycle; the target voltage is the voltage to be measured in the initial preset cycle; the target voltage in other preset cycles except the initial preset cycle is the output voltage of the hysteresis comparator at the last moment of the fourth time period in the previous preset cycle; the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period in the initial preset cycle is opposite to the target voltage, and the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period in other preset cycles except the initial preset cycle is the same as or opposite to the target voltage; M is an integer greater than 1.

[0059] Step 102: Control the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any moment before the end of the Mth preset period. The polarity of the output voltage of the quantum voltage reference device remains unchanged in the subsequent time period, and the following steps are executed within the clock cycles in the subsequent time period.

[0060] Step 103: Execute the second control step within n clock cycles; the second control step is: Read the polarity of the output voltage of the hysteresis comparator in real time. When the polarity of the output voltage of the hysteresis comparator deflects at the t-th moment, determine the duration of the output voltage of the quantum voltage reference device in the current period at the (t + d)-th moment, and determine the output voltage of the quantum voltage reference device in the next clock cycle according to the output voltage of the quantum voltage reference device in the current clock cycle; n is an integer greater than 1.

[0061] Step 104: Calculate the conversion voltage according to the length of the first time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle, and obtain the conversion voltage of the voltage to be measured.

[0062] Step 105: Obtain the actual voltage of the voltage to be measured based on the conversion voltage of the voltage to be measured and the zero-voltage conversion voltage; the zero-voltage conversion voltage is obtained by converting the voltage to be measured into a zero voltage and inputting it into the above-mentioned digital quantum voltmeter.

[0063] In an exemplary embodiment, the specific determination process of the zero-voltage conversion voltage is as follows.

[0064] Step 201: After inputting a zero voltage into the above-mentioned digital quantum voltmeter, execute the first control step in M preset periods.

[0065] Step 202: Control the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any moment before the end of the Mth preset period.

[0066] Step 203: Execute the second control step within n clock cycles.

[0067] Step 204: Calculate the conversion voltage according to the length of the second time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle, and obtain the zero-voltage conversion voltage.

[0068] In an exemplary embodiment, Step 101 specifically includes: Step 1-1: Synchronously execute the following actions, switch the first switch S1 to the voltage to be measured, so that the voltage to be measured passes through the input voltage buffer A1 and then passes through the first quantum Hall resistor R H1Generate an integration current; switch the second switch S2 to the reference ground to make the integrator start working; set the polarity of the output voltage of the quantum voltage reference device in the first stage to be opposite to the polarity of the measured input voltage and the voltage value to be V R , and under the drive of the quantum voltage driver and the microwave power supply, output the set voltage above. After passing through the reference voltage buffer A2, generate another integration current on the second quantum Hall resistor R H2 .

[0069] As Figure 4 shown, steps 1-2: In the first preset period, execute in 4 stages, namely the above-mentioned four time periods: In the first stage, the quantum voltage reference device outputs the voltage set in the previous step, and this time period is denoted as Δtm1; in the second stage, the quantum voltage reference device outputs zero voltage, and this time period is denoted as Δt m2 ; in the third stage, the quantum voltage reference device outputs a voltage with the same amplitude as the first stage but opposite in polarity, and this time period is denoted as Δt m3 ; in the fourth stage, the quantum voltage reference device outputs zero voltage, and this time period is denoted as Δt m4 . Before the end of Δt m4 , read the polarity of the output voltage of the hysteresis comparator, and preset the polarity of the output voltage of the quantum voltage reference device in the next preset period according to the output polarity of the hysteresis comparator. Specifically: If the inverting input terminal of the basic comparator A5 is connected to the output terminal of the second operational amplifier A4, and the non-inverting input terminal of the basic comparator A5 is connected to the other end of the sixth resistor R6, one end of the third resistor R3, and one end of the fourth resistor R4, then preset the polarity of the output voltage of the quantum voltage reference device in the next preset period to be opposite to the polarity of the read output voltage of the hysteresis comparator; If the non-inverting input terminal of the basic comparator A5 is connected to the output terminal of the second operational amplifier A4, and the inverting input terminal of the basic comparator A5 is connected to the other end of the sixth resistor R6, one end of the third resistor R3, and one end of the fourth resistor R4, then preset the polarity of the output voltage of the quantum voltage reference device in the next preset period to be the same as the polarity of the read output voltage of the hysteresis comparator.

[0070] Step 1-3: Repeat step 1-2 for M times.

[0071] In an exemplary embodiment, as Figure 5 in the preRD stage, step 102 is specifically: Step 1-4: Read the output polarity of the hysteresis comparator obtained before the end of the last preset period, and regulate the polarity of the output voltage of the quantum voltage reference device at the end of the last preset period according to the output polarity of the hysteresis comparator, so that the output voltage of the integrator changes in the direction that drives the change of the hysteresis comparator polarity in the next stage; the output voltage of the quantum voltage reference device in this stage is denoted as V Rn .

[0072] In an exemplary embodiment, in the RD stage as described in Figure 5 , step 103 specifically includes: Steps 1-5: Read the output voltage polarity of the hysteresis comparator within each clock cycle. When the output voltage polarity of the hysteresis comparator flips, after delaying for d clock cycles, record the duration of the output voltage of the quantum voltage reference device within the current clock cycle, and calculate the output voltage of the quantum voltage reference device for the next clock cycle according to the formula and control the quantum voltage reference device to change the output voltage for the next clock cycle, where V R(i) represents the output voltage of the quantum voltage reference device in the i-th clock cycle, n and B are positive integers greater than 1 and have no practical meaning; the initial value of i is n.

[0073] Step 1-6: Repeat Step 1-5 and decrease i by 1 each time until i = 1.

[0074] In an exemplary embodiment, step 104 specifically includes: Step 1-7: Switch the second switch S2 of the charge release device to the input terminal of the integration capacitor C int to stop integration and release the residual charge of the integrator. At the same time, calculate the conversion voltage according to the formula to obtain the conversion voltage of the voltage to be measured, where t i represents the duration of the output voltage of the quantum voltage reference device in the i-th clock cycle, U in represents the conversion voltage, M + is the number of times the polarity of the quantum voltage output in the first stage is positive among M preset cycles, M _ is the number of times the polarity of the quantum voltage output in the first stage is negative among M preset cycles; the sum of M + and M - is M.

[0075] In an exemplary embodiment, step 105 is specifically: Subtract the zero voltage conversion voltage from the conversion voltage of the voltage to be measured to obtain the actual voltage of the voltage to be measured.

[0076] In an exemplary embodiment, before step 201, it further includes: Step 2-1: Synchronously perform the following actions, switch the switch S1 to the input reference ground, switch the second switch S2 to the reference ground, set the polarity of the output voltage of the quantum voltage reference device to be opposite to the polarity of the voltage to be measured, and the voltage value is V R .

[0077] In an exemplary embodiment, when selecting the parameters B and n, it should be ensured that V R0 is an integer multiple of the LSB of the output voltage of the quantum voltage reference device; when selecting d, it should be ensured that the output voltage V of the quantum voltage reference device R0The integrated voltage within the time period d is greater than the input noise limit of the hysteresis comparator; the preset period is based on the clock period provided by the clock module as the basic unit.

[0078] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0079] Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A digital quantum voltmeter, characterized in that: The digital quantum voltmeter comprises: Quantum voltage reference devices, integrators, hysteresis comparators and controllers; The controller is connected to the output end of the hysteresis comparator and the input end of the quantum voltage reference device respectively, and the controller is used to control the polarity of the output voltage of the quantum voltage reference device according to the polarity of the output voltage of the hysteresis comparator; The input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device respectively; the output end of the integrator is connected to the input end of the hysteresis comparator.

2. The digital quantum voltmeter according to claim 1, characterized in that: The digital quantum voltmeter also includes: a quantum resistance reference device; the input end of the integrator is connected to the measured voltage and the output end of the quantum voltage reference device through the quantum resistance reference device.

3. The digital quantum voltmeter according to claim 2, characterized in that: The digital quantum voltmeter further comprises: a reference voltage buffer; the output end of the quantum resistance reference device and the output end of the quantum voltage reference device are connected via the reference voltage buffer.

4. The digital quantum voltmeter according to claim 2, characterized in that: The digital quantum voltmeter further comprises: an input voltage buffer; the quantum resistance reference device is connected to the voltage to be measured via the input voltage buffer.

5. The digital quantum voltmeter according to claim 1, characterized in that: The digital quantum voltmeter further comprises: a slope amplifier, through which the output end of the integrator is connected to the input end of the hysteresis comparator.

6. The digital quantum voltmeter according to claim 5, characterized in that: The digital quantum voltmeter further comprises: a charge release circuit; the output end of the slope amplifier and the input end of the hysteresis comparator are both connected to a reference ground or an input end of an integrator through the charge release circuit.

7. The digital quantum voltmeter according to claim 2, characterized in that: The quantum resistance reference device comprises: a first quantized Hall resistor and a second quantized Hall resistor; The first common end of the first quantized Hall resistor is connected to the measured voltage; The first common end of the second quantized Hall resistor is connected to the output end of the quantum voltage reference device; The second common end of the first quantized Hall resistor and the second common end of the second quantized Hall resistor are both connected to the input end of the integrator.

8. The digital quantum voltmeter according to claim 4, characterized in that: The digital quantum voltmeter further comprises: a first switch; the input end of the input voltage buffer is connected to the measured voltage and the reference ground through the first switch.

9. A voltage measurement method, characterized in that: Applied to the digital quantum voltmeter described in claim 1, the voltage measurement method comprises: When the voltage to be measured is input into the digital quantum voltmeter described in claim 1, In M preset cycles, the first control step is performed; the first control step is: in the first time period, the polarity of the first preset value voltage output by the quantum voltage reference device is controlled according to the target voltage polarity; in the second time period, the quantum voltage reference device is controlled to output zero voltage; in the third time period, the quantum voltage reference device is controlled to output the first preset value voltage with the same polarity as the measured voltage; in the fourth time period, the quantum voltage reference device is controlled to output zero voltage; the first time period, the second time period, the third time period and the fourth time period constitute a preset cycle; in the initial preset cycle, the target voltage is the measured voltage; in other preset cycles except the initial preset cycle, the target voltage is the output voltage of the hysteresis comparator at the last moment of the fourth time period in the previous preset cycle; in the first time period in the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device is opposite to the target voltage, and in other preset cycles except the initial preset cycle, the polarity of the first preset value voltage output by the quantum voltage reference device in the first time period is the same as or opposite to the target voltage; M is an integer greater than 1; Controlling the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any time before the end of the Mth preset period; The second control step is performed in n clock cycles; the second control step is: reading the polarity of the output voltage of the hysteresis comparator in real time, and when the polarity of the output voltage of the hysteresis comparator deflects at the tth moment, determining the duration of the output voltage of the quantum voltage reference device in the current cycle at the t+dth moment, and determining the output voltage of the quantum voltage reference device in the next clock cycle according to the output voltage of the quantum voltage reference device in the current clock cycle; n is an integer greater than 1; Calculating the conversion voltage according to the length of the first time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain the voltage conversion voltage to be measured; The actual voltage of the voltage to be measured is obtained based on the voltage to be measured conversion voltage and the zero voltage conversion voltage; the zero voltage conversion voltage is obtained by converting the voltage to be measured into zero voltage and inputting it into the digital quantum voltmeter described in claim 1.

10. The voltage measurement method according to claim 9, characterized in that: The specific process of determining the zero voltage switching voltage is: When zero voltage is input into the digital quantum voltmeter of claim 1, In M preset cycles, the first control step is performed; Controlling the polarity of the output voltage of the quantum voltage reference device at the end of the Mth preset period according to the polarity of the output voltage of the hysteresis comparator at any time before the end of the Mth preset period; The second control step is executed in each of n clock cycles; The conversion voltage is calculated according to the length of the second time period, the length of the third time period, and the duration of the output voltage of the quantum voltage reference device in each clock cycle to obtain a zero voltage conversion voltage.

Citation Information

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