Digital trimming device and method based on compensation current temperature coefficient

Abstract

The invention provides a digital trimming device and method based on a compensation current temperature coefficient, relates to the technical field of operational amplifier trimming, and aims to enable an offset voltage of an operational amplifier to be accurately compensated and to have better temperature excursion through the temperature coefficient of an offset compensation current generated by the digital trimming device. The digital trimming device comprises a common-mode detection module, a digital logic control module, a fuse array module, a digital analog converter module and a total fuse switch module, wherein the common-mode detection module is configured to be capable of reducing the temperature coefficient of the reference current output to the digital analog converter module by the common-mode detection module by utilizing the negative temperature coefficient characteristic of triode base-emitter voltage, so that the influence of the temperature on the compensation current is reduced.

Description

Technical Field

[0001] The present disclosure relates to the technical field of operational amplifier trimming, and more specifically, to a digital trimming device and method based on the temperature coefficient of compensation current. Background Art

[0002] Operational amplifiers play a fundamental and crucial role in integrated circuits and are key components of the signal chain in the Internet of Things era. Their functions include operations such as amplifying, filtering, regulating, and converting signals, and they are widely used in the field of electronic circuits. The definition criteria for high-precision operational amplifiers are: the input offset voltage is less than 1 mV, and the temperature drift of the input offset voltage is less than 2 μV / °C. With the rapid development of integrated circuit technology, especially in related fields such as audio processing, communication engineering, and sensing technology, the demand for high-precision operational amplifiers has been on the rise.

[0003] For high-precision operational amplifiers, common trimming methods include wafer-level trimming and post-packaging trimming. Wafer-level trimming has the advantages of being able to process in batches and having simple trimming operations. However, its disadvantages are also relatively prominent, mainly manifested as the inability to trim the influence of packaging on the chip. In contrast, trimming after chip packaging can effectively eliminate the adverse effects of processes such as dicing and packaging on the offset voltage and reduce the overall offset voltage of the packaged chip.

[0004] In the design of operational amplifiers, in order to keep the input-stage transconductance relatively constant, it is necessary to generate a PTAT current (bias current) proportional to the absolute temperature to compensate for the performance degradation of the amplifier input-stage transconductance at high temperatures, thereby improving the amplifier gain-bandwidth product. However, since the PTAT current generated by the bias circuit will cause the compensation current generated by the DAC (digital-to-analog converter) to also be a PTAT current, it will cause a decrease in the compensation accuracy of the offset voltage and an increase in the temperature drift of the offset voltage in the full temperature range of -55°C to 125°C. Summary of the Invention

[0005] In view of this, the present disclosure provides a digital trimming device and method based on the temperature coefficient of compensation current, aiming to accurately compensate the offset voltage of the operational amplifier through the temperature coefficient of the offset compensation current generated by the digital trimming device, while also having a better temperature drift.

[0006] One aspect of the present disclosure provides a digital trimming device based on the temperature coefficient of the compensation current, which is applied to an operational amplifier. The device includes: a common-mode detection module for trimming the input differential pair transistors of the operational amplifier by detecting the level of the common-mode voltage currently input to the operational amplifier; a digital logic control module for controlling the fusing logic of the fuse according to the detection result of the common-mode detection module; a fuse array module for generating digital signals in different modes according to the control of the digital logic control module; a digital-to-analog converter module for converting the digital signals into compensation currents of a specific magnitude and delivering the compensation currents to the input differential pair transistors to compensate for current imbalance; a total fuse switch module for locking the trimming data by fusing the fuse after the trimming is completed; wherein the common-mode detection module is configured to utilize the negative temperature coefficient characteristic of the base-emitter voltage of the triode to reduce the temperature coefficient of the reference current output from the common-mode detection module to the digital-to-analog converter module, thereby reducing the influence of temperature on the compensation current.

[0007] According to an embodiment of the present disclosure, the input differential pair transistors of the operational amplifier include an N differential pair transistor and a P differential pair transistor. Among them, in response to the common-mode detection module detecting that the common-mode voltage is high, the N differential pair transistor is trimmed; in response to the common-mode detection module detecting that the common-mode voltage is low, the P differential pair transistor is trimmed.

[0008] According to an embodiment of the present disclosure, the common-mode detection module includes: a current mirror connected to an external bias circuit module for replicating the bias current provided by the bias circuit module, wherein the bias current has a positive temperature coefficient; a triode connected to the current mirror for utilizing the negative temperature coefficient characteristic of its own base-emitter voltage to convert the bias current replicated by the current mirror into a reference current with a better temperature coefficient and providing it to the digital-to-analog converter module, so that the compensation current output from the digital-to-analog converter module to the input differential pair transistors also has a better temperature coefficient; a resistor connected to the triode for adjusting the magnitude of the reference current.

[0009] According to an embodiment of the present disclosure, the collector current I c of the triode is configured as:

[0010]

[0011] wherein, I bias represents the bias current provided by the bias circuit module, V BE represents the base-emitter voltage of the triode, and R 1 represents the resistance value of the resistor.

[0012] According to an embodiment of the present disclosure, the reference current I ref output from the common-mode detection module to the digital-to-analog converter module is configured as:

[0013]

[0014] Among them, I B represents the base current of the triode.

[0015] According to an embodiment of the present disclosure, the fuse array module includes: a plurality of fuse units with the same structure, wherein the input signal of each fuse unit is controlled by the combinational logic of the digital logic control module.

[0016] According to an embodiment of the present disclosure, the fuse array module is configured with a pre-trimming mode and a fuse blowing mode. In the pre-trimming mode, the fuse array module generates a digital signal in an initial state where the fuse remains unfused; in the fuse blowing mode, the fuse array module generates a digital signal in a state where the fuse is blown.

[0017] According to an embodiment of the present disclosure, the total fuse switch module includes: a pair of N-type metal-oxide-semiconductor transistors for controlling whether the fuse is blown by adjusting the gate voltage; an inverter for feedback the blown state of the fuse; and a fuse resistor for adjusting the magnitude of the current flowing through the fuse.

[0018] Another aspect of the present disclosure provides a digital trimming method based on compensating the temperature coefficient of the current, which is applied to an operational amplifier. The method includes: testing the initial offset voltage of the operational amplifier and setting a trimming code according to the magnitude of the initial offset voltage; respectively trimming the initial offset voltage under high and low common-mode voltages according to the trimming code. In the pre-trimming stage, after each pre-trimming operation is completed, it is necessary to test whether the initial offset voltage meets the predetermined requirements. When the initial offset voltage meets the predetermined requirements, a fuse blowing operation is performed; in response to the completion of trimming, the total fuse switch is blown to lock the trimming data.

[0019] The digital trimming device and method based on compensating the temperature coefficient of the current provided by the embodiments of the present disclosure have at least the following beneficial effects:

[0020] The digital trimming device and method based on compensating the temperature coefficient of the current provided by the embodiments of the present disclosure detect the level of the current input common-mode voltage through the common-mode detection module to trim the input differential pair transistors (N differential pair transistors or P differential pair transistors). At the same time, in order to reduce the influence of the bias current on the compensated current temperature coefficient, the V of the triode is utilized. BE (the voltage between the base and the emitter) has the characteristic of negative temperature coefficient, which improves the temperature coefficient of the reference current output from the common-mode detection module to the DAC module, so that the compensated current of the DAC module for the input differential pair transistors has a lower temperature coefficient. Compared with the digital trimming circuit without temperature compensation design, the compensation accuracy of the offset voltage in the range of -55°C to 125°C is significantly improved, and no larger offset voltage temperature drift is introduced. Brief Description of the Drawings

[0021] Through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, the above and other objects, features, and advantages of the present disclosure will become clearer. In the drawings:

[0022] Figure 1 Schematically shows the structural diagram of the common-mode detection module of a typical digital trimming technology;

[0023] Figure 2 Schematically shows the structural diagram of the digital trimming device based on compensating the temperature coefficient of the current according to an embodiment of the present disclosure;

[0024] Figure 3 Schematically shows the structural diagram of the input stage circuit of an operational amplifier according to an embodiment of the present disclosure;

[0025] Figure 4 Schematically shows the structural diagram of the common-mode detection module according to an embodiment of the present disclosure;

[0026] Figure 5 Schematically shows the comparison diagram of the reference current simulation results with and without temperature compensation design;

[0027] Figure 6 Schematically shows the structural diagram of the fuse unit according to an embodiment of the present disclosure;

[0028] Figure 7 Schematically shows the structural diagram of the digital-to-analog converter module according to an embodiment of the present disclosure;

[0029] Figure 8 Schematically shows the comparison diagram of the unit compensation offset voltage simulation results with and without temperature compensation design;

[0030] Figure 9 Schematically shows the structural diagram of the total fuse switch module according to an embodiment of the present disclosure;

[0031] Figure 10 Schematically shows the flowchart of the digital trimming method based on compensating the temperature coefficient of the current according to an embodiment of the present disclosure. Detailed Description of the Embodiments

[0032] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and are not intended to limit the scope of the present disclosure. In the following detailed description, for the sake of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is obvious that one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessarily confusing the concepts of the present disclosure.

[0033] The terms used herein are for describing specific embodiments only and are not intended to limit the present disclosure. The terms such as "including" and "comprising" used herein indicate the presence of the described features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0034] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein should be interpreted as having a meaning consistent with the context of this specification and should not be interpreted in an idealized or overly rigid manner.

[0035] In the case of using expressions such as "at least one of A, B, and C, etc.", generally, it should be interpreted according to the meaning commonly understood by those skilled in the art (for example, "a system having at least one of A, B, and C" should include, but is not limited to, a system having only A, only B, only C, having A and B, having A and C, having B and C, and / or having A, B, and C, etc.).

[0036] Operational amplifiers play a fundamental and crucial role in integrated circuits and are key components of the signal chain in the Internet of Things era. Their functions include operations such as amplifying, filtering, regulating, and converting signals, and they are widely used in the field of electronic circuits. The definition criteria for high-precision operational amplifiers are: the input offset voltage is less than 1 mV, and the temperature drift of the input offset voltage is less than 2 μV / °C. With the rapid development of integrated circuit technology, especially in related fields such as audio processing, communication engineering, and sensing technology, the demand for high-precision operational amplifiers shows an increasing trend.

[0037] For high-precision operational amplifiers, common trimming methods include wafer-level trimming and post-packaging trimming. Wafer-level trimming has the advantages of being able to process in batches and having simple trimming operations. However, its disadvantages are also relatively prominent, mainly manifested as the inability to trim the influence of packaging on the chip. In contrast, trimming after chip packaging can effectively eliminate the adverse effects of processes such as dicing and packaging on the offset voltage and reduce the overall offset voltage of the packaged chip.

[0038] In the design of operational amplifiers, in order to keep the input-stage transconductance relatively constant, a PTAT (Proportional to Absolute Temperature) current (bias current) proportional to the absolute temperature needs to be generated to compensate for the performance degradation of the amplifier input-stage transconductance at high temperatures, thereby improving the amplifier gain-bandwidth product. However, since the PTAT current generated by the bias circuit will make the compensation current generated by the DAC (Digital-to-Analog Converter) also a PTAT current, it will cause a decrease in the compensation accuracy of the offset voltage and an increase in the offset voltage temperature drift in the full temperature range of -55°C to 125°C. For example, in the prior art, typical digital trimming techniques are often used for trimming.

[0039] Figure 1 Schematically shows the structural diagram of the common-mode detection module of the typical digital trimming technique.

[0040] As Figure 1 shown, in the prior art, the common-mode detection module of the typical digital trimming technique outputs a trimming current of a certain size by turning different switches on or off. Its circuit includes two parts, namely trimming circuit 1 and trimming circuit 2.

[0041] Trimming circuit 1 is used to correct the offset voltage generated by the circuit when the PMOS (positive channel Metal Oxide Semiconductor) differential pair operates, and trimming circuit 2 is used to correct the offset voltage generated by the circuit when the NMOS (N Metal Oxide Semiconductor) differential pair operates. Itrack (tracking current) is used to track the current of the NMOS differential pair.

[0042] Among them, Ma1, Ma2, ··· Man are a group of current-source transistors, biased by Ma0, and the bias current magnitude is controlled by the current source I1; Mc1, Mc2, ··· Mcn are another group of current-source transistors, biased by Mc0, and the bias current magnitude is controlled by the current of the NMOS differential pair; Mb1, Mb2, ··· Mbn; Md1, Md2, ··· Mdn are two groups of switch transistors, which can be controlled by a digital circuit. In this circuit, the control signal source of the switch circuit is obtained by converting the output Y signal of the trim (trimming) circuit in the previous-stage circuit through a logic gate. By controlling the on and off of these circuits, the magnitude of the current flowing through the Me1, Me2, Me3, Me4 transistors is controlled. The Me1, Me2, Me3, Me4 transistors are also determined by the output of the previous-stage digital circuit. The switching of these four transistors is used to determine whether the trimming output generates a compensation current signal from the POSTRIM (high common-mode trimming) or NEGTRIM (low common-mode trimming) port.

[0043] Analysis shows that the typical digital trimming technique currently applied to operational amplifiers has the following defects:

[0044] (1) Since there is no temperature compensation design, the temperature coefficient of the bias circuit module will directly affect the temperature drift of the compensation current, reducing the compensation accuracy of the offset voltage by the compensation current generated by digital trimming within the full temperature range.

[0045] (2) The temperature drift of the compensation current will introduce a temperature drift of the compensated offset voltage, having a worse impact on the total temperature drift of the offset voltage.

[0046] Based on this, the embodiments of the present disclosure provide a digital trimming device based on the temperature coefficient of the compensation current, aiming to make the offset voltage of the operational amplifier have a better temperature drift through the temperature coefficient of the offset compensation current generated by this digital trimming device.

[0047] The device includes: a common-mode detection module for trimming the input differential pair transistors of the operational amplifier by detecting the level of the common-mode voltage currently input to the operational amplifier; a digital logic control module for controlling the fusing logic of the fuses according to the detection result of the common-mode detection module; a fuse array module for generating digital signals in different modes according to the control of the digital logic control module; a digital-to-analog converter module for converting the digital signals into compensation currents of specific magnitudes and delivering the compensation currents to the input differential pair transistors to compensate for current imbalance; a total fuse switch module for locking the trimming data by fusing the fuses after trimming is completed; wherein, the common-mode detection module is configured to be able to utilize the negative temperature coefficient characteristic of the base-emitter voltage of the triode to reduce the temperature coefficient of the reference current output from the common-mode detection module to the digital-to-analog converter module, thereby reducing the influence of temperature on the compensation current.

[0048] The digital trimming device based on the temperature coefficient of the compensation current provided by the embodiments of the present disclosure trims the input differential pair transistors (N differential pair transistors or P differential pair transistors) by detecting the level of the currently input common-mode voltage through the common-mode detection module. At the same time, in order to reduce the influence of the bias current on the temperature coefficient of the compensation current, the V of the triode is utilized. BE (the voltage between the base and the emitter) has the characteristic of negative temperature coefficient, improving the temperature coefficient of the reference current output from the common-mode detection module to the DAC module, making the compensation current of the DAC module for the input differential pair transistors have a lower temperature coefficient. Compared with the digital trimming circuit without temperature compensation design, the compensation accuracy of the offset voltage within the range of -55°C to 125°C is significantly improved, and no larger temperature drift of the offset voltage is introduced.

[0049] To make the purpose, technical solution and advantages of the present disclosure clearer and more understandable, the following further elaborates on the present disclosure in detail in combination with specific embodiments and with reference to the accompanying drawings.

[0050] Figure 2Schematically shows a structural diagram of a digital trimming device based on compensating the temperature coefficient of current according to an embodiment of the present disclosure.

[0051] As Figure 2 shown, the structure of the digital trimming device based on compensating the temperature coefficient of current according to an embodiment of the present disclosure may include, for example: a common-mode detection module, a digital logic control module, a fuse array module, a digital-to-analog converter module, and a total fuse switch module.

[0052] Among them, the common-mode detection module is used to trim the input differential pair transistors of the operational amplifier by detecting the level of the common-mode voltage currently input to the operational amplifier.

[0053] The digital logic control module is used to control the fusing logic of the fuses according to the detection result of the common-mode detection module.

[0054] The fuse array module is used to generate digital signals in different modes according to the control of the digital logic control module.

[0055] The digital-to-analog converter module is used to convert the digital signal into a compensation current of a specific magnitude and deliver the compensation current to the input differential pair transistors to compensate for current imbalance.

[0056] The total fuse switch module is used to lock the trimming data by fusing the fuses after the trimming is completed.

[0057] In this embodiment, the common-mode detection module is configured to be able to utilize the negative temperature coefficient characteristic of the base-emitter voltage (V BE ) of the triode to reduce the temperature coefficient of the reference current output from the common-mode detection module to the digital-to-analog converter module, thereby reducing the influence of temperature on the compensation current.

[0058] According to an embodiment of the present disclosure, the input differential pair transistors of the operational amplifier include: N differential pair transistors and P differential pair transistors.

[0059] Among them, in response to the common-mode detection module detecting that the common-mode voltage is at a high level, the N differential pair transistors are trimmed; in response to the common-mode detection module detecting that the common-mode voltage is at a low level, the P differential pair transistors are trimmed.

[0060] Figure 3 Schematically shows a structural diagram of the input stage circuit of the operational amplifier according to an embodiment of the present disclosure.

[0061] As Figure 3 shown, the structure of the input stage circuit of the operational amplifier according to an embodiment of the present disclosure consists of P differential pair transistors M P1 , M P2 and N differential pair transistors M N1 , M N2Form a complementary input stage. During normal operation, the input differential pair transistors are in the subthreshold region, and finally the current I O1 ~I O4 is transmitted to the output stage.

[0062] Since the processes such as dicing and packaging of the chip will also affect the offset voltage of the amplifier, therefore, in this embodiment, the compensation currents I Trimn and I Trimp output by the DAC module are compensated into the input differential pair transistors. By adjusting the current ΔI d of the input differential pair transistors, the offset voltage caused by non-ideal factors such as the mismatch ΔV TH of the threshold voltage, the mismatch Δ(W / L) of the transistor width-to-length ratio, and package parasitics can be effectively reduced.

[0063] According to an embodiment of the present disclosure, the common-mode detection module includes: a triode, a current mirror, and a resistor.

[0064] Among them, the current mirror is connected to an external bias circuit module and is used to copy the bias current provided by the bias circuit module, where the bias current has a positive temperature coefficient.

[0065] The triode is connected to the current mirror and is used to utilize the negative temperature coefficient characteristic of its own base-emitter voltage to convert the bias current copied by the current mirror into a reference current with a better temperature coefficient and provide it to the digital-to-analog converter module, so that the compensation current output by the digital-to-analog converter module to the input differential pair transistors also has a better temperature coefficient.

[0066] The resistor is connected to the triode and is used to adjust the magnitude of the reference current..

[0067] Figure 4 Schematically shows the structural diagram of the common-mode detection module according to an embodiment of the present disclosure.

[0068] As Figure 4 shown, the structure of the operational amplifier according to an embodiment of the present disclosure, for example, includes: a triode (such as Q1 and Q2), a current mirror (such as M P2 ~M P13 , M N4 ~M N11 ) and resistors (such as R1 and R2).

[0069] Since the input differential pair transistors are in different operating states under different common-mode voltages, and the offset voltage is mainly generated by the currently turned-on input differential pair transistors.

[0070] The common-mode detection module detects the level of the current input common-mode voltage through V BIAS7 , specifically:

[0071] When the input common-mode voltage is low, the left circuit works, and a reference current is output from the I B_VCML port to the DAC module. At this time, only the P differential pair transistors in the input stage are turned on, and the offset voltage is mainly generated by the P differential pair transistors. And at this time, the N differential pair transistors in the input stage do not work, and the gate voltages V N4 of the M N6 and M BIAS7 transistors are low, and this voltage is transmitted to the common-mode detection module to turn off M N10 . The current all flows to the M N7 transistor. Finally, M N4 ~M N7 , M P2 ~M P7 and the Q1 transistor in the common-mode detection module are turned on, and the I B_VCML port generates a reference current for the DAC module, and the DAC module compensates the current of the P differential pair transistors to reduce the offset voltage.

[0072] When the input common-mode voltage is high, the right circuit works, and a reference current is output from the I B_VCMH port to the DAC module. At this time, the gate voltages V N4 of the M N6 and M BIAS7 transistors are high, and the I B_VCMH port generates a reference current for the DAC module, and the DAC module compensates the current of the N differential pair transistors.

[0073] This common-mode detection module detects the level of the current input common-mode voltage through V BIAS7 , and respectively tunes the N differential pair transistors or the P differential pair transistors. In order to reduce the influence of the PTAT current on the temperature coefficient of the compensation current, the V 1 of the triodes Q 2 and Q BE has the characteristic of negative temperature coefficient, which is used to improve the temperature coefficient of the reference current output from the I B_VCML and I B_VCMH ports of the common-mode detection module to the DAC module, so that the compensation current of the DAC module for the input differential pair transistors has a lower temperature coefficient.

[0074] In this embodiment, when the common-mode voltage is low, the M N4 ~M N7 , M P2 ~M P7 and Q 1 transistors are turned on. It is set that the drain of M P5 outputs a current twice that of I bias , and the drain of M P6 outputs a current once that of I bias . Then the collector current I 1 of the triode Q c is:

[0075] (1)

[0076] Among them, I bias represents the bias current provided by the bias circuit module, V BE represents the base-emitter voltage of the triode, and R 1 represents the resistance value of the resistor.

[0077] The reference current I B_VCML output from the common-mode detection module I ref port to the digital-to-analog converter module is:

[0078] (2)

[0079] Among them, I B represents the base current of the triode.

[0080] The base-emitter voltage V BE of the triode can be expressed as:

[0081] (3)

[0082] I c is determined by equation (1) and has a positive temperature coefficient. Taking the partial derivative with respect to V BE , we can obtain:

[0083] (4)

[0084] Among them, V BE is -0.6V to -0.8V; V T is approximately 26mV; m is a parameter related to the scattering mechanism in the relationship between the carrier mobility and temperature, approximately 1.5 to 2.5; E g is the bandgap energy of silicon, approximately 1.12eV.

[0085] It can be seen from equation (3) that V BE exhibits a negative temperature coefficient. In view of this characteristic, by setting a reasonable value of R 1 , the zero temperature coefficient of the reference current output to the DAC module under high and low common-mode voltages can be optimized, as shown in .

[0086] Figure 5 A comparison diagram of the simulation results of the reference current with and without temperature compensation design is schematically shown.

[0087] As shown in Figure 5 , in the embodiment of the present disclosure, I refThe simulation curve of the current varying with temperature in the range of -55°C to 125°C. Compared with the common-mode detection module without the reference current temperature compensation design, I ref The temperature coefficient of the current has been significantly improved. In the range of -55°C to 125°C, the compensated current I ref The temperature coefficient of has decreased from 44.67 nA / °C to 6.36 nA / °C.

[0088] According to an embodiment of the present disclosure, the fuse array module includes: a plurality of fuse units with the same structure, wherein the input signal of each fuse unit is controlled by the combinational logic of the digital logic control module.

[0089] The fuse array module is configured with a pre-trimming mode and a fuse blowing mode. In the pre-trimming mode, the fuse array module generates a digital signal in the initial state where the fuse remains unfused; in the fuse blowing mode, the fuse array module generates a digital signal in the state where the fuse is blown.

[0090] In this embodiment, each fuse array module can be composed of, for example, 14 fuse units with the same structure, and the circuit structure of each fuse unit is as shown.

[0091] Figure 6 Schematically shows the structural diagram of a fuse unit according to an embodiment of the present disclosure.

[0092] As Figure 6 shown, the input signals A, B, and C of the fuse unit are all controlled by the combinational logic of the digital logic control module.

[0093] The fuse array module has two working modes: the pre-trimming mode and the fuse blowing mode. In the pre-trimming mode, the fuse remains in the unfused initial state, but the same expected value as after the fuse is blown can still be obtained at the output end, so that the effect after the fuse is blown can be achieved without actually blowing the fuse. In the fuse blowing mode, when the gate of the M N2 tube is at a high level, the M N2 transistor conducts, and the fuse is blown by generating a large current. And the blowing mechanism in this mode is irreversible. Finally, a 14-bit digital signal is generated and output to the subsequent DAC module.

[0094] Figure 7 Schematically shows the structural diagram of a digital-to-analog converter module according to an embodiment of the present disclosure.

[0095] As Figure 7 shown, for the DAC module of the embodiment of the present disclosure, its main function is to convert the 14-bit digital signal output by the fuse array module into a compensation current of a specific magnitude. The compensation current I Trimp and ITrimn flows into the input-stage differential pair transistors, aiming to effectively compensate for the current imbalance of the input differential pair transistors.

[0096] Since the reference current I of the DAC module ref is provided by the common-mode detection module with temperature compensation design, the compensation current I output to the input differential pair transistors of the amplifier Trimp and I Trimn also have good temperature coefficients. The 14-bit digital signal input to the DAC module can quantitatively adjust the output compensation current. The current corresponding to a change of one LSB (Least Significant Bit, angular velocity resolution) of the DAC module, that is, the per-unit compensation current I bit is 60 nA in magnitude, and the changed input offset voltage can be expressed as follows:

[0097] (5)

[0098] where, g m represents the transconductance of the input differential pair transistors, I bit represents the per-unit compensation current, and V OS_trim represents the offset voltage change corresponding to the per-unit compensation current.

[0099] The simulation results of the temperature compensation design of the common-mode detection module for the input offset voltage changed by the per-unit compensation current output by the DAC are as shown.

[0100] Figure 8 Schematically shows a comparison diagram of the simulation results of the per-unit compensation offset voltage with and without temperature compensation design.

[0101] As Figure 8 shown, verified by simulation, for the simulation results of the input offset voltage changed by the per-unit compensation current output by the DAC with the temperature compensation design of the common-mode detection module, compared with the digital trimming circuit without temperature compensation design, the temperature drift of the input offset voltage changed by the per-unit compensation current is reduced from 126.86 nV / °C to 5.69 nV / °C, significantly improving the compensation accuracy of the offset voltage in the range of -55°C to 125°C, and not introducing a larger temperature drift of the offset voltage.

[0102] According to an embodiment of the present disclosure, the total fuse switch module includes: a pair of N-type metal-oxide-semiconductor transistors, an inverter, and a fuse resistor.

[0103] Wherein, a pair of N-type metal-oxide-semiconductor transistors are used to control whether the fuse is blown by adjusting the gate voltage.

[0104] The inverter is used to feedback the blown state of the fuse.

[0105] The fuse resistor is used to adjust the magnitude of the current flowing through the fuse.

[0106] Figure 9 Schematically shows the structural diagram of the total fuse switch module according to an embodiment of the present disclosure.

[0107] As Figure 9 shown, the total fuse switch module of the embodiment of the present disclosure is composed of, for example, two NMOS transistors, an inverter, and a fuse resistor. After the digital trimming is completed, its gate voltage V burnt is at a high level. At this time, the M N1 transistor conducts, and the fuse is blown by a large current. After that, the output signal FUSE_OUT will remain at a high level and be transmitted back to the input logic control module, so that the trimming code cannot be written into the circuit again, ensuring no potential risks for subsequent incorrect operations.

[0108] The digital trimming device based on compensating the temperature coefficient of the compensation current provided by the embodiment of the present disclosure detects the level of the current input common-mode voltage through a common-mode detection module to trim the input differential pair transistors (N differential pair transistors or P differential pair transistors). At the same time, in order to reduce the influence of the bias current on the temperature coefficient of the compensation current, the V BE (voltage between the base and emitter) of the triode has the characteristic of negative temperature coefficient, which improves the temperature coefficient of the reference current output from the common-mode detection module to the DAC module, so that the compensation current of the DAC module for the input differential pair transistors has a lower temperature coefficient. Compared with the digital trimming circuit without temperature compensation design, it significantly improves the compensation accuracy of the offset voltage in the range of -55 °C to 125 °C, and does not introduce a larger temperature drift of the offset voltage.

[0109] Another aspect of the embodiment of the present disclosure also provides a digital trimming method based on compensating the temperature coefficient of the compensation current, which is applied to an operational amplifier, as Figure 10 shown.

[0110] Figure 10 Schematically shows the flowchart of the digital trimming method based on compensating the temperature coefficient of the compensation current according to an embodiment of the present disclosure.

[0111] As Figure 10 shown, the digital trimming method based on compensating the temperature coefficient of the compensation current according to an embodiment of the present disclosure includes:

[0112] Testing the initial offset voltage (V OS ) of the operational amplifier, and setting the trimming code according to the magnitude of the initial offset voltage.

[0113] According to the trimming code, the initial offset voltages under high and low common-mode voltages are trimmed respectively. Among them, in the pre-trimming stage, after each pre-trimming operation is completed, it is necessary to test whether the initial offset voltage meets the predetermined requirements. When the initial offset voltage meets the predetermined requirements, the fuse blowing operation is performed.

[0114] In response to the completion of trimming, the trimming data is locked by blowing the total fuse switch to ensure that the trimming data cannot be written again.

[0115] The flowcharts and block diagrams in the accompanying drawings illustrate the possible architectures, functions, and operations of systems, methods, and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagram may represent a module, a program segment, or a part of code, and the above-mentioned module, program segment, or part of code contains one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than that marked in the accompanying drawings. For example, two consecutive blocks shown may actually be executed substantially in parallel, and they may sometimes be executed in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagram or flowchart, as well as the combination of blocks in the block diagram or flowchart, can be implemented by a dedicated hardware-based system for performing the specified functions or operations, or can be implemented by a combination of dedicated hardware and computer instructions. Those skilled in the art can understand that the features described in the various embodiments of the present disclosure can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present disclosure. In particular, without departing from the spirit and teachings of the present disclosure, the features described in the various embodiments of the present disclosure can be combined and / or combined in various ways. All such combinations and / or combinations fall within the scope of the present disclosure.

[0116] The above describes the embodiments of the present disclosure. However, these embodiments are only for illustrative purposes and not for limiting the scope of the present disclosure. Although the embodiments are described separately above, this does not mean that the measures in each embodiment cannot be used advantageously in combination. Without departing from the scope of the present disclosure, those skilled in the art can make various substitutions and modifications, and all such substitutions and modifications should fall within the scope of the present disclosure.

Claims

1. A digital adjustment device based on compensation current temperature coefficient, applied to an operational amplifier, characterized in that: The device comprises: A common mode detection module, used to adjust the input differential pair of the operational amplifier by detecting the level of the common mode voltage currently input to the operational amplifier; A digital logic control module, used to control the fusing logic of the fuse according to the detection result of the common mode detection module; a fuse array module, used to generate digital signals in different modes according to the control of the digital logic control module; A digital-to-analog converter module, used for converting the digital signal into a compensation current of a specific magnitude, and transmitting the compensation current to the input differential pair tube to compensate for current imbalance; A main fuse switch module is used to lock the adjustment data by blowing the fuse after the adjustment is completed; The common-mode detection module is configured to utilize the negative temperature coefficient characteristic of the transistor base-emitter voltage to reduce the temperature coefficient of the reference current output by the common-mode detection module to the digital-to-analog converter module, thereby reducing the influence of temperature on the compensation current.

2. The device according to claim 1, characterized in that The input differential pair of the operational amplifier includes an N differential pair and a P differential pair, wherein: In response to the common mode detection module detecting that the common mode voltage is at a high level, trimming the N differential pair transistors; In response to the common mode detection module detecting that the common mode voltage is at a low level, the P differential pair tube is trimmed.

3. The device according to claim 2, characterized in that The common mode detection module comprises: A current mirror connected to an external bias circuit module and used to replicate a bias current provided by the bias circuit module, wherein the bias current has a positive temperature coefficient; A triode connected to the current mirror, used to utilize the negative temperature coefficient characteristic of its own base-emitter voltage to convert the bias current copied by the current mirror into a reference current with a better temperature coefficient and provide it to the digital-to-analog converter module, so that the compensation current output by the digital-to-analog converter module to the input differential pair tube also has a better temperature coefficient; A resistor is connected to the transistor and is used to adjust the magnitude of the reference current.

4. The device according to claim 3, characterized in that The collector current I of the transistor c is configured as: Among them, I bias Indicates the bias current provided by the bias circuit module, V BE represents the base-emitter voltage of the transistor, and R1 represents the resistance value of the resistor.

5. The device according to claim 3, characterized in that The common mode detection module outputs a reference current I to the digital analog converter module. ref is configured as: Among them, I B Represents the base current of the transistor.

6. The device according to claim 2, characterized in that The fuse array module comprises: A plurality of fuse units with the same structure, wherein the input signal of each fuse unit is controlled by the combinational logic of the digital logic control module.

7. The device according to claim 6, characterized in that The fuse array module is configured with a pre-trim mode and a fuse blown mode, wherein: In the pre-trim mode, the fuse array module generates a digital signal in an initial state where the fuse remains unblown; In the fuse blowing mode, the fuse array module generates a digital signal in a state where the fuse is blown.

8. The device according to claim 2, characterized in that The main fuse switch module comprises: A pair of N-type metal-oxide-semiconductor transistors, used to control whether the fuse is blown by adjusting the gate voltage; An inverter for feeding back the blown state of the fuse; Fuse resistor, used to adjust the current flowing through the fuse.

9. A digital adjustment method based on compensation current temperature coefficient, applied to an operational amplifier, characterized in that: The method comprises: Testing the initial offset voltage of the operational amplifier, and setting a trimming code according to the magnitude of the initial offset voltage; According to the trimming code, the initial offset voltages under the high and low common mode voltages are trimmed respectively, wherein in the pre-trimming stage, after each pre-trimming operation is completed, it is necessary to test whether the initial offset voltage meets the predetermined requirement, and when the initial offset voltage meets the predetermined requirement, the fuse blowing operation is performed; In response to the trimming being completed, the trimming data is locked by blowing the master fuse switch.

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