A memory module and its manufacturing method and monitoring method
By partitioning the identification module and memory chip in the memory module, and using passive dual-frequency RFID chip or ultra-high frequency RFID chip, information management and status verification of the memory module is achieved, solving the problems of inefficient information management and low label reliability in the existing technology, and improving operation and maintenance efficiency and information accuracy.
Patent Information
- Application Number
- CN202510622293.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-15
- Publication Date
- 2025-08-22
- Estimated Expiration
- 2045-05-15
AI Technical Summary
The information management of existing memory modules relies on paper tags or QR codes, which have problems such as inefficient operation, difficulty in target positioning, low label reliability, and undynamic information, and are susceptible to environmental impact.
The identification module and the memory chip are respectively arranged in the first and second areas without intersection, and passive dual-frequency radio frequency identification chips or ultra-high frequency radio frequency identification chips are used to read the identification information of the memory module through a contactless manner to realize remote batch positioning and management.
It improves operation and maintenance efficiency, solves the problems of easy corruption of traditional tags and inefficient manual management, and realizes information management and status verification of memory modules, ensuring the accuracy and reliability of information.
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Figure CN120144321B_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of semiconductor memory manufacturing, and in particular to a memory module and a manufacturing method and a monitoring method thereof. Background Art
[0002] A memory module is a crucial component of a computer's memory system. It typically consists of multiple memory chips packaged together to form a complete memory module, which is installed in the motherboard's memory slots. A memory module provides the central processing unit (CPU) with fast read / write data storage to support program execution and data processing. Summary of the Invention
[0003] The following is an overview of the subject matter described in detail in this disclosure. This overview is not intended to limit the scope of the claims.
[0004] The present disclosure provides a memory module, a manufacturing method thereof, and a monitoring method thereof.
[0005] A first aspect of the present disclosure provides a memory module, comprising:
[0006] a substrate, the substrate comprising a first region and a second region, the first region and the second region having no intersection;
[0007] an identification module, disposed in the first area, storing identification information of the memory module, wherein the identification information of the memory module includes serial presence detection information of the memory module;
[0008] The memory chip is arranged in the second area.
[0009] In some embodiments of the present disclosure, the preset layer of the substrate is provided with a receiving groove; the area where the receiving groove is located corresponds to the first area;
[0010] The identification module includes:
[0011] An antenna module is disposed in the receiving groove;
[0012] The identification chip is arranged on a side of the antenna module away from the receiving groove and is signal-connected to the antenna module.
[0013] In some embodiments of the present disclosure, the antenna module includes a signal connecting portion, and the identification chip is fixedly connected to the antenna module via the signal connecting portion.
[0014] In some embodiments of the present disclosure, the identification chip includes a ceramic-based identification chip.
[0015] In some embodiments of the present disclosure, the identification chip includes a passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip.
[0016] In some embodiments of the present disclosure, the identification chip includes a ceramic-based passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip.
[0017] In some embodiments of the present disclosure, the identification information of the memory module also includes management information of the memory module.
[0018] In some embodiments of the present disclosure, the first region is located in a non-signal region at a long side edge of the substrate.
[0019] In some embodiments of the present disclosure, the memory module further includes:
[0020] The read / write module is arranged in the second area of the memory module.
[0021] A second aspect of the present disclosure provides a method for manufacturing a memory module, the method comprising:
[0022] Providing a substrate, the substrate comprising a first region and a second region, wherein the first region and the second region have no intersection;
[0023] An identification module is set in the first area, and a memory chip is set in the second area, wherein the identification module stores identification information of the memory module, and the identification information of the memory module includes serial presence detection information of the memory module.
[0024] In some embodiments of the present disclosure, the preset layer of the substrate is provided with a receiving groove; the area where the receiving groove is located corresponds to the first area; the identification module includes an antenna module and an identification chip;
[0025] Setting the identification module in the first area includes:
[0026] placing the antenna module in the receiving slot;
[0027] The identification chip is arranged on a side of the antenna module away from the receiving groove and is signal-connected to the antenna module.
[0028] In some embodiments of the present disclosure, the identification chip is disposed on a side of the antenna module away from the receiving slot and is signal-connected to the antenna module, including:
[0029] The identification chip is welded to the signal connection portion of the antenna module; the signal connection portion is located on a side of the antenna module away from the receiving groove.
[0030] A third aspect of the present disclosure provides a monitoring method, which is applied to a memory module and includes:
[0031] Identification information is received and stored through an identification module; the identification information includes identification information of the memory module, and the identification information of the memory module includes serial presence detection information of the memory module.
[0032] In some embodiments of the present disclosure, the identification information of the memory module further includes management information of the memory module; the management information includes one or more of the following information:
[0033] Operation and maintenance information of the memory module;
[0034] Production information of the memory module;
[0035] Logistics information of the memory module.
[0036] A fourth aspect of the present disclosure provides a monitoring method, which is applied to a management system and includes:
[0037] When the memory module is not in operation, obtaining identification information from an identification module in the memory module and serial presence detection information from a serial presence detection module in the memory module;
[0038] In response to the identification information matching the serial presence detect information, it is determined that the memory module meets a preset condition.
[0039] In some embodiments of the present disclosure, the non-working state includes an unpowered state.
[0040] In some embodiments of the present disclosure, the identification information in the identification module further includes management information; and the monitoring method further includes:
[0041] Acquiring management information of the memory module in the identification module;
[0042] The current state of the memory module is determined according to the management information.
[0043] In some embodiments of the present disclosure, the management information includes one or more of the following information:
[0044] Operation and maintenance information of the memory module;
[0045] Production information of the memory module;
[0046] Logistics information of the memory module.
[0047] In some embodiments of the present disclosure, the monitoring method further comprises:
[0048] The serial presence detection information is written into the identification module.
[0049] In some embodiments of the present disclosure, the monitoring method further comprises:
[0050] The management information is written into the identification module.
[0051] In the memory module and its manufacturing method and monitoring method provided in the embodiments of the present disclosure,
[0052] The present disclosure can avoid the identification module occupying the core circuit space by arranging the identification module and the memory chip in the first area and the second area which have no intersection, so that the identification module and the memory chip can maintain their respective functions without interference; and realize information management of the memory module by storing the identification information of the memory module in the identification module arranged in the first area.
[0053] Still other aspects will become apparent upon reading and understanding the accompanying drawings and detailed description. BRIEF DESCRIPTION OF THE DRAWINGS
[0054] The accompanying drawings, which are incorporated into and constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, are used to explain the principles of the embodiments of the present disclosure. In these drawings, similar reference numerals are used to represent similar elements. The drawings described below are some embodiments of the present disclosure, not all embodiments. For those skilled in the art, other drawings can be derived from these drawings without inventive effort.
[0055] Figure 1 FIG. 1 is a top view of a memory module according to an exemplary embodiment.
[0056] Figure 2 is a longitudinal cross-sectional view of a substrate according to an exemplary embodiment.
[0057] Figure 3 is a longitudinal cross-sectional view of a substrate equipped with an identification module according to an exemplary embodiment.
[0058] Figure 4 FIG. 4 is a schematic diagram of a four-layer structure of a substrate according to an exemplary embodiment.
[0059] Figure 5 The figure is a flow chart of a method for manufacturing a memory module according to an exemplary embodiment.
[0060] Figure 6 is a flowchart of a monitoring method according to an exemplary embodiment.
[0061] Figure 7 is a flowchart of a monitoring method according to another exemplary embodiment.
[0062] Reference numerals:
[0063] 1. Substrate; 11. First area; 12. Second area; 13. Receiving groove; 101. First layer; 102. Second layer; 103. Third layer; 104. Fourth layer; 2. Identification module; 21. Antenna module; 22. Identification chip; 3. Memory chip. DETAILED DESCRIPTION
[0064] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions in the disclosed embodiments will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those skilled in the art without making creative work are within the scope of protection of the present disclosure. It should be noted that, in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be arbitrarily combined with each other.
[0065] Currently, memory module information management relies primarily on surface-mounted paper or QR code labels, which are manually read one by one using handheld scanners. However, this information management method suffers from operational inefficiencies, difficulty locating targets, and low label reliability.
[0066] On the one hand, manual scanning requires close contact with each label to read its information. This makes it impossible to quickly locate target memory modules remotely and in batches, resulting in extremely low operational efficiency. Furthermore, paper labels lack environmental tolerance. In high-humidity storage (>80% RH) or under prolonged mechanical vibration (such as during transportation), paper labels are prone to peeling and fading, rendering the label information unreadable. Furthermore, because paper labels are printed using a solidified print, production and operational data cannot be dynamically updated, and they are easily forged through physical substitution.
[0067] Based on this, an exemplary embodiment of the present disclosure provides a memory module comprising a substrate, an identification module, and a memory chip. The substrate comprises a first region and a second region, the first region and the second region being non-intersecting. The identification module is disposed in the first region and stores identification information of the memory module, including serial presence detection information of the memory module. The memory chip is disposed in the second region. By disposing the identification module and the memory chip in the non-intersecting first and second regions, respectively, the identification module can be prevented from occupying core circuit space, allowing the identification module and the memory chip to maintain their respective functions without interference. The identification information of the memory module stored in the identification module disposed in the first region enables information management of the memory module.
[0068] The exemplary embodiments of the present disclosure provide a memory module and a manufacturing method and a monitoring method thereof, such as Figure 1 As shown, Figure 1 FIG2 shows a top view of a memory module provided according to an exemplary embodiment of the present disclosure; Figure 2 shows a longitudinal cross-sectional view of a memory module provided according to an exemplary embodiment of the present disclosure; Figure 3 is a longitudinal cross-sectional view of a substrate equipped with an identification module according to an exemplary embodiment; Figure 4 A schematic diagram of a four-layer structure of a substrate according to an exemplary embodiment of the present disclosure is shown; Figure 5 A flowchart of a method for manufacturing a memory module according to an exemplary embodiment of the present disclosure is shown; Figure 6 A flow chart of a monitoring method according to an exemplary embodiment of the present disclosure is shown; Figure 7 A flow chart of a monitoring method according to another exemplary embodiment of the present disclosure is shown. Figures 1-4 Explain the structure of the memory module.
[0069] Some specific implementation methods described below are intended to facilitate those skilled in the art to understand this embodiment, and this embodiment is not limited to some specific implementation methods described below.
[0070] The exemplary embodiment of the present disclosure provides a memory module, such as Figure 1 As shown, the memory module includes:
[0071] A substrate 1, comprising a first region 11 and a second region 12, wherein the first region 11 and the second region 12 have no intersection;
[0072] An identification module 2 is provided in the first area 11, and the identification module 2 stores identification information of the memory module, where the identification information of the memory module includes serial presence detection information of the memory module;
[0073] The memory chip 3 is disposed in the second area 12 .
[0074] In this embodiment, the second region 12 may be a signal area on the substrate 1, and multiple memory chips 3 may be provided, with the multiple memory chips 3 distributed on the second region 12. The first region 11 may be a non-signal area on the substrate 1, which may be any area on the substrate 1 other than the second region 12. Since the first region 11 and the second region 12 do not intersect, the identification module 2 can be prevented from occupying core circuit space, allowing the identification module 2 and the memory chips 3 to maintain their respective functions without interference; the identification information of the memory module is stored by the identification module 2 set in the first region 11 to achieve information management of the memory module.
[0075] The identification module 2 disposed in the first area 11 can manage memory module information and store identification information of the memory modules. For example, memory modules include dual in-line memory modules (DIMMs), small outline DIMMs (SO-DIMMs), and micro dual in-line memory modules (MDIs). The identification module 2 can include a radio frequency identification (RFID) module, a near field communication (NFC) module, a terahertz anti-counterfeiting module, a blockchain digital module, and the like.
[0076] Serial presence detection information refers to information stored in the Serial Presence Detect (SPD) module. This information can include various important information about the memory module, such as the memory module's pre-shipment information (i.e., original identity information), including the memory module's QR code, production date, manufacturer, capacity, type, and speed. When managing memory module information, this identification information can be read contactlessly (for example, an external reader reads the memory module's identification information stored in identification module 2) to quickly locate target memory modules in batches, either short-range or remotely. This improves operational efficiency and addresses the issues of traditional external tags being easily damaged and inefficient manual management.
[0077] In the exemplary embodiments of the present disclosure, Figure 1-Figure 3 As shown, the preset layer of the substrate 1 is provided with a receiving groove 13; the area where the receiving groove 13 is located corresponds to the first area 11;
[0078] Identification module 2 includes:
[0079] The antenna module 21 is disposed in the receiving groove 13;
[0080] The identification chip 22 is disposed on a side of the antenna module 21 away from the receiving slot 13 and is signal-connected to the antenna module 21 .
[0081] In this embodiment, the identification chip 22 can store identification information, and the antenna module 21 can receive and send signals. The identification chip 22 is signal-connected to the antenna module 21 so that the two can establish a communication link to ensure that the signal can be transmitted efficiently and accurately.
[0082] The substrate 1 may adopt a four-layer board structure, which may be any four-layer board structure, including two signal layers and two inner plane layers (including a power plane layer and a ground plane layer), or other four-layer board structures. For example, Figure 4 A four-layer board structure (Top Signal-GND-Power-Bottom Signal) is shown as an example. The stacking method of the four-layer board structure from top to bottom can be:
[0083] The first layer 101 (TOP): The top layer is used for arranging components and routing.
[0084] The second layer 102 (GND): provides a low-impedance path to reduce electromagnetic interference.
[0085] The third layer 103 (PWR): power layer, used to distribute power.
[0086] The fourth layer 104 (BOTTOM): bottom layer, used for routing.
[0087] In this embodiment, the top and bottom layers of the substrate 1 are signal layers, which can be used to arrange wiring. The preset layer can be the top layer of the substrate 1 or the bottom layer of the substrate 1. For example, Figure 3 As shown, a receiving groove 13 can be provided on the top layer of substrate 1, with antenna module 21 disposed within receiving groove 13. In the exemplary embodiment of the present disclosure, disposing antenna module 21 within receiving groove 13 can optimize the performance of antenna module 21, reduce the impact of dielectric constant, improve impedance matching, and reduce interference between antenna module 21 and other circuits on substrate 1. Antenna module 21 can include an antenna, an impedance matching circuit, and power supply filtering. By integrating the antenna, impedance matching circuit, and power supply filtering into antenna module 21, the structure of antenna module 21 can be made more compact, achieving a smaller size and higher performance.
[0088] In the exemplary embodiment of the present disclosure, the antenna module 21 includes a signal connection portion, and the identification chip 22 is fixedly connected to the antenna module 21 via the signal connection portion.
[0089] In this embodiment, the identification chip 22 is fixedly connected to the antenna module 21 through a signal connection portion to achieve a physical connection between the antenna module 21 and the identification chip 22, which can avoid poor contact or signal interruption caused by vibration, impact or other external forces. Among them, the signal connection portion includes pins, and an interface is provided on the identification chip 22, and the physical connection between the two is achieved through the pins and the interface. In this embodiment, the physical connection between the antenna module 21 and the identification chip 22 through the pins and the interface can maintain efficient, stable and reliable communication between the antenna module 21 and the identification chip 22. In addition, the physical connection can also ensure a stable power supply between the identification chip 22 and the antenna module 21 to reduce the impact of power supply noise on the signal.
[0090] In an exemplary embodiment of the present disclosure, the identification chip 22 includes a ceramic-based identification chip.
[0091] In this embodiment, the ceramic-based identification chip 22 means that the substrate or support plate of the identification chip 22 is made of ceramic material. The ceramic material is used as the packaging material to package the identification chip 22 to play a role in physical protection.
[0092] The substrate 1 of the memory module can be a printed circuit board (PCB), which is a board used for mechanical support and electrical connection of electronic components. When manufacturing a memory module, surface mount technology (SMT) is usually used to mount the identification module 2 and memory chip 3 on the PCB. The main process flow includes: material preparation, board placement, solder paste printing, component mounting, reflow soldering, testing, cleaning, offline and packaging. During reflow soldering, the mounted PCB needs to be placed in a reflow oven for heating. The temperature during the reflow stage is usually 220℃-260℃. Therefore, in order to ensure that the identification module 2 can withstand the high temperature process of SMT, a specific high-temperature resistant ceramic-based identification chip 22 is used. It is compatible with the existing memory module manufacturing process, allowing the identification module 2 and memory chips to be mounted simultaneously by SMT, achieving zero new steps.
[0093] In an exemplary embodiment of the present disclosure, the identification chip 22 may be a radio frequency identification (RFID) chip, for example, a passive dual-frequency RFID chip or an ultra-high frequency RFID chip.
[0094] A passive dual-frequency RFID chip is an RFID chip that does not require a built-in battery. It draws energy from the radio frequency signal emitted by the reader to activate the chip and transmit data. Passive dual-frequency RFID chips combine two frequency bands: high frequency (HF) and ultra high frequency (UHF). HF typically refers to the 13.56MHz band, suitable for close-range, high-precision identification; UHF typically refers to the 860MHz to 960MHz band, suitable for long-range, wide-range identification. This enables it to operate in different frequency bands, combining the advantages of both. In this embodiment, the identification chip 22 uses a passive dual-frequency RFID chip or an ultra-high frequency device identification chip, which does not interfere with the high-frequency signal of the memory chip 3 (e.g., DIMM), avoiding electromagnetic interference from the DIMM or metal obstruction by electronic components on the PCB.
[0095] In an exemplary embodiment of the present disclosure, the identification chip 22 includes a ceramic-based passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip.
[0096] In this embodiment, the identification chip 22 includes a ceramic-based passive radio frequency identification chip or a ceramic-based ultra-high frequency radio frequency identification chip, so that it can withstand the high-temperature process of SMT to be compatible with the existing memory module manufacturing process, so that the identification module 2 and the memory particles can be SMT mounted simultaneously, achieving zero new steps; and it can not interfere with the high-frequency signal of the memory chip 3 (such as DIMM), avoiding electromagnetic interference of the DIMM or metal obstruction of electronic components on the PCB.
[0097] In the exemplary embodiment of the present disclosure, the first region 11 is located in a non-signal region at the edge of a long side of the substrate 1 .
[0098] In this embodiment, the first area 11 is located in the non-signal area at the long side edge of the substrate 1, which can avoid occupying the core circuit space. The first area 11 can be, for example, Figure 1 The dotted area in .
[0099] The length, width, and other dimensions of the first region 11 can be set based on the size of the non-signal area of the substrate 1. For example, the length of the first region 11 can be 0.10-0.30 times the length of the substrate 1, and the width of the first region 11 can be 0.28-0.55 times the width of the substrate 1. For example, in a DIMM, where the substrate 1 is 133.35 mm long and the first region 11 is located in the middle of the long edge of the substrate 1, the length of the first region 11 can be 20-30 mm, and the width can be 20-28 mm.
[0100] In an exemplary embodiment of the present disclosure, the memory module further includes:
[0101] The read / write module is disposed in the second area 12 of the memory module.
[0102] In this embodiment, the read / write module is disposed in the second area 12 of the memory module. The read / write module may be a serial presence detect (SPD) module, which stores the serial presence detect information of the memory module.
[0103] The serial presence detection module is a standard module in the memory module, used to store the memory module's serial presence detection information. After the memory module is manufactured, the serial presence detection information can be burned into the identification chip 22, so that the identification chip 22 stores the corresponding identification information of the memory module. Simultaneously, the unique identification information of the identification chip 22 is encrypted and written into the SPD module. For example, if the identification chip 22 is an RFID chip, the unique RFID serial number of the RFID chip can be written into the SPD module. This achieves hardware-level identity binding between the identification module 2 and the memory module, improving the accuracy of memory recognition.
[0104] When the memory module requires status testing, such as during factory inspection, the unique identification information of the identification chip 22 in the SPD module can be read to confirm the correspondence between the identification module 2 and the memory module. After confirming that the identification module 2 matches the memory module, the serial presence detection information of the memory module stored in the read / write module and the serial presence detection information of the memory module stored in the identification module 2 are read simultaneously and compared to determine whether the two are identical to confirm whether the memory module is qualified. If the serial presence detection information of the two is the same, it indicates that the memory module is qualified. If it is different, it is determined that there is a problem with the memory module and further testing is required to determine the problem. This automatically verifies the source and authenticity of the memory module.
[0105] In the exemplary embodiment of the present disclosure, the serial presence detection information of the identification chip 22 and the serial presence detection module can be read in any manner. For example, the serial presence detection information of the identification chip 22 and the serial presence detection module can be read by the management system of the memory module.
[0106] In an exemplary embodiment of the present disclosure, the identification information of the memory module also includes management information of the memory module.
[0107] In this embodiment, the management information may include status information of the memory module throughout its entire life cycle, such as operation and maintenance information, production information, and logistics information of the memory module. Operation and maintenance information may include operation and maintenance information at each stage of the memory module's life cycle; production information may include information during the production process of the memory module; and logistics information may include information during various stages of the memory module's storage and transportation.
[0108] The exemplary embodiment of the present disclosure provides a method for manufacturing a memory module, such as Figure 5 As shown, the production method includes:
[0109] S110 , providing a substrate, the substrate comprising a first region and a second region, the first region and the second region having no intersection.
[0110] In step S110, substrate 1 is a plate material that mechanically supports and electrically connects electronic components. Substrate 1 includes a signal area and a non-signal area. The signal area and the non-signal area are independent and non-intersecting. The signal area is used to accommodate memory chips 3 and other functional components, such as data buffers, while the non-signal area is a blank area. The first area can be the non-signal area, and the second area can be the signal area.
[0111] S120: Setting an identification module in a first area and a memory chip in a second area, wherein the identification module stores identification information of the memory module, and the identification information of the memory module includes serial presence detection information of the memory module.
[0112] In step S120, the memory chip 3 is set in the signal area, that is, the memory chip 3 is set in the second area 12. The identification module 2 is set in a non-signal area different from the signal area, that is, the first area 11. This can prevent the identification module 2 from occupying the core circuit space while also allowing the identification module 2 and the memory chip 3 to be separated to prevent their respective functions from being interfered with. The identification module 2 stores the corresponding identification information of the memory module. In this way, without affecting the relevant functions of the memory chip, the information management of the memory module can be achieved by setting the identification module 2 in the first area 11.
[0113] The identification module 2 and the memory chip 3 can be set in the first area 11 and the second area 12 of the substrate 1 in any way, for example, they can be fixed to the first area 11 and the second area 12 of the substrate 1 respectively by eutectic bonding, welding bonding, conductive adhesive bonding, glass adhesive bonding, etc.
[0114] In the exemplary embodiments of the present disclosure, Figure 1-Figure 3 As shown, the preset layer of the substrate 1 is provided with a receiving groove 13; the area where the receiving groove 13 is located corresponds to the first area 11; the identification module 2 includes an antenna module 21 and an identification chip 22;
[0115] The identification module 2 is arranged in the first area 11, including:
[0116] The antenna module 21 is placed in the receiving groove 13;
[0117] The identification chip 22 is disposed on a side of the antenna module 21 away from the receiving groove 13 and is signal-connected to the antenna module 21 .
[0118] In the exemplary embodiment of the present disclosure, the receiving groove 13 can be provided in a predetermined layer of the substrate 1, for example, in the top or bottom layer of the substrate 1. Taking the top layer of the substrate 1 where the receiving groove 13 is provided as an example, the receiving groove 13 can be formed using an etching process. The receiving groove 13 can be completed in the same exposure and etching process as the conventional circuits of the PCB, thereby avoiding the need for an additional production process. The antenna module 21 is provided in the receiving groove 13, and the identification chip 22 is provided on the side of the antenna module 21 away from the receiving groove 13, and is signal-connected to the antenna module 21 to establish a communication link between the two.
[0119] In an exemplary embodiment of the present disclosure, the identification chip 22 is disposed on a side of the antenna module 21 away from the receiving groove 13 and is signal-connected to the antenna module 21, including:
[0120] The identification chip 22 is welded to the signal connection portion of the antenna module 21 ; the signal connection portion is located on a side of the antenna module 21 away from the receiving groove 13 .
[0121] In this embodiment, the identification chip 22 is soldered to the signal connection portion of the antenna module 21, thereby fixing the identification chip 22 and the antenna module 21 and achieving a physical connection between the identification chip 22 and the antenna module 21. The identification chip 22 and the memory chip 3 can be mounted simultaneously on existing SMT production lines, achieving zero line modification and reducing production costs.
[0122] Illustratively, an exemplary embodiment of the present disclosure provides a method for manufacturing a memory module, comprising:
[0123] Solder paste is applied to the pads of the substrate 1 , including the pads of the antenna module 21 ;
[0124] Mounting the memory chip 3 on the pad located in the second area 12, and mounting the identification module 2 on the pad of the antenna module 21 located in the first area 11, to obtain an intermediate material;
[0125] The intermediate material is heated at a preset temperature to melt the solder paste and then solidify it, so that the memory chip 3 adheres to the second area 12 and the identification module 2 adheres to the first area 11. The preset temperature may be 240°C-260°C.
[0126] It should be noted that after the above-mentioned memory module is manufactured, a paper label or QR code can still be pasted on the memory module to meet the needs of users in different scenarios, so that they complement each other in terms of functions and usage scenarios.
[0127] In an exemplary embodiment of the present disclosure, the identification chip 22 may include a ceramic-based identification chip.
[0128] In this embodiment, the ceramic-based identification chip 22 means that the substrate 1 or the support plate of the identification chip 22 is made of ceramic material. The identification chip 22 is packaged with the ceramic material as the packaging material, which can play a role in physical protection.
[0129] In an exemplary embodiment of the present disclosure, the identification chip 22 may include a passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip.
[0130] In this embodiment, the identification chip 22 uses a passive dual-frequency radio frequency identification chip or an ultra-high frequency device identification chip, which does not interfere with the high-frequency signal of the memory chip 3 (such as DIMM), and can avoid electromagnetic interference of the DIMM or metal obstruction of electronic components on the PCB.
[0131] In an exemplary embodiment of the present disclosure, the identification chip 22 may include a ceramic-based passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip.
[0132] In this embodiment, the identification chip 22 includes a ceramic-based passive radio frequency identification chip or a ceramic-based ultra-high frequency radio frequency identification chip, so that it can withstand the high-temperature process of SMT to be compatible with the existing memory module manufacturing process, so that the identification module 2 and the memory particles can be SMT mounted simultaneously, achieving zero new steps; and it can not interfere with the high-frequency signal of the memory chip 3 (such as DIMM), avoiding electromagnetic interference of the DIMM or metal obstruction of electronic components on the PCB.
[0133] In the exemplary embodiment of the present disclosure, the first region 11 is located in a non-signal region at the edge of a long side of the substrate 1 .
[0134] In this embodiment, the first area 11 is located in the non-signal area at the long side edge of the substrate 1, which can avoid occupying the core circuit space. The first area 11 can be, for example, Figure 1 The dotted area in .
[0135] In an exemplary embodiment of the present disclosure, the method for manufacturing a memory module further includes:
[0136] The read / write module is disposed in the second area 12 of the memory module.
[0137] In this embodiment, the read / write module may be a serial presence detection module, in which serial presence detection information of the memory module is stored.
[0138] In an exemplary embodiment of the present disclosure, an identification module 2 is added and the serial presence detection information of the memory module is stored in the identification module 2. This allows the memory module's status to be verified using the serial presence detection information stored by the memory module's existing serial presence detection module, thereby achieving automated identification and verification of the memory module. In this embodiment, the serial presence detection information of the memory module may include the memory module's pre-shipment information (i.e., original identity information), such as the memory module's QR code, production date, manufacturer, capacity, type, speed, etc.
[0139] In an exemplary embodiment of the present disclosure, the identification information of the memory module stored in the identification module also includes management information of the memory module.
[0140] The management information of the memory module may include status information of the entire life cycle of the memory module, for example, operation and maintenance information, production information, logistics information, etc. of the memory module.
[0141] The exemplary embodiment of the present disclosure provides a monitoring method, which is applied to a memory module, such as Figure 1 As shown, the memory module includes:
[0142] A substrate 1, comprising a first region 11 and a second region 12, wherein the first region 11 and the second region 12 have no intersection;
[0143] Identification module 2, disposed in the first area 11; wherein identification module 2 stores identification information of the memory module;
[0144] The memory chip 3 is disposed in the second area 12 .
[0145] like Figure 6 As shown, monitoring methods include:
[0146] S210 , receiving and storing identification information through an identification module; the identification information includes identification information of a memory module, and the identification information of the memory module includes serial presence detection information of the memory module.
[0147] Serial presence detect information refers to information stored in the Serial Presence Detect (SPD) module. This information can include various important information about the memory module, such as the memory module's pre-shipment information (i.e., original identification information), including the memory module's QR code, production date, manufacturer, capacity, type, and speed. This information serves as identification information for the memory module and is stored in the Serial Presence Detect (SPD) module.
[0148] In an exemplary embodiment of the present disclosure, an identification module 2 is provided in the memory module. Figure 1-Figure 3As shown, the preset layer of the substrate 1 of the memory module is provided with a receiving groove 13, and the area where the receiving groove 13 is located corresponds to the first area 11; the identification module 2 includes an antenna module 21 arranged in the receiving groove 13 and an identification chip 22 arranged on the side of the antenna module 21 away from the receiving groove 13, and the identification chip 22 is signal-connected to the antenna module 21.
[0149] The above identification information (original identity information) is written into the identification chip 22 by receiving it through the antenna module 21 or burning it through a burner, so that the identification module 2 stores the identification information of the corresponding memory module.
[0150] When the memory module needs to undergo status detection, such as during factory inspection, the serial presence detection information of the memory module stored in the read / write module and the serial presence detection information of the memory module stored in the identification module 2 can be read simultaneously, and the two can be compared to see if they are the same to confirm whether the memory module is qualified. If the serial presence detection information of the two is the same, it means that the memory module is qualified. If they are different, it is determined that there is a problem with the memory module and further testing is required to determine the problem. Through this monitoring method, the original identity information of the memory module can be monitored to avoid information tampering, so as to identify the memory module and verify the authenticity and source of the product.
[0151] In the exemplary embodiment of the present disclosure, the serial presence detection information of the identification chip 22 and the serial presence detection module can be read in any manner. For example, the serial presence detection information of the identification chip 22 and the serial presence detection module can be read by the management system of the memory module.
[0152] In an exemplary embodiment of the present disclosure, the identification information of the memory module also includes management information of the memory module; the management information includes one or more of the following information:
[0153] Memory module operation and maintenance information;
[0154] Memory module production information;
[0155] Logistics information of memory modules.
[0156] In this embodiment, the management information may include the status information of the entire life cycle of the memory module. The identification module 2 receives and stores the management information, which includes the operation and maintenance information, production information, and logistics information of the memory module to track the status changes of the memory module and improve management efficiency.
[0157] Among them, the above-mentioned management information is the post-factory information of the memory module (i.e., status change information). The above-mentioned management information can be written into the identification chip 22 by receiving it through the antenna module 21 to obtain the status change of the memory module, and the management information can be uploaded to the management system to realize the tracking of the entire life cycle of the memory module.
[0158] The exemplary embodiment of the present disclosure provides a monitoring method, which is applied to a management system, such as Figure 1 As shown, the memory module includes:
[0159] A substrate 1, comprising a first region 11 and a second region 12, wherein the first region 11 and the second region 12 have no intersection;
[0160] Identification module 2, arranged in the first area 11;
[0161] The memory chip 3 is disposed in the second area 12 .
[0162] like Figure 7 As shown, monitoring methods include:
[0163] S310 . When the memory module is not in operation, obtain identification information in an identification module in the memory module and serial presence detection information in a serial presence detection module in the memory module.
[0164] In step S310, the identification information in the identification module 2 in the memory module is the serial presence detection information written into the identification module 2. When the memory module is not in operation, the management system can read the identification chip 22 and the serial presence detection module to obtain the serial presence detection information of the identification chip and the serial presence detection module.
[0165] The memory module's inoperative state may include, for example, an unpowered state. Programming information in the unpowered state ensures that data is written completely and at once, preventing accidental modifications during system operation or system power interference with the programming voltage, which could lead to write failure or chip damage. The identification chip 22 of the identification module 2 can employ a passive dual-band radio frequency identification chip or an ultra-high frequency radio frequency identification chip. When the memory module is inoperative, the identification chip 22 can receive signals via its antenna module 21.
[0166] S320 : In response to the identification information matching the serial presence detection information, determine that the memory module meets a preset condition.
[0167] In step S320, the pre-set condition refers to memory module eligibility. Specifically, the memory module's eligibility is determined by comparing the identification information with the serial presence detect (SPD) information. If the identification information matches the SPD information, the SPD information written into identification module 2 is identical to the SPD information stored in the SPD module, confirming the memory module's eligibility. If they differ, a problem with the memory module is determined, requiring further testing to identify the problem. This automatically verifies the source and authenticity of the memory module.
[0168] In the exemplary embodiment of the present disclosure, the serial presence detection information of the identification chip 22 and the serial presence detection module can be read in any manner. For example, the serial presence detection information of the identification chip 22 and the serial presence detection module can be read by the management system of the memory module.
[0169] In an exemplary embodiment of the present disclosure, the identification information in the identification module 2 also includes management information; and the monitoring method further includes:
[0170] Obtaining management information of the memory module in identification module 2;
[0171] Determine the current status of the memory module based on the management information.
[0172] In this embodiment, the management information may include status information of the memory module throughout its life cycle. The management system can obtain the management information of the memory module in the identification module 2, and determine the current status of the memory module based on the management information, thereby obtaining the status change of the memory module to achieve tracking of the entire life cycle of the memory module.
[0173] The management information includes one or more of the following information: operation and maintenance information of the memory module; production information of the memory module; and logistics information of the memory module.
[0174] Through the monitoring method in the exemplary embodiment of the present disclosure, information about the memory module during production, shipment, and transportation can be obtained to determine the current status of the memory module. In this embodiment, the management information of the identification chip 22 can be read in any manner. For example, the management system can read the identification chip 22 to obtain management information such as the operation and maintenance information, production information, and logistics information of the memory module to obtain the current status of the memory module, such as the storage location, usage time, operating time, and transportation logistics, thereby achieving tracking of the entire life cycle of the memory module.
[0175] In the exemplary embodiment of the present disclosure, when a user wishes to understand the status of the memory module, the user can use an external reader to read the memory module's identification information, such as the memory module's management information, stored in the identification module 2 within the memory module to understand the current status of the memory module in real time. For example, if the identification chip 22 within the identification module 2 is a passive dual-band RFID chip or an ultra-high frequency RFID chip, the user can use a corresponding RFID chip reader to read the memory module's identification information stored within the identification module 2 within the memory module to understand the current status of the memory module.
[0176] In an exemplary embodiment of the present disclosure, the monitoring method further includes:
[0177] The serial presence detection information is written into the identification module 2.
[0178] In this embodiment, the SPD information may include the original identity information of the memory module before leaving the factory, and the SPD information is stored by the SPD module. Figure 1-Figure 3 As shown, a predetermined layer of the memory module substrate 1 is provided with a receiving slot 13, and the area where the receiving slot 13 is located corresponds to the first area 11. The identification module 2 includes an antenna module 21 disposed within the receiving slot 13 and an identification chip 22 disposed on a side of the antenna module 21 away from the receiving slot 13. The identification chip 22 is signal-connected to the antenna module 21. SPD information can be written into the identification module 2 by receiving it through the antenna module 21 or by programming it with a programmer. The identification module 2 receives and stores the SPD information as identification information for the identification module 2.
[0179] In an exemplary embodiment of the present disclosure, the monitoring method further includes:
[0180] The management information is written into the identification module 2.
[0181] In this embodiment, the management information may include the status information of the memory module throughout its life cycle. The above management information can be written into the identification chip 22 by receiving it through the antenna module 21 to obtain the status changes of the memory module, thereby realizing the tracking of the entire life cycle of the memory module.
[0182] In the exemplary embodiments of the present disclosure, the memory module and monitoring method have the following advantages:
[0183] In the exemplary embodiment of the present disclosure, through the structural design of the memory module, the identification module 2 is embedded in the signal-free area of the substrate 1 to avoid occupying the core circuit space, so that the identification module 2 can be integrated within the limited space of the memory module. In addition, in order not to interfere with high-frequency signals, a passive dual-frequency RFID chip or an ultra-high frequency RFID chip is used to avoid interference from the identification module during the operation of the memory chip. At the same time, in order to be compatible with the existing manufacturing process of memory modules, a high-temperature resistant ceramic-based passive dual-frequency RFID chip or an ultra-high frequency RFID chip is used to ensure that the identification module 2 can withstand the SMT high-temperature process, so that the identification module 2 and the memory particles can be SMT mounted simultaneously, achieving zero new processes, and having the advantages of production line compatibility and cost optimization.
[0184] In addition, hardware-level identity binding is achieved through the physical binding of the RFID chip and the memory module (such as DIMM). For example, the unique RFID serial number of the RFID chip is encrypted and written into the SPD module. When identifying the memory module, the correspondence between the identification module and the memory module is determined by determining the unique RFID serial number in the SPD module, which can make the counterfeit memory recognition rate reach 100%.
[0185] At the same time, the inclusion of Identification Module 2 in the memory module automates the management of the module's status throughout its lifecycle, reducing memory information acquisition time, such as memory location time, to seconds. This automated management of the module's status throughout its lifecycle enables unmanned data collection in production, logistics, and operation and maintenance, enabling full lifecycle tracking of the memory module and improving management efficiency by over 70%.
[0186] To sum up, in the exemplary embodiment of the present disclosure, by setting an identification module 2 in the memory module, and the identification chip 22 in the identification module 2 adopts a ceramic-based passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip, it is possible to achieve the automation of the state management of the entire life cycle of the memory module, and at the same time eliminate the physical / electromagnetic conflicts between the various components of the memory module, as well as the compatibility of the high-temperature packaging production line during the memory module manufacturing process, so as to achieve industrial-grade traceability and anti-environmental interference capabilities for the memory module without increasing costs, and solve the problems of easy damage and inefficient manual management of traditional external labels.
[0187] The various embodiments or implementation methods in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referenced to each other.
[0188] In the description of this specification, reference to the terms "embodiment", "exemplary embodiment", "some embodiments", "illustrative embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present disclosure.
[0189] In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any suitable manner in any one or more embodiments or examples.
[0190] In the description of the present disclosure, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, they cannot be understood as limitations on the present disclosure.
[0191] It is to be understood that the terms "first", "second", etc. used in the present disclosure can be used to describe various structures in the present disclosure, but these structures are not limited by these terms. These terms are only used to distinguish a first structure from another structure.
[0192] In one or more of the accompanying drawings, identical elements are represented by similar reference numerals. For clarity, many parts in the accompanying drawings are not drawn to scale. In addition, certain well-known parts may not be shown. For simplicity, a structure obtained after several steps may be described in a single figure. Many specific details of the present disclosure, such as device structure, materials, dimensions, processing techniques, and technologies, are described below to facilitate a clearer understanding of the present disclosure. However, as will be appreciated by those skilled in the art, the present disclosure may be practiced without following these specific details.
[0193] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the above embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the above embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.
Claims
1. A memory module, characterized in that: The memory module includes: a substrate, the substrate comprising a first region and a second region, the first region and the second region having no intersection; an identification module, disposed in the first area, storing identification information of the memory module, wherein the identification information of the memory module includes serial presence detection information of the memory module; A memory chip is arranged in the second area; the first area is a non-signal area, and the second area is a signal area; The preset layer of the substrate is provided with a receiving groove; the area where the receiving groove is located corresponds to the first area; The identification module includes: An antenna module is disposed in the receiving groove; an identification chip, disposed on a side of the antenna module away from the receiving slot and fixedly connected to the antenna module via a signal connection portion; the identification chip covers the receiving slot; The first region is located in a non-signal region at a long side edge of the substrate, a length of the first region is 0.10-0.30 times the length of the substrate, and a width of the first region is 0.28-0.55 times the width of the substrate; The preset layer is the top layer or the bottom layer of the substrate.
2. The memory module according to claim 1, wherein: The identification chip includes a ceramic-based passive dual-frequency radio frequency identification chip or an ultra-high frequency radio frequency identification chip.
3. The memory module according to claim 1, wherein: The identification information of the memory module also includes management information of the memory module.
4. A method for manufacturing a memory module, characterized in that: The manufacturing method is used to manufacture the memory module according to any one of claims 1 to 3, and the manufacturing method comprises: Providing a substrate, the substrate comprising a first region and a second region, wherein the first region and the second region have no intersection; An identification module is set in the first area, and a memory chip is set in the second area, wherein the identification module stores identification information of the memory module, and the identification information of the memory module includes serial presence detection information of the memory module.
5. The method for manufacturing a memory module according to claim 4, wherein: The preset layer of the substrate is provided with a receiving groove; the area where the receiving groove is located corresponds to the first area; The identification module includes an antenna module and an identification chip; Setting the identification module in the first area includes: placing the antenna module in the receiving slot; The identification chip is arranged on a side of the antenna module away from the receiving groove and is signal-connected to the antenna module.
6. A monitoring method, characterized in that: The monitoring method is applied to the memory module according to any one of claims 1 to 3, and the monitoring method includes: Identification information is received and stored through an identification module; the identification information includes identification information of the memory module, and the identification information of the memory module includes serial presence detection information of the memory module.
7. The monitoring method according to claim 6, characterized in that: The identification information of the memory module also includes management information of the memory module; the management information includes one or more of the following information: Operation and maintenance information of the memory module; Production information of the memory module; Logistics information of the memory module.
8. A monitoring method, characterized in that: The monitoring method is applied to a management system, and the monitoring method includes: When the memory module is not in operation, obtaining identification information from an identification module in the memory module and serial presence detection information from a serial presence detection module in the memory module; In response to the identification information matching the serial presence detection information, determining that the memory module meets a preset condition; The memory module is the memory module according to any one of claims 1 to 3.
9. The monitoring method according to claim 8, characterized in that: The identification information in the identification module also includes management information; the monitoring method further includes: Acquiring management information of the memory module in the identification module; The current state of the memory module is determined according to the management information.
Citation Information
Patent Citations
Circuit board of memory module and manufacturing method thereof
CN115515300A
