Maskless dendritic silicon nanostructure array processing method and silicon wafer prepared therefrom

Abstract

The present invention discloses a method for processing a maskless dendritic silicon nanostructure array and a silicon wafer prepared therefrom. The processing method comprises pretreatment, a first laser induction step, a second laser induction step, and electrodeposition. The processing method employs two stages of laser induction and a single electrodeposition step. Laser induction eliminates the need for a mask, thus preventing damage and contamination to the silicon nanostructure array during mask removal. Furthermore, biomimetic patterning of the silicon wafer's surface microstructure is achieved. The silicon wafer processed using this method, due to the microchannels formed within the maskless dendritic silicon nanostructure array, enables efficient capillary mass transfer along the microchannel walls. Furthermore, the dendritic silicon nanostructures have a large specific surface area, enabling efficient evaporative heat transfer perpendicular to the microchannels, thereby improving the heat transfer limit.

Description

Technical Field

[0001] The present invention relates to the field of silicon surface microstructure processing, in particular to a method for processing a maskless dendritic silicon nanostructure array and a silicon wafer prepared therefrom. Background Art

[0002] As the power and integration of electronic devices continue to increase, the need to dissipate heat for high-heat-flux devices has become a key bottleneck restricting their performance and reliability. Microchannel-based enhanced heat dissipation technology, due to its efficient heat and mass transport properties, has become a key solution. By constructing biomimetic micro-nanostructures on the inner surface of microchannels to regulate interfacial thermodynamic behavior, the capillary wetting ability and evaporative heat transfer coefficient of the microchannels can be significantly improved, enhancing the system's thermal management capabilities.

[0003] Currently, traditional processing methods for micro-nano interface reinforcement structures in microchannels include corrosion, sintering, laser processing, and electrospark machining. Although they are low-cost and highly efficient, they also have some significant disadvantages:

[0004] (1) These traditional methods often generate randomly distributed structures such as nanowires, nanoknives, nanospheres, nanopillars, and nanopores. This randomness makes the distribution of nanostructures inside the microchannel irregular, making it impossible to achieve optimal overall thermal conductivity.

[0005] (2) The random distribution of nanostructures results in non-directional liquid transport, which cannot effectively solve the local hot spot problem that occurs in the chip;

[0006] (3) At high heat flux density, the micro-nanostructure on the inner surface of the microchannel requires an ultra-high specific surface area to improve the surface heat transfer coefficient. At this time, the single-stage microstructure processed by traditional methods cannot meet the requirements;

[0007] (4) When processing graphic structures using traditional methods, masks are often required, which increases costs and reduces production efficiency. Summary of the Invention

[0008] The present invention aims to provide a method for fabricating maskless dendritic silicon nanostructure arrays to address the problem of poor thermal conductivity caused by the irregular distribution of nanostructures produced by the aforementioned methods, as well as the problem that the specific surface area of ​​single-level microstructures produced by conventional methods cannot meet the heat transfer coefficient requirements of existing products. The present invention also aims to provide a method for fabricating maskless dendritic silicon nanostructure arrays to fabricate silicon wafers, addressing the problem of localized hot spots caused by the random distribution of nanostructures on the surface of existing chips.

[0009] To achieve this object, the present invention adopts the following technical solutions:

[0010] The present invention provides a method for processing a maskless dendritic silicon nanostructure array, comprising the following steps:

[0011] Pretreatment: depositing metallic copper on the surface of the silicon wafer to form a copper layer on the surface of the silicon substrate, and then passivating the copper layer on the surface of the silicon substrate to form an insulating passivation film;

[0012] First laser induction: using a first laser beam to perform the first laser induction on the surface of the insulating passivation film, removing the insulating passivation film on a designated area, causing the insulating passivation film to fall off, and forming a primary needle-shaped protrusion structure on the surface of the copper layer;

[0013] Second laser induction: A second laser beam is used to perform a second laser induction on the surface of the primary needle-like protrusion structure to form a secondary hillock-like protrusion structure on the primary needle-like protrusion structure, thereby forming a double-stage needle-like seed layer on the surface of the silicon substrate;

[0014] Electrodeposition: Controllable parameter electrodeposition is performed on the double-stage needle-shaped seed layer, so that the double-stage needle-shaped seed layer is deposited and grown into a tree-like microstructure, thereby obtaining a silicon wafer containing a maskless tree-like silicon nanostructure array.

[0015] In the maskless dendritic silicon nanostructure array processing method, the first laser induction and the second laser induction are both achieved by an ultraviolet femtosecond laser direct writing device.

[0016] In the maskless dendritic silicon nanostructure array processing method, the pulse width of the first laser beam is 80 to 100 fs, and the laser wavelength of the first laser beam is 300 to 400 nm.

[0017] In the maskless dendritic silicon nanostructure array processing method, the pulse width of the second laser beam is 25 to 60 fs, and the laser wavelength of the second laser beam is 175 to 275 nm.

[0018] In the maskless dendritic silicon nanostructure array processing method, the height of the primary needle-shaped protrusion structure is 2 to 6 μm, and the size of the secondary hillock-shaped protrusion structure is 200 to 600 nm.

[0019] In the maskless dendritic silicon nanostructure array processing method, in the step of electrodeposition, when the parameter-controlled electrodeposition process is performed, the initial current density and deposition time satisfy the f(t) function:

[0020] f(t)=Kt+b

[0021] Where f(t) is the current density, and the current slope K is 0.003~0.2A / (cm 2 ·s), the deposition time t is 30~200s, and the initial current density b is 0.06~0.2A / cm 2 .

[0022] In the processing method of the maskless dendritic silicon nanostructure array, in the electroplating step, the electrolyte solution for controllable parameter electroplating is obtained by mixing CuSO4 solution and H2SO4 solution, and the concentration of the CuSO4 solution is 0.4~0.8M, and the concentration of the H2SO4 solution is 0.5~0.9M.

[0023] In the maskless dendritic silicon nanostructure array processing method, in the pretreatment step, a copper layer is deposited on the surface of the silicon substrate by magnetron sputtering, the target material of the magnetron sputtering is pure copper, and the thickness of the copper layer is 5 to 7 μm.

[0024] In the maskless dendritic silicon nanostructure array processing method, in the pre-processing step, the thickness of the insulating passivation film is 0.5 to 2 μm.

[0025] The present invention also provides a silicon wafer, on which the silicon nanostructure array is obtained by the above-mentioned method for processing the maskless tree-like silicon nanostructure array.

[0026] A technical solution in the present invention can have the following beneficial effects:

[0027] In the silicon wafer processed by the above method, microchannels are formed between the dendritic silicon nanostructure units, which can carry out efficient capillary mass transfer along the wall of the microchannel; at the same time, the dendritic silicon nanostructure units have a larger specific surface area because they include several secondary hill-like protrusion structures and tree-like microstructures, which can carry out efficient evaporation heat transfer in the vertical direction of the microchannel, thereby improving the heat transfer limit. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 1 is a schematic diagram of the processing process of the pretreatment step in one embodiment of the present invention;

[0029] Figure 2 1 is a schematic diagram of the processing process of the second laser induction step in one embodiment of the present invention;

[0030] Figure 3 is a schematic diagram of the processing process of the electrodeposition step in one embodiment of the present invention;

[0031] Figure 4 This is a scanning electron microscope (SEM) image of a silicon wafer containing a maskless dendritic silicon nanostructure array obtained in Example 1;

[0032] Figure 5 This is a scanning electron microscope (SEM) image of a silicon wafer containing a maskless dendritic silicon nanostructure array obtained in Example 2;

[0033] Figure 6 This is a scanning electron microscope (SEM) image of a silicon wafer containing a maskless dendritic silicon nanostructure array obtained from the blank control group;

[0034] Figure 7 This is a scanning electron microscope (SEM) image of a silicon wafer containing a maskless dendritic silicon nanostructure array obtained in Example 3;

[0035] Figure 8 This is a scanning electron microscope (SEM) image of a silicon wafer containing a maskless dendritic silicon nanostructure array obtained in Example 4;

[0036] Figure 9 This is a scanning electron microscope (SEM) image of a silicon wafer containing a maskless dendritic silicon nanostructure array obtained in Example 5;

[0037] In the accompanying drawings: silicon wafer 1, copper layer 2, insulating passivation film 3, second laser beam 4, primary needle-shaped protrusion structure 5, secondary hillock-shaped protrusion structure 6. DETAILED DESCRIPTION

[0038] The technical solution of the present invention will be further illustrated below by way of specific embodiments. To facilitate understanding of the present invention, the present invention will be described in more detail below. The present invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, the purpose of providing these embodiments is to provide a more thorough and comprehensive understanding of the disclosure of the present invention.

[0039] If no specific techniques or conditions are specified in the examples, the experiments were carried out according to the techniques or conditions described in the literature in the field or according to the product instructions. All reagents or instruments used without specifying the manufacturer are commercially available conventional products.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which this invention pertains. The terms used herein in the specification of the present invention are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0041] Please refer to Figures 1 to 3 The present invention provides a method for processing a maskless dendritic silicon nanostructure array, comprising the following steps:

[0042] Pretreatment: depositing metallic copper on the surface of the silicon wafer 1 to form a copper layer 2 on the surface of the silicon substrate, and then passivating the copper layer 2 on the surface of the silicon substrate to form an insulating passivation film 3;

[0043] First laser induction: A first laser beam is used to perform a first laser induction on the surface of the insulating passivation film 3 to remove the insulating passivation film 3 on a designated area, causing the insulating passivation film 3 to fall off and forming a primary needle-shaped protrusion structure 5 on the surface of the copper layer 2;

[0044] Second laser induction: A second laser beam 4 is used to perform a second laser induction on the surface of the primary needle-like protrusion structure 5 to form a secondary hillock-like protrusion structure 6 on the primary needle-like protrusion structure 5, so that a double-stage needle-like seed layer is formed on the surface of the silicon substrate;

[0045] Electrodeposition: Controllable parameter electrodeposition is performed on the double-stage needle-shaped seed layer, so that the double-stage needle-shaped seed layer is deposited and grown into a tree-like microstructure, thereby obtaining a silicon wafer 1 containing a maskless tree-like silicon nanostructure array.

[0046] In the maskless processing method of the tree-like silicon nanostructure array, a first laser beam is used to perform a first laser induction on the surface of the insulating passivation film 3; after the first laser beam is used, the copper layer 2 on the silicon wafer 1 forms a primary needle-like protrusion structure 5; then a second laser beam 4 is used to perform a second laser induction on the surface of the primary needle-like protrusion structure 5, and a secondary hillock-like protrusion structure 6 is generated on the basis of the primary needle-like protrusion structure 5; then, metallic copper is deposited on the secondary hillock-like protrusion structure 6 by electrodeposition, and a plurality of tree-like microstructures are formed on the secondary hillock-like protrusion structure 6.

[0047] The maskless dendritic silicon nanostructure array consists of several dendritic silicon nanostructure units, each of which includes a primary needle-like protrusion 5 and several secondary hillock-like protrusions 6. The secondary hillock-like protrusions 6 are also provided with multiple dendritic microstructures. The dendritic silicon nanostructure units are tree-like, with the primary needle-like protrusions 5 as the main trunk, the secondary hillock-like protrusions 6 as branches, and the dendritic microstructures as secondary branches on the secondary hillock-like protrusions 6.

[0048] The processing method employs two stages of laser induction and one stage of electrodeposition. The pattern of the maskless dendritic silicon nanostructure array is determined by the processing path of the first laser beam, eliminating the need for a mask and preventing damage and contamination to the silicon nanostructure array during mask removal. Furthermore, a maskless dendritic silicon nanostructure array with a specified pattern can be formed on the surface of a silicon wafer 1, achieving biomimetic patterning of the silicon wafer surface microstructure. During the electrodeposition process, copper ions in the electrolyte solution migrate toward the surface of the seed layer, which serves as the cathode. Because the seed layer is conductive, the copper ions receive electrons on the seed layer surface and are reduced to copper atoms, which are then deposited on the two-stage needle-shaped seed layer. Furthermore, the dendritic microstructure branches during deposition, further increasing the specific surface area.

[0049] In the silicon wafer 1 processed by the above method, microchannels are formed between the dendritic silicon nanostructure units, which can perform efficient capillary mass transfer along the wall of the microchannel; at the same time, the dendritic silicon nanostructure units have a larger specific surface area because they include several secondary hill-like protrusion structures 6 and tree-like microstructures, and can perform efficient evaporation heat transfer in the vertical direction of the microchannel, which can improve the heat transfer limit.

[0050] The passivation treatment can refer to the existing steps for preparing a passivation film of metallic copper. The specific steps include: first polishing the surface of the copper layer 2, then using an acidic detergent to remove impurities such as oil and oxides on the surface, and finally immersing the silicon wafer 1 containing the copper layer 2 in a passivation solution. The passivation solution is benzotriazole (BTA) or sodium silicate solution, and the thickness of the insulating passivation film 3 can be controlled by controlling the concentration, temperature and immersion time of the passivation solution.

[0051] Specifically, the first laser induction and the second laser induction are both achieved by an ultraviolet femtosecond laser direct writing device.

[0052] The first and second laser beams 4 emitted by the ultraviolet femtosecond laser direct writing device are both ultraviolet femtosecond lasers. The ultraviolet femtosecond laser direct writing device can determine the focal position of the first laser beam, and through sputtering and remelting mechanisms, an array of primary needle-like protrusion structures 5 with a specified pattern is generated on the insulating passivation film 3. Subsequently, the ultraviolet femtosecond laser direct writing device determines the focal position of the second laser beam 4, so that the second laser beam 4 is irradiated on the primary needle-like protrusion structures 5. Based on the primary needle-like structures, a number of secondary hill-like protrusion structures 6 are formed through sputtering and remelting mechanisms.

[0053] Specifically, the pulse width of the first laser beam is 80-100 fs, and the laser wavelength of the first laser beam is 300-400 nm.

[0054] The focus of the first laser beam is positioned on a designated area of ​​the insulating passivation film 3, forming a primary needle-like protrusion structure 5 on the silicon surface. These primary needle-like protrusion structures 5 are combined into an array of primary needle-like protrusion structures 5. By controlling the path of the first laser beam, a specific pattern of primary needle-like protrusion structures 5 can be generated. Subsequently, a second laser induction and electrodeposition process are performed to form a complex tree-like structure on the array of primary needle-like protrusion structures 5.

[0055] Specifically, the pulse width of the second laser beam 4 is 25 to 60 fs, and the laser wavelength of the second laser beam 4 is 175 to 275 nm.

[0056] Similarly, the focal position of the second laser beam 4 is located on a designated area of ​​the primary needle-like structure, forming a secondary hillock-like protrusion structure 6 on the primary needle-like structure. By adjusting the parameters of the second laser beam 4 on the ultraviolet femtosecond laser direct writing device, the size of the secondary hillock-like protrusion structure 6 can be controlled, thereby adjusting the size of the dendritic silicon nanostructure unit.

[0057] Specifically, the height of the primary needle-like protrusion structure 5 is 2-6 μm, and the size of the secondary hillock-like protrusion structure 6 is 200-600 nm.

[0058] The primary needle-like protrusions 5 are micrometer-scale, while the secondary hillock-like protrusions 6 are nanometer-scale. The primary needle-like protrusions 5 provide support and flow guidance, while the secondary hillock-like protrusions 6 and the dendritic microstructures deposited thereon increase the specific surface area, thereby improving heat exchange efficiency. The height of the primary needle-like protrusions 5 is adjusted by adjusting the pulse width and wavelength of the first laser beam; the size of the secondary hillock-like protrusions 6 is adjusted by adjusting the pulse width and wavelength of the second laser beam 4.

[0059] Specifically, in the step of electrodeposition, when the controllable parameter electrodeposition process is performed, the initial current density and deposition time satisfy the f(t) function:

[0060] f(t)=Kt+b

[0061] Where f(t) is the current density, and the current slope K is 0.003~0.2A / (cm 2 ·s), the deposition time t is 30~200s, and the initial current density b is 0.06~0.2A / cm 2 .

[0062] The electrodeposition step utilizes a variable current deposition method. By adjusting the current, the growth rate relationship between the seed nucleus and the secondary branches can be adjusted, thereby forming a tree-like microstructure. The longer the deposition time, the more branches the tree-like microstructure grows, forming a complex tree-like microstructure.

[0063] Using the above f(t) function, a low current density can be used at the beginning of deposition to initially nucleate the secondary hillock-like protrusions 6 and uniformly grow the copper microstructure upward. Over time, the current density is gradually increased, causing the copper microstructure to grow laterally, branching and expanding, ultimately forming a multi-level tree-like structure in the later stages of deposition. Here, K is the current slope, representing the ratio of current density to time; t is the time for electrodeposition, a controllable parameter; and b is the initial current density.

[0064] Specifically, in the step of electrodeposition, the electrolyte solution for controllable parameter electrodeposition is obtained by mixing a CuSO4 solution and a H2SO4 solution, and the concentration of the CuSO4 solution is 0.4-0.8M, and the concentration of the H2SO4 solution is 0.5-0.9M.

[0065] In the specific steps, a silicon wafer (1) with a dual-stage needle-shaped seed layer is connected to the negative terminal of a power supply as a cathode. A phosphor copper plate is connected to the positive terminal of the power supply as an anode to maintain the balance of copper ions in the electrolyte solution. The CuSO4 solution primarily provides copper ions, with its concentration affecting the supply rate. The H2SO4 solution primarily regulates the acidity.

[0066] Specifically, in the pretreatment step, a copper layer 2 is deposited on the surface of the silicon substrate by magnetron sputtering, the target material of the magnetron sputtering is pure copper, and the thickness of the copper layer 2 is 5 to 7 μm.

[0067] In a specific embodiment, the purity of the pure copper is 99.99%, and the thickness of the copper layer 2 is 5 to 7 μm. The pure copper of this purity contains few metallic impurities, which prevents the impurities from affecting the absorptivity of the copper layer 2 to the first laser beam / second laser beam 4 during the first laser induction / second laser induction steps, and prevents the impurities from affecting the growth rate of the metallic copper during electrodeposition.

[0068] The thickness of the copper layer affects the formation of the dual-stage needle-shaped seed layer. The primary needle-shaped protrusions 5 are formed by melting the surface of the copper layer 2 using the energy of the first laser beam. If the thickness of the copper layer 2 is too large, it will not provide enough metallic copper to form the primary needle-shaped protrusions. Furthermore, if the primary needle-shaped protrusions are too small, the secondary hillock-shaped protrusions formed on top of the primary needle-shaped protrusions by the second laser beam will not form, ultimately affecting the formation of the dual-stage needle-shaped seed layer. A too small thickness of the copper layer 2 increases the overall thickness of the silicon wafer and prevents the effective utilization of the metallic copper in the copper layer 2, resulting in a waste of resources.

[0069] In a specific embodiment of the present invention, the thickness of the insulating passivation film 3 is 0.5 to 2 μm. A thickness of less than 2 μm prevents the insulating passivation film 3 from being incompletely vaporized during the first laser induction process and from being melted and deposited on the surface of the copper layer 2, thereby affecting the accuracy and quality of the subsequent electrodeposition step. If the thickness of the insulating passivation film 3 is greater than 0.5 μm, the insulating passivation film 3 is too thin to protect the copper layer 2.

[0070] The present invention also provides a silicon wafer, on which the silicon nanostructure array is obtained by the above-mentioned method for processing the maskless tree-like silicon nanostructure array.

[0071] By adjusting the pulse width and wavelength of the first laser beam, the pulse width and wavelength of the second laser beam (4), and the electrodeposition current, the pattern distribution can be optimized according to the biomimetic topology, achieving optimal heat and mass transfer performance. The neat arrangement of the tree-like silicon nanostructure units within the silicon nanostructure array avoids the localized hot spots that occur in existing chips due to the random distribution of nanostructures on their surfaces.

[0072] Example 1

[0073] A method for processing a maskless dendritic silicon nanostructure array comprises the following steps:

[0074] A copper layer 2 is deposited on the surface of the silicon substrate by magnetron sputtering, so that a copper layer 2 is formed on the surface of the silicon substrate, and the thickness of the copper layer 2 is 7 μm; the copper layer 2 on the surface of the silicon substrate is then passivated to form an insulating passivation film 3, and the thickness of the insulating passivation film 3 is 2 μm;

[0075] A first laser beam is emitted using an ultraviolet femtosecond laser direct writing device. The first laser beam is used to perform a first laser induction on the surface of the insulating passivation film 3, thereby removing the insulating passivation film 3 on a specified area, causing the insulating passivation film 3 to fall off, and forming a primary needle-shaped protrusion structure 5 on the surface of the copper layer 2. The pulse width of the first laser beam is 80 fs, and the laser wavelength of the first laser beam is 300 nm.

[0076] A second laser beam 4 is emitted using an ultraviolet femtosecond laser direct writing device, and a second laser induction is performed on the surface of the primary needle-like protrusion structure 5 by the second laser beam 4, thereby forming a secondary hillock-like protrusion structure 6 on the primary needle-like protrusion structure 5, so that a double-stage needle-like seed layer is formed on the surface of the silicon substrate; the pulse width of the second laser beam 4 is 25 fs, and the laser wavelength of the second laser beam 4 is 175 nm;

[0077] The double-stage needle-shaped seed layer is subjected to controllable parameter electrodeposition, wherein the electrolyte solution for the controllable parameter electrodeposition is obtained by mixing a CuSO4 solution and a H2SO4 solution, wherein the concentration of the CuSO4 solution is 0.4M and the concentration of the H2SO4 solution is 0.6M;

[0078] The initial current density and deposition time satisfy the f(t) function:

[0079] f(t)=Kt+b

[0080] Where f(t) is the current density, and the initial current density b is 0.2A / cm 2 , the current slope K is 0.05A / (cm 2 ·s), the time t of controllable parameter electrodeposition is 30s;

[0081] After controlled parameter electrodeposition, a double-stage needle-shaped seed layer is deposited to grow a tree-like microstructure, resulting in a silicon wafer containing a maskless tree-like silicon nanostructure array.

[0082] Example 2

[0083] The specific steps of Example 2 are substantially the same as those of Example 1, except that, in the controllable parameter electrodeposition, the time of the controllable parameter electrodeposition is 60 s;

[0084] Example 3

[0085] The specific steps of Example 3 are basically the same as those of Example 1, except that in the controllable parameter electrodeposition, the initial current density b is 0.06 A / cm 2 , the current slope K is 0.003A / (cm 2 ·s), the time t of controllable parameter electrodeposition is 200s;

[0086] Example 4

[0087] The specific steps of Example 4 are basically the same as those of Example 1, except that in the controllable parameter electrodeposition, the initial current density b is 0.06 A / cm 2 , the current slope K is 0.004A / (cm 2 ·s), the time t of controllable parameter electrodeposition is 200s;

[0088] Example 5

[0089] The specific steps of Example 5 are basically the same as those of Example 1, except that in the controllable parameter electrodeposition, the initial current density b is 0.06 A / cm 2 , the current slope K is 0.005A / (cm 2 ·s), the time t of controllable parameter electrodeposition is 200s;

[0090] Example 6

[0091] The specific steps of Example 6 are basically the same as the specific steps of Example 1, except that the thickness of the copper layer 2 is 5 μm; the thickness of the insulating passivation film 3 is 0.5 μm; the pulse width of the first laser beam is 100 fs, and the laser wavelength of the first laser beam is 400 nm; the pulse width of the second laser beam 4 is 60 fs, and the laser wavelength of the second laser beam 4 is 275 nm; the concentration of the CuSO4 solution is 0.8 M, and the concentration of the H2SO4 solution is 0.9 M.

[0092] Blank control group

[0093] The specific steps of the blank control group are basically the same as those of Example 1, except that the time t of the controllable parameter electrodeposition is 0s;

[0094] The silicon wafers containing the maskless dendritic silicon nanostructure arrays obtained in Examples 1 to 5 and the blank control group were observed using a scanning electron microscope.

[0095] Reference Figures 4-6 It can be seen that when other conditions are the same but the deposition time is different, the growth of the dendritic microstructure shows a rule that as the deposition time t increases, the number of branches of the dendritic microstructure gradually increases, proving that the deposition time t affects the number of branches of the dendritic microstructure.

[0096] Reference Figures 7-9 It can be seen that the growth morphology of the microstructure is different under different current slopes. 2 ·s), the branches of the microstructure are relatively short and thick; when the current slope is 0.005A / (cm 2 ·s), the branches of the microstructure are relatively long, which proves that the current slope has a great influence on the morphology of the tree-like microstructure.

[0097] The technical principles of the present invention have been described above with reference to specific embodiments. These descriptions are intended solely to illustrate the principles of the present invention and are not to be construed in any way as limiting the scope of protection of the present invention. Based on the explanations herein, those skilled in the art will be able to devise other specific embodiments of the present invention without inventive effort, and such equivalent variations or substitutions are intended to be encompassed within the scope of the claims of this application.

Claims

1. A method for processing a maskless dendritic silicon nanostructure array, characterized in that: The following steps are involved: Pretreatment: depositing metallic copper on the surface of the silicon wafer to form a copper layer on the surface of the silicon substrate, and then passivating the copper layer on the surface of the silicon substrate to form an insulating passivation film; First laser induction: using a first laser beam to perform the first laser induction on the surface of the insulating passivation film, removing the insulating passivation film on a designated area, causing the insulating passivation film to fall off, and forming a primary needle-shaped protrusion structure on the surface of the copper layer; Second laser induction: A second laser beam is used to perform a second laser induction on the surface of the primary needle-like protrusion structure to form a secondary hillock-like protrusion structure on the primary needle-like protrusion structure, thereby forming a double-stage needle-like seed layer on the surface of the silicon substrate; Electrodeposition: Controllable parameter electrodeposition is performed on the double-stage needle-shaped seed layer, so that the double-stage needle-shaped seed layer is deposited and grown into a tree-like microstructure, thereby obtaining a silicon wafer containing a maskless tree-like silicon nanostructure array; In the electrodeposition step, when the controllable parameter electrodeposition process is performed, the initial current density and deposition time satisfy the f(t) function: f(t)=Kt+b Where f(t) is the current density, and the current slope K is 0.003~0.2A / (cm 2 ·s), the deposition time t is 30~200s, and the initial current density b is 0.06~0.2A / cm 2 .

2. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, characterized in that: The first laser induction and the second laser induction are both achieved by an ultraviolet femtosecond laser direct writing device.

3. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, wherein: The pulse width of the first laser beam is 80 to 100 fs, and the laser wavelength of the first laser beam is 300 to 400 nm.

4. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, wherein: The pulse width of the second laser beam is 25 to 60 fs, and the laser wavelength of the second laser beam is 175 to 275 nm.

5. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, wherein: The height of the primary needle-shaped protrusion structure is 2 to 6 μm, and the size of the secondary hillock-shaped protrusion structure is 200 to 600 nm.

6. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, wherein: In the step of electroplating, the electrolyte solution for controllable parameter electroplating is obtained by mixing a CuSO4 solution and a H2SO4 solution, wherein the concentration of the CuSO4 solution is 0.4-0.8M, and the concentration of the H2SO4 solution is 0.5-0.9M.

7. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, wherein: In the pretreatment step, a copper layer is deposited on the surface of the silicon substrate by magnetron sputtering, the target material of the magnetron sputtering is pure copper, and the thickness of the copper layer is 5 to 7 μm.

8. The method for processing a maskless dendritic silicon nanostructure array according to claim 1, wherein: In the pretreatment step, the thickness of the insulating passivation film is 0.5 to 2 μm.

9. A silicon wafer, characterized in that The silicon nanostructure array on the silicon wafer is obtained by the maskless dendritic silicon nanostructure array processing method according to any one of claims 1 to 8.

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