Package substrate and manufacturing method thereof

Abstract

The invention provides a package substrate and a manufacturing method thereof. The packaging substrate comprises a plurality of conductive columns which are formed on a wiring layer on a plate body of a semiconductor plate and are electrically connected with the wiring layer, molten glass coats the wiring layer and the conductive columns, then the molten glass is solidified to form a glass layer, and a circuit layer which is electrically connected with the plurality of conductive columns is formed on the glass layer. Therefore, the glass layer is formed by the molten glass, so that the material characteristic of the glass layer is closer to that of a plate body of a semiconductor plate, and the bonding force between the plate body and the glass layer can be improved when a layer-adding process is carried out.

Description

Technical Field

[0001] The present invention relates to a semiconductor packaging process, and more particularly to a packaging substrate capable of improving the yield and a manufacturing method thereof. Background Art

[0002] With the vigorous development of the electronics industry, electronic products tend to be thinner, lighter, shorter and smaller in form, and in terms of functions, they are developed in the direction of high performance, high functionality and high speed. Therefore, in order to meet the requirements of high integration and miniaturization of semiconductor devices, in the packaging process, packaging substrates with high-density and fine-pitch lines are often used.

[0003] The existing glass core board has extremely high surface flatness and low roughness, providing an ideal carrier for micro-sized semiconductor chips. Moreover, the glass core board has strong thermal stability, can maintain stable performance in high-temperature environments, and its coefficient of thermal expansion is close to that of silicon, which helps to reduce the problem of uneven thermal stress distribution of semiconductor chips caused by the mismatch of the coefficient of thermal expansion (CTE) during the packaging process. At the same time, the rigidity of the glass core board is higher than that of traditional resin core boards, so it can effectively improve the warping problem of the carrier board during the process.

[0004] As Figure 1 shown, the existing packaging substrate 1 includes: a glass core board 10, and wiring layers 11 formed on opposite two surfaces of the glass core board 10. Conductive vias 100 electrically connecting the wiring layers 11 are provided in the glass core board 10. An interposer structure 1a is formed on one side of the glass core board 10, which includes a dielectric layer 12, conductive blind vias 13 formed in the dielectric layer 12, and a circuit layer 14 formed on the dielectric layer 12. A solder mask layer 15 is formed on the other side of the glass core board 10 and on the interposer structure 1a.

[0005] However, in the existing packaging substrate 1, for the interposer operation on the glass core board 10 using an ABF film (Ajinomoto build-up film), prepreg (PP), or other dielectric materials as the dielectric layer 12, problems such as residual thermal stress or insufficient bonding force may occur between the glass core board 10 and the ABF (or PP) due to different coefficients of thermal expansion of the materials, thereby affecting the reliability of subsequent packaging operations.

[0006] Furthermore, the properties of the ABF or PP materials used for the glass core board 10 and the interposer structure 1a are quite different. Although they can be combined with each other by vacuum lamination, due to different material characteristics, there is still a problem of poor bonding at the interface between the two.

[0007] In addition, during the lamination process, the glass core board 10 is fragile, resulting in the scrapping of the entire glass core board 10 and causing waste of material cost and time cost.

[0008] In addition, the existing conductive blind vias 13 are formed by laser drilling on the dielectric layer 12 and then the holes are cleaned with hydrofluoric acid, resulting in deterioration of the glass surface inside the holes and causing the glass core board 10 to break, leading to poor stability of the wiring layer 11. Moreover, when electroplating a metal material inside the holes, it is easy to cause the problem of concavity on the end face of the conductive blind vias 13.

[0009] Therefore, how to overcome the above-mentioned various problems of the prior art has actually become an urgent issue to be solved at present. Summary of the Invention

[0010] The object of the present invention is to provide a packaging substrate and a manufacturing method thereof to solve at least one of the above problems.

[0011] In view of the above-mentioned various defects of the prior art, the present invention provides a packaging substrate, including: a plate body having a wiring layer, which is a semiconductor plate material, and a plurality of conductive vias electrically connecting the wiring layer are formed in the plate body; a plurality of conductive posts are formed on the wiring layer and electrically connected to the wiring layer; a glass layer is formed on the plate body to cover the wiring layer and the conductive posts; and a circuit layer is formed on the glass layer and electrically connected to the plurality of conductive posts.

[0012] The present invention also provides a manufacturing method of a packaging substrate, including: providing a plate body having a wiring layer, which is a semiconductor plate material, and a plurality of conductive vias electrically connecting the wiring layer are formed in the plate body; forming a plurality of conductive posts electrically connected to the wiring layer on the wiring layer to obtain a substrate structure; forming molten glass on the substrate structure to cover the wiring layer and the conductive posts; curing the molten glass to form a glass layer; and forming a circuit layer electrically connected to the plurality of conductive posts on the glass layer.

[0013] In a specific embodiment of the foregoing packaging substrate and its manufacturing method, the plate body is quartz glass.

[0014] In a specific embodiment of the foregoing packaging substrate and its manufacturing method, the molten glass includes borosilicate glass or lead-free glass of the bismuth series.

[0015] In a specific embodiment of the foregoing packaging substrate and its manufacturing method, the melting point of the molten glass is 700 to 850 °C.

[0016] In a specific embodiment of the foregoing packaging substrate and its manufacturing method, the glass transition temperature of the glass layer is 300 to 400 °C lower than the glass transition temperature of the plate body.

[0017] In a specific embodiment of the foregoing encapsulation substrate and its manufacturing method, the glass layer is formed by cooling and solidifying the molten glass.

[0018] In a specific embodiment of the manufacturing method of the foregoing encapsulation substrate, the step of solidifying the molten glass further includes annealing at 200 to 300 °C to eliminate the stress of the formed glass layer.

[0019] As can be seen from the above, for the encapsulation substrate and its manufacturing method of the present invention, the glass layer is mainly formed by the molten glass, making its material properties closer to those of the semiconductor plate body, such as similar coefficient of thermal expansion (CTE). Therefore, compared with the prior art, when performing the build-up process, the present invention can avoid the problems of residual thermal stress or insufficient bonding force caused by different coefficients of thermal expansion of the materials between the existing dielectric layer and the glass core board, which is beneficial for subsequent processing and encapsulation. After the glass layer is combined with the plate body, the overall structure of the encapsulation substrate is more stable.

[0020] Furthermore, the present invention directly uses molten glass to form the glass layer without using the existing vacuum lamination method, thus avoiding the problem of the entire plate body being scrapped due to the rupture of the semiconductor plate body. Therefore, compared with the prior art, the present invention can avoid waste of material cost and time cost. Description of the Drawings

[0021] Figure 1 It is a schematic cross-sectional view of an existing encapsulation substrate.

[0022] Figures 2A to 2E It is a schematic cross-sectional view of the manufacturing method of the encapsulation substrate of the present invention.

[0023] The reference numerals are as follows:

[0024] 1, 2 Encapsulation substrate

[0025] 1a Build-up structure

[0026] 10 Glass core board

[0027] 100, 200 Conductive vias

[0028] 11, 21 Wiring layers

[0029] 12 Dielectric layer

[0030] 13 Conductive blind via

[0031] 14, 24 Circuit layers

[0032] 15, 25 Solder mask layers

[0033] 2a Substrate structure

[0034] 20 Plate body

[0035] 22 Glass layer

[0036] 23 Conductive post

[0037] 250 Opening

[0038] 3 Mold

[0039] 30 Molten glass. Detailed implementation manners

[0040] The following describes the implementation manners of the present invention through specific specific examples. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification.

[0041] It should be noted that the structures, ratios, sizes, etc. shown in the attached drawings of this specification are only used to cooperate with the content disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limited conditions under which the present invention can be implemented. Therefore, they do not have technical substantial significance. Any modification of the structure, change of the proportional relationship or adjustment of the size, without affecting the effects that the present invention can produce and the purposes that can be achieved, should still fall within the scope that can be covered by the technical content disclosed in the present invention. At the same time, terms such as "upper" and "one" cited in this specification are only for the convenience of clear narration, and are not used to limit the scope under which the present invention can be implemented. The change or adjustment of their relative relationships, without substantial change in technical content, should also be regarded as the scope under which the present invention can be implemented.

[0042] Figures 2A to 2E It is a schematic cross-sectional view of the manufacturing method of the packaging substrate 2 of the present invention.

[0043] As Figure 2A shown, a plate body 20 is provided, which has a wiring layer 21 on its opposite sides, and a plurality of conductive vias 200 that penetrate the plate body 20 and electrically connect the wiring layer 21 are formed in the plate body 20.

[0044] In this embodiment, the plate body 20 is a semiconductor plate such as glass or a silicon plate, and the wiring layer 21 and the conductive vias 200 are made of copper. For example, the plate body 20 uses quartz-based glass. It should be understood that generally, the higher the purity and the lower the hydroxyl content of the quartz glass, the higher its glass transition temperature (glass transition temperature, code T g ), which is usually between 1180 and 1250 °C.

[0045] As Figure 2B shown, a patterning process of exposure and development is performed to form a plurality of conductive posts 23 that electrically connect the wiring layer 21 on the wiring layer 21 by means of a patterned resist layer (not shown). Then, the resist layer is removed to obtain a substrate structure 2a.

[0046] In this embodiment, the conductive posts 23 are made of copper. For example, copper pillars are directly grown on the wiring layer 21 without laser drilling on the dielectric layer, so there is no need to use hydrofluoric acid, thus avoiding the surface glass of the board body 20 from deteriorating and causing the board body 20 to break. Therefore, the stability of the wiring layer 21 can be improved.

[0047] As Figure 2C shown, the substrate structure 2a is placed in a mold 3, and then the molten glass 30 is filled into the mold 3 by the casting method, so that the molten glass 30 is formed on the substrate structure 2a to cover the wiring layer 21 and the conductive posts 23.

[0048] In this embodiment, the molten glass 30 includes borosilicate glass or lead-free glass of the bismuth series, and its melting point is 700 to 850 °C, so it belongs to low-melting-point glass. Moreover, this temperature is lower than the melting point of copper and lower than the glass transition temperature (T g ) of the board body 20 by a difference of about 300 to 400 °C.

[0049] In a specific embodiment, the formula of the borosilicate glass with a low melting point (melting point of about 700 - 850 °C) includes 40 to 50 wt% of SiO2 (silicon dioxide), 20 to 30 wt% of B2O3 (boron trioxide), 15 to 25 wt% of Na2O (sodium oxide), 5 to 10 wt% of K2O (potassium oxide), 5 to 10 wt% of CaO (calcium oxide), 0 to 5 wt% of MgO (magnesium oxide), and 0 to 5 wt% of Al2O3 (aluminum oxide). SiO2 is the main structure former, providing the basic framework of the glass. Excessive content will increase the melting point. B2O3 is also a structure former, which helps to lower the melting point and improve the thermal stability of the glass. Na2O and K2O are alkali metal oxides and act as structure modifiers, which can significantly lower the melting point of the glass and are used to break the connection between silicon-oxygen tetrahedrons and reduce the melting temperature. The alkaline earth metal oxides CaO and MgO also act as structure modifiers, and at the same time can improve the mechanical strength and chemical stability of the glass. Al2O3 can enhance the chemical stability and mechanical properties of the glass, but excessive addition will increase the melting point.

[0050] In a specific embodiment, the formulation of a lead-free glass of the bismuth series with a low melting point (melting point of about 700 - 850 °C) includes 40 to 60 wt% of Bi2O3, 10 to 20 wt% of B2O3, 5 to 10 wt% of SiO2, 10 to 20 wt% of Na2O, 5 to 10 wt% of K2O, a total of 0 to 10 wt% of CaO, MgO, BaO (barium oxide), and 0 wt% to 5 wt% of Al2O3. Bi2O3 can lower the melting point, but too high a content may lead to a decline in the water resistance and chemical stability of the glass. Adding a small amount of SiO2 or B2O3 can enhance the stability of the glass structure. Even though these components will increase the melting point of the bismuth-based glass, appropriate addition helps to maintain the basic properties of the glass and at the same time control the overall melting point through other components. Adding alkali metal oxides, such as Na2O and K2O, can significantly lower the melting point of the glass. These oxides, as structure modifiers, will break the connections in the glass structure, thereby reducing the melting point. Alkaline earth metal oxides such as CaO, MgO, and BaO can also be used as structure modifiers to help lower the melting point. While maintaining a certain mechanical strength, these oxides can also improve the thermal expansion coefficient and chemical stability of the glass.

[0051] In addition, after placing the substrate structure 2a in the mold 3, a preheating operation can be performed first to facilitate the pouring of the molten glass 30. For example, when the preheating temperature is 700 - 850 °C, the thermal stress generated due to the temperature difference can be reduced, and at this time, the temperature is also lower than the T g point of the plate body 20. In addition, the preheating temperature is still 200 to 300 °C lower than the melting point of copper, so the states of the wiring layer 21 and the conductive posts 23 are still stable. As Figure 2D shown, cool the molten glass 30 to solidify it into the glass layer 22, and remove the mold 3.

[0052] In this embodiment, first take out the overall structure from the mold 3, then select a suitable temperature (about 200 to 300 °C) for annealing treatment according to the two systems of glass materials used in the glass layer 22. After that, perform processing such as polishing on the surface of the glass layer 22 to make the surface of the glass layer 22 flat and the end faces of the conductive posts 23 flush with the surface of the glass layer 22.

[0053] Therefore, the production of the conductive posts 23 does not require laser drilling on the dielectric layer, and thus there is no need to electroplate metal materials in the holes, so the problem of dents on the end faces of the conductive posts 23 can be avoided.

[0054] As Figure 2E shown, perform a patterning process to form a circuit layer 24 that electrically connects the conductive posts 23 on the glass layer 22 by means of a patterning resist layer (not shown in the figure). After that, remove the resist layer to obtain the package substrate 2.

[0055] In this embodiment, methods such as physical vapor deposition (PVD for short), sputter, and chemical vapor deposition (CVD for short) can be used. First, a seed layer such as TiN (titanium nitride) (figure omitted) can be formed on the glass layer 22, and then copper is formed on the seed layer to improve the adhesion and flatness of the copper through the seed layer.

[0056] Furthermore, a solder mask layer 25 can be formed on the glass layer 22, and the solder mask layer 25 has a plurality of openings 250 to expose a part of the surface of the circuit layer 24 through the plurality of openings 250.

[0057] Therefore, the manufacturing method of the present invention mainly forms the glass layer 22 by the molten glass 30, making its material properties closer to the plate body 20 made of fused quartz glass, such as similar coefficient of thermal expansion (CTE). Therefore, compared with the prior art, when performing the build-up process, after the pouring operation and annealing and cooling, most of the residual stress can be eliminated, thus avoiding the problem of residual thermal stress or insufficient bonding force caused by different coefficients of thermal expansion of the existing dielectric layer 12 and the glass core board 10, which is beneficial for subsequent processing and packaging. After the glass layer 22 is combined with the plate body 20, the overall structure of the packaging substrate 2 is more stable.

[0058] Furthermore, the manufacturing method of the present invention directly uses the low-melting-point molten glass 30 as the dielectric layer to form the glass layer 22 by the pouring method without using the existing vacuum lamination method. Therefore, the problem of the entire glass plate body 20 being scrapped due to the breakage of the glass plate body 20 in the existing process can be avoided. Therefore, compared with the prior art, the manufacturing method of the present invention can effectively avoid the waste of material cost and time cost.

[0059] The present invention also provides a packaging substrate 2, including: a plate body 20 having a wiring layer 21, a plurality of conductive posts 23 formed on the wiring layer 21, a glass layer 22 formed on the plate body 20, and a circuit layer 24 formed on the glass layer 22.

[0060] The plate body 20 is a semiconductor plate, and a plurality of conductive vias 200 electrically connecting the wiring layer 21 are formed in the plate body 20.

[0061] The conductive posts 23 are electrically connected to the wiring layer 21.

[0062] The glass layer 22 covers the wiring layer 21 and the conductive posts 23.

[0063] The circuit layer 24 is electrically connected to the plurality of conductive posts 23.

[0064] In one embodiment, the plate body 20 is made of quartz glass.

[0065] In one embodiment, the glass layer 22 comprises borosilicate glass or lead-free glass of the bismuth series.

[0066] In one embodiment, the melting point of the glass layer 22 is 700 to 850 °C.

[0067] In one embodiment, the glass layer 22 is formed by cooling and solidifying molten glass 30.

[0068] In summary, for the packaging substrate and its manufacturing method of the present invention, a glass layer is formed by molten glass, making its material properties closer to those of a plate body made of quartz glass, such as similar coefficient of thermal expansion (CTE). Therefore, during the build-up process, problems such as residual thermal stress or insufficient bonding force caused by different coefficients of thermal expansion of the materials between the existing dielectric layer and the glass core board can be avoided, facilitating subsequent processing and packaging, and making the overall structure of the packaging substrate more stable.

[0069] Furthermore, the present invention directly uses low-melting-point molten glass to form the glass layer without adopting the existing vacuum lamination method, thus avoiding the problem of the entire plate body being scrapped due to the cracking of the plate body made of quartz glass. Therefore, the manufacturing method of the present invention can effectively avoid waste of material cost and time cost.

[0070] The above embodiments are used to illustratively explain the principles and effects of the present invention, rather than to limit the present invention. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of the present invention. Therefore, the scope of the rights protection of the present invention shall be as listed in the claims.

Claims

1. A packaging substrate, characterized in that: include: A board body having a wiring layer, which is a semiconductor board, and a plurality of conductive through holes electrically connected to the wiring layer are formed in the board body; A plurality of conductive pillars are formed on the wiring layer and electrically connected to the wiring layer; A glass layer is formed on the board to cover the wiring layer and the conductive pillars; as well as The circuit layer is formed on the glass layer and electrically connected to the plurality of conductive pillars.

2. The packaging substrate according to claim 1, wherein: The plate body is made of quartz glass.

3. The packaging substrate according to claim 1, wherein: The glass layer comprises borosilicate glass or a lead-free glass of the bismuth series.

4. The packaging substrate according to claim 1, wherein: The melting point of the glass layer is 700 to 850°C.

5. The packaging substrate according to claim 1, wherein: The glass transition temperature of the glass layer is 300 to 400° C. lower than the glass transition temperature of the plate body.

6. The packaging substrate according to claim 1, wherein: The glass layer is formed by cooling and solidifying molten glass.

7. A method for manufacturing a packaging substrate, characterized in that: include: A board body having a wiring layer is provided, which is a semiconductor board, and a plurality of conductive through holes electrically connected to the wiring layer are formed in the board body; Forming a plurality of conductive pillars electrically connected to the wiring layer on the wiring layer to obtain a substrate structure; Forming molten glass on the substrate structure to cover the wiring layer and the conductive pillar; solidifying the molten glass to form a glass layer; and A circuit layer electrically connected to the plurality of conductive pillars is formed on the glass layer.

8. The method for manufacturing a packaging substrate according to claim 7, wherein: The plate body is made of quartz glass.

9. The method for manufacturing a packaging substrate according to claim 7, wherein: The molten glass includes borosilicate glass or bismuth series lead-free glass.

10. The method for manufacturing a packaging substrate according to claim 7, wherein: The melting point of the molten glass is 700 to 850°C.

11. The method for manufacturing a packaging substrate according to claim 7, wherein: The glass transition temperature of the glass layer is 300 to 400° C. lower than the glass transition temperature of the plate body.

12. The method for manufacturing a packaging substrate according to claim 7, wherein: The molten glass is solidified into the glass layer by cooling.

13. The method for manufacturing a packaging substrate according to claim 7, wherein: The step of solidifying the molten glass further includes performing an annealing process at 200 to 300° C. to eliminate stress of the formed glass layer.

Images