Data processing method and device, equipment and medium

Abstract

The invention discloses a data processing method and device, equipment and a medium, and relates to the technical field of computers, and the method comprises the steps: obtaining a shared transmission layer data packet support attribute of a controller, and setting a value of a shared transmission layer data packet enabling attribute after determining that the controller supports a transmission layer data packet to transmit a plurality of command entries; submission queue entries are constructed, the corresponding number of submission queue entries are packaged into a first transmission layer data packet, so that the controller reads and processes the first transmission layer data packet, completion queue entries are constructed after processing is completed, and the corresponding number of completion queue entries are packaged into a second transmission layer data packet and written into a completion queue of the host; and obtaining a completion queue entry from the completion queue and notifying the controller to release the completion queue entry. Therefore, a plurality of submission queue entries or completion queue entries can be transmitted in a single transmission layer data packet, the number of required transmission layer data packets is remarkably reduced, the effectiveness of data transmission is improved, the bandwidth is better and fully utilized, and the delay is reduced.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and particularly to a data processing method, apparatus, device, and medium. Background Art

[0002] With the rapid development of computer technology, the demand for data storage and transmission is increasing day by day. In the traditional transport layer data packet, the maximum effective payload can theoretically reach 4096 bytes, while the size of each command entry in the logical device interface specification is 64 bytes, and each transport layer data packet only transmits one command entry. However, in practice, the controller and the driver do not fully utilize the bandwidth advantage and still follow the traditional mode of processing only a single command entry per transport layer data packet. This approach not only increases the number of transactions on the bus but also exacerbates the communication pressure between the host and the device, thus weakening the overall efficiency of data transmission. Especially when dealing with a large number of small input / output requests, it results in bandwidth waste and high latency. Summary of the Invention

[0003] The object of the present invention is to provide a data processing method, apparatus, device, and medium, which can transmit multiple submission queue entries or completion queue entries in a single transport layer data packet, significantly reduce the number of required transport layer data packets, improve the effectiveness of data transmission, make better use of the bandwidth, and reduce latency.

[0004] To solve the above technical problems, the present invention provides a data processing method, which includes:

[0005] Obtain the shared transport layer data packet support attribute of the controller, and determine whether the controller supports transmitting multiple command entries in the transport layer data packet;

[0006] After determining that the controller supports transmitting multiple command entries in the transport layer data packet, set the value of the shared transport layer data packet enable attribute to enable the controller to transmit multiple command entries in the transport layer data packet;

[0007] Construct submission queue entries, pack a corresponding number of the submission queue entries into a first transport layer data packet for the controller to read and process the first transport layer data packet, and after processing, construct completion queue entries, pack a corresponding number of the completion queue entries into a second transport layer data packet and write them into the completion queue of the host;

[0008] Obtain the completion queue entries from the completion queue and notify the controller to release the completion queue entries.

[0009] To solve the above technical problems, the present invention also provides a data processing apparatus, which includes:

[0010] A determination module, configured to obtain the shared transport layer packet support attribute of a controller, and determine whether the controller supports the transport layer packet to transmit multiple command entries;

[0011] A setting module, configured to, after determining that the controller supports the transport layer packet to transmit multiple command entries, set the value of the shared transport layer packet enabling attribute, so as to enable the controller to transmit multiple command entries through the transport layer packet;

[0012] A packing module, configured to construct submission queue entries, pack a corresponding number of the submission queue entries into a first transport layer packet, so that the controller reads and processes the first transport layer packet, and after processing, construct completion queue entries, pack a corresponding number of the completion queue entries into a second transport layer packet and write them into the completion queue of the host;

[0013] A obtaining module, configured to obtain the completion queue entries from the completion queue, and notify the controller to release the completion queue entries.

[0014] To solve the above technical problems, the present invention further provides a data processing device, where the device includes:

[0015] A memory, configured to store a computer program;

[0016] A processor, configured to implement the steps of the above data processing method when executing the computer program.

[0017] To solve the above technical problems, the present invention further provides a computer-readable storage medium, where a computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps of the above data processing method are implemented.

[0018] As can be seen from the above technical solutions, a data processing method provided by the present invention includes: obtaining the shared transport layer packet support attribute of a controller, and determining whether the controller supports the transport layer packet to transmit multiple command entries; when determining that the controller supports the transport layer packet to transmit multiple command entries, setting the value of the shared transport layer packet enabling attribute, so as to enable the controller to transmit multiple command entries through the transport layer packet; constructing submission queue entries, packing a corresponding number of the submission queue entries into a first transport layer packet, so that the controller reads and processes the first transport layer packet, and after processing, construct completion queue entries, pack a corresponding number of the completion queue entries into a second transport layer packet and write them into the completion queue of the host; obtaining the completion queue entries from the completion queue, and notifying the controller to release the completion queue entries.

[0019] The beneficial effects of the present invention are as follows. For the above-mentioned data processing method provided by the present invention, the controller is provided with a shared transport layer packet support attribute and a shared transport layer packet enable attribute. After determining that the controller supports transmitting multiple command entries of transport layer packets, the corresponding number of submission entries are packed into the first transport layer packet. After the controller processes the packet, the corresponding number of completion queue entries are packed into the second transport layer packet and written into the completion queue of the host. This method can transmit multiple submission queue entries or completion queue entries in a single transport layer packet, significantly reducing the number of required transport layer packets, improving the effectiveness of data transmission, thereby reducing the transmission overhead on the bus, alleviating the processor burden, and enhancing the overall system performance in high-concurrency situations. At the same time, by packing multiple command entries together for processing, the bandwidth can be better utilized, the latency can be reduced, the response speed of the storage device can be increased, the bandwidth waste caused by small data packets can be avoided, the overall system throughput can be improved, and the requirements for large-scale data processing can be met. In addition, obtaining the completion queue entries from the completion queue and notifying the controller to release the completion queue entries ensures the integrity and timeliness of command processing, and can release resources in a timely manner, making room for subsequent command processing and data transmission, which helps to improve the concurrent processing ability of the system and the recycling efficiency of resources.

[0020] In addition, the present invention also provides a corresponding data processing device, a data processing device and a computer-readable storage medium for the data processing method, which have the same or corresponding technical features as the above-mentioned data processing method, and the effects are the same. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the embodiments of the present invention, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0022] Figure 1 It is a flowchart of the data processing method provided by the embodiment of the present invention;

[0023] Figure 2 It is a framework diagram of the first transport layer packet transmitting multiple submission queue entries provided by the embodiment of the present invention;

[0024] Figure 3 It is a framework diagram of the second transport layer packet transmitting multiple completion queue entries provided by the embodiment of the present invention;

[0025] Figure 4 It is a flowchart of the command interaction between the host and the controller provided by the embodiment of the present invention;

[0026] Figure 5 Schematic diagram of the data processing device provided by the embodiment of the present invention;

[0027] Figure 6 Schematic diagram of the data processing equipment provided by the embodiment of the present invention. Detailed implementation manners

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0029] To enable those skilled in the art to better understand the solution of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific implementation manners. Figure 1 Flowchart of the data processing method provided by the embodiment of the present invention, as Figure 1 shown, the method includes:

[0030] S101. Obtain the shared transport layer packet support attribute of the controller, and determine whether the controller supports transmitting multiple command entries in the transport layer packet.

[0031] It should be noted that Transaction Layer Packets (TLP) are data units processed by the transport layer protocol in a computer network. The interface specification protocol involved in the present invention can be the Non-Volatile Memory Express (NVMe) protocol or other interface specification protocols. Among them, NVMe can achieve low-latency and high-bandwidth data access by directly connecting to the Peripheral Component Interconnect Express (PCIe) bus. The maximum effective payload supported by the transport layer packets of PCIe can theoretically reach 4096 bytes. In the NVMe specification or other interface specifications, command entries can include Submission Queue Entries (SQE) and Completion Queue Entries (CQE), and the size of each command entry is fixed at 64 bytes. In fact, the NVMe controller and driver do not fully utilize this bandwidth advantage and still follow the traditional mode of processing only a single command per transport layer packet. This not only increases the number of transactions on the PCIe bus but also exacerbates the communication pressure between the host and the device, thus weakening the overall efficiency of data transmission. Especially when processing a large number of small input / output requests, it causes waste of bandwidth and high latency. Therefore, to solve this problem, the present invention provides a data processing method to better fully utilize the bandwidth, reduce latency, and improve the overall efficiency of data transmission.

[0032] Before executing step S101, a shared transport layer packet support attribute is pre-set in the functional part of the controller. Steps S101 to S104 of the present invention take the host as the execution entity. In step S101, the host can obtain the shared transport layer packet support attribute of the NVMe controller and determine whether the NVMe controller supports the transport layer packet to transmit multiple NVMe command entries according to the attribute value.

[0033] S102. When it is determined that the controller supports the transport layer packet to transmit multiple command entries, set the value of the shared transport layer packet enable attribute to enable the controller's transport layer packet to transmit multiple command entries.

[0034] It should be noted that steps S101 and S102 can be the initialization phase of the controller. The host can know that the controller supports the transmission of multiple command entries in a transport layer packet by setting the shared transport layer packet support bit. Then, the shared transport layer packet enable bit is set to enable this capability of the controller. Thus, the host and the controller have completed the negotiation on transmitting multiple submission queue entries and completion queue entries in one transport layer packet.

[0035] S103. Construct submission queue entries, pack a corresponding number of submission queue entries into the first transport layer packet for the controller to read and process. After processing, construct completion queue entries, pack a corresponding number of completion queue entries into the second transport layer packet and write them into the host's completion queue.

[0036] In implementation, after initialization is completed, the host can interact with the controller for commands. The host needs to construct submission queue entries, pack a corresponding number (such as equal to or greater than 1) of submission queue entries into the first transport layer packet, and submit them to the submission queue. The controller can read the first transport layer packet in the submission queue and perform corresponding processing on it. After processing, construct completion queue entries, pack a corresponding number (such as equal to or greater than 1) of completion queue entries into the second transport layer packet and write them into the host's completion queue.

[0037] S104. Obtain completion queue entries from the completion queue and notify the controller to release the completion queue entries.

[0038] In the above data processing method provided by the embodiments of the present invention, the controller is provided with a shared transport layer packet support attribute and a shared transport layer packet enable attribute. After determining that the controller supports multiple command entries for transport layer packet transmission, a corresponding number of submission entries are packed into the first transport layer packet. After the controller processes the packet, a corresponding number of completion queue entries are packed into the second transport layer packet and written into the host's completion queue. In this way, multiple submission queue entries or completion queue entries can be transmitted in a single transport layer packet, significantly reducing the number of required transport layer packets, improving the effectiveness of data transmission, thereby reducing the transmission overhead on the bus, alleviating the processor burden, and enhancing the overall system performance in high-concurrency scenarios. At the same time, by packing multiple command entries together for processing, the bandwidth can be better utilized, the latency can be reduced, the response speed of the storage device can be increased, the bandwidth waste caused by small data packets can be avoided, the overall system throughput can be improved, and the requirements for large-scale data processing can be met. In addition, obtaining the completion queue entries from the completion queue and notifying the controller to release the completion queue entries ensures the integrity and timeliness of command processing, and can release resources in a timely manner, making room for subsequent command processing and data transmission, which helps to improve the concurrent processing ability of the system and the recycling efficiency of resources.

[0039] The following mainly takes the NVMe controller as an example and the PCIe bus as an example to describe the data processing method provided by the present invention. The present invention can transmit multiple NVMe command entries in a single PCIe transport layer packet. By packing multiple NVMe commands together, the bandwidth of PCIe can be better utilized and the latency can be reduced.

[0040] Further, in specific implementation, in the above data processing method provided by the embodiments of the present invention, before performing step S101 to obtain the shared transport layer packet support attribute of the controller, it may further include: presetting the shared transport layer packet enable attribute and the shared transport layer packet support attribute in the controller function part; wherein, the shared transport layer packet enable attribute corresponds to a readable and writable bit, which is used to indicate whether to enable the transmission of multiple command entries by the transport layer packet; the shared transport layer packet support attribute corresponds to a read-only bit, which is used to indicate whether to support the transmission of multiple command entries by the transport layer packet.

[0041] In implementation, the present invention can add a shared transport layer packet support (Share TLP Supported) attribute to the controller capabilities, such as adding a shared transport layer packet support attribute to the NVMe protocol controller capabilities. The specific details can be seen in Table 1 below.

[0042] Table 1 NVMe-related register bits

[0043]

[0044] As can be seen from Table 1, the 59th bit corresponds to "Share TLP Enable (STE)", which is a read-write bit (RW) used to control whether to enable the function of transmitting multiple NVMe commands in the transport layer packet. The reset value is "0h", meaning that the function is in the off state after reset. When this bit is set to 1, the function is enabled; when set to 0, the function is disabled. The 58th bit corresponds to "Share TLP Supported (STS)", which is a read-only bit (RO) used to indicate whether the NVMe controller supports the ability to transmit multiple NVMe commands in the transport layer packet. The reset value is also "0h", that is, the state shows not supported after reset. If this bit is 1, it means the controller supports this function; if it is 0, it means it does not support.

[0045] Furthermore, in specific implementation, in the above data processing method provided by the embodiment of the present invention, step S101 of obtaining the share transport layer packet support attribute of the controller and determining whether the controller supports transmitting multiple command entries in the transport layer packet may specifically include: reading the capability register in the controller to obtain the value of the share transport layer packet support attribute of the controller; when the value of the share transport layer packet support attribute is the first set value, determining that the controller supports transmitting multiple command entries in the transport layer packet.

[0046] In implementation, during the initialization phase, in PCIe link training, the host and the device will understand each other's maximum payload size, and negotiate to select the minimum value as the final maximum payload size. The maximum load for subsequent data transmission cannot exceed this value. This can avoid problems such as data loss, transmission errors, or system instability caused by one party being unable to handle an overly large payload, ensuring that data can be accurately transmitted between the host and the device. After determining the maximum payload size, data can be encapsulated and transmitted in appropriate packet sizes, reducing the additional overhead (such as the relative proportion of header, trailer, etc. information) caused by overly large or overly small packets, thereby improving the overall efficiency of data transmission. Additionally, due to factors such as hardware design and performance, different PCIe devices may support different maximum payload sizes. This negotiation mechanism enables the host and various devices with different capabilities to establish appropriate data transmission links, enhancing the compatibility and versatility of the PCIe bus, allowing devices of different manufacturers and models to work stably on the PCIe bus. Determining the appropriate maximum payload size helps the system better allocate and manage resources such as memory cache space and bus bandwidth, avoiding over - occupation of resources caused by overly large payloads or waste of resources caused by overly small payloads, enabling rational utilization of system resources, and enhancing the performance and stability of the entire system.

[0047] The host driver can read the Capabilities (CAP) register in the NVMe controller. By knowing that the value of the 58th - bit shared transport layer packet support attribute is the first set value (such as 1), it can be known that this controller supports transmitting multiple NVMe commands in a transport layer packet. If it is not the first set value (such as the value of the shared transport layer packet support attribute is 0), it means that this controller does not support transmitting multiple NVMe commands in a transport layer packet.

[0048] Correspondingly, step S102 sets the value of the shared transport layer packet enable attribute to enable the controller to transmit multiple command entries in the transport layer packet. Specifically, it can include: setting the value of the shared transport layer packet enable attribute to the second set value to enable the controller to transmit multiple command entries in the transport layer packet. At this time, the controller reads the value of the shared transport layer packet enable attribute. If the value read by the controller is the second set value, it indicates that multiple command entries are transmitted in each transport layer packet during data transmission. If the value read by the controller is not the second set value, it indicates that one submission queue entry or completion queue entry is transmitted in each transport layer packet during data transmission.

[0049] In implementation, the host driver can set the value of the 59th-bit shared transport layer packet enable attribute to a second set value (such as 1) to enable the controller to transmit multiple NVMe commands in the transport layer packet. At this time, the NVMe controller reads the value of the 59th-bit shared transport layer packet enable attribute. If the value is 1, multiple NVMe commands can be transmitted in the transport layer packet during subsequent data transmission. Otherwise, it is consistent with the NVMe specification, and each transport layer packet transmits one submission queue entry or completion queue entry. At the same time, the 59th bit of the CAP register of the NVMe controller without this function defaults to 0, which also ensures the compatibility of normal NVMe controllers.

[0050] Further, in specific implementation, in the above data processing method provided by the embodiment of the present invention, after step S103 of packing the corresponding number of submission queue entries into the first transport layer packet, it may further include: submitting the first transport layer packet to the submission queue, and simultaneously updating the first doorbell register (Submission Queue Tail Doorbell register) used to notify that a new command entry is added to the tail of the controller submission queue.

[0051] Correspondingly, step S103 where the controller reads and processes the first transport layer packet may specifically include: when the controller senses the update of the first doorbell register, constructing a memory read request; and reading and processing the submission queue entries in the first transport layer packet through the memory read request.

[0052] It should be noted that in the PCIe specification, the maximum payload size of the transport layer packet may be 128, 256, 512, 1024, 2048, 4096 bytes. When packing, it is necessary to ensure that the total size of the transmitted submission queue entries or completion queue entries does not exceed the maximum payload size limit of the PCIe transport layer packet.

[0053] Figure 2 This is the framework diagram of the first transport layer packet for transmitting multiple submission queue entries provided by the embodiment of the present invention. From Figure 2 it can be seen that the uppermost , , , Indicates the byte offset. Each line is expanded byte by byte from left to right, and each byte is further divided into 8 bits (0 - 7). This structure facilitates precise positioning of different fields within the data packet. Byte 0 contains the Fmt (Format) value of 010, the Type (Type) value of 01010, as well as the R (Reserved bit), TC (Traffic Class), Rsv (Reserved), TD (Transmission Disable), EP (Error Request), Attr (Attribute), AT (Address Translation), and Length (Length) fields. These fields are used to define the basic attributes and transmission parameters of the data packet. Byte 4 contains the Completer ID (Completion Identifier), Status (Status), B (Reserved bit), and Byte Count (Byte Count), which are used to identify the entity that completes the operation, as well as the operation status and data volume. Byte 8 contains the Requester ID (Requester Identifier), Tag (Tag), R (Reserved bit), and Lower Address (Lower Address), which are used to identify the entity that initiates the request and information such as the data address. The area from Byte 12 to Byte N - 4 is the NVMe Submission Queue Entry (SQ Entry), which contains the specific commands submitted by the host to the NVMe controller. The number of SQ Entries ranges from SQ Entry 0 to SQ Entry N and is variable. Byte N - 4 is the TLP Digest (Transport Layer Packet Digest), which is used for data verification to ensure the integrity of the data packet during transmission. Overall, this structure design enables the host and the NVMe controller to interact with commands and data accurately and efficiently. Each field performs its own function, jointly ensuring the normal operation of the NVMe storage system.

[0054] In implementation, after initialization is completed, the host submits a new command, constructs a submission queue entry, and packs a corresponding number of submission queue entries into the first transport layer packet. After the host submits the first transport layer packet to the submission queue in the host memory, it can simultaneously update the first Doorbell register (Submission Queue Tail Doorbell register) used to notify the controller that there is a new command entry added at the tail of the submission queue, so as to notify the NVMe controller that there is a new command to be read. When the NVMe controller senses the update of the first Doorbell register, it can read the submission queue entry through the PCIe memory read command.

[0055] In specific implementation, constructing the memory read request in the above steps can specifically include: obtaining the current tail position of the submission queue according to the first Doorbell register, comparing the current tail position of the submission queue with the position of the last read submission queue entry to obtain the number of submission queue entries to be read in the submission queue; selecting the minimum value from the number of submission queue entries to be read in the submission queue and the maximum payload to construct the memory read request.

[0056] In implementation, the NVMe controller sends a PCIe memory read request to read the submission queue entries. At this time, multiple NVMe command entries can be transmitted in one PCIe transport layer packet, and the length needs to be specified when constructing the memory read request. This length can be selected as the minimum of the maximum payload size and the remaining commands in the completion queue entry. Multiple first transport layer packets can be requested at a time. That is, based on the first doorbell register, the NVMe controller can know the current tail position of the submission queue. By comparing with the position of the previously read submission queue entry, the number of submission queue entries to be read in the current submission queue can be obtained. Each submission queue entry is 64 bytes in size, and the minimum of the total size and the maximum payload size is used as the length of the memory read request.

[0057] Further, in specific implementation, in the above data processing method provided by the embodiments of the present invention, step S103 of packing the corresponding number of submission queue entries into the first transport layer packet may specifically include: initializing an empty transport layer packet structure and a payload buffer; calculating the size of the current payload; determining whether the sum of the size of the current payload and the size of the submission queue entry exceeds the maximum payload threshold; if so, adding the submission queue entry to the current payload, and updating the size of the current payload and the command entry count; if not, stop adding and send the currently packed transport layer packet to the bus.

[0058] In implementation, the process of the host packing multiple submission queue entries can first initialize an empty transport layer packet structure and a payload buffer; before adding a new submission queue entry, calculate the size of the current payload to ensure that the total size after addition does not exceed the maximum payload limit. If the sum of the current payload and the size of the new submission queue entry is still within the limit, add the submission queue entry to the payload; update the size of the current payload and the command count. If adding a new submission queue entry causes the total size to exceed the maximum payload, stop adding and prepare to send the currently packed transport layer packet. Finally, send the prepared transport layer packet to the PCIe bus. It should be noted that the controller packs the corresponding number of completion queue entries into the second transport layer packet, and its packing process is similar to the process of packing submission queue entries.

[0059] Figure 3 This is a framework diagram of the second transport layer packet transmitting multiple completion queue entries provided by the embodiments of the present invention. As can be seen from Figure 3 above, the uppermost , , , = indicates the byte offset. Each row is expanded from left to right by bytes, and each byte is subdivided into 8 bits (0-7). This layout helps to accurately locate the different field information in the data packet. Byte 0 contains Fmt (format) value 011, Type (type) value 000000, R (reserved bit), TC (traffic category), Rsv (reserved), TD (transmission prohibition), EP (error request), Attr (attribute), AT (address translation) and Length (length) fields. These fields define the basic format, transmission type and related attribute parameters of the data packet. Byte 4 contains RequesterID (requester identification), which is used to identify the entity that initiated the request; Tag (tag), which can be used to track and match requests and responses; Last DW BE (last double word byte enable) and 1st DW BE (first double word byte enable), which are used to indicate the valid bytes of the double word in the data. Byte 8-Byte 12 together constitute the Address field. Address[63:32] and Address[31:2] are concatenated to represent the target memory address, which is used to determine the target location of data transmission. R is a reserved bit. The area from Byte 16 to Byte N-4 is the NVMe completion queue entry (CQ Entry), from CQ Entry 0 to CQ EntryN, and the number is not fixed. The completion queue entry records the relevant status information and results after the NVMe controller processes the command, and will be transmitted back to the host through this area. Byte N-4 is TLP Digest (Transport Layer Packet Digest), which is used to verify the integrity of the data packet during transmission. By calculating and generating a specific digest value, the receiver can compare the value to determine whether the data packet is transmitted correctly. Overall, this structural design ensures the accuracy and efficiency of the host and NVMe controller in the completion queue data exchange. The various fields work together to ensure the normal operation of the data processing and feedback process of the NVMe storage system.

[0060] Furthermore, in a specific implementation, in the above-mentioned data processing method provided in an embodiment of the present invention, after executing step S103 to pack a corresponding number of completion queue entries into a second transport layer data packet and write them into the completion queue of the host, it may also include: the controller generates an interrupt to update the second doorbell register used to notify the host that a new command entry has been added to the head of the completion queue.

[0061] Accordingly, step S104 of obtaining a completion queue entry from the completion queue may specifically include: when the second doorbell register is sensed to be updated, obtaining a completion queue entry from the completion queue, and processing the completion queue entry.

[0062] In implementation, after the NVMe controller processes the submission queue entries in the first transport layer packet, it constructs completion queue entries and writes them to the host completion queue in the second transport layer packet through PCIe memory writes. The NVMe controller generates an interrupt and updates the second doorbell register used to notify the host that there are new command entries added to the head of the completion queue, which can reduce the number of transport layer packets and the frequency of interrupt handling, thereby reducing the CPU burden. When the host senses the update of the second doorbell register, it fetches the completion queue entries from the completion queue and processes the completion queue entries. After the processing is completed, it writes to the controller doorbell register to notify the controller to release the completion queue entries.

[0063] Figure 4 This is the flowchart of the command interaction between the host and the controller provided by the embodiments of the present invention. As Figure 4 shown, 1 represents the host writing a command: The host writes a write command to the submission queue, which is located in the host memory. 2 represents notifying the controller: The host notifies the controller that a new command has arrived by writing to a register. This notification mechanism is similar to ringing a doorbell to inform the controller that it can fetch a new command. 3 represents the controller fetching a command: After receiving the notification, the controller fetches the command written by the host from the tail end of the submission queue, and these commands can be transmitted through PCIe transport layer packets. 4 represents the controller processing a command: The controller processes the fetched command and performs corresponding operations. 5 represents the controller writing a completion command: After the controller finishes processing the command, it writes the completion command to the completion queue, which is also located in the host memory, and the data transmission still uses PCIe transport layer packets. 6 represents the controller generating an interrupt: The controller generates a Message Signaled Interrupts-Extended (MSI-X) through the head end of the completion queue to notify the host that the command has been processed. 7 represents the host processing the completion command: After receiving the interrupt, the host reads the completion command from the completion queue and performs corresponding processing. 8 represents the host writing the first doorbell register. After the host finishes processing the completion command, it confirms the processing by writing to the doorbell register, completing the entire command interaction process.

[0064] It should be noted that, compared with the traditional method of transmitting only one command entry per transport layer data packet, the data processing method provided by the present invention can significantly reduce the number of transport layer data packets, thereby reducing the transmission overhead on the PCIe bus. To achieve this function, the present invention introduces new shared transport layer data packet support attributes in the controller function of the NVMe protocol, including two bits: shared transport layer data packet enable and shared transport layer data packet support, which are used to indicate whether to enable the transport layer data packet to transmit multiple NVMe commands and whether the controller supports this function respectively. During the NVMe controller initialization phase, the host and the controller negotiate through these two bits to determine whether to enable the function of the transport layer data packet to transmit multiple NVMe commands. During the data transmission process, multiple submission queue entries are requested at once through the PCIe memory read command, and after processing the submission queue entry commands, multiple completion queue entries are transmitted through the PCIe memory write and written into the host's completion queue. This method not only improves the effectiveness of data transmission, but also fully utilizes the bandwidth of the PCIe, reduces the bandwidth waste caused by small data packets, and improves the overall throughput of the system.

[0065] In the above embodiment, the data processing method is described in detail. The present invention also provides corresponding embodiments of a data processing device and a data processing device. It should be noted that the present invention describes the embodiments of the device part from two perspectives, one is from the perspective of functional modules, and the other is from the perspective of hardware.

[0066] Figure 5 It is a schematic structural diagram of the data processing device provided by the embodiment of the present invention. This embodiment is based on the perspective of functional modules. As Figure 5 shown, the device includes:

[0067] A determination module 10, configured to obtain the shared transport layer data packet support attribute of the controller and determine whether the controller supports the transport layer data packet to transmit multiple command entries;

[0068] A setting module 11, configured to set the value of the shared transport layer data packet enable attribute to enable the controller's transport layer data packet to transmit multiple command entries after determining that the controller supports the transport layer data packet to transmit multiple command entries;

[0069] A packaging module 12, configured to construct submission queue entries, package a corresponding number of submission queue entries into a first transport layer data packet for the controller to read and process, and after processing, construct completion queue entries, package a corresponding number of completion queue entries into a second transport layer data packet and write them into the host's completion queue;

[0070] An obtaining module 13, configured to obtain completion queue entries from the completion queue and notify the controller to release the completion queue entries.

[0071] In the above data processing device provided by the embodiments of the present invention, through the interaction of the above four modules, multiple submission queue entries or completion queue entries can be transmitted in a single transport layer data packet, significantly reducing the number of required transport layer data packets, improving the effectiveness of data transmission, thereby reducing the transmission overhead on the bus, reducing the processor burden, and enhancing the overall system performance in high-concurrency scenarios. At the same time, it can better make full use of the bandwidth, reduce latency, improve the response speed of the storage device, avoid bandwidth waste caused by small data packets, enhance the overall system throughput, and meet the requirements of large-scale data processing. In addition, the setting of the acquisition module can ensure the integrity and timeliness of command processing, and can release resources in a timely manner, making room for subsequent command processing and data transmission, which helps to improve the concurrent processing ability of the system and the recycling efficiency of resources.

[0072] Since the embodiments of the device part correspond to the embodiments of the method part, please refer to the description of the embodiments of the method part for the embodiments of the device part, which will not be elaborated here. And it has the same beneficial effects as the above-mentioned data processing method.

[0073] Furthermore, in specific implementation, in the above data processing device provided by the embodiments of the present invention, it may further include: an attribute setting module, configured to preset a shared transport layer data packet enabling attribute and a shared transport layer data packet supporting attribute in the controller function part; wherein, the shared transport layer data packet enabling attribute corresponds to a readable and writable bit, and is used to indicate whether to enable the transport layer data packet to transmit multiple command entries; the shared transport layer data packet supporting attribute corresponds to a read-only bit, and is used to indicate whether to support the transport layer data packet to transmit multiple command entries.

[0074] Furthermore, in specific implementation, in the above data processing device provided by the embodiments of the present invention, the determination module 10 may specifically be configured to read the capability register in the controller to obtain the value of the shared transport layer data packet supporting attribute of the controller; when the value of the shared transport layer data packet supporting attribute is a first set value, it is determined that the controller supports the transport layer data packet to transmit multiple command entries.

[0075] Furthermore, in specific implementation, in the above data processing device provided by the embodiments of the present invention, the setting module 11 may specifically be configured to set the value of the shared transport layer data packet enabling attribute to a second set value to enable the controller transport layer data packet to transmit multiple command entries. At this time, the controller reads the value of the shared transport layer data packet enabling attribute; if the value read by the controller is the second set value, it indicates that each transport layer data packet transmits multiple command entries during data transmission; if the value read by the controller is not the second set value, it indicates that each transport layer data packet transmits a submission queue entry or a completion queue entry during data transmission.

[0076] Further, in specific implementation, in the above data processing device provided by the embodiments of the present invention, the packing module 12 is further configured to submit the first transport layer data packet to the submission queue, and at the same time update the first doorbell register for notifying the controller that a new command entry is added to the tail of the submission queue.

[0077] Further, in specific implementation, in the above data processing device provided by the embodiments of the present invention, the packing module 12 may specifically be configured to initialize an empty transport layer data packet structure and a payload buffer; calculate the size of the current payload; determine whether the sum of the size of the current payload and the size of the submission queue entry exceeds the maximum payload threshold; if so, add the submission queue entry to the current payload, and update the size of the current payload and the command entry count; if not, stop adding and send the currently packed transport layer data packet to the bus.

[0078] Further, in specific implementation, in the above data processing device provided by the embodiments of the present invention, the obtaining module 13 may specifically be configured to, after the controller generates an interrupt and updates the second doorbell register for notifying that a new command entry is added to the head of the completion queue of the host, sense the update of the second doorbell register, obtain the completion queue entry from the completion queue, and process the completion queue entry.

[0079] Figure 6 It is a schematic structural diagram of the data processing device provided by the embodiments of the present invention. This embodiment is based on the hardware perspective. As Figure 6 shown, the data processing device includes:

[0080] A memory 20 for storing a computer program;

[0081] A processor 21 for implementing the steps of the data processing method mentioned in the above embodiments when executing the computer program.

[0082] Among them, the processor 21 may include one or more processing cores, such as a 4-core processor, an 8-core processor, etc. The processor 21 may be implemented in at least one hardware form of a digital signal processor (DSP), a field-programmable gate array (FPGA), or a programmable logic array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor is a processor for processing data in the wake state, also known as the CPU; the coprocessor is a low-power processor for processing data in the standby state. In some embodiments, the processor 21 may be integrated with a graphics processing unit (GPU), and the GPU is responsible for rendering and drawing the content to be displayed on the display screen. In some embodiments, the processor 21 may further include an artificial intelligence (AI) processor, and the AI processor is used to process computing operations related to machine learning.

[0083] The memory 20 may include one or more computer-readable storage media, and the computer-readable storage media may be non-transitory. The memory 20 may further include high-speed random access memory and non-volatile memory, such as one or more disk storage devices and flash storage devices. In this embodiment, the memory 20 is at least used to store the following computer program 201. After the computer program is loaded and executed by the processor 21, it can implement the relevant steps of the data processing method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may further include an operating system 202 and data 203, etc., and the storage method may be temporary storage or permanent storage. Among them, the operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the above-mentioned data processing method.

[0084] In some embodiments, the data processing device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26. Those skilled in the art can understand that Figure 6 the structure shown in does not constitute a limitation on the data processing device, and it may include more or fewer components than shown in the figure. The data processing device provided by the embodiments of the present invention includes a memory and a processor. When the processor executes the program stored in the memory, it can implement the data processing method as mentioned above, and the effect is the same.

[0085] Finally, the present invention also provides an embodiment corresponding to a computer-readable storage medium. A computer program is stored on the computer-readable storage medium, and when the computer program is executed by a processor, the steps recorded in the above method embodiments are implemented.

[0086] It can be understood that if the method in the above embodiments is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of this technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the above methods in various embodiments of the present invention. The foregoing storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes. The computer-readable storage medium provided by the present invention can implement the above-mentioned data processing method, and the effect is the same.

[0087] Finally, the present invention also provides an embodiment corresponding to a computer program product. The computer program product includes computer programs / instructions, and when the computer programs / instructions are executed by a processor, the steps recorded in the above data processing method embodiments are implemented. The computer program product provided by the present invention can implement the above-mentioned data processing method, and the effect is the same.

[0088] It should also be noted that in this specification, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprises", "comprising" or any other variant thereof is intended to cover a non-exclusive inclusion, such that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the above element.

[0089] The data processing method, apparatus, device, and medium provided by the present invention have been introduced in detail above. The various embodiments in the specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. For the same or similar parts among the various embodiments, reference can be made to each other. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple. For the relevant parts, reference can be made to the description in the method section. It should be noted that for those of ordinary skill in the art in the technical field of the present invention, without departing from the principle of the present invention, several improvements and modifications can be made to the present invention, and these improvements and modifications also fall within the protection scope of the present invention.

Claims

1. A data processing method, characterized in that, The method includes: Obtain the shared transport layer packet support attribute of the controller, and determine whether the controller supports transporting multiple command entries via the transport layer packet; After determining that the controller supports transporting multiple command entries via the transport layer packet, set the value of the shared transport layer packet enable attribute to enable the controller to transport multiple command entries via the transport layer packet; Construct submission queue entries, pack a corresponding number of the submission queue entries into a first transport layer packet for the controller to read and process the first transport layer packet, and after processing, construct completion queue entries, pack a corresponding number of the completion queue entries into a second transport layer packet and write it to the completion queue of the host; Obtain the completion queue entries from the completion queue and notify the controller to release the completion queue entries.

2. The data processing method according to claim 1, wherein Before obtaining the shared transport layer packet support attribute of the controller, it further includes: Pre-set the shared transport layer packet enable attribute and the shared transport layer packet support attribute in the controller function part; Wherein, the shared transport layer packet enable attribute corresponds to a readable and writable bit, which is used to indicate whether to enable transporting multiple command entries via the transport layer packet; the shared transport layer packet support attribute corresponds to a read-only bit, which is used to indicate whether to support transporting multiple command entries via the transport layer packet.

3. The data processing method according to claim 1, wherein Obtain the shared transport layer packet support attribute of the controller and determine whether the controller supports transporting multiple command entries via the transport layer packet, including: Read the capability register in the controller to obtain the value of the shared transport layer packet support attribute of the controller; When the value of the shared transport layer packet support attribute is a first set value, determine that the controller supports transporting multiple command entries via the transport layer packet; Set the value of the shared transport layer packet enable attribute to enable the controller to transport multiple command entries via the transport layer packet, including: Set the value of the shared transport layer packet enable attribute to a second set value to enable the controller to transport multiple command entries via the transport layer packet, and at this time the controller reads the value of the shared transport layer packet enable attribute; If the value read by the controller is the second set value, it indicates that multiple command entries are transported in each transport layer packet during data transmission; If the value read by the controller is not the second set value, it indicates that one submission queue entry or completion queue entry is transported in each transport layer packet during data transmission.

4. The data processing method according to claim 1, wherein After packing a corresponding number of the submission queue entries into the first transport layer packet, it further includes: Submit the first transport layer packet to the submission queue, and at the same time update the first doorbell register used to notify the controller that there are new command entries added to the tail of the submission queue; The controller reads and processes the first transport layer packet, including: When the controller senses the update of the first doorbell register, construct a memory read request; Read and process the submission queue entries in the first transport layer packet through the memory read request.

5. The data processing method according to claim 4, wherein Construct a memory read request, including: Obtain the current tail position of the submission queue according to the first doorbell register, compare the current tail position of the submission queue with the position of the last read submission queue entry, and obtain the number of submission queue entries to be read in the submission queue; Select the minimum value from the number of submission queue entries to be read in the submission queue and the maximum payload to construct a memory read request.

6. The data processing method according to claim 1, wherein Pack the corresponding number of the submission queue entries into a first transport layer data packet, including: Initialize an empty transport layer data packet structure and a payload buffer; Calculate the size of the current payload; Determine whether the sum of the size of the current payload and the size of the submission queue entry exceeds the maximum payload threshold; If so, add the submission queue entry to the current payload, and update the size of the current payload and the command entry count; If not, stop adding and send the currently packed transport layer data packet to the bus.

7. The data processing method according to claim 1, wherein After packing the corresponding number of the completion queue entries into a second transport layer data packet and writing them to the host's completion queue, it further includes: The controller generates an interrupt and updates the second doorbell register used to notify the host that a new command entry has been added to the head of the completion queue; Obtain the completion queue entries from the completion queue, including: When it is sensed that the second doorbell register is updated, obtain the completion queue entries from the completion queue and process the completion queue entries.

8. A data processing device, characterized in that, The device includes: A determination module, configured to obtain the shared transport layer data packet support attribute of the controller and determine whether the controller supports transmitting multiple command entries through the transport layer data packet; A setting module, configured to set the value of the shared transport layer data packet enable attribute to enable the controller to transmit multiple command entries through the transport layer data packet after determining that the controller supports transmitting multiple command entries through the transport layer data packet; A packing module, configured to construct submission queue entries, pack the corresponding number of the submission queue entries into a first transport layer data packet for the controller to read and process the first transport layer data packet, construct completion queue entries after processing, pack the corresponding number of the completion queue entries into a second transport layer data packet and write them to the host's completion queue; An obtaining module, configured to obtain the completion queue entries from the completion queue and notify the controller to release the completion queue entries.

9. A data processing device, characterized in that, The device includes: A memory for storing a computer program; A processor, configured to implement the steps of the data processing method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, A computer program is stored on the computer-readable storage medium, and when the computer program is executed by the processor, the steps of the data processing method according to any one of claims 1 to 7 are implemented.

Images