Method for enhancing controllability of switching speed of electronic cascode power devices

Abstract

The invention relates to a method for enhancing controllability of switching speed of an electronic cascode power device, the electronic cascode power device comprising a high-voltage normally-on transistor and a low-voltage normally-off transistor, the high-voltage normally-on transistor is provided with a drain electrode connected to a high-side terminal of the cascode power device and a grid electrode connected to a low-side terminal of the cascode power device; a low-voltage normally-off transistor having a drain connected to a source of the high-voltage normally-on transistor, a source connected to the low-side terminal of the cascode power device, and a gate connected to a control terminal of the cascode power device; the method includes introducing a coupling capacitor into the electronic cascode power device by: connecting a first terminal of the coupling capacitor to the source of the high voltage normally on type transistor; and connecting a second terminal of the coupling capacitor to the gate of the low voltage normally off type transistor.

Description

Cross - Reference to Related Applications

[0001] This application claims the priority of U.S. Provisional Patent Application No. 63 / 622,579, filed on January 19, 2024, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] The present invention generally relates to power electronic devices, and more particularly to a method for enhancing the controllability of the switching speed of an electronic cascode power device. Background Art

[0003] High - voltage (HV) cascode power devices use low - voltage (LV) normally - off devices (e.g., LV silicon (Si) metal - oxide - semiconductor field - effect transistors (MOSFETs) or LV gallium nitride (GaN) high - electron - mobility transistors (HEMTs)) to achieve normally - off gate control, and use HV normally - on devices (e.g., HV silicon carbide (SiC) junction - gate field - effect transistors (JFETs) or HV GaN HEMTs) to block high voltages. Due to the excellent device performance brought by the cascode structure, cascode power devices have been successfully commercialized, with available product voltage ratings of 650V and 1200V. Despite successful market penetration, cascode power devices still face a technical challenge, namely: weak switching - speed control ability. During the switching process, voltage (or current) overshoots and oscillations may occur. In addition, for electromagnetic interference (EMI) management purposes, it is also necessary to control the switching speed of power devices and suppress switching overshoots and oscillations. For other power devices such as SiC MOSFETs, the switching speed can be effectively controlled by simply adjusting the gate resistance. For cascode power devices, this common method can no longer effectively control the switching speed.

[0004] The industry has proposed several solutions to control the switching speed of cascode power devices. For cascode power devices with SiC JFETs as HV normally - on devices and Si MOSFETs as LV normally - off, as Figure 1As shown, inserting additional diodes and resistors into the gate branch of a JFET can control the switching speed of an HV SiC JFET, enabling a gate drive circuit to control the switching speed of a cascode power device. However, the gate branch of the JFET is inaccessible for a cascode power device in a conventional package. Another mainstream solution proposes driving the HV device and the LV device separately. This direct drive solution requires two control signals for a single cascode power device, making the control system and drive circuit more complex. Additionally, in the case of the direct drive solution, the large gate-drain capacitance of the HV SiC JFET may cause the cascode power device to switch very slowly. Adding an additional buffer circuit can also help reduce the switching speed of the cascode power device, thereby suppressing switching oscillations and overshoot. However, this solution increases design complexity and cost and cannot independently control the switching speed of the turn-on and turn-off processes. Summary of the Invention

[0005] An object of the present invention is to provide a simplified and effective way to enhance the controllability of the switching speed of a cascode power device.

[0006] According to one aspect of the present invention, there is provided a method for controlling the switching speed of an electronic cascode power device. The electronic cascode power device includes a high-voltage normally-on transistor and a low-voltage normally-off transistor. The high-voltage normally-on transistor has a drain connected to the high-side terminal of the cascode power device and a gate connected to the low-side terminal. The low-voltage normally-off transistor has a drain connected to the source of the high-voltage normally-on transistor, a source connected to the low-side terminal of the cascode power device, and a gate connected to the control terminal of the cascode power device. The method includes introducing a coupling capacitor into the electronic cascode power device by connecting a first terminal of the coupling capacitor to the source of the high-voltage normally-on transistor and connecting a second terminal of the coupling capacitor to the gate of the low-voltage normally-off transistor.

[0007] According to another aspect of the present invention, there is provided an electronic cascode power device with enhanced controllability of the switching speed. The cascode power device includes: a high-voltage normally-on transistor having a drain connected to the high-side terminal of the cascode power device and a gate connected to the low-side terminal of the cascode power device; a low-voltage normally-off transistor having a drain connected to the source of the high-voltage normally-on transistor, a source connected to the low-side terminal of the cascode power device, and a gate connected to the control terminal of the cascode power device; and a capacitor having a first terminal connected to the source of the high-voltage normally-on transistor and a second terminal connected to the gate of the low-voltage normally-off transistor.

[0008] Since the switching speed of the cascode power device is determined by these gate voltages, a coupling capacitor between the input control gate voltage (i.e., the gate voltage of the LV device) and the gate voltage of the HV device determines the switching speed of the cascode device. Thus, the input control gate voltage obtains enhanced control over the gate voltage of the HV device, thereby achieving enhanced control over the switching speed of the cascode power device. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Embodiments of the present invention are described in more detail below with reference to the drawings, in which:

[0010] Figure 1 A circuit schematic diagram showing a conventional electronic cascode power device;

[0011] Figure 2 A circuit block schematic diagram showing an electronic cascode power device according to some embodiments of the present invention;

[0012] Figure 3 A circuit diagram showing an electronic cascode power device according to a first embodiment of the present invention;

[0013] Figure 4 A circuit diagram showing a cascode power device 100B according to a second embodiment of the present invention;

[0014] Figure 5 A circuit diagram showing a cascode power device 100C according to a third embodiment of the present invention.

[0015] Figure 6 A test setup for characterizing the switching process of a device under test (DUT);

[0016] Figure 7A and 7B respectively show the switching drain-source voltage of a conventional cascode power device and a single-chip SiC MOSFET during the switching process;

[0017] Figure 8A and 8B respectively show the drain-source voltage and drain-source current of the cascode power device according to the first embodiment of the present invention during the switching process. DETAILED DESCRIPTION

[0018] In the following description, details of the present invention are set forth as preferred embodiments. It will be apparent to those skilled in the art that modifications, including additions and / or substitutions, can be made without departing from the scope and spirit of the present invention. Specific details may be omitted so as not to obscure the present invention; however, the present disclosure is written to enable those skilled in the art to practice the teachings herein without undue experimentation.

[0019] Figure 2 A circuit block diagram showing an electronic cascode power device 100 according to some embodiments of the present invention. As shown, the electronic cascode power device 100 includes an HV normally-on transistor 110, an LV normally-off transistor 120, and a coupling capacitor 130. The electronic cascode power device 100 may have a device drain (or high-side terminal) D, a device source (or low-side terminal) S, and a device gate (or control terminal) G.

[0020] The HV normally-on transistor 110 is configured such that its drain is connected to the high-side terminal D and its gate is connected to the low-side terminal S. The LV normally-off transistor 120 is configured such that its drain is connected to the source of the HV normally-on transistor 110, its source is connected to the low-side terminal S, and its gate is connected to the control terminal G.

[0021] The coupling capacitor 130 is configured such that its first terminal is connected to the source of the HV normally-on transistor 110, and its second terminal is connected to the gate of the LV normally-off transistor 120.

[0022] The additional coupling capacitor 130 enhances the coupling between the gate terminal of the LV normally-off transistor 120 and the source terminal of the HV normally-on transistor 110, thereby enhancing the coupling between the gate voltages of the HV normally-on transistor 110 and the LV normally-off transistor 120. Therefore, the input gate voltage of the LV normally-off transistor 120 obtains enhanced control over the gate voltage of the HV normally-on transistor 110, enabling control of the switching speed of the cascode power device.

[0023] The HV normally-on transistor 110 may be selected from, but not limited to, any one of SiC JFET or GaN HEMT. The LV normally-off transistor 120 may be selected from, but not limited to, any one of GaN HEMT or Si MOSFET.

[0024] Figure 3 A circuit diagram showing an electronic cascode power device 100A according to a first embodiment of the present invention. As shown, the electronic cascode power device 100A includes an HV SiC normally-on JFET 110A, an LV GaN normally-off HEMT 120A, and a coupling capacitor 130A. The electronic cascode power device 100A may have a device drain (or high-side terminal) D, a device source (or low-side terminal) S, and a device gate (or control terminal) G.

[0025] The HV SiC normally-on JFET 110A is configured such that its drain is connected to the high-side terminal D and its gate is connected to the low-side terminal S. The LV GaN normally-off HEMT 120A is configured such that its drain is connected to the source of the HV SiC normally-on JFET 110A, its source is connected to the low-side terminal S, and its gate is connected to the control terminal G.

[0026] The coupling capacitor 130A is configured such that its first terminal is connected to the source of the HV SiC normally-on JFET 110A, and its second terminal is connected to the gate of the LV GaN normally-off HEMT 120A. The capacitance value of the coupling capacitor 130A is in the range of 1 to 2000 pF.

[0027] Figure 4 The circuit diagram showing the cascode power device 100B according to the second embodiment of the present invention is shown. As shown, the cascode power device 100B includes an HV SiC normally-on JFET 110B, an LV Si normally-off MOSFET 120B, and a coupling capacitor 130B. The cascode power device 100B may have a device drain (or high-side terminal) D, a device source (or low-side terminal) S, and a device gate (or control terminal) G.

[0028] The HV SiC normally-on JFET 110B is configured such that its drain is connected to the high-side terminal D and its gate is connected to the low-side terminal S. The LV Si normally-off MOSFET 120B is configured such that its drain is connected to the source of the HV SiC normally-on JFET 110B, its source is connected to the low-side terminal S, and its gate is connected to the control terminal G.

[0029] The coupling capacitor 130B is configured such that its first terminal is connected to the source of the HV SiC normally-on JFET 110B, and its second terminal is connected to the gate of the LV Si normally-off MOSFET 120B. The capacitance value of the coupling capacitor 130B is in the range of 1 to 2000 pF.

[0030] Figure 5 The circuit diagram showing the cascode power device 100C according to the third embodiment of the present invention is shown. As shown, the cascode power device 100C includes an HV GaN normally-on HEMT 110C, an LV Si normally-off MOSFET 120C, and a coupling capacitor 130C. The cascode power device 100C may have a device drain (or high-side terminal) D, a device source (or low-side terminal) S, and a device gate (or control terminal) G.

[0031] The HV GaN normally-on HEMT 110C is configured such that its drain is connected to the high-side terminal D and its gate is connected to the low-side terminal S. The LV Si normally-off MOSFET 120C is configured such that its drain is connected to the source of the HV GaN normally-on HEMT 110C, its source is connected to the low-side terminal S, and its gate is connected to the control terminal G.

[0032] The coupling capacitor 130C is configured such that its first terminal is connected to the source of the HV GaN normally-on HEMT 110C, and its second terminal is connected to the gate of the LV Si normally-off MOSFET 120C. The capacitance value of the coupling capacitor 130C is in the range of 1 to 2000 pF.

[0033] Figure 6 Shows a test setup for characterizing the switching process of a device under test (DUT). The test device includes a driver, a DC voltage source, a SiC Schottky barrier diode (SBD), and a load R G . The driver is configured to apply a drive signal to the DUT via the gate G and source S of the DUT. The DC voltage source is configured to supply a DC voltage across the drain D and source S of the DUT. The SiC SBD and the load R G are connected in parallel and between the positive terminal of the DC voltage source and the drain D of the DUT.

[0034] Figure 7A and 7B respectively show the switching behavior of the drain-source voltage of a single-chip SiC MOSFET and a cascode power device without our proposed solution, i.e., the cascode power device includes an HV normally-on SiC JFET and an LV normally-off GaN HEMT, but without a coupling capacitor connected between the source of the HV SiC normally-on JFET and the gate of the LV GaN normally-off HEMT. Measurements are made for load Rs equal to 20, 40, and 60 Ω respectively. G At higher gate resistances, the switching speed is still fast, with overshoot and oscillation, indicating that the cascode power device has a weak switching speed control ability. In contrast, the switching speed of the single-chip SiC MOSFET is much slower at higher gate resistances, indicating a stronger switching speed control ability.

[0035] Figure 8A and 8BSeparate switching behaviors of the drain-source voltage and drain-source current of the cascode power device of the first embodiment are shown, that is, the cascode power device includes an HV normally-on SiC JFET, an LV normally-off GaN HEMT, and a coupling capacitor connected between the source of the HV SiC normally-on JFET and the gate of the LV GaN normally-off HEMT. The capacitance of the coupling capacitor is selected to be 150 pF. Measurements are made for loads R equal to 20, 40, and 60 Ω respectively. G compared with Figure 7A and 7B The significantly slower switching process and the suppressed oscillation at higher gate resistances indicate a stronger switching speed control ability of the cascode power device.

[0036] For purposes of illustration and description, the foregoing description of the invention has been provided. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations will be obvious to practitioners in the art.

[0037] The embodiments are chosen and described in order to best explain the principles of the invention and its practical application, thereby enabling other practitioners in the art to understand the various embodiments of the invention and the various modifications suitable for the particular purposes contemplated.

Claims

1. A method for enhancing the controllability of the switching speed of an electronic cascode power device, characterized in that, The electronic cascode power device includes a high-voltage normally-on transistor and a low-voltage normally-off transistor. The high-voltage normally-on transistor has a drain connected to the high-side terminal of the cascode power device and a gate connected to the low-side terminal. The low-voltage normally-off transistor has a drain connected to the source of the high-voltage normally-on transistor, a source connected to the low-side terminal of the cascode power device, and a gate connected to the control terminal of the cascode power device. The method includes introducing a coupling capacitor into the electronic cascode power device by: connecting a first terminal of the coupling capacitor to the source of the high-voltage normally-on transistor; and connecting a second terminal of the coupling capacitor to the gate of the low-voltage normally-off transistor.

2. The method according to claim 1, wherein The high-voltage normally-on transistor is a SiC junction gate field effect transistor.

3. The method according to claim 2, wherein The low-voltage normally-off transistor is a GaN high electron mobility transistor.

4. The method according to claim 2, wherein The low-voltage normally-off transistor is a Si metal-oxide-semiconductor field effect transistor.

5. The method according to claim 1, characterized in that The high-voltage normally-on transistor is a GaN high electron mobility transistor.

6. The method according to claim 5, characterized in that, The low-voltage normally-off transistor is a Si metal-oxide-semiconductor field effect transistor.

7. The method according to claim 1, characterized in that The low-voltage normally-off transistor is a GaN high electron mobility transistor.

8. The method according to claim 1, characterized in that, The low-voltage normally-off transistor is a Si metal-oxide-semiconductor field effect transistor.

9. The method according to claim 1, wherein The coupling capacitor is a discrete component or monolithically integrated with the low-voltage normally-off transistor.

10. The method according to claim 1, characterized in that The capacitance value of the coupling capacitor is in the range of 1 to 2000 pF.

11. An electronic cascode power device with enhanced controllability of switching speed, characterized in that, comprising: a high-voltage normally-on transistor having a drain connected to the high-side terminal of the cascode power device and a gate connected to the low-side terminal of the cascode power device; a low-voltage normally-off transistor having a drain connected to the source of the high-voltage normally-on transistor, a source connected to the low-side terminal of the cascode power device, and a gate connected to the control terminal of the cascode power device; and a capacitor having a first terminal connected to the source of the high-voltage normally-on transistor and a second terminal connected to the gate of the low-voltage normally-off transistor.

12. The electronic common-source common-gate power device according to claim 11, wherein The high-voltage normally-on transistor is a SiC junction gate field effect transistor.

13. The electronic cascode power device according to claim 12, characterized in that, The low-voltage normally-off transistor is a GaN high electron mobility transistor.

14. The electronic cascode power device according to claim 12, wherein The low-voltage normally-off transistor is a Si metal-oxide-semiconductor field effect transistor.

15. The electronic common source common gate power device according to claim 11, wherein, The high-voltage normally-on transistor is a GaN high electron mobility transistor.

16. The electronic cascode power device according to claim 15, wherein The low-voltage normally-off transistor is a Si metal-oxide-semiconductor field effect transistor.

17. The electron common source common gate power device according to claim 11, wherein The low-voltage normally-off transistor is a GaN high electron mobility transistor.

18. The electronic cascode power device according to claim 11, characterized in that, The low-voltage normally-off transistor is a Si metal-oxide-semiconductor field effect transistor.

19. The electronic common source and common gate power device according to claim 11, characterized in that The coupling capacitor is a discrete component or monolithically integrated with the low-voltage normally-off transistor.

20. The electronic cascode power device according to claim 11, wherein The capacitance value of the coupling capacitor is in the range of 1 to 2000 pF.

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