Analog quantity sampling circuit for distribution network feeder terminal

Abstract

The invention discloses an analog quantity sampling circuit for a distribution network feeder terminal. The analog quantity sampling circuit comprises a resistance voltage division circuit, an isolation amplification circuit and an operational amplification circuit which are connected in sequence. The resistance voltage division circuit carries out voltage division processing on an alternating current voltage signal through a plurality of resistors, carries out filtering processing on the alternating current signal after voltage division through a first capacitor, suppresses a high-frequency interference signal through a plurality of magnetic beads and carries out overvoltage protection on the alternating current signal after voltage division through a TVS (Transient Voltage Suppressor) tube, so that an alternating current signal with proper, accurate and stable amplitude is obtained; the isolation amplification circuit is used for carrying out isolation amplification processing on the alternating current signal after voltage division, so that the purity of the signal and the anti-interference capability of the circuit are further improved; and the operational amplifier circuit is used for adding direct current bias to the isolated and amplified alternating current signal, converting the signal into a direct current signal and outputting the direct current signal to the AD chip, so that the direct current signal can be accurately read and processed by the AD chip, and high-quality digital signal input is provided for monitoring and control of a power distribution network system.

Description

Technical Field

[0001] The present invention relates to the technical field of power distribution network sampling technology, and in particular to an analog quantity sampling circuit for a distribution network feeder terminal. Background Art

[0002] In a power distribution network system, monitoring and controlling the operating status of power equipment is the key to ensuring the safe and stable operation of the power system. As one of the key technologies, the accuracy, anti-interference ability, and cost of analog quantity sampling directly affect the monitoring effect and control accuracy of the power system. However, existing analog quantity sampling systems generally have some problems and are difficult to meet the requirements of modern power systems for high precision and real-time performance.

[0003] First, the accuracy of the analog quantity sampling circuit in the prior art is low, and it cannot accurately reflect the real-time operating status of power equipment, resulting in a large error in the sampling signal and affecting subsequent data processing and analysis.

[0004] Second, the anti-interference ability of existing analog quantity sampling systems is poor. In a complex electromagnetic environment, the sampling circuit is easily affected by external electromagnetic interference, resulting in distortion of the sampling signal and further affecting the monitoring and control effect of power equipment.

[0005] Finally, the cost of existing analog quantity sampling systems is high. Sampling circuits with high precision and high anti-interference ability often require the use of expensive components and complex designs, increasing the cost of the system and limiting its wide application in power distribution network systems. Summary of the Invention

[0006] The purpose of the present invention is to provide an analog quantity sampling circuit for a distribution network feeder terminal to solve the technical problems of poor anti-interference ability and low signal processing accuracy in the existing analog quantity sampling circuit.

[0007] To solve the above technical problems, the present invention provides an analog quantity sampling circuit for a distribution network feeder terminal, including a resistor voltage division circuit, an isolation amplifier circuit, and an operational amplifier circuit connected in sequence;

[0008] The resistor voltage division circuit is used to divide the voltage of the input AC voltage signal and perform filtering processing to obtain an AC signal with an appropriate amplitude; the isolation amplifier circuit is used to perform isolation and amplification processing on the divided AC signal; the operational amplifier circuit is used to add a DC bias to the isolated and amplified AC signal, convert the signal into a DC signal, and output it to an AD chip;

[0009] Among them, the resistor voltage division circuit includes a plurality of resistors, a first capacitor, a plurality of beads, and a TVS tube; the plurality of resistors perform voltage division processing on the AC voltage signal to obtain an AC signal with an appropriate amplitude; the first capacitor is connected in parallel with the plurality of resistors and is used for filtering the voltage-divided AC signal; the plurality of beads are connected in parallel with the first capacitor and are used for suppressing high-frequency interference signals; the TVS tube is connected in parallel with the plurality of beads and is used for overvoltage protection of the voltage-divided AC signal.

[0010] Further, the resistor voltage division circuit is provided with a first line and a second line. One ends of the first line and the second line are connected to an AC signal voltage source, and the other ends are connected to the isolation amplifier circuit.

[0011] Further, the plurality of resistors include a varistor, a first resistor, a second resistor, and a third resistor; one end of the varistor is connected to the first line, and the other end is connected to the second line; the first resistor is arranged on the first line, one end is connected to one end of the varistor, and the other end is connected to one end of the third resistor; the second resistor is arranged on the second line, one end is connected to the other end of the varistor, and the other end is connected to the other end of the third resistor; one end of the third resistor is connected to the first line, and the other end is connected to the second line.

[0012] Further, the first capacitor is connected in parallel with the third resistor, and one end is connected to the first line, and the other end is connected to the second line.

[0013] Further, the plurality of beads include a first bead and a second bead. The first bead is arranged on the first line, one end is connected to one end of the first capacitor, and the other end is connected to one end of the TVS tube; the second bead is arranged on the second line, one end is connected to the other end of the first capacitor, and the other end is connected to the other end of the TVS tube;

[0014] One end of the TVS tube is also connected to the first line, and the other end is also connected to the second line.

[0015] Further, the isolation amplifier circuit includes an isolation amplifier, a first fuse, and a second fuse;

[0016] The first pin of the isolation amplifier is connected to the first voltage source and is also connected to the first fuse; the second pin of the isolation amplifier is connected to the other end of the first line; the third pin of the isolation amplifier is connected to the other end of the second line; the fourth pin of the isolation amplifier is connected to the second fuse; the fifth pin of the isolation amplifier is grounded; the sixth and seventh pins of the isolation amplifier are connected to the operational amplifier circuit; the eighth pin of the isolation amplifier is connected to the second voltage source.

[0017] Further, the isolation amplifier circuit further includes a second capacitor and a third capacitor; the first pin of the isolation amplifier is connected to the first fuse through the second capacitor; the eighth pin of the isolation amplifier is also grounded through the third capacitor.

[0018] Further, the operational amplifier circuit includes an operational amplifier, a fourth resistor, and a fifth resistor;

[0019] The first pin of the operational amplifier is connected to the seventh pin of the isolation amplifier through the fourth resistor; the second pin of the operational amplifier is connected to the sixth pin of the isolation amplifier through the fifth resistor; the third pin of the operational amplifier is grounded; the fourth pin of the operational amplifier is connected to the AD chip; the fifth pin of the operational amplifier is connected to the third voltage source.

[0020] Further, the operational amplifier circuit further includes a sixth resistor, a seventh resistor, a fourth capacitor, a fifth capacitor, and a sixth capacitor; the sixth resistor and the fourth capacitor are in parallel, and the first pin of the operational amplifier is also connected to the reference voltage through the parallel sixth resistor and fourth capacitor; the seventh resistor and the fifth capacitor are in parallel, and the fourth pin of the operational amplifier is also connected to the second pin of the operational amplifier through the parallel seventh resistor and fifth capacitor; the fifth pin of the operational amplifier is also grounded through the sixth capacitor.

[0021] Compared with the prior art, the present invention has at least the following beneficial effects:

[0022] The analog sampling circuit for a distribution network feeder terminal proposed by the present invention divides and filters the input AC voltage signal through multiple resistors of a resistor voltage division circuit, a first capacitor, multiple beads, and a TVS tube, thereby obtaining an AC signal with an appropriate amplitude, improving the accuracy and stability of the AC signal; isolates and amplifies the divided AC signal through an isolation amplifier circuit, which not only increases the intensity of the AC signal, making it more suitable for subsequent signal processing, but also reduces the interference that the AC signal may be subjected to during transmission through electrical isolation, further improving the signal purity and the anti-interference ability of the circuit; also adds a DC bias to the isolated and amplified AC signal through an operational amplifier circuit, converts the AC signal into a DC signal and outputs it to the AD chip, enabling the DC signal to be accurately read and processed by the AD chip, and providing high-quality digital signal input for the monitoring and control of the power distribution network system. Description of the Drawings

[0023] Figure 1 is the circuit diagram of the analog sampling circuit in an embodiment of the present invention;

[0024] Figure 2 is the input AC voltage signal in an embodiment of the present invention;

[0025] Figure 3 is the AC voltage signal output by the resistor voltage division circuit in an embodiment of the present invention;

[0026] Figure 4 is the AC voltage signal output by the isolation amplifier in an embodiment of the present invention;

[0027] Figure 5 is the AC voltage signal output by the operational amplifier in an embodiment of the present invention. Detailed Embodiment

[0028] The following will describe in more detail an analog sampling circuit for a distribution network feeder terminal of the present invention with reference to the schematic diagrams, which show the preferred embodiments of the present invention. It should be understood that those skilled in the art can modify the present invention described herein while still achieving the advantageous effects of the present invention. Therefore, the following description should be understood as a broad guidance for those skilled in the art and not as a limitation to the present invention.

[0029] In the following paragraphs, the present invention will be described more specifically by way of example with reference to the drawings. The advantages and features of the present invention will be clearer according to the following description. It should be noted that the drawings are all in a very simplified form and use non-precise scales, only for the purpose of conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention.

[0030] Embodiment 1

[0031] As Figure 1As shown in the figure, an analog quantity sampling circuit for a distribution network feeder terminal is proposed in an embodiment of the present invention. The analog quantity sampling circuit includes a resistor voltage division circuit, an isolation amplifier circuit, and an operational amplifier circuit connected in sequence. The resistor voltage division circuit is used to divide the voltage of the input AC voltage signal and perform filtering processing to obtain an AC signal with a suitable amplitude, improving the accuracy and stability of the AC signal. The isolation amplifier circuit is used to perform isolation amplification processing on the divided AC signal, not only increasing the strength of the AC signal, but also reducing the interference that the AC signal may be subjected to during transmission through electrical isolation, further improving the purity of the signal and the anti-interference ability of the circuit. The operational amplifier circuit is used to add a DC bias to the isolated and amplified AC signal, convert the signal into a DC signal and output it to the AD chip, so that the DC signal can be accurately read and processed by the AD chip, providing a high-quality digital signal input for the monitoring and control of the power distribution network system.

[0032] Among them, the resistor voltage division circuit includes a plurality of resistors, a first capacitor C1, a plurality of beads, and a TVS tube D1; the plurality of resistors perform voltage division processing on the AC voltage signal to obtain an AC signal with a suitable amplitude. The first capacitor C1 is connected in parallel with the plurality of resistors and is used to perform filtering processing on the divided AC signal, effectively filtering out high-frequency noise in the AC signal and improving the purity of the AC signal. The plurality of beads are connected in parallel with the first capacitor C1 and are used to suppress high-frequency interference signals and protect the analog quantity sampling circuit from electromagnetic interference. The TVS tube D1 is connected in parallel with the plurality of beads and is used to perform overvoltage protection on the divided AC signal to prevent voltage spikes from damaging the analog quantity sampling circuit.

[0033] In this embodiment, the resistor voltage division circuit is provided with a first line and a second line. One end of the first line and the second line is connected to the AC signal voltage source, and the other end is connected to the isolation amplifier circuit. The first line and the second line respectively process the positive and negative half-cycles of the AC signal, which helps to maintain the integrity and symmetry of the AC signal.

[0034] In this embodiment, the multiple resistors include a varistor RV1, a first resistor R1, a second resistor R2, and a third resistor R3. One end of the varistor RV1 is connected to the first line, and the other end is connected to the second line. When the AC voltage exceeds a predetermined value, the resistance value of the varistor RV1 will rapidly decrease, causing the current to increase, thereby protecting the analog sampling circuit from transient overvoltage damage. The first resistor R1 is disposed on the first line, with one end also connected to one end of the varistor RV1 and the other end connected to one end of the third resistor R3; the second resistor R2 is disposed on the second line, with one end connected to the other end of the varistor RV1 and the other end connected to the other end of the third resistor R3. One end of the third resistor R3 is connected to the first line, and the other end is connected to the second line. The first resistor R1, the second resistor R2, and the third resistor R3 form a voltage division network, enabling precise voltage division of the input AC voltage signal to obtain an AC signal with an appropriate amplitude, thereby improving the accuracy of the AC signal.

[0035] In this embodiment, the first capacitor C1 is connected in parallel with the third resistor R3, and one end is connected to the first line and the other end is connected to the second line. The first capacitor C1 and the voltage division network formed by the first resistor R1, the second resistor R2, and the third resistor R3 constitute an RC low-pass filter, which can effectively filter out high-frequency noise components in the AC signal, contribute to improving the purity of the AC signal, reduce the fluctuation of the AC signal, and enable the subsequent circuit to receive a higher-quality AC signal.

[0036] In this embodiment, the multiple beads include a first bead L1 and a second bead L2. The first bead L1 is disposed on the first line, with one end connected to one end of the first capacitor C1 and the other end connected to one end of the TVS diode D1. The second bead L2 is disposed on the second line, with one end connected to the other end of the first capacitor C1 and the other end connected to the other end of the TVS diode D1. The first bead L1 and the second bead L2 are used to suppress high-frequency interference signals, thereby reducing the influence of interference signals on the performance of the voltage division circuit, contributing to improving the anti-interference ability of the circuit, making the voltage-divided AC signal more pure, and improving the accuracy and reliability of the signal. One end of the TVS diode D1 is also connected to the first line, and the other end is also connected to the second line. When a transient overvoltage occurs in the circuit, the voltage across the TVS diode D1 will rapidly rise. Once the voltage exceeds the breakdown voltage (also known as the clamping voltage) of the TVS diode D1, the TVS diode D1 will rapidly conduct, releasing the energy of the overvoltage to the ground through a low-impedance path, thereby protecting the resistor voltage division circuit from damage.

[0037] In this embodiment, the isolation amplifier circuit includes an isolation amplifier U1, a first fuse, and a second fuse. The first pin of the isolation amplifier U1 is connected to a first voltage source, and the eighth pin of the isolation amplifier U1 is connected to a second voltage source, so that the isolation amplifier U1 obtains a stable power supply to ensure normal operation. The first pin of the isolation amplifier U1 is also connected to the first fuse, and the fourth pin of the isolation amplifier U1 is connected to the second fuse, providing overcurrent protection for the isolation amplifier circuit through the first fuse and the second fuse. When the current exceeds the rated value of the fuse, the fuse will blow and cut off the current, thereby protecting the isolation amplifier U1 and other circuit components from damage. The second pin of the isolation amplifier U1 is connected to the other end of the first line, and the third pin of the isolation amplifier U1 is connected to the other end of the second line, for receiving the signal processed by the resistor voltage division circuit. The fifth pin of the isolation amplifier U1 is grounded, effectively suppressing the influence of external electromagnetic interference on the isolation amplifier U1 and improving the purity and reliability of the signal. The sixth pin and the seventh pin of the isolation amplifier U1 are connected to the operational amplifier circuit, transmitting the isolated and amplified AC signal to the operational amplifier circuit for further processing. Generally speaking, the isolation amplifier U1 is used to provide electrical isolation between the input and output signals, reduce noise interference, improve the integrity of the AC signal, and the anti-interference ability of the isolation amplifier circuit.

[0038] In a specific embodiment, the first voltage source and the second voltage source can be selected as 5V or 3.3V according to the actual situation.

[0039] In this embodiment, the isolation amplifier circuit further includes a second capacitor C2 and a third capacitor C3. The first pin of the isolation amplifier U1 is connected to the first fuse through the second capacitor C2; the eighth pin of the isolation amplifier U1 is also grounded through the third capacitor C3. The second capacitor C2 is connected between the first pin of the isolation amplifier U1 and the first fuse, which helps to filter out the high-frequency noise that may exist on the power line, provides a more stable and clean power supply voltage for the isolation amplifier U1, and reduces the influence of power supply noise on the performance of the isolation amplifier circuit. In addition, the second capacitor C2 also plays a role in signal coupling, allowing the AC signal to pass through while blocking the DC component, so that only the AC signal component is transmitted to the isolation amplifier U1. The third capacitor C3 is connected between the eighth pin of the isolation amplifier U1 and the ground, reducing the influence of ground noise on the performance of the isolation amplifier circuit.

[0040] In this embodiment, the operational amplifier circuit includes an operational amplifier U2, a fourth resistor R4, and a fifth resistor R5. The operational amplifier U2 further amplifies the signal output by the isolation amplifier U1 to meet the requirements of the AD chip for the amplitude of the input signal, ensuring that the AC signal can be effectively converted into a digital signal. The fourth resistor R4 and the fifth resistor R5 are used to achieve impedance matching between the operational amplifier U2 and the isolation amplifier U1, optimize the signal transmission efficiency, and reduce the loss and distortion of the signal during transmission. The fourth resistor R4 and the fifth resistor R5 also help to stabilize the input signal of the operational amplifier U2, reduce signal fluctuations, and improve the stability of the entire operational amplifier circuit.

[0041] Specifically, the first pin of the operational amplifier U2 is connected to the seventh pin of the isolation amplifier U1 through the fourth resistor R4; the second pin of the operational amplifier U2 is connected to the sixth pin of the isolation amplifier U1 through the fifth resistor R5; the third pin of the operational amplifier U2 is grounded; the fourth pin of the operational amplifier U2 is connected to the AD chip; the fifth pin of the operational amplifier U2 is connected to the third voltage source.

[0042] In this embodiment, the operational amplifier circuit further includes a sixth resistor R6, a seventh resistor R7, a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6. The sixth resistor R6 and the fourth capacitor C4 are in parallel. The first pin of the operational amplifier U2 is also connected to the reference voltage REF through the parallel-connected sixth resistor R6 and fourth capacitor C4 to form an RC filter network for stabilizing the reference voltage and reducing the influence of power supply noise on the performance of the operational amplifier U2. The seventh resistor R7 and the fifth capacitor C5 are in parallel. The fourth pin of the operational amplifier U2 is also connected to the second pin of the operational amplifier U2 through the parallel-connected seventh resistor R7 and fifth capacitor C5, which helps to adjust the DC bias of the operational amplifier U2 and ensure that the DC level of the output signal is suitable for the input range of the AD chip. The fifth pin of the operational amplifier U2 is also grounded through the sixth capacitor C6 for decoupling the third voltage source, filtering out the high-frequency noise that may exist on the power supply line, and providing a more stable and clean power supply voltage for the operational amplifier U2. The operational amplifier circuit maintains the integrity of the AC signal through the combination of multiple resistors and multiple capacitors, reducing the distortion and noise of the AC signal during the amplification process.

[0043] In a specific embodiment, the third voltage source can be selected as 5V or 3.3V according to the actual situation, and the reference voltage REF is set to 2.5V.

[0044] According to the above content, the specific working principle of this application is:

[0045] First, the AC voltage signal enters the resistor voltage division circuit. Through the voltage division network formed by the first resistor R1, the second resistor R2, and the third resistor R3, the input AC voltage signal is divided to an appropriate amplitude. The appropriate amplitude refers to the signal amplitude that meets the working requirements of the subsequent circuit and does not exceed its maximum input voltage range. The high-frequency noise in the divided AC signal is filtered out by the first capacitor C1, the high-frequency interference signals are suppressed by the first bead L1 and the second bead L2, and the overvoltage protection is provided by the TVS diode D1, so that the resistor voltage division circuit outputs an AC signal after filtering and electromagnetic interference suppression processing.

[0046] Then, the AC signal after filtering and electromagnetic interference suppression processing is input to the isolation amplifier U1. The isolation amplifier U1 isolates and amplifies the AC signal through electrical isolation to reduce noise interference and obtain a stable isolated AC signal.

[0047] Next, the isolated and amplified AC signal is input to the operational amplifier circuit. The operational amplifier circuit converts the AC signal into a DC varying signal output by adding a DC bias.

[0048] Finally, the converted DC varying signal is connected to the AD chip for analog-to-digital conversion, so as to convert the analog signal into a digital signal for subsequent circuit processing.

[0049] Embodiment 2

[0050] As Figures 2 - 5 shown, Embodiment 2 of the present invention is a specific implementation manner according to the working principle of Embodiment 1. The abscissa of each graph is t / s, and the ordinate is V.

[0051] In this embodiment, the varistor RV1 is 470 kΩ and the breakdown voltage is 6V. The first resistor R1 and the second resistor R2 are 2 MΩ, and the third resistor R3 is 2.5 kΩ. The first capacitor C1 is 0.1 μF and is used for filtering. The first bead L1 and the second bead L2 are both 100 Ω and are used to suppress high-frequency interference. The TVS diode D1 uses the SMAJ5.0CA model and the breakdown voltage is 5.0V. It is a commonly used transient voltage suppression diode and is used for overvoltage protection. The isolation amplifier U1 uses the NSI1200 model and the allowable input voltage is ±250 mV. The first fuse and the second fuse are both 0.5 A and are used for overcurrent protection. The second capacitor C2 is 0.01 μF and is used for power supply filtering; the third capacitor C3 is 0.01 μF and is used for ground filtering. The operational amplifier U2 uses the LMV321 model and can further amplify the signal output by the isolation amplifier U1 to meet the requirements of the AD chip for the amplitude of the input signal and ensure that the AC signal can be effectively converted into a digital signal. The fourth resistor R4 and the fifth resistor R5 are 10 kΩ and are used for impedance matching; the sixth resistor R6 is 100 kΩ and is used for reference voltage stabilization, and the seventh resistor R7 is 100 kΩ and is used for DC bias adjustment. The fourth capacitor C4 is 0.1 μF and is used for stabilizing the reference voltage; the fifth capacitor C5 is 0.1 μF and is used for adjusting the DC bias; the sixth capacitor C6 is 0.1 μF and is used for power supply decoupling. The first voltage source and the second voltage source select a voltage of 5V, the third voltage source selects 5V, and the reference voltage REF selects 2.5V.

[0052] Based on the various devices used in this embodiment, such as Figure 2 shown, when the amplitude of the input AC voltage signal is 100V and the waveform is a standard sine wave, the AC voltage signal can adjust the 100V AC signal to an amplitude of 0.25V through the first resistor R1, the second resistor R2, and the third resistor R3, meeting the amplitude range that the isolation amplifier U1 can input. The first capacitor C1 and the voltage-dividing network form a low-pass filter circuit, which can filter out high-frequency interference signals in the signal; the TVS diode D1 is used to suppress fast transient overvoltage, and the first bead L1 and the second bead L2 are used to suppress high-frequency interference signals to ensure the quality of the signal, so that the waveform of the voltage-divided signal remains intact. The waveform of the voltage-divided signal is as Figure 3 shown.

[0053] The isolation amplifier U1 receives the voltage-divided signal, and performs isolation amplification processing on the received AC signal through the isolation amplifier U1, so that the amplitude of the signal after isolation amplification processing is 2V and the waveform is still a sine waveform. The signal waveform output by the isolation amplifier U1 is as Figure 4as shown

[0054] The operational amplifier U2 receives the signal after isolation and amplification through the fourth resistor R4 and the fifth resistor R5. The reference voltage REF and the sixth resistor R6 cooperate with each other to add a 2.5V DC bias to the input signal, and a feedback network is formed by the seventh resistor R7 and the fifth capacitor C5, so that the DC bias can be adjusted to output a complete signal. The waveform of the signal output by the operational amplifier U2 is as Figure 5 shown

[0055] From Figures 2 - 5 the waveform change, it can be seen that the analog sampling circuit for the distribution network feeder terminal proposed by the present invention has high precision, strong anti-interference ability, low cost and strong applicability.

[0056] In summary, the analog sampling circuit for the distribution network feeder terminal proposed by the present invention performs voltage division and filtering processing on the input AC voltage signal through multiple resistors, the first capacitor, multiple beads and the TVS tube of the resistor voltage division circuit, so as to obtain an AC signal with a suitable amplitude, improving the accuracy and stability of the AC signal; the isolated amplified circuit performs isolation and amplification processing on the voltage-divided AC signal, which not only increases the intensity of the AC signal, making it more suitable for subsequent signal processing, but also reduces the interference that the AC signal may receive during transmission through electrical isolation, further improving the purity of the signal and the anti-interference ability of the circuit; the operational amplifier circuit also adds a DC bias to the isolated amplified AC signal, converts the AC signal into a DC signal and outputs it to the AD chip, so that the DC signal can be accurately read and processed by the AD chip, providing high-quality digital signal input for the monitoring and control of the power distribution network system.

[0057] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these modifications and variations.

Claims

1. An analog sampling circuit for a distribution network feeder terminal, characterized in that, It includes a resistor voltage division circuit, an isolation amplifier circuit, and an operational amplifier circuit connected in sequence; The resistor voltage division circuit is used to divide the input AC voltage signal and perform filtering to obtain an AC signal with an appropriate amplitude; the isolation amplifier circuit is used to isolate and amplify the divided AC signal; the operational amplifier circuit is used to add a DC bias to the isolated and amplified AC signal, convert the signal into a DC signal, and output it to the AD chip; Among them, the resistor voltage division circuit includes multiple resistors, a first capacitor, multiple beads, and a TVS tube; the multiple resistors divide the AC voltage signal to obtain an AC signal with an appropriate amplitude; the first capacitor is connected in parallel with the multiple resistors and is used to filter the divided AC signal; the multiple beads are connected in parallel with the first capacitor and are used to suppress high-frequency interference signals; the TVS tube is connected in parallel with the multiple beads and is used to provide overvoltage protection for the divided AC signal.

2. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 1, wherein The resistor voltage division circuit is provided with a first line and a second line. One end of the first line and the second line is connected to the AC signal voltage source, and the other end is connected to the isolation amplifier circuit.

3. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 2, wherein The multiple resistors include a varistor, a first resistor, a second resistor, and a third resistor; one end of the varistor is connected to the first line, and the other end is connected to the second line; the first resistor is arranged on the first line, one end is connected to one end of the varistor, and the other end is connected to one end of the third resistor; the second resistor is arranged on the second line, one end is connected to the other end of the varistor, and the other end is connected to the other end of the third resistor; one end of the third resistor is connected to the first line, and the other end is connected to the second line.

4. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 3, wherein The first capacitor is connected in parallel with the third resistor, and one end is connected to the first line, and the other end is connected to the second line.

5. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 4, characterized in that The multiple beads include a first bead and a second bead. The first bead is arranged on the first line, one end is connected to one end of the first capacitor, and the other end is connected to one end of the TVS tube; the second bead is arranged on the second line, one end is connected to the other end of the first capacitor, and the other end is connected to the other end of the TVS tube; One end of the TVS tube is also connected to the first line, and the other end is also connected to the second line.

6. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 1, characterized in that, The isolation amplifier circuit includes an isolation amplifier, a first fuse, and a second fuse; The first pin of the isolation amplifier is connected to the first voltage source and is also connected to the first fuse; the second pin of the isolation amplifier is connected to the other end of the first line; the third pin of the isolation amplifier is connected to the other end of the second line; the fourth pin of the isolation amplifier is connected to the second fuse; the fifth pin of the isolation amplifier is grounded; the sixth and seventh pins of the isolation amplifier are connected to the operational amplifier circuit; the eighth pin of the isolation amplifier is connected to the second voltage source.

7. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 6, characterized in that, The isolation amplifier circuit further includes a second capacitor and a third capacitor; a first pin of the isolation amplifier is connected to the first fuse through the second capacitor; an eighth pin of the isolation amplifier is also grounded through the third capacitor.

8. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 1, wherein, The operational amplifier circuit includes an operational amplifier, a fourth resistor, and a fifth resistor; A first pin of the operational amplifier is connected to a seventh pin of the isolation amplifier through the fourth resistor; a second pin of the operational amplifier is connected to a sixth pin of the isolation amplifier through the fifth resistor; a third pin of the operational amplifier is grounded; a fourth pin of the operational amplifier is connected to the AD chip; a fifth pin of the operational amplifier is connected to a third voltage source.

9. The analog quantity sampling circuit for a distribution network feeder terminal according to claim 8, characterized in that, The operational amplifier circuit further includes a sixth resistor, a seventh resistor, a fourth capacitor, a fifth capacitor, and a sixth capacitor; the sixth resistor and the fourth capacitor are in parallel, and the first pin of the operational amplifier is further connected to a reference voltage through the parallel sixth resistor and fourth capacitor; the seventh resistor and the fifth capacitor are in parallel, and the fourth pin of the operational amplifier is further connected to the second pin of the operational amplifier through the parallel seventh resistor and fifth capacitor; the fifth pin of the operational amplifier is further grounded through the sixth capacitor.

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