Synchronous acquisition and vector synthesis method and system for residual current data of multiple acquisition units

Abstract

The invention relates to a synchronous acquisition and vector synthesis method for residual current data of multiple acquisition units, and the method comprises the steps: a collection unit which prepares to read the information of each acquisition unit; the acquisition unit interrupts multiple times of triggering acquisition and stores residual current data until residual current information of a complete sine period is acquired; processing the acquired residual current data, and judging whether the acquisition unit has a fault or not; and the collection unit completes residual current data vector synthesis and calculates the magnitude of the residual current. The invention further discloses a synchronous acquisition and vector synthesis system for the residual current data of the multiple acquisition units. According to the invention, the collection unit broadcasts the synchronization signal to the plurality of collection units, and the collection units can receive the synchronization signal at the same time and start to collect the residual current signal at the same time, thereby achieving the synchronous collection of the residual current, avoiding the phase error caused by the synchronization error in the residual current signal collection process, and improving the collection precision of the residual current signal.

Description

Technical Field

[0001] The present invention relates to the technical field of residual current online monitoring, in particular to a method and system for synchronous acquisition and vector synthesis of residual current data of multiple acquisition units. Background Art

[0002] In power systems, when a fault occurs on the user side, such as an electric shock, line insulation damage, or line damage, some of the current in the main circuit will no longer flow back into the main circuit. At this time, the vector sum of the effective values of the currents flowing through each phase in the main circuit is non-zero. This non-zero current is the residual current. Therefore, residual current monitoring can be used to determine whether faults such as electric shock or equipment leakage have occurred in the power system. Failures in the power supply and distribution system can cause serious accidents such as casualties and equipment damage. Residual current monitoring can detect faults promptly and assist operations and maintenance personnel in assessing line insulation conditions. Therefore, residual current monitoring is extremely important.

[0003] Currently, residual current detection is typically achieved using a transformer, which passes through all busbars in the main circuit. When the phases in the busbar are thick or dispersed, it is difficult to detect residual current with a single transformer. In this case, the current vectors on each busbar must be collected separately. Then, the currents of each phase are vector-synthesized to calculate the effective residual current value. Because the magnitude and direction of each phase current are time-dependent, if the currents of each phase cannot be collected simultaneously, the effective residual current value calculated through vector synthesis will not accurately reflect the residual current magnitude. Summary of the Invention

[0004] In order to solve the problem that the residual current information cannot be directly measured by a single mutual inductor in complex situations, and multiple acquisition devices cannot collect information synchronously, resulting in large errors in the residual current information, the primary purpose of the present invention is to provide a method for synchronously collecting and vector synthesizing residual current data of multiple acquisition units to achieve synchronous collection of residual current, avoid phase errors caused by synchronization errors in the residual current signal collection process, and improve the accuracy of residual current signal collection.

[0005] To achieve the above object, the present invention adopts the following technical solution: a method for synchronously collecting and vector-synthesizing residual current data of multiple collection units, the method comprising the following steps in sequence:

[0006] (1) After the first timer interrupt of the aggregation unit is triggered, a synchronization signal is broadcast to the collection unit through the first communication module. After the interrupt ends, the first timer is turned off and the second timer is turned on to prepare to read the information of each collection unit;

[0007] (2) the collection unit starts a third timer after receiving the synchronization signal broadcast by the collection unit;

[0008] (3) The third timer interrupt of the acquisition unit triggers the acquisition and storage of residual current data multiple times until the residual current information of a complete sinusoidal cycle is acquired;

[0009] (4) The acquisition unit turns off the third timer and turns on the fourth timer;

[0010] (5) After the fourth timer interrupt of the acquisition unit is triggered, the collected residual current data is processed to determine whether the acquisition unit has a fault;

[0011] (6) the acquisition unit turns off the fourth timer after processing the residual current data;

[0012] (7) The second timer interrupt of the collection unit is triggered multiple times, and the residual current data collected by each collection unit is read through the first communication module until the data of all collection units are read and saved, and the residual current data vector synthesis is completed, the residual current size is calculated, and then the second timer is turned off and the first timer is turned on, waiting for the first timer interrupt to be triggered.

[0013] In step (1), the synchronization signal is a frame of fixed format data.

[0014] In step (3), the number of interrupt triggering times of the third timer of the acquisition unit is 128 times.

[0015] In step (5), the processing of the collected residual current data to determine whether the collection unit has a fault specifically includes the following steps:

[0016] (5a) Determine whether the collected residual current data is 0. If the determination result is yes, proceed to step (5b); otherwise, proceed to step (5c);

[0017] (5b) adding a bias voltage to the acquisition module through the second microprocessor and then collecting data again. If the collected data is a DC bias voltage, it is determined that the acquisition unit is normal. If the collected data is still 0, it is determined that the acquisition unit is faulty.

[0018] (5c) Determine whether the residual current data conforms to the sine wave characteristics. If so, retain the residual current data. If not, set all residual current data to 0.

[0019] In step (7), the timing time of the second timer is greater than the time for reading the residual current data collected by the collection unit; the number of interrupt triggering of the second timer is the same as the number of collection units.

[0020] In step (7), the residual current I * The size is calculated as:

[0021]

[0022] Where, k is the kth acquisition unit, i is the residual current data collected for the i-th time, D ki is the residual current data collected by the kth collection unit for the i-th time.

[0023] Another object of the present invention is to provide a synchronous acquisition and vector synthesis system for residual current data of multiple acquisition units, comprising a collection unit and multiple acquisition units, wherein the collection unit is used to generate a synchronization signal, collect the residual current information collected by the acquisition units, and perform vector synthesis on the residual current information; the acquisition units are used to collect the residual current information and process the residual current information;

[0024] The collection unit includes:

[0025] a first microprocessor, configured to control the first communication module to send synchronization information, control the second communication module to receive residual current information, and perform vector synthesis on the received residual current information;

[0026] A first communication module is used to send a synchronization signal to the acquisition unit;

[0027] A second communication module is used to send a read instruction to the acquisition unit and receive the residual current information collected by the acquisition unit;

[0028] The acquisition unit includes:

[0029] The signal acquisition module is used to convert the primary current signal into a secondary small current signal through a current transformer, convert the secondary small current signal into a voltage signal through a sampling resistor, and filter the voltage signal through a filter circuit;

[0030] The AD conversion module is used to convert the analog signal collected by the signal acquisition module into a digital signal;

[0031] The isolation module uses a digital isolator to isolate the AD conversion module from the second microprocessor through the digital isolator;

[0032] The second microprocessor is used to control the AD conversion module to perform digital-to-analog conversion, save the conversion result, determine whether the acquisition unit has a fault based on the conversion result, analyze the synchronization signal received by the third communication module, and control the fourth communication module to send residual current information;

[0033] A third communication module receives a synchronization signal from the aggregation unit;

[0034] a fourth communication module, receiving a read instruction from the aggregation unit, and sending the residual current information stored by the second microprocessor to the aggregation unit;

[0035] The first communication module is connected to the third communication module, and the second communication module is connected to the fourth communication module.

[0036] The first microprocessor and the second microprocessor both use STM32F407VET6 chips, the first, second, third and fourth communication modules all use TD301M485 chips, the AD conversion module uses ADS8681IPWRX chip, and the isolation module uses π142M31S chip.

[0037] It can be seen from the above technical solution that the beneficial effects of the present invention are: first, the synchronization signal is broadcast to multiple acquisition units through the aggregation unit, and each acquisition unit can receive the synchronization signal at the same time and start to collect the residual current signal at the same time, thereby realizing the synchronous collection of the residual current, avoiding the phase error caused by the synchronization error in the residual current signal acquisition process, and improving the accuracy of the residual current signal acquisition; second, the 16-bit ADS8681IPWRX digital-to-analog conversion chip with high-speed and high-precision sampling capability is used to perform digital-to-analog conversion on the residual current signal, which can reduce the error of the residual current signal in the conversion process, avoid the residual current information error caused by the acquisition accuracy in the residual current signal conversion process, and improve the accuracy of the residual current information acquisition; third, the aggregation unit reads the phase and neutral currents collected by the acquisition unit, performs vector synthesis on the phase and neutral currents, and obtains the total residual current size of the monitored circuit, thereby realizing effective monitoring of the residual current size of the monitoring circuit, and solving the problem that the residual current information cannot be directly measured by a single mutual inductor in complex occasions. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1 It is a system structure topology diagram of the present invention;

[0039] Figure 2 is a flow chart of the method of the present invention;

[0040] Figure 3 This is a working logic diagram of the second timer of the aggregation unit in the present invention;

[0041] Figure 4 This is a working logic diagram of the third timer of the acquisition unit in the present invention; DETAILED DESCRIPTION

[0042] like Figure 2 As shown, a method for synchronously collecting and vector-synthesizing residual current data from multiple collection units comprises the following steps in sequence:

[0043] (1) After the first timer interrupt of the aggregation unit is triggered, a synchronization signal is broadcast to the collection unit through the first communication module. After the interrupt ends, the first timer is turned off and the second timer is turned on to prepare to read the information of each collection unit;

[0044] (2) the collection unit starts a third timer after receiving the synchronization signal broadcast by the collection unit;

[0045] (3) The third timer interrupt of the acquisition unit triggers the acquisition and storage of residual current data multiple times until the residual current information of a complete sinusoidal cycle is acquired;

[0046] (4) The acquisition unit turns off the third timer and turns on the fourth timer;

[0047] (5) After the fourth timer interrupt of the acquisition unit is triggered, the collected residual current data is processed to determine whether the acquisition unit has a fault;

[0048] (6) the acquisition unit turns off the fourth timer after processing the residual current data;

[0049] (7) The second timer interrupt of the collection unit is triggered multiple times, and the residual current data collected by each collection unit is read through the first communication module until the data of all collection units are read and saved, and the residual current data vector synthesis is completed, the residual current size is calculated, and then the second timer is turned off and the first timer is turned on, waiting for the first timer interrupt to be triggered.

[0050] In step (1), the synchronization signal is a frame of fixed format data, such as 0x010x030x100x000x000x01+check code.

[0051] In step (3), the number of interrupt triggers of the third timer of the acquisition unit is 128 times, and 128 points of data are read in one cycle, such as Figure 4 shown.

[0052] In step (5), the processing of the collected residual current data to determine whether the collection unit has a fault specifically includes the following steps:

[0053] (5a) Determine whether the collected residual current data is 0. If the determination result is yes, proceed to step (5b); otherwise, proceed to step (5c);

[0054] (5b) adding a bias voltage to the acquisition module through the second microprocessor and then collecting data again. If the collected data is a DC bias voltage, it is determined that the acquisition unit is normal. If the collected data is still 0, it is determined that the acquisition unit is faulty.

[0055] (5c) Determine whether the residual current data conforms to the sine wave characteristics. If so, retain the residual current data. If not, set all residual current data to 0.

[0056] In step (7), the timing time of the second timer is greater than the time for reading the residual current data collected by the collection unit; the number of interrupt triggering of the second timer is the same as the number of collection units.

[0057] In step (7), the residual current I * The size is calculated as:

[0058]

[0059] Where, k is the kth acquisition unit, i is the residual current data collected for the i-th time, D ki is the residual current data collected by the kth collection unit for the i-th time.

[0060] like Figure 1 As shown, the system includes a collection unit and multiple collection units, wherein the collection unit is used to generate a synchronization signal, collect the residual current information collected by the collection unit, and perform vector synthesis on the residual current information; the collection unit is used to collect the residual current information and process the residual current information;

[0061] The collection unit includes:

[0062] a first microprocessor, configured to control the first communication module to send synchronization information, control the second communication module to receive residual current information, and perform vector synthesis on the received residual current information;

[0063] A first communication module is used to send a synchronization signal to the acquisition unit;

[0064] A second communication module is used to send a read instruction to the acquisition unit and receive the residual current information collected by the acquisition unit;

[0065] The acquisition unit includes:

[0066] The signal acquisition module is used to convert the primary current signal into a secondary small current signal through a current transformer, convert the secondary small current signal into a voltage signal through a sampling resistor, and filter the voltage signal through a filter circuit;

[0067] The AD conversion module is used to convert the analog signal collected by the signal acquisition module into a digital signal;

[0068] The isolation module uses a digital isolator to isolate the AD conversion module from the second microprocessor through the digital isolator;

[0069] The second microprocessor is used to control the AD conversion module to perform digital-to-analog conversion, save the conversion result, determine whether the acquisition unit has a fault based on the conversion result, analyze the synchronization signal received by the third communication module, and control the fourth communication module to send residual current information;

[0070] A third communication module receives a synchronization signal from the aggregation unit;

[0071] a fourth communication module, receiving a read instruction from the aggregation unit, and sending the residual current information stored by the second microprocessor to the aggregation unit;

[0072] The first communication module is connected to the third communication module, and the second communication module is connected to the fourth communication module.

[0073] The first microprocessor and the second microprocessor both use STM32F407VET6 chips, the first, second, third and fourth communication modules all use TD301M485 chips, the AD conversion module uses ADS8681IPWRX chip, and the isolation module uses π142M31S chip.

[0074] like Figure 3 As shown, the second timer 2 of the collection unit is interrupted and triggered n+1 times, where n is the number of collection units. The first n times are used to read the residual current data of the collection units, and the last time is used for vector synthesis.

[0075] To sum up, the present invention broadcasts a synchronization signal to multiple acquisition units through a collection unit. Each acquisition unit can receive the synchronization signal at the same time and start collecting the residual current signal at the same time, thereby realizing the synchronous collection of the residual current, avoiding the phase error caused by the synchronization error in the residual current signal collection process, and improving the accuracy of the residual current signal collection; using a 16-bit ADS8681IPWRX digital-to-analog conversion chip with high-speed and high-precision sampling capability to perform digital-to-analog conversion on the residual current signal, which can reduce the error of the residual current signal in the conversion process, avoid the residual current information error caused by the acquisition accuracy in the residual current signal conversion process, and improve the accuracy of the residual current information collection; the collection unit reads the phase line and neutral line currents collected by the acquisition unit, performs vector synthesis on the phase line and neutral line currents, and obtains the total residual current size of the monitored circuit, thereby realizing effective monitoring of the residual current size of the monitoring circuit, and solving the problem that the residual current information cannot be directly measured by a single mutual inductor in complex occasions.

[0076] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions merely illustrate the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of protection claimed by the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for synchronously collecting and vector-synthesizing residual current data from multiple collection units, characterized by: The method comprises the following steps in sequence: (1) After the first timer interrupt of the aggregation unit is triggered, a synchronization signal is broadcast to the collection unit through the first communication module. After the interrupt ends, the first timer is turned off and the second timer is turned on to prepare to read the information of each collection unit; (2) the collection unit starts a third timer after receiving the synchronization signal broadcast by the collection unit; (3) The third timer interrupt of the acquisition unit triggers the acquisition and storage of residual current data multiple times until the residual current information of a complete sinusoidal cycle is acquired; (4) The acquisition unit turns off the third timer and turns on the fourth timer; (5) After the fourth timer interrupt of the acquisition unit is triggered, the collected residual current data is processed to determine whether the acquisition unit has a fault; (6) the acquisition unit turns off the fourth timer after processing the residual current data; (7) The second timer interrupt of the collection unit is triggered multiple times, and the residual current data collected by each collection unit is read through the first communication module until the data of all collection units are read and saved, and the residual current data vector synthesis is completed, the residual current size is calculated, and then the second timer is turned off and the first timer is turned on, waiting for the first timer interrupt to be triggered.

2. The method for synchronously collecting and vector-synthesizing residual current data of multiple collection units according to claim 1, characterized in that: In step (1), the synchronization signal is a frame of fixed format data.

3. The method for synchronously collecting and vector-synthesizing residual current data of multiple collection units according to claim 1, characterized in that: In step (3), the number of interrupt triggering times of the third timer of the acquisition unit is 128 times.

4. The method for synchronously collecting and vector-synthesizing residual current data of multiple collection units according to claim 1, characterized in that: In step (5), the processing of the collected residual current data to determine whether the collection unit has a fault specifically includes the following steps: (5a) Determine whether the collected residual current data is 0. If the determination result is yes, proceed to step (5b); otherwise, proceed to step (5c); (5b) adding a bias voltage to the acquisition module through the second microprocessor and then collecting data again. If the collected data is a DC bias voltage, it is determined that the acquisition unit is normal. If the collected data is still 0, it is determined that the acquisition unit is faulty. (5c) Determine whether the residual current data conforms to the sine wave characteristics. If so, retain the residual current data. If not, set all residual current data to 0.

5. The method for synchronously collecting and vector-synthesizing residual current data of multiple collection units according to claim 1, characterized in that: In step (7), the residual current I * The size is calculated as: Where, k is the kth acquisition unit, i is the residual current data collected for the i-th time, D ki is the residual current data collected by the kth collection unit for the i-th time.

6. A system for implementing the method for synchronous acquisition and vector synthesis of residual current data from multiple acquisition units according to any one of claims 1 to 5, characterized in that: It includes a collection unit and multiple collection units, wherein the collection unit is used to generate a synchronization signal, collect the residual current information collected by the collection unit, and perform vector synthesis on the residual current information; the collection unit is used to collect the residual current information and process the residual current information; The collection unit includes: a first microprocessor, configured to control the first communication module to send synchronization information, control the second communication module to receive residual current information, and perform vector synthesis on the received residual current information; A first communication module is used to send a synchronization signal to the acquisition unit; A second communication module is used to send a read instruction to the acquisition unit and receive the residual current information collected by the acquisition unit; The acquisition unit includes: The signal acquisition module is used to convert the primary current signal into a secondary small current signal through a current transformer, convert the secondary small current signal into a voltage signal through a sampling resistor, and filter the voltage signal through a filter circuit; The AD conversion module is used to convert the analog signal collected by the signal acquisition module into a digital signal; The isolation module uses a digital isolator to isolate the AD conversion module from the second microprocessor through the digital isolator; The second microprocessor is used to control the AD conversion module to perform digital-to-analog conversion, save the conversion result, determine whether the acquisition unit has a fault based on the conversion result, analyze the synchronization signal received by the third communication module, and control the fourth communication module to send residual current information; A third communication module receives a synchronization signal from the aggregation unit; a fourth communication module, receiving a read instruction from the aggregation unit, and sending the residual current information stored by the second microprocessor to the aggregation unit; The first communication module is connected to the third communication module, and the second communication module is connected to the fourth communication module.

7. The system according to claim 6, characterized in that: The first microprocessor and the second microprocessor both use STM32F407VET6 chips, the first, second, third and fourth communication modules all use TD301M485 chips, the AD conversion module uses ADS8681IPWRX chip, and the isolation module uses π142M31S chip.

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