Silicon heterojunction solar cell and preparation method thereof

Abstract

The invention relates to the technical field of solar cells, in particular to a silicon heterojunction solar cell and a preparation method thereof, a dielectric anti-reflection passivation layer and a functional layer are arranged on a light receiving surface of a substrate side by side, a front transparent conductive oxide layer is arranged on the functional layer, a front electrode is arranged on the front transparent conductive oxide layer, and a back electrode is arranged on the back transparent conductive oxide layer. The front transparent conductive oxide layer is wider than the front electrode. The dielectric antireflection passivation layer is arranged in a large area, the passivation effect similar to that of the functional layer is provided through the high thickness, transverse transmission of carriers is greatly reduced through the dielectric property of the dielectric antireflection passivation layer, the area of the functional layer can be reduced, and therefore the use area of the front transparent conductive oxide layer is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of solar cells, and in particular to a silicon heterojunction solar cell and a preparation method thereof. Background Art

[0002] Heterojunction solar cells are a new type of solar cell technology that combines the advantages of crystalline silicon cells and thin-film cells. Due to their high efficiency, high stability, and low temperature coefficient, they are suitable for traditional photovoltaic power plants, as well as for applications in building-integrated photovoltaics (BIPV), portable electronic devices, aerospace, and other fields. As the technology continues to mature, heterojunction solar cells have gained a significant position in the photovoltaic market. Their preparation method involves first cleaning and texturing an N-type monocrystalline silicon wafer. Then, using PECVD equipment, a very thin intrinsic amorphous silicon film and an N-type microcrystalline silicon oxide film are deposited on the front of the N-type monocrystalline silicon wafer. A very thin intrinsic amorphous silicon film and a P-type microcrystalline silicon film are then deposited on the back of the wafer. A transparent oxide (indium tin oxide) conductive film is then deposited on both sides of the cell using PVD. Finally, a front electrode is formed on the transparent oxide (indium tin oxide) conductive film.

[0003] Traditional heterojunction solar cells suffer from significant parasitic absorption in the passivation and doping layers on the light-receiving side, resulting in a lower efficiency ceiling than double-sided passivated TOPCON cells. To maintain good passivation, the passivation layer of traditional heterojunction solar cells requires a relatively loose film. This looseness leads to a relatively high defect state density. Therefore, traditional heterojunction solar cells currently cannot achieve both good passivation and low defect state density. The microcrystalline doping layer of traditional heterojunction solar cells is produced at low temperatures. Compared to the poly-Si doping layer of TOPCON cells, it has a lower degree of crystallization and contains a partial amorphous phase, resulting in lower stability and defect state density. Indium is a key raw material in the production of ITO conductive films. However, its relatively concentrated distribution and limited resources make its supply subject to multiple factors, including geopolitical factors, mineral policies, and market fluctuations. Consequently, ITO presents raw material supply risks and its extremely high price, hindering the large-scale production of heterojunction solar cells. Summary of the Invention The purpose of the present invention is to provide a silicon heterojunction solar cell and a preparation method thereof, so as to solve the technical problems in the prior art that ITO has raw material supply risks and is extremely expensive, which is not conducive to large-scale mass production of heterojunction solar cells.

[0004] The present invention discloses a method for preparing a silicon heterojunction solar cell. A dielectric anti-reflection passivation layer and a functional layer are arranged side by side on the light-receiving surface of a substrate. A front transparent conductive oxide layer is provided on the functional layer. A front electrode is provided on the front transparent conductive oxide layer. The width of the front transparent conductive oxide layer is greater than that of the front electrode.

[0005] Working principle: By setting a dielectric anti-reflection passivation layer over a large area, a passivation effect similar to that of the functional layer is provided through a higher thickness. Through its dielectric properties, the lateral transport of carriers is greatly reduced, which can reduce the area of the functional layer and thus reduce the use area of the front transparent conductive oxide layer.

[0006] Furthermore, the dielectric anti-reflection passivation layer is prepared by using PECVD technology or low pressure chemical vapor deposition (LPCVD).

[0007] Furthermore, the dielectric anti-reflection passivation layer material is Si3N4, SiC, SiON or SiOC.

[0008] Furthermore, the functional layer includes a front intrinsic amorphous silicon passivation layer arranged on the substrate.

[0009] Furthermore, an N-type microcrystalline silicon oxide layer is provided on the front intrinsic amorphous silicon passivation layer in a direction away from the substrate.

[0010] Furthermore, the front intrinsic amorphous silicon passivation layer and the N-type microcrystalline silicon oxide layer have the same width.

[0011] Furthermore, the raw gases used in the deposition of the front intrinsic amorphous silicon passivation layer include silane and hydrogen.

[0012] Furthermore, during the deposition of the front intrinsic amorphous silicon passivation layer, the silane flow rate range is 1000-2000 sccm, the hydrogen flow rate range is 0-10000 sccm, the pressure range in the chamber during the deposition is 50 Pa to 110 Pa, the temperature range is 165-185 ° C, and the RF power density range during the deposition is 0.02-0.03 W / cm 2 , plasma action time is 20-35S.

[0013] Furthermore, the gases used in the deposition of the N-type microcrystalline silicon oxide layer include silane, hydrogen, carbon dioxide and phosphine.

[0014] Furthermore, during the deposition of the N-type microcrystalline silicon oxide layer, the hydrogen flow rate range is 100-200 slm, the volume ratio of silane to hydrogen is 1:150-300, the doping concentration of phosphine is 10%-20%, and the doping concentration of carbon dioxide is 10%-30%. During the deposition process to form the nucleation layer, the pressure in the deposition chamber ranges from 400 Pa to 500 Pa, the temperature range is 165-185°C, and the power density of the RF power supply during the deposition ranges from 0.25-0.35 W / cm 2 , the ignition time is 100-200S.

[0015] Furthermore, the conductivity of the N-type microcrystalline silicon oxide layer is greater than or equal to 0.7 S / m, the crystallization rate is greater than or equal to 70%, and the phosphine doping concentration should be ≥10%.

[0016] Furthermore, the thickness of the functional layer is smaller than the thickness of the dielectric anti-reflection passivation layer.

[0017] By setting the thickness of the functional layer to be smaller than the thickness of the dielectric anti-reflection passivation layer, the passivation effect of the dielectric anti-reflection passivation layer can be ensured.

[0018] Furthermore, the dielectric anti-reflection passivation layer has a thickness of 50-70 nm.

[0019] Furthermore, the thickness of the functional layer is 20-30 nm.

[0020] Furthermore, the thickness of the front transparent conductive oxide layer is 70-100 nm.

[0021] Furthermore, the front transparent conductive oxide layer is a patterned finger-shaped structure.

[0022] By setting the front transparent conductive oxide layer as a graphic finger structure, the material usage is reduced and the production cost is reduced.

[0023] Furthermore, the front transparent conductive oxide layer is an ITO film layer.

[0024] Furthermore, the front transparent conductive oxide layer has the same width as that of the functional layer.

[0025] Furthermore, a back intrinsic amorphous silicon passivation layer is provided on the backlight surface of the substrate.

[0026] Furthermore, a P-type microcrystalline silicon layer is provided on a side of the back intrinsic amorphous silicon passivation layer away from the substrate.

[0027] Furthermore, the gases used in depositing the P-type microcrystalline silicon layer include silane, hydrogen and diborane.

[0028] Furthermore, a back ITO layer is provided on a side of the P-type microcrystalline silicon layer away from the substrate.

[0029] Furthermore, a back electrode is provided on a side of the back ITO layer away from the substrate.

[0030] The present invention also discloses a silicon heterojunction solar cell, comprising a substrate, wherein a dielectric anti-reflection passivation layer is provided on the light-receiving surface of the substrate, a groove is provided on the dielectric anti-reflection passivation layer, a functional layer is provided in the groove, a front transparent conductive oxide layer is provided on the functional layer, a front electrode is provided on the front transparent conductive oxide layer, and the width of the groove is greater than the width of the front electrode.

[0031] Compared with the prior art, the present invention has the following beneficial effects: By setting a dielectric anti-reflection passivation layer over a large area, a passivation effect similar to that of the functional layer is provided through a higher thickness. Through its dielectric properties, the lateral transmission of carriers is greatly reduced, which can reduce the area of the functional layer and thus the use area of the transparent conductive oxide layer. By setting the transparent conductive oxide layer as a patterned finger structure, its material usage is reduced and the production cost is reduced. The N-type microcrystalline silicon oxide layer can form a strong inversion at the interface between the film layer and the crystalline silicon, which will generate a strong electric field on the surface of the crystalline silicon, thereby promoting the transmission of minority carriers across the heterojunction interface. BRIEF DESCRIPTION OF THE DRAWINGS In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only represent some embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 Schematic diagram of the solar cell structure of the present invention.

[0033] In the above drawings, the meanings of the various marks are: 1-substrate, 2-dielectric anti-reflection passivation layer, 3-groove, 4-functional layer, 5-front transparent conductive oxide layer, 6-front electrode, 7-front intrinsic amorphous silicon passivation layer, 8-N-type microcrystalline silicon oxide layer, 9-back intrinsic amorphous silicon passivation layer, 10-P-type microcrystalline silicon layer, 11-back ITO layer, 12-back electrode. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in combination with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments.

[0035] like Figure 1As shown, a silicon heterojunction solar cell includes a substrate 1, a dielectric anti-reflection passivation layer 2 is provided on the light-receiving surface of the substrate 1, a groove 3 is provided on the dielectric anti-reflection passivation layer 2, a functional layer 4 is provided in the groove 3, a front transparent conductive oxide layer 5 is provided on the functional layer 4, a front electrode 6 is provided on the front transparent conductive oxide layer 5, the width of the groove 3 is greater than the width of the front electrode 6, the thickness of the functional layer 4 is less than the thickness of the dielectric anti-reflection passivation layer 2, the thickness of the dielectric anti-reflection passivation layer 2 is 50-70nm, the thickness of the functional layer 4 is 20-30nm, and the thickness of the front transparent conductive oxide layer 5 is 70-100nm.

[0036] The front transparent conductive oxide layer 5 is a patterned finger structure, and the front transparent conductive oxide layer 5 is an ITO film layer. The functional layer 4 includes a front intrinsic amorphous silicon passivation layer 7 arranged on the substrate 1, and an N-type microcrystalline silicon oxide layer 8 is arranged on the front intrinsic amorphous silicon passivation layer 7 in the direction away from the substrate 1. The front intrinsic amorphous silicon passivation layer 7 and the N-type microcrystalline silicon oxide layer 8 have the same width. The front transparent conductive oxide layer 5 has the same width as the functional layer 4. A back intrinsic amorphous silicon passivation layer 9 is provided on the backlight side of the substrate 1, and a P-type microcrystalline silicon layer 10 is provided on the side of the back intrinsic amorphous silicon passivation layer 9 away from the substrate 1. A back ITO layer 11 is provided on the side of the P-type microcrystalline silicon layer 10 away from the substrate 1, and a back electrode 12 is provided on the side of the back ITO layer 11 away from the substrate 1.

[0037] Example 1 1) This embodiment discloses a method for preparing the above-mentioned silicon heterojunction solar cell, which includes the following steps: cleaning and texturing, using an N-type single-crystal silicon wafer with a thickness of 120 microns, using a diluted HF solution with a solubility of 5% to remove the surface oxide layer of the silicon substrate, using a KOH plus alcohol method, and utilizing anisotropic etching of the single-crystal silicon to form a pyramid structure on the surface, thereby completing the texturing treatment on both sides of the silicon substrate.

[0038] 2) Amorphous silicon thin film deposition: Using PECVD (Polychemical Vapor Deposition) technology, intrinsic amorphous silicon thin films are deposited on both the front and back surfaces of crystalline silicon using silane and hydrogen as raw gases. Deposition on the front surface is limited to specific areas through a mask, while the entire back surface is deposited. During the deposition of the amorphous silicon thin film, the silane flow rate is 1500 sccm and the hydrogen flow rate is 8000 sccm. During the deposition process, the pressure in the deposition chamber is 100 Pa and the temperature is 180°C. The RF power density during deposition is 0.05 W / cm 2 , the plasma action time is 30S.

[0039] 3) Deposition of an N-type microcrystalline silicon oxide film using PECVD (Polychemical Vapor Deposition) technology using silane, hydrogen, carbon dioxide, phosphine, etc. through a mask to deposit only on the front intrinsic amorphous silicon film. During the deposition of the N-type microcrystalline silicon film, the hydrogen flow rate is 150 slm, the volume ratio of silane to hydrogen is 1:150, the phosphine doping concentration is 10%, and the carbon dioxide doping concentration is 10%. During the deposition to form the nucleation layer, the pressure in the deposition chamber is 400 Pa, the temperature is 180°C, and the RF power density during the deposition is in the range of 0.25 W / cm 2， The ignition time is 150S.

[0040] 4) P-type microcrystalline silicon film deposition, using silane, hydrogen, diborane, etc. to deposit on the back intrinsic amorphous silicon film through chemical vapor deposition (PECVD) technology. When depositing the P-type microcrystalline silicon film, the hydrogen flow rate is 150slm, the volume ratio of silane to hydrogen is 1:250, the diborane doping concentration is 0.25%, and the carbon dioxide doping concentration is 10%. During the deposition process of forming the silicon-based film, the pressure range in the deposition chamber is 400Pa, the temperature is 165°C, and the RF power density during the deposition is 0.3W / cm 2 , the ignition time is 250S.

[0041] 5) Dielectric anti-reflection passivation film deposition, using silane, nitrogen, etc., using a mask to deposit only specific areas using PECVD technology. During the deposition of the dielectric anti-reflection passivation film, the silane flow rate is 1500 sccm, the nitrogen flow rate is 4000 sccm, and during the deposition process of forming the silicon-based film, the pressure in the deposition chamber is 250 Pa, the temperature is 180°C, and the RF power density during the deposition is 0.05 W / cm 2 , the plasma action time is 100S.

[0042] 6) ITO thin film deposition, using physical vapor deposition (PVD) technology, using hydrogen, argon and other gases to bombard and sputter the ITO target material to prepare the deposition. During deposition, a mask is used to deposit only in specific areas. The ITO target material is used in a 97:3 ratio and the film thickness is 90nm.

[0043] 7) Preparation of metal electrodes: prepare the front and back metal electrodes separately by screen printing technology.

[0044] Example 2 The difference between this embodiment and embodiment 1 is that in step 3) of this embodiment, the volume ratio of silane to hydrogen is 1:200.

[0045] Example 3 The difference between this embodiment and embodiment 1 is that in step 3) of this embodiment, the volume ratio of silane to hydrogen is 1:250.

[0046] Example 4 The difference between this embodiment and embodiment 1 is that in step 3) of this embodiment, the volume ratio of silane to hydrogen is 1:300.

[0047] Example 5 The difference between this embodiment and embodiment 1 is that the doping concentration of phosphine in step 3) of this embodiment is 15%.

[0048] Example 6 The difference between this embodiment and embodiment 1 is that the doping concentration of phosphine in step 3) of this embodiment is 20%.

[0049] The solar cells prepared in Examples 1-6 were subjected to performance tests, including photoelectric conversion efficiency (Eta), open circuit voltage (Uoc), short circuit current (Isc), and fill factor (FF). The specific test results are shown in Table 1.

[0050]

[0051] The above are the implementation methods listed in this embodiment, but this embodiment is not limited to the above optional implementation methods. Those skilled in the art can arbitrarily combine the above methods to obtain other various implementation methods. Anyone can derive other various forms of implementation methods based on the inspiration of this embodiment. The above specific implementation methods should not be understood as limiting the scope of protection of this embodiment. The scope of protection of this embodiment shall be based on the definition in the claims, and the description can be used to interpret the claims.

Claims

1. A method for preparing a silicon heterojunction solar cell, characterized in that: A dielectric anti-reflection passivation layer and a functional layer are arranged side by side on the light-receiving surface of the substrate, a front transparent conductive oxide layer is provided on the functional layer, a front electrode is provided on the front transparent conductive oxide layer, and the width of the front transparent conductive oxide layer is greater than that of the front electrode.

2. The method for preparing a silicon heterojunction solar cell according to claim 1, wherein: The dielectric anti-reflection passivation layer is prepared by chemical vapor deposition technology or low-pressure chemical vapor deposition.

3. The method for preparing a silicon heterojunction solar cell according to claim 1 or 2, characterized in that: The dielectric anti-reflection passivation layer is made of Si3N4, SiC, SiON or SiOC.

4. The method for preparing a silicon heterojunction solar cell according to claim 1 or 2, wherein: The functional layer includes a front intrinsic amorphous silicon passivation layer disposed on a substrate.

5. The method for preparing a silicon heterojunction solar cell according to claim 4, wherein: The raw gases used in depositing the front intrinsic amorphous silicon passivation layer include silane and hydrogen.

6. The method for preparing a silicon heterojunction solar cell according to claim 5, wherein: During the deposition of the front intrinsic amorphous silicon passivation layer, the silane flow rate range is 1000-2000 sccm, the hydrogen flow rate range is 0-10000 sccm, the pressure range in the chamber during the deposition is 50 Pa-110 Pa, the temperature range is 165-185° C., and the RF power density range during the deposition is 0.02-0.03 W / cm 2 , plasma action time is 20-35S.

7. The method for preparing a silicon heterojunction solar cell according to claim 4, wherein: An N-type microcrystalline silicon oxide layer is provided on the front intrinsic amorphous silicon passivation layer in a direction away from the substrate.

8. The method for preparing a silicon heterojunction solar cell according to claim 7, wherein: The gases used in the deposition of the N-type microcrystalline silicon oxide layer include silane, hydrogen, carbon dioxide and phosphine.

9. The method for preparing a silicon heterojunction solar cell according to claim 8, wherein: During the deposition of the N-type microcrystalline silicon oxide layer, the hydrogen flow rate range is 100-200 slm, the volume ratio of silane to hydrogen is 1:150-300, the phosphine doping concentration is 10%-20%, and the carbon dioxide doping concentration is 10%-30%. During the deposition process to form the nucleation layer, the pressure in the deposition chamber ranges from 400 Pa to 500 Pa, the temperature range is 165-185°C, and the RF power density during the deposition ranges from 0.25-0.35 W / cm 2 , the ignition time is 100-200S.

10. A solar cell manufactured by the method for manufacturing a silicon heterojunction solar cell according to claims 1-9, characterized in that: The invention comprises a substrate (1), wherein a dielectric anti-reflection passivation layer (2) is provided on a light-receiving surface of the substrate (1), a groove (3) is provided on the dielectric anti-reflection passivation layer (2), a functional layer (4) is provided in the groove (3), a front transparent conductive oxide layer (5) is provided on the functional layer (4), a front electrode (6) is provided on the front transparent conductive oxide layer (5), and the width of the groove (3) is greater than the width of the front electrode (6).

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