Triple-modular redundancy implementation method

Abstract

The invention relates to a triple modular redundancy implementation method. The method comprises the following steps: acquiring a target circuit netlist; dividing the target circuit netlist to obtain a plurality of sub-circuit netlists; respectively copying the sub-circuit netlist into three parts according to a predetermined strategy; determining the number of inserted voters for every two groups of sub-circuit netlists according to whether the sub-circuit netlists are copied or not; determining a connection mode according to the number of voters; and connecting each group of sub-circuit netlists and voters to form a circuit netlist after triple modular redundancy. According to the method, in the triple-modular redundancy implementation process, through circuit netlist division and voter insertion strategies, the resistance of the circuit netlist after triple-modular redundancy to accumulated errors is improved, and system operation is not affected.

Description

Technical Field

[0001] The present invention relates to the field of radiation resistance technology, and in particular to a method for realizing triple modular redundancy. Background Art

[0002] With the development of the aerospace industry, SRAM-type FPGA has become an indispensable core electronic component in spacecraft due to its flexible programmable characteristics and its use in complex and changeable aerospace missions.

[0003] However, due to the large number of high-energy particles in space, SRAM-based FPGA chips are highly susceptible to single-event upsets (SEEs) under space radiation conditions, causing soft errors and even functional failures in spacecraft. To ensure the reliability of FPGAs in space applications, triple-module redundancy (TMR) technology is recognized as a very effective radiation hardening method.

[0004] However, existing triple-module redundancy implementations have shortcomings. They struggle to avoid the cumulative effects of radiation. When multiple flips occur and multiple soft errors accumulate, errors can easily occur in multiple backups, ultimately leading to output failures. Existing triple-module redundancy methods typically employ refreshes to prevent cumulative failures, but these refreshes often impact temporary storage and system operation, and incur additional costs. Summary of the Invention

[0005] The technical problem to be solved by the present invention is: to overcome the shortcomings of the existing technology and propose a method for realizing triple-module redundancy. During the implementation of triple-module redundancy, the circuit netlist is divided and the voter insertion strategy is adopted to improve the resistance of the circuit netlist after triple-module redundancy to cumulative errors without affecting the operation of the system.

[0006] The technical solution of the present invention is: a method for implementing triple modular redundancy, comprising:

[0007] Obtain target circuit netlist;

[0008] Dividing the target circuit netlist to obtain multiple sub-circuit netlists;

[0009] According to the predetermined replication strategy, the sub-circuit netlist is replicated into three copies;

[0010] For every two sub-circuit netlists, the number of voters to be inserted is determined based on whether they are copied;

[0011] Determine the connection method based on the number of inserted voters;

[0012] Connect each sub-circuit netlist and voter to form a circuit netlist with triple-module redundancy.

[0013] The target circuit netlist adopts an RTL level netlist or a gate level netlist.

[0014] When the target circuit netlist is an RTL-level netlist, the target circuit netlist is divided to obtain multiple sub-circuit netlists, including:

[0015] Get each circuit declaration in the target circuit netlist;

[0016] According to the instantiation and calling relationship of each circuit declaration in the target circuit netlist, the instantiation of each circuit declaration is divided into a sub-circuit netlist.

[0017] When the target circuit netlist is a gate-level netlist, the target circuit netlist is divided to obtain multiple sub-circuit netlists, including:

[0018] Get each register in the target circuit netlist;

[0019] According to the structure of the target circuit netlist, multiple combinational logic circuits between registers are extracted with registers as boundaries, and each combinational logic circuit is divided into a sub-circuit netlist.

[0020] When determining the predetermined replication strategy, the replication strategy is determined based on the importance of the function performed by the sub-circuit netlist in the target circuit netlist, or based on the radiation sensitivity performance of the sub-circuit netlist.

[0021] When copying a subcircuit netlist, the subcircuit netlist specified by the user is copied, or each subcircuit netlist is copied separately.

[0022] For every two sub-circuit netlists, the number of voters to be inserted is determined based on whether they are copied, including:

[0023] If the netlist of the previous subcircuit is a netlist that has not been copied, the voter is not inserted;

[0024] If the netlist of the preceding subcircuit is a duplicate netlist and the netlist of the succeeding subcircuit is a duplicate netlist, insert three sets of voters;

[0025] If the netlist of the previous subcircuit is a duplicate netlist and the netlists of the subsequent subcircuit are all single netlists, a set of voters is inserted.

[0026] The preceding subcircuit netlist and the succeeding subcircuit netlist are relative concepts, that is, the output of the preceding subcircuit netlist is the input of the succeeding subcircuit netlist. If all the inputs of a subcircuit netlist are the outermost inputs of the entire circuit, then the subcircuit netlist does not have a preceding subcircuit netlist. If all the inputs of the output of a subcircuit netlist are the outermost outputs of the entire circuit, then the subcircuit netlist does not have a succeeding subcircuit netlist.

[0027] Determine whether registers need to be copied based on the number of voters and whether the previous and next sub-circuit netlists are copied netlists; if voters are inserted between the previous sub-circuit netlist and the next sub-circuit netlist, the number of register copies is determined based on the number of inserted voter groups, and the number of registers is the same as the number of inserted voter groups; if no voters are inserted between the previous sub-circuit netlist and the next sub-circuit netlist, the registers are not copied.

[0028] The connection method is determined according to the number of inserted voters, including:

[0029] If a set of voters is inserted, the output of the preceding subcircuit netlist is connected to the input of the set of voters, and the output of the set of voters is connected to the input of the succeeding subcircuit netlist;

[0030] If three sets of voters are inserted, connect the output of the previous subcircuit netlist to the input of each set of voters, and connect the output of the voters to the input of a subsequent subcircuit netlist;

[0031] If the voting machine is not inserted, keep the original connection method unchanged.

[0032] The beneficial effects of the present invention compared with the prior art are:

[0033] The present invention adopts a triple-module redundancy scheme for circuit netlist partitioning and voter insertion strategy, which improves the ability of the triple-module redundancy circuit netlist to resist cumulative errors at a low cost and provides the following benefits:

[0034] (1) Reduce the area and timing overhead caused by implementing triple-module redundancy;

[0035] (2) Improve the ability of the circuit netlist after triple-module redundancy to resist cumulative errors;

[0036] (3) It does not affect the overall system performance of the circuit netlist after triple-module redundancy. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 It is a structural diagram of the RTL-level target circuit netlist.

[0038] Figure 2 It is a structural diagram of the RTL-level target circuit netlist after triple-module redundancy.

[0039] Figure 3 It is a structural diagram of the gate-level target circuit netlist.

[0040] Figure 4 It is a structural diagram of the gate-level target circuit netlist after triple-module redundancy. DETAILED DESCRIPTION

[0041] The present invention relates to a method for realizing triple modular redundancy, comprising:

[0042] Obtain target circuit netlist;

[0043] Dividing the target circuit netlist to obtain multiple sub-circuit netlists;

[0044] According to the predetermined replication strategy, the sub-circuit netlist is replicated into three copies;

[0045] For every two sub-circuit netlists, the number of voters to be inserted is determined based on whether they are copied;

[0046] Determine the connection method based on the number of inserted voters;

[0047] Connect each sub-circuit netlist and voter to form a circuit netlist with triple-module redundancy.

[0048] The target circuit netlist adopts an RTL level netlist or a gate level netlist.

[0049] When the target circuit netlist is an RTL-level netlist, the target circuit netlist is divided to obtain multiple sub-circuit netlists, including:

[0050] Get each circuit declaration in the target circuit netlist;

[0051] According to the instantiation and calling relationship of each circuit declaration in the target circuit netlist, the instantiation of each circuit declaration is divided into a sub-circuit netlist.

[0052] When the target circuit netlist is a gate-level netlist, the target circuit netlist is divided to obtain multiple sub-circuit netlists, including:

[0053] Get each register in the target circuit netlist;

[0054] According to the structure of the target circuit netlist, multiple combinational logic circuits between registers are extracted with registers as boundaries, and each combinational logic circuit is divided into a sub-circuit netlist.

[0055] When determining the predetermined replication strategy, the replication strategy is determined based on the importance of the function performed by the sub-circuit netlist in the target circuit netlist, or based on the radiation sensitivity performance of the sub-circuit netlist.

[0056] When copying a subcircuit netlist, the subcircuit netlist specified by the user is copied, or each subcircuit netlist is copied separately.

[0057] For every two sub-circuit netlists, the number of voters to be inserted is determined based on whether they are copied, including:

[0058] If the netlist of the previous subcircuit is a netlist that has not been copied, the voter is not inserted;

[0059] If the netlist of the preceding subcircuit is a duplicate netlist and the netlist of the succeeding subcircuit is a duplicate netlist, insert three sets of voters;

[0060] If the netlist of the previous subcircuit is a duplicate netlist and the netlists of the subsequent subcircuit are all single netlists, a set of voters is inserted.

[0061] The preceding subcircuit netlist and the succeeding subcircuit netlist are relative concepts, that is, the output of the preceding subcircuit netlist is the input of the succeeding subcircuit netlist. If all the inputs of a subcircuit netlist are the outermost inputs of the entire circuit, then the subcircuit netlist does not have a preceding subcircuit netlist. If all the inputs of the output of a subcircuit netlist are the outermost outputs of the entire circuit, then the subcircuit netlist does not have a succeeding subcircuit netlist.

[0062] Determine whether registers need to be copied based on the number of voters and whether the previous and next sub-circuit netlists are copied netlists; if voters are inserted between the previous sub-circuit netlist and the next sub-circuit netlist, the number of register copies is determined based on the number of inserted voter groups, and the number of registers is the same as the number of inserted voter groups; if no voters are inserted between the previous sub-circuit netlist and the next sub-circuit netlist, the registers are not copied.

[0063] The connection method is determined according to the number of inserted voters, including:

[0064] If a set of voters is inserted, the output of the preceding subcircuit netlist is connected to the input of the set of voters, and the output of the set of voters is connected to the input of the succeeding subcircuit netlist;

[0065] If three sets of voters are inserted, connect the output of the previous subcircuit netlist to the input of each set of voters, and connect the output of the voters to the input of a subsequent subcircuit netlist;

[0066] If the voting machine is not inserted, keep the original connection method unchanged.

[0067] The present invention is described in detail below with reference to the accompanying drawings.

[0068] Example 1

[0069] Get the target circuit netlist at the RTL level.

[0070] The target circuit netlist at the RTL level is parsed and hierarchically divided to obtain each circuit declaration in the target circuit netlist. Circuit declarations in the target circuit are usually annotated with the module keyword.

[0071] Analyze the instantiation and calling relationship of each circuit declaration in the target circuit, and determine the instantiation of each circuit declaration as a subcircuit netlist.

[0072] The following are some examples:

[0073] The structure of the obtained RTL code can be described as follows: the target netlist contains declarations for three netlists: netlists A, B, and C. Each declaration uses the keyword "module" as a hint. The netlist represented by module B is the top-level netlist, encompassing all the circuits in the design. Netlists A and C are instantiated in netlist B, and the instantiations of these netlists are called from netlist B.

[0074] In the B circuit netlist, A is instantiated twice to obtain two sub-circuit netlists ua1 and ua2, and C is instantiated once to obtain one sub-circuit netlist uc.

[0075] That is to say, the entire circuit netlist is B, which contains three sub-circuit netlists: ua1, ua2, and uc. Among them, ua1 and ua2 are instantiations of the circuit netlist A, and uc is an instantiation of the circuit netlist C. By dividing the instantiation of each circuit declaration into a sub-circuit netlist, a total of three sub-circuit netlists can be obtained. Figure 1 As shown, ua1, ua2 and uc are three sub-circuit netlists.

[0076] Assume that three sub-circuit netlists ua1, ua2, and uc are cascaded, the output of ua1 is connected to the input of ua2, the output of ua2 is connected to the input of uc, and assume that ua1 and ua2 need to be replicated, but uc does not need to be replicated.

[0077] Then Figure 2 As shown in the figure, three sets of voters need to be inserted between ua1 and ua2, that is, three voters are inserted between each connection of the replicated ua1 and ua2. Each ua1 output is connected to the input of each voter, and each voter output is connected to the input of ua2.

[0078] A set of voters is inserted between ua2 and uc, that is, a voter is inserted between each connection between the replicated ua2 and uc. Each ua1 output is connected to each input of the voter, and the output of the voter is connected to the input of ua2.

[0079] Example 2

[0080] Get the target circuit netlist at the gate level.

[0081] Perform structural analysis on the target circuit netlist at the gate level to obtain each register in the target circuit netlist; based on the structure of the target circuit netlist, extract multiple combinational logic circuits between registers and divide them into multiple sub-circuit netlists with registers as boundaries.

[0082] The following are some examples:

[0083] Obtain an example gate-level target circuit netlist as shown in Figure 3. Combinational Circuit 1, Combinational Circuit 2, Combinational Circuit 3, and Combinational Circuit 4 are four sub-circuit netlists. Assume that Combinational Circuit 1, Combinational Circuit 3, and Combinational Circuit 4 need to be replicated, but Combinational Circuit 2 does not.

[0084] Then Figure 4 As shown, three groups of voters need to be inserted between combinational circuit 1 and the subsequent sub-circuit netlist. The output of combinational circuit 1 is connected to the input of each voter respectively, and the output of each voter is connected to the input of combinational circuit 3 through a register. The output of any one group of voters is connected to the input of combinational circuit 2 through a register.

[0085] No voters are inserted between combinational circuit 2 and the subsequent subcircuit netlist. Three sets of voters are inserted between combinational circuit 4 and the subsequent subcircuit netlist. The output of combinational circuit 2 is connected to the input of combinational circuit 4 through registers. The input of combinational circuit 3 is connected to the input of each voter, and the output of each voter is connected to the input of combinational circuit 4 through registers.

Claims

1. A method for implementing triple modular redundancy, characterized in that: include: Obtain target circuit netlist; Dividing the target circuit netlist to obtain multiple sub-circuit netlists; According to the predetermined replication strategy, the sub-circuit netlist is replicated into three copies; For every two sub-circuit netlists, the number of voters to be inserted is determined based on whether they are copied; Determine the connection method based on the number of inserted voters; Connect each sub-circuit netlist and voter to form a circuit netlist with triple-module redundancy.

2. A method for implementing triple modular redundancy according to claim 1, characterized in that: The target circuit netlist adopts an RTL level netlist or a gate level netlist.

3. A method for implementing triple modular redundancy according to claim 2, characterized in that: When the target circuit netlist is an RTL-level netlist, the target circuit netlist is divided to obtain multiple sub-circuit netlists, including: Get each circuit declaration in the target circuit netlist; According to the instantiation and calling relationship of each circuit declaration in the target circuit netlist, the instantiation of each circuit declaration is divided into a sub-circuit netlist.

4. A method for implementing triple modular redundancy according to claim 2, characterized in that: When the target circuit netlist is a gate-level netlist, the target circuit netlist is divided to obtain multiple sub-circuit netlists, including: Get each register in the target circuit netlist; According to the structure of the target circuit netlist, multiple combinational logic circuits between registers are extracted with registers as boundaries, and each combinational logic circuit is divided into a sub-circuit netlist.

5. The method for implementing triple modular redundancy according to claim 1, wherein: When determining the predetermined replication strategy, the replication strategy is determined based on the importance of the function performed by the sub-circuit netlist in the target circuit netlist, or based on the radiation sensitivity performance of the sub-circuit netlist.

6. A method for implementing triple modular redundancy according to claim 1, characterized in that: When copying a subcircuit netlist, the subcircuit netlist specified by the user is copied, or each subcircuit netlist is copied separately.

7. A method for implementing triple modular redundancy according to claim 4, characterized in that: For every two sub-circuit netlists, the number of voters to be inserted is determined based on whether they are copied, including: If the netlist of the previous subcircuit is a netlist that has not been copied, the voter is not inserted; If the netlist of the preceding subcircuit is a duplicate netlist and the netlist of the succeeding subcircuit is a duplicate netlist, insert three sets of voters; If the netlist of the previous subcircuit is a duplicate netlist and the netlists of the subsequent subcircuit are all single netlists, a set of voters is inserted.

8. A method for implementing triple modular redundancy according to claim 7, characterized in that: The preceding subcircuit netlist and the succeeding subcircuit netlist are relative concepts, that is, the output of the preceding subcircuit netlist is the input of the succeeding subcircuit netlist. If all the inputs of a subcircuit netlist are the outermost inputs of the entire circuit, then the subcircuit netlist does not have a preceding subcircuit netlist. If all the inputs of the output of a subcircuit netlist are the outermost outputs of the entire circuit, then the subcircuit netlist does not have a succeeding subcircuit netlist.

9. A method for implementing triple modular redundancy according to claim 7, characterized in that: Determine whether registers need to be copied based on the number of voters and whether the previous and next sub-circuit netlists are copied netlists; if voters are inserted between the previous sub-circuit netlist and the next sub-circuit netlist, the number of register copies is determined based on the number of inserted voter groups, and the number of registers is the same as the number of inserted voter groups; if no voters are inserted between the previous sub-circuit netlist and the next sub-circuit netlist, the registers are not copied.

10. A method for implementing triple modular redundancy according to claim 7, characterized in that: The connection method is determined according to the number of inserted voters, including: If a set of voters is inserted, the output of the preceding subcircuit netlist is connected to the input of the set of voters, and the output of the set of voters is connected to the input of the succeeding subcircuit netlist; If three sets of voters are inserted, connect the output of the previous subcircuit netlist to the input of each set of voters, and connect the output of the voters to the input of a subsequent subcircuit netlist; If the voting machine is not inserted, keep the original connection method unchanged.

Images