An adaptive dynamic priority caching method, system, device and medium

Through the adaptive dynamic priority caching method, the access frequency and interval change rate are calculated by combining frequency domain and time domain characteristics, and the cache item priority is dynamically adjusted, which solves the performance bottleneck of cache management under burst traffic and improves the hit rate and throughput of the cache system.

CN120578349BActive Publication Date: 2025-10-03SHANDONG FUTURE NETWORK RES INST (PURPLE MOUNTAIN LAB IND INTERNET INNOVATION APPL BASE)
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Patent Information

Application Number
CN202511087232.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-08-05
Publication Date
2025-10-03
Estimated Expiration
2045-08-05

AI Technical Summary

Technical Problem

Existing cache management technologies experience a sharp drop in cache hit rates and a significant increase in tail latency in bursty traffic scenarios, making them unable to effectively capture the time-varying characteristics of access patterns, resulting in limited system throughput.

Method used

An adaptive dynamic priority caching method is adopted. By combining the frequency domain characteristics and time domain characteristics of cache items, the access frequency and interval change rate are calculated, and the adaptive dynamic priority caching model is used to dynamically adjust the cache item priority and eliminate the current lowest priority item.

Benefits of technology

It achieves multi-dimensional perception, responds to hotspot migration and sudden traffic in real time, balances long-term popularity and short-term trends, improves cache hit rate, reduces tail latency, and increases system throughput.

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Abstract

The present invention belongs to the field of adaptive dynamic priority caching technology and discloses an adaptive dynamic priority caching method, system, device and medium. The method includes calculating the average number of accesses per unit time based on the frequency domain characteristics and time domain characteristics of the cache items to obtain the access frequency of the cache items; calculating the access interval change rate based on a predefined discrete interval sequence, differential approximate differentiation, dimensional normalization processing and direction-sensitive design mechanism; calculating the cache items with the latest priority based on the access frequency and access interval change rate of the cache items in combination with an adaptive dynamic priority caching model, and re-inputting the cache items with the target priority into the adaptive dynamic priority caching model for calculation to eliminate the cache items with the lowest current priority. By integrating the access frequency and the access interval change rate, the present invention breaks through the limitations of traditional single-dimensional strategies.
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Description

Technical Field

[0001] The present invention relates to the technical field of adaptive dynamic priority caching, and in particular to an adaptive dynamic priority caching method, system, device and medium. Background Art

[0002] Cache management reduces access latency by storing high-frequency data on high-speed media. Traditional solutions often use static queue models (such as LRU) or frequency statistical models (such as LFU) to make cache decisions, but these solutions have the following limitations:

[0003] 1) Dimensionality: Relying only on single-dimensional features such as access timestamps or frequency counts;

[0004] 2) Lack of dynamic awareness: Unable to capture the time-varying characteristics of access patterns (such as burst traffic and hotspot shifts);

[0005] Empirical studies have shown that the above defects lead to a sharp drop in cache hit rate and a significant increase in tail latency in bursty traffic scenarios, seriously restricting system throughput.

[0006] Existing technical solutions are mainly divided into the following two categories:

[0007] 1. Frequency-of-access priority strategy, typically implemented as LFU; the working principle is to eliminate items with the least number of accesses by maintaining a global access counter; advantage: it can effectively identify frequently accessed data items.

[0008] Disadvantages: 1) Lack of a time decay mechanism, resulting in "zombie items" that were frequently accessed in the early stages but have not been accessed for a long time continuing to occupy cache space, causing space waste; 2) Insensitive to burst traffic, new hot items must accumulate sufficient access times to receive high priority, and the cache hit rate drops significantly during cold starts.

[0009] 2. Access time priority strategy, typical implementation: LRU; the working principle is to eliminate the items that have not been accessed for the longest time by maintaining the access time queue; advantage: it can effectively identify the most recently accessed data items.

[0010] Disadvantages: It is impossible to distinguish between stable access items (constant access interval) and decaying items (increasing access interval), and the probability of mistakenly retaining decaying items is high.

[0011] Therefore, how to provide an adaptive dynamic priority caching method, system, device and medium is a problem that needs to be solved urgently. Summary of the Invention

[0012] The embodiments of the present invention provide an adaptive dynamic priority caching method, system, device and medium to solve the problems of dimensional singleness and lack of dynamic perception of traditional strategies in the prior art.

[0013] To provide a basic understanding of some aspects of the disclosed embodiments, the following is a brief summary. This summary is not intended to be an extensive review, identify key or critical elements, or delineate the scope of these embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the detailed description that follows.

[0014] According to a first aspect of an embodiment of the present invention, an adaptive dynamic priority caching method is provided.

[0015] In one embodiment, the adaptive dynamic priority caching method includes:

[0016] Based on the frequency domain characteristics and time domain characteristics of the cache items, the average number of accesses per unit time is calculated to obtain the access frequency of the cache items.

[0017] Based on the predefined discrete interval sequence, differential approximation, dimension normalization and direction-sensitive design mechanism, the access interval change rate is calculated;

[0018] Based on the access frequency and access interval change rate of the cache item, the latest priority cache item is calculated in combination with the adaptive dynamic priority cache model, and the latest priority cache item is input into the adaptive dynamic priority cache model again for calculation, eliminating the cache item with the lowest priority.

[0019] In one embodiment, the predefined discrete interval sequence includes:

[0020] An interval sequence constructed by the access frequency of cache items and an interval sequence reflecting the access time.

[0021] In one embodiment, the differential approximation comprises:

[0022] Based on the discrete function of data item access interval, combined with time difference and change rate, the access interval change trend is captured.

[0023] In one embodiment, the dimensional normalization process includes:

[0024] Obtain the relative rate of change through the degree of change of the initial value;

[0025] The access interval change trend is processed by natural logarithm to obtain the logarithmic change rate.

[0026] In one embodiment, the direction-sensitive design mechanism includes:

[0027] The logarithmic rate of change is introduced and combined with the dynamic modulation factor and the numerical stability term to obtain the changing trend of the access frequency, which is used for dynamic adjustment of the cache item priority.

[0028] In one embodiment, the dynamic modulation factor includes:

[0029] By taking into account the changes in access behavior and the dominant factors of the basic priority, the priority is dynamically adjusted to achieve a balance between stability and dynamic adaptation of the adaptive dynamic priority cache model.

[0030] In one embodiment, the change trend of the access frequency includes: an access acceleration scenario and an access deceleration scenario;

[0031] Among them, the access acceleration scenario indicates an increase in priority;

[0032] Accessing the slowdown scenario indicates a lower priority.

[0033] According to a second aspect of an embodiment of the present invention, an adaptive dynamic priority cache system is provided.

[0034] In one embodiment, the adaptive dynamic priority caching system includes:

[0035] A feature calculation module is used to calculate the average number of accesses per unit time based on the frequency domain features and time domain features of the cache items to obtain the access frequency of the cache items;

[0036] A change rate calculation module is used to calculate the access interval change rate based on a predefined discrete interval sequence, differential approximate differentiation, dimensional normalization processing, and direction-sensitive design mechanism;

[0037] The cache item elimination module is used to calculate the cache item of the target priority based on the access frequency and access interval change rate of the cache item, combined with the adaptive dynamic priority cache model, and input the cache item of the target priority into the adaptive dynamic priority cache model again for calculation, and eliminate the cache item with the lowest current priority.

[0038] According to a third aspect of an embodiment of the present invention, a computer device is provided.

[0039] In some embodiments, the computer device includes a memory and a processor, the memory stores a computer program, and the processor implements the steps of the above method when executing the computer program.

[0040] According to a fourth aspect of embodiments of the present invention, a computer-readable storage medium is provided.

[0041] In one embodiment, the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the above method are implemented.

[0042] The technical solution provided by the embodiment of the present invention may have the following beneficial effects:

[0043] 1) Multi-dimensional perception: Integrating the three elements of time, frequency, and change trend, it breaks through the limitations of traditional single-dimensional strategies by integrating visit frequency (long-term popularity) and the change rate of visit intervals (short-term trend).

[0044] 2) Dynamic Adaptability: Response to hotspot migration and burst traffic in real time is achieved through Δr (logarithmic rate of change). The access interval change rate is quantified through differential approximation. A direction-sensitive design mechanism is adopted, and an adjustment factor is introduced to ensure that the change rate is bounded and stable.

[0045] 3) Priority dynamic synthesis strategy: The basic access frequency and change rate are coupled in a multiplicative manner to ensure that the basic weight exceeds 50% while allowing dynamic adjustment of ±50% to balance long-term popularity and short-term trends.

[0046] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0048] Figure 1 is a structural block diagram showing an adaptive dynamic priority caching method according to an exemplary embodiment;

[0049] Figure 2 is a structural block diagram of an adaptive dynamic priority cache system according to an exemplary embodiment;

[0050] Figure 3 The figure is a schematic diagram showing the structure of a computer device according to an exemplary embodiment. DETAILED DESCRIPTION

[0051] Herein, the terms "first", "second", etc. are only used to distinguish one element from another, without requiring or implying any actual relationship or order between these elements. In fact, the first element can also be called the second element, and vice versa. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that the structure, device or equipment including a series of elements includes not only those elements, but also other elements not explicitly listed, or also include elements inherent to such structure, device or equipment. In the absence of further restrictions, the elements defined by the sentence "comprise a..." do not exclude the presence of other identical elements in the structure, device or equipment including the elements. The various embodiments are described in a progressive manner herein, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other.

[0052] The terms "longitudinal", "transverse", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like used herein to indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are intended only to facilitate the description of this document and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the present invention. In the description herein, unless otherwise specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, they can be mechanical or electrical connections, or they can be internal connections between two elements, they can be directly connected, or they can be indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to the specific circumstances.

[0053] As used herein, unless otherwise specified, the term "plurality" means two or more.

[0054] In this document, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B means: A or B.

[0055] In this article, the term "and / or" is used to describe the association relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.

[0056] It should be understood that, although the various steps in the flowchart are shown in sequence as indicated by the arrows, these steps are not necessarily performed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps may be performed in other orders. Moreover, at least a portion of the steps in the figure may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily performed at the same time, but may be performed at different times. The execution order of these sub-steps or stages is not necessarily to be performed in sequence, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

[0057] Each module in the device or system of the present application can be implemented in whole or in part by software, hardware, or a combination thereof. The above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software so that the processor can call and execute the operations corresponding to the above modules.

[0058] In the absence of conflict, the embodiments of the present invention and the features thereof may be combined with each other.

[0059] Figure 1 An embodiment of an adaptive dynamic priority caching method of the present invention is shown.

[0060] In this optional embodiment, the adaptive dynamic priority caching method includes:

[0061] Step S101: Calculate the average number of accesses per unit time based on the frequency domain characteristics and time domain characteristics of the cache item to obtain the access frequency of the cache item;

[0062] Specifically, calculate the basic access frequency P B , P B It is the ratio of the number of accesses n to the time span ΔT, indicating the average number of times a cache item is accessed per unit time, reflecting the overall access frequency of the cache item. The calculation formula is as follows:

[0063] ;

[0064] Where, P B It represents the ratio of the number of accesses n to the time span ΔT, where n represents the total number of times the cache item has been accessed, and ΔT represents the current time minus the first access time. Represents a very small constant.

[0065] is a very small constant of 10-5. If there is no , when ΔT=0, the divisor of the above formula will be 0.

[0066] The key points of the design are dual-scale fusion and numerical stability; dual-scale fusion is to consider the number of visits n (frequency domain characteristics) and the time span ΔT (time domain characteristics) at the same time; numerical stability is Eliminate the risk of division by zero when ΔT=0 on the first access.

[0067] Cache item item1, calculate the basic access frequency P B , item1: access timestamp [10, 20, 30, 45], number of accesses n=4, time span ΔT=60-10=50; the above data is substituted into the above formula to obtain P B ≈0.08.

[0068] Step S102: Calculate the access interval change rate based on a predefined discrete interval sequence, differential approximation, dimensional normalization, and direction-sensitive design mechanism;

[0069] Specifically, the essence of function differentiation is to calculate the instantaneous rate of change of the function at a certain point; differential approximate differentiation is a method of converting a continuous differential equation into a discrete form, and approximates the derivative by calculating the difference between the function at two adjacent discrete points; the access interval change rate in the algorithm is calculated using the differential approximate differentiation method, and its essence is to reflect the dynamic changes in the access frequency of data items.

[0070] Step S103: Based on the access frequency and access interval change rate of the cache item, combined with the adaptive dynamic priority cache model, the cache item with the latest priority is calculated, and the cache item with the target priority is input into the adaptive dynamic priority cache model again for calculation, and the cache item with the lowest current priority is eliminated.

[0071] Specifically, the final priority is calculated as .

[0072] Finally, the priority of each cache item is: item1: P=0.067, item2: P=0.07, item3: P=0.04, item4: P=0.048 and item5: P=0.08.

[0073] Eliminate cache items: The cache item with the lowest priority is item3. When a new cache item needs to be inserted, item3 will be eliminated.

[0074] In this optional embodiment, the predefined discrete interval sequence includes:

[0075] An interval sequence constructed by the access frequency of cache items and an interval sequence reflecting the access time.

[0076] Specifically, by accessing the time series Construct an interval sequence to reflect the interval changes in access time:

[0077] ;

[0078] Where, Represents a time series, t1 represents the first access time of the cache, t2 represents the second access time of the cache, t k Represents the kth cache access time, k is a constant, and intervals represents the interval sequence of access time.

[0079] For example, cache a is currently accessed 4 times, at the 3rd second, the 6th second, the 8th second, and the 9th second. Then the access time interval sequence is [6-3, 8-6, 9-8] = [3, 2, 1]. For example, let k = 3:

[0080] ;

[0081] Where d represents the derivative of the function I, t represents time, Δt represents the time difference, k represents a constant, and I represents the discrete function of the data item access interval.

[0082] In this optional embodiment, the difference approximation differential includes:

[0083] Based on the discrete function of data item access interval, combined with time difference and change rate, the access interval change trend is captured.

[0084] ;

[0085] Where d represents the derivative of function I, Represents the time difference between two adjacent time points, I represents the discrete function of the data item access interval, t represents time, k represents a constant, and Δt represents the time difference.

[0086] Access interval discrete functions for data items: .

[0087] Differential equations: Understand differential equations. The core of differentials is the rate of change, such as speed. , that is, the change in distance at each moment; and acceleration , that is, the change in speed at each moment.

[0088] The difference method is an approximate numerical solution to differential equations. Specifically, the difference method replaces differentials with finite differences and derivatives with finite difference quotients, thereby approximately expressing the basic equations and boundary conditions (generally differential equations) using difference equations (algebraic equations).

[0089] In practical applications, the time difference is usually Normalization to 1 is intended to simplify the calculation process, eliminate the need to consider the impact of time differences, and still maintain the ability to capture the changing trend of access intervals.

[0090] The trend of changes in the data item access interval refers to the aforementioned differential approximation, that is, the rate of change, which is also the trend of change (the essence of differential).

[0091] In this optional embodiment, the dimensional normalization process includes:

[0092] Obtain the relative rate of change through the degree of change of the initial value;

[0093] The access interval change trend is processed by natural logarithm to obtain the logarithmic change rate.

[0094] Specifically, the relative change rate is a quantity that describes the degree of change of a quantity relative to its initial value. For the access interval I, the relative change rate can be expressed as:

[0095] ;

[0096] In the formula, d represents the function Seek derivation, represents the discrete function of the data item access interval, t represents time, and k represents a constant.

[0097] The logarithmic rate of change describes the rate of change by taking the natural logarithm. It has the advantages of proportional invariance, sensitivity to small changes, and processing of cumulative changes. The expression is:

[0098] ;

[0099] Where lnI represents the derivative of time t, and d represents the function Seek derivation, represents the discrete function of the data item access interval, and t represents time.

[0100] Right now:

[0101] ;

[0102] Where lnI represents the derivative of time t, and d represents the function Seek derivation, represents the discrete function of the data item access interval, t represents time, and k represents a constant.

[0103] In this optional embodiment, the direction-sensitive design mechanism includes:

[0104] The logarithmic rate of change is introduced and combined with the dynamic modulation factor and the numerical stability term to obtain the changing trend of the access frequency, which is used for dynamic adjustment of the cache item priority.

[0105] In this optional embodiment, the dynamic modulation factor includes:

[0106] By taking into account the changes in access behavior and the dominant factors of the basic priority, the priority is dynamically adjusted to achieve a balance between stability and dynamic adaptation of the adaptive dynamic priority cache model.

[0107] In this optional embodiment, the change trend of the access frequency includes: an access acceleration scenario and an access deceleration scenario;

[0108] Among them, the access acceleration scenario indicates an increase in priority;

[0109] Accessing the slowdown scenario indicates a lower priority.

[0110] Specifically, for the convenience of description, the direction-sensitive design mechanism uses △r to refer to the logarithmic rate of change. Based on the change in the access interval, it is divided into the following two scenarios:

[0111] Access acceleration scenario (I k ≤I k-1 ): The access interval is decreasing, that is, the access frequency is increasing. The formula is:

[0112] ;

[0113] Where, represents a very small constant, Represents a discrete function of the data item access interval, k represents a constant, and the numerator Indicates the absolute value of the shortened access interval, the denominator Indicates historical baseline status and quantifies the extent of improvement. represents the logarithmic rate of change, Represents a modulation factor.

[0114] If the interval is shortened from 10ms to 5ms, the improvement is (10-5) / 10=50%.

[0115] Access deceleration scene (I k >I k-1 ): The access interval increases, that is, the access frequency decreases. The formula is:

[0116] ;

[0117] Where, represents the logarithmic rate of change, the numerator Indicates the absolute value of the shortened access interval, the denominator I k Indicates the current latest state and quantifies the degree of decline. represents a modulation factor, represents the data item access interval discrete function, and k represents a constant.

[0118] If the interval increases from 10ms to 20ms, the decay degree is (20-10) / 20=50%.

[0119] Other parameter descriptions: A positive (+) rate of change indicates an increase in priority, and a negative (-) rate of change indicates a decrease in priority. Refers to the logarithmic rate of change, the rate of change is , , maintain numerical stability and avoid or When the division by zero error occurs, It represents a modulation factor that determines the response strength of the adaptive dynamic priority cache model to the change of access interval.

[0120] final The formula is:

[0121] ;

[0122] Where, represents the logarithmic rate of change, represents a modulation factor, represents the data item access interval discrete function, k represents a constant, Represents a very small constant.

[0123] Specifically:

[0124] Extreme value calculation:

[0125] Maximum improvement :

[0126] ;

[0127] In the formula, lim means to find the limit, represents the data item access interval discrete function, k represents a constant, represents a very small constant, Represents a modulation factor.

[0128] Maximum attenuation :

[0129] ;

[0130] In the formula, lim means to find the limit, represents the data item access interval discrete function, k represents a constant, Represents a modulation factor.

[0131] Specifically, the expression Can be read as "when Approaching the limit at 0 o'clock."

[0132] Right now .

[0133] Visit interval = [20-10, 30-20, 45-30] = [10, 10, 15].

[0134] When calculating the access interval change rate, take the last two intervals; the last two intervals represent the most recent access behavior and can most directly reflect the latest changes in the access pattern; by comparing these two intervals, we can capture the acceleration or deceleration trend of the access frequency; the access pattern refers to: the changing trend of the time interval between data item accesses; the last two intervals: I k =15 and I k-1 =10, substitute into formula 2, and we get: Δr≈-0.1667.

[0135] Figure 2 An embodiment of an adaptive dynamic priority cache system of the present invention is shown.

[0136] In this optional embodiment, the adaptive dynamic priority caching system includes:

[0137] The feature calculation module 201 is used to calculate the average number of accesses per unit time based on the frequency domain features and time domain features of the cache items to obtain the access frequency of the cache items;

[0138] A change rate calculation module 202 is configured to calculate the access interval change rate based on a predefined discrete interval sequence, differential approximation, dimensional normalization, and a direction-sensitive design mechanism;

[0139] The cache item elimination module 203 is used to calculate the cache item of the target priority based on the access frequency and access interval change rate of the cache item in combination with the adaptive dynamic priority cache model, and input the cache item of the target priority into the adaptive dynamic priority cache model again for calculation, and eliminate the cache item with the lowest current priority.

[0140] In one embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as follows: Figure 3As shown. The computer device includes a processor, a memory, and a network interface connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and computer program in the non-volatile storage medium. The database of the computer device is used to store static information and dynamic information data. The network interface of the computer device is used to communicate with an external terminal via a network connection. When the computer program is executed by the processor, the steps of the above-mentioned method embodiment are implemented.

[0141] Those skilled in the art will understand that Figure 3 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present invention and does not constitute a limitation on the computer device to which the solution of the present invention is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0142] In addition, the present invention also provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above method embodiment when executing the computer program.

[0143] In addition, the present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the above method embodiment are implemented.

[0144] Those skilled in the art will appreciate that all or part of the processes in the above-described method embodiments can be implemented by instructing the relevant hardware using a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes in the above-described method embodiments. Any reference to memory, storage, database, or other media used in the various embodiments provided herein may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, or optical storage. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM can take various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM).

[0145] The present invention is not limited to the structures that have been described above and shown in the accompanying drawings, and various modifications and changes may be made without departing from the scope thereof.

Claims

1. An adaptive dynamic priority caching method, characterized in that: include: Based on the frequency domain characteristics and time domain characteristics of the cache items, the average number of accesses per unit time is calculated to obtain the access frequency of the cache items. Based on the predefined discrete interval sequence, differential approximation, dimension normalization and direction-sensitive design mechanism, the access interval change rate is calculated; Based on the access frequency and access interval change rate of the cache items, the adaptive dynamic priority cache model is combined to calculate the cache items with the target priority. The cache items with the target priority are then input into the adaptive dynamic priority cache model for calculation again, and the cache items with the lowest priority are eliminated. The difference approximation differential includes: Based on the discrete function of data item access interval, combined with time difference and change rate, the access interval change trend is captured; The dimensional normalization process includes: Obtain the relative rate of change through the degree of change of the initial value; The change trend of the access interval is processed by natural logarithm to obtain the logarithmic change rate; The direction-sensitive design mechanism includes: By introducing the logarithmic rate of change and combining it with the dynamic modulation factor and the numerical stability term, we can obtain the trend of access frequency changes, which can be used to dynamically adjust the priority of cache items. The dynamic modulation factors include: By adjusting the priority dynamics based on the changes in access behavior and the dominant factors of the basic priority, the adaptive dynamic priority cache model can achieve a balance between stability and dynamic adaptability. The calculation formula of the adaptive dynamic priority cache model is: ; Where P represents the priority of the cache item; represents the logarithmic rate of change; P B Indicates the access frequency of cache items; The formula for obtaining the logarithmic rate of change is: ; Where, represents a modulation factor, I represents the data item access interval discrete function, k represents a constant, Represents a very small constant, I k Indicates the current latest status, I k-1 Indicates the historical baseline status.

2. The adaptive dynamic priority caching method according to claim 1, characterized in that: The predefined discrete interval sequence includes: An interval sequence constructed by the access frequency of cache items and an interval sequence reflecting the access time.

3. The adaptive dynamic priority caching method according to claim 2, characterized in that: The change trend of the access frequency includes: access acceleration scenario and access deceleration scenario; Among them, the access acceleration scenario indicates an increase in priority; Accessing the slowdown scenario indicates a lower priority.

4. An adaptive dynamic priority caching system, used to implement the adaptive dynamic priority caching method according to any one of claims 1 to 3, characterized in that: include: A feature calculation module is used to calculate the average number of accesses per unit time based on the frequency domain features and time domain features of the cache items to obtain the access frequency of the cache items; A change rate calculation module is used to calculate the access interval change rate based on a predefined discrete interval sequence, differential approximate differentiation, dimensional normalization processing, and direction-sensitive design mechanism; The cache item elimination module is used to calculate the cache item of the target priority based on the access frequency and access interval change rate of the cache item, combined with the adaptive dynamic priority cache model, and input the cache item of the target priority into the adaptive dynamic priority cache model again for calculation, and eliminate the cache item with the lowest current priority.

5. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 3 are implemented.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 3 are implemented.

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