Carrier synchronization control method suitable for parallel converter of doubly-fed wind power generation system

Abstract

The invention discloses a carrier synchronization control method suitable for a parallel converter of a doubly-fed wind power generation system, which belongs to the technical field of excitation converter equipment of the doubly-fed wind power generation system, and comprises the following steps: sending a square wave signal containing own carrier phase information to a bus through a synchronization signal generation circuit; generating a globally unified synchronization signal by using line AND logic; each module calculates the difference value between the own carrier phase and the reference phase according to the received synchronization signal, and compares the difference value with the average value of the carrier period adjustment quantity; if the difference value exceeds a set threshold value, a software filtering strategy is adopted for optimization; and the carrier phase of each module is dynamically adjusted through an indirect phase modulation method to realize carrier synchronization. According to the invention, carrier phase synchronization of the parallel converter of the doubly-fed wind power generation system can be realized in a power frequency period completely based on software control, a phase adjustment quantity filtering function is realized, and the reliability and the anti-interference capability of phase adjustment and the operation efficiency and the safety of the system are remarkably improved.

Description

Technical Field

[0001] The present application relates to the technical field of excitation converter equipment for a doubly-fed wind power generation system, and in particular to a carrier synchronization control method applicable to parallel converters of a doubly-fed wind power generation system. Background Art

[0002] With the continuous expansion of renewable energy grid integration, the power system's demand for frequency regulation capabilities is increasing. Against this backdrop, megawatt-class doubly-fed wind power generation systems, with their flexible power decoupling characteristics and dynamic response advantages, have become a key support unit for power system frequency regulation. Through the coordinated control of the rotor-side converter and the grid-side converter, doubly-fed wind turbines can achieve maximum wind energy tracking and independent reactive power regulation. They can also rapidly adjust the rotor current phase and amplitude when the grid frequency fluctuates, providing inertial response and primary frequency regulation capabilities for the grid through dynamic compensation of electromagnetic torque. Their unique partial power conversion architecture reduces equipment costs while still achieving bidirectional power regulation within a ±30% rated power range, significantly improving the system's cost-effectiveness and flexibility.

[0003] However, the operation of doubly-fed wind turbine systems with multiple generators in parallel presents numerous challenges. First, the discrete nature of device parameters, carrier phase desynchronization, and differences in line impedance can lead to the generation of high-frequency circulating currents. These high-frequency circulating currents not only increase system losses but can also cause electromagnetic interference and even damage equipment, severely hampering the safety and economic viability of the units.

[0004] Traditional carrier synchronization control strategies often employ a master-slave architecture or a fixed phase offset strategy. While these methods can achieve carrier synchronization to a certain extent, they are susceptible to communication delays and clock drift, lack dynamic adjustment capabilities, and struggle to effectively suppress high-frequency circulating currents. Furthermore, existing solutions typically rely on high-precision sensors and complex harmonic algorithms, resulting in high hardware costs and poor anti-interference capabilities. Centralized wired architectures have poor scalability, making it difficult to adapt to parameter differences and unable to meet the requirements of frequent start-up and shutdown and wide-range power regulation in doubly-fed wind power generation systems. Therefore, developing an improved carrier synchronization strategy with strong robustness and low complexity has become a technical bottleneck for the efficient operation of current doubly-fed wind power generation systems. Summary of the Invention

[0005] The present application aims to provide a carrier synchronization control method for parallel converters in a doubly-fed wind power generation system.

[0006] To achieve the above objectives, the technical solution of this application is:

[0007] A carrier synchronization control method for a parallel converter of a doubly-fed wind power generation system includes steps S10 to S80:

[0008] Step S10: Calculating the carrier phase adjustment amount of each module in the synchronization signal generation circuit according to the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly-fed wind power generation system;

[0009] Step S20: Determine whether the parallel converter of the doubly-fed wind power generation system is stable and the initial carrier synchronization is completed. If so, proceed to step S30; if not, proceed to step S70;

[0010] Step S30: Entering the software filtering program, calculating the average value of the carrier phase adjustment amount dynamically updated every specific carrier synchronization control enable signal after the shunt converter of the doubly fed wind power generation system is stably operating, and expressed by the formula:

[0011]

[0012] Where Δψ ave represents the average value, Δψ i(k) N represents the carrier phase adjustment amount of the i-th module when the k-th carrier synchronization control enable signal arrives. ave Indicates the number of carrier synchronization control enable signal intervals;

[0013] The software filtering threshold is selected based on the maximum value of the carrier phase difference between two adjacent carrier synchronization control enable signals. The maximum value is expressed as follows:

[0014]

[0015] Where Δψ max The maximum value of the carrier phase difference between two adjacent carrier synchronization control enable signals is expressed as f oN Indicates the power frequency, f cN Indicates the rated carrier frequency is, ±e osc Indicates the crystal oscillator frequency error;

[0016] The software filtering threshold is expressed as follows:

[0017] ψ f =k f ·Δψ max

[0018] Among them, ψ f Indicates the software filtering threshold, k f represents the margin factor;

[0019] Calculating a difference between the average value and the carrier phase adjustment amount;

[0020] Step S40: Determine whether the difference is greater than the software filtering threshold. If so, the carrier phase adjustment amount is limited to the average value, and the process proceeds to step S50. If not, the carrier phase adjustment amount obtained in this detection is used, and the process proceeds to step 70.

[0021] Step S50: Enter the filtering times judgment procedure to judge whether multiple software filterings are performed continuously. If yes, then enter step S60; if not, then enter step S70;

[0022] Step S60: Entering the fault protection program, immediately disabling software filtering, and using the actually detected carrier phase adjustment amount to enter step S70;

[0023] Step S70: Entering the carrier phase adjustment link, according to the carrier phase adjustment amount, using the period register to change the carrier frequency, only allowing the set value of the period register to fluctuate between TBPRD*, TBPRD*+1 and TBPRD*-1, by determining the carrier phase adjustment period and carrier adjustment direction, thereby indirectly changing the carrier phase to achieve the carrier phase synchronization target of each module;

[0024] When the period register is calculated to be set to TBPRD*±1, the adjustment period is expressed as follows:

[0025]

[0026] Among them, N regu represents the adjustment period, ψ regu It represents the phase adjustment amplitude within one carrier cycle and is expressed as:

[0027]

[0028] Step S80: Carrier synchronization of one adjustment cycle is completed.

[0029] Optionally, the synchronization signal generating circuit includes: any number of modules, a first synchronization signal bus, and a second synchronization signal bus, each module being connected to the first synchronization signal bus and the second synchronization signal bus respectively; each module includes: a signal sending unit, a signal receiving unit, a first magnetic bead and a second magnetic bead, the first terminal of the signal sending unit is connected to the first synchronization signal bus through the first magnetic bead, and the second terminal of the signal sending unit is connected to the second synchronization signal bus through the second magnetic bead; the first terminal of the signal receiving unit is connected to the series midpoint of the first terminal of the signal sending unit and the first magnetic bead.

[0030] Optionally, step S10 includes:

[0031] Step S101: Generate a globally unified synchronization signal according to the square wave signal, capture the falling edge of the synchronization signal as a carrier control enable signal, and select the phase at this moment as a carrier phase reference value;

[0032] Step S102: Calculate the initial carrier phase adjustment value of each module based on the carrier phase reference value, introduce the phase deviation caused by the signal delay of each module to optimize the initial carrier phase adjustment value, and obtain the carrier phase adjustment value of each module.

[0033] Optionally, in step S102, based on the carrier phase reference value, at the moment when the carrier synchronization control enable signal is selected, the carrier phase of each module is subtracted from the carrier phase reference value to obtain the initial carrier phase adjustment amount of each module; the phase deviation caused by the signal delay of each module is introduced, including: before the synchronization signal generation circuit is officially operated, a certain module is enabled to spontaneously transmit and receive synchronization signals, thereby determining the phase deviation caused by the delay.

[0034] Optionally, in step S20, the judgment of whether the parallel converter of the doubly fed wind power generation system is stable and the initial carrier synchronization is completed includes: in the initial carrier synchronization stage or dynamic adjustment stage of the parallel converter of the doubly fed wind power generation system, directly using the initial phase adjustment amount to perform phase adjustment so that the carrier phases between each module are basically in phase.

[0035] Optionally, the step S30 includes: dynamically updating the average value every specific carrier synchronization control enable signal after the synchronization signal generating circuit is operating stably; when the difference between the carrier phase adjustment amount obtained in a certain detection and the average value exceeds the software filtering threshold, the average value calculation process will ignore the average value; when the difference between the average values ​​before and after the update is too large, the calculated value of this average value will also be judged invalid, and the average value before the update will continue to be used for filtering judgment until the next value update.

[0036] Optionally, in step S70, depending on the adjustment direction, when the carrier synchronization control enable signal arrives, if the carrier phase adjustment amount calculated by this module is at (0°, 180°], the setting value of the adjustment period register is TBPRD*+1; if the carrier phase adjustment amount calculated by this module is at (-180°, 0°), the setting value of the adjustment period register is TBPRD*-1.

[0037] Optionally, after calculating the carrier adjustment period, if the carrier adjustment period is less than the number of carrier adjustment periods between two carrier synchronization control enable signals, the value of the period register is adjusted to TBPRD*±1 within the carrier adjustment period, and the value of the period register is restored to TBPRD* within the remaining period; if the carrier adjustment period is greater than the number of carrier adjustment periods between two carrier synchronization control enable signals, the value of the period register is adjusted to TBPRD*±1 before the next carrier synchronization control enable signal arrives.

[0038] This application proposes a carrier synchronization control method for a variable-speed pumped storage unit parallel converter system, which aims to achieve carrier phase synchronization of the parallel converter system within one power frequency cycle. i , the carrier phase is adjusted according to the adjustment direction and adjustment period to achieve carrier phase synchronization among modules, avoiding the complex parameter setting process. It has the advantages of simple principle and easy implementation. Furthermore, this method introduces a software filtering strategy that effectively suppresses the adverse effects of occasional fluctuations in signal delay, thereby improving carrier synchronization performance and enhancing the suppression of high-frequency circulating currents. This method is implemented entirely through a software control strategy, eliminating the need for additional hardware controllers, making it highly applicable and low-cost.

[0039] In order to make the above features and advantages of the application more obvious and easy to understand, the following embodiments are given and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] Figure 1 This is a flow chart of a carrier synchronization control method for parallel converters in a doubly-fed wind power generation system proposed in this application.

[0041] Figure 2 This is the structural diagram of the parallel converter of the doubly fed wind power generation system.

[0042] Figure 3 This is the circuit diagram for generating the synchronization signal of this application.

[0043] Figure 4 Schematic diagram for generating logic for synchronization signals.

[0044] Figure 5 Schematic diagram of the impact of delay fluctuation on carrier phase detection.

[0045] Figure 6 Schematic diagram of the carrier phase adjustment process with different initial phases.

[0046] In the drawings, like reference numerals refer to the same drawing elements. DETAILED DESCRIPTION

[0047] To make the purpose and technical solutions of the embodiments of the present application clearer, the technical solutions of the embodiments of the present application will be clearly and completely described below in conjunction with the drawings of the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the described embodiments of the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0048] In one embodiment of this application, please refer to Figure 1 The present application provides a carrier synchronization control method for a parallel converter of a doubly-fed wind power generation system, comprising steps S10 to S110.

[0049] Step S10: Calculating the carrier phase adjustment amount of each module in the synchronization signal generation circuit according to the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly-fed wind power generation system;

[0050] Step S20: Determine whether the parallel converter of the doubly-fed wind power generation system is stable and the initial carrier synchronization is completed. If so, proceed to step S30; if not, proceed to step S70;

[0051] Step S30: Entering a software filtering program, calculating an average value of the carrier phase adjustment amount dynamically updated every specific number of carrier synchronization control enable signals after the shunt converter of the doubly-fed wind power generation system is stably operating, and calculating a difference between the average value and the carrier phase adjustment amount;

[0052] Step S40: Determine whether the difference is greater than the software filtering threshold. If so, the carrier phase adjustment amount is limited to the average value, and the process proceeds to step S50. If not, the carrier phase adjustment amount obtained in this detection is used, and the process proceeds to step 70.

[0053] Step S50: Enter the filtering times judgment procedure to judge whether multiple software filterings are performed continuously. If yes, then enter step S60; if not, then enter step S70;

[0054] Step S60: Entering the fault protection program, immediately disabling software filtering, and using the actually detected carrier phase adjustment amount to enter step S70;

[0055] Step S70: Entering the carrier phase adjustment link, according to the carrier phase adjustment amount, using the period register to change the carrier frequency, only allowing the set value of the period register to fluctuate between TBPRD*, TBPRD*+1 and TBPRD*-1, by determining the carrier phase adjustment period and carrier adjustment direction, thereby indirectly changing the carrier phase to achieve the carrier phase synchronization target of each module;

[0056] Step S80: Carrier synchronization of one adjustment cycle is completed.

[0057] As an example, this embodiment is applied to Figure 2 The megawatt-class doubly-fed wind power generation system parallel converter is shown.

[0058] As an example, the parallel converter of the doubly fed wind power generation system includes an excitation circuit 1, a doubly fed generator M, a modulation module 2, a main control circuit 3, a circuit breaker G_CB, a circuit breaker R_CB, a main transformer T and an inductor L; the first end of the excitation circuit 1 is connected to the first end of the circuit breaker G_CB, the second end of the circuit breaker G_CB is connected to the first end of the inductor L, the second end of the inductor L is connected to the first end of the circuit breaker R_CB and the first end of the main transformer T, the second end of the circuit breaker R_CB is connected to the first end of the doubly fed generator M, the second end of the doubly fed generator M is connected to the second end of the excitation circuit 1, the second end of the main transformer T is connected to the power grid, and the modulation module 2 and the main control circuit 3 are connected to the third and fourth ends of the excitation circuit 1.

[0059] The excitation circuit 1 includes: a back-to-back parallel converter 11 and a back-to-back parallel converter 12. The back-to-back parallel converter 11 and the back-to-back parallel converter 12 are connected in parallel, and their main function is to excite the rotor;

[0060] The back-to-back parallel converter 11 includes: a grid-side transformer T 11 , grid-side filter Lg, grid-side converter module 111, generator-side converter module 112 and generator-side filter L r , grid-side transformer T 11 , grid-side filter L g , grid-side converter module 111, machine-side converter module 112 and machine-side filter L r The grid-side converter module 111 and the generator-side converter module 112 are connected in sequence. The grid-side converter module 111 and the generator-side converter module 112 are connected via a DC bus. The grid-side converter includes: the grid-side converter module 111, the grid-side filter L g , grid-side transformer T 11 The machine-side converter includes: a machine-side converter module 112, a machine-side filter L r .

[0061] The grid-side converter module 111 is mainly used to convert DC voltage and current into AC voltage and current, allowing bidirectional energy flow, including conversion from DC side to DC side (rectifier mode) and DC side to AC side (inverter mode);

[0062] The mesh filter L g Its main function is to filter out harmonics in the output current of the grid-side converter module 111 to ensure that the quality of the power delivered to the grid meets the standards.

[0063] The grid-side transformer T 11 Its main function is to increase or decrease the voltage output by the grid-side converter module 111 to match the generator-side voltage.

[0064] The main function of the machine-side converter module 112 is also to convert voltage and current. The back-to-back parallel converter 11 excites the doubly-fed generator M through the rotor side.

[0065] The machine side filter L r Its main function is to filter the output current and suppress voltage mutations.

[0066] The principle and connection method of the back-to-back parallel converter 12 are the same as those of the back-to-back parallel converter 11 and will not be described in detail here.

[0067] The drive motor M is a doubly-fed motor with variable speed capability, allowing bidirectional energy flow;

[0068] The main function of the grid-side circuit breaker G_CB and the generator-side circuit breaker R_CB is to control the on / off of the circuit when a fault occurs, thereby protecting the equipment and the power grid.

[0069] The main transformer T is mainly used to match the grid voltage with the voltage of the doubly-fed wind power generation system.

[0070] Among them, the grid-side converter module 111, the machine-side converter module 112, the grid-side converter module 121, and the machine-side converter module 122 all require the modulation module 2 to generate the switching pulse signal G_PWM1, the switching pulse signal G_PWM2, the switching pulse signal R_PWM1, and the switching pulse signal R_PWM2 for switching control. The four converter modules are all controlled separately, so four modulation modules 2 are required. The main function of the main control circuit 3 includes sampling, sending, receiving, judging, and controlling all signals. The fundamental purpose of the carrier synchronization control method for the parallel converter of the doubly fed wind power generation system provided in the present application is to ensure that the phases of all carriers in the modulation module remain synchronized.

[0071] In step S10, refer to Figure 1 In step S10, the carrier phase adjustment amount of each module in the synchronization signal generation circuit is calculated based on the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly fed wind power generation system.

[0072] As an example, Figure 3 As shown, Figure 3This is the synchronization signal generation circuit diagram of the present application. The synchronization signal generation circuit includes: modules 31 to 3N, synchronization signal bus COM1, and synchronization signal bus COM2. Each module is connected to synchronization signal bus COM1 and synchronization signal bus COM2 respectively. Taking module 31 as an example, it includes: signal sending unit 311, signal receiving unit 312, magnetic beads L1 and magnetic beads L2. The first terminal of signal sending unit 311 is connected to synchronization signal bus COM1 through magnetic bead L1, and the second terminal of signal sending unit 311 is connected to synchronization signal bus COM2 through magnetic bead L2; the first terminal of signal receiving unit 312 is connected to the midpoint of the series connection of the second terminal of signal sending unit 311 and magnetic bead L2.

[0073] As an example, the signal sending unit 311 includes: a power supply V33D1, a power supply VCC1, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a switch tube Q a , switch tube Q b and optocoupler U1; the first terminal of resistor R2 is connected to power supply V33D1, the second terminal of resistor R2 is connected to the first terminal of optocoupler U1, the first terminal of resistor R3 is connected to power supply VCC1, the second terminal of resistor R3 is connected to the second terminal of optocoupler U1, and the third terminal of optocoupler U1 is connected to switch tube Q a The first terminal of the switch tube Q a The second terminal of the resistor R1 is connected to the common terminal GND, and the first terminal of the resistor R1 is connected to the switch tube Q a The second terminal of the resistor R1 is connected to the switch tube Q a The third terminal of the optocoupler U1 is connected to the first terminal of the resistor R4 and the switch tube Q b The first terminal of the resistor R4 is connected to the switch tube Q b The second terminal and the common ground point VSS, the switch tube Q b The second terminal of the signal sending unit 311 is the first terminal of the switch tube Q b The third terminal is the second terminal of the signal sending unit 311; wherein the switch tube Q a The third terminal is a general-purpose input port.

[0074] As an example, the signal receiving unit 312 includes: a power supply V33D2, a power supply VCC2, a resistor R5, a resistor R6, a resistor R7 and an optocoupler U2; the first terminal of the optocoupler U2 is connected to the power supply VCC2, the second terminal of the optocoupler U2 is connected to the first terminal of the resistor R6 and the first terminal of the resistor R7, the first terminal of the resistor R6 is connected to the power supply V33D2, the third terminal of the optocoupler U2 is connected to the first terminal of the resistor R5, the second terminal of the resistor R5 is the first terminal of the signal receiving unit 312, and the fourth terminal of the optocoupler U2 is connected to the common end GND; wherein, the second terminal of the resistor R7 is a general output port.

[0075] As an example, the main control circuit 3 includes a synchronization signal generating circuit, which performs carrier synchronization control on the signal in the modulation module 3 so that the phases of all carriers in the modulation module remain synchronized.

[0076] In the synchronization signal generation circuit, power supplies V33D1 and V33D2 provide the required 3.3V supply voltage, while power supplies VCC1 and VCC2 provide the required 8V supply voltage. Optocouplers U1 and U2 provide signal isolation, while ferrite beads L1 and L2 suppress high-frequency noise. The presence of power supplies VCC1 and VCC2 increases the high-level voltage on the synchronization signal bus to approximately 8V, helping to improve the circuit's anti-interference capabilities.

[0077] As an example, modules 31 to 3N configure a square wave signal GPIO inputted by a specific general purpose input / output port of the synchronization signal generating circuit. x , so that it sends a square wave signal with high / low level flip change. Taking module 31 as an example, module 31 configures the general input port of the signal sending unit 311 to send a square wave signal GPIO x , configure the general output port of the signal receiving unit 312 to receive the synchronization signal GPIO y According to the circuit logic, when the square wave signal GPIO is input to the general input port x When a high level is input to the synchronization signal generation circuit, the switch tube Q a The light emitting diode of the optocoupler U1 is forward biased, which makes the switch tube Q b When the square wave signal GPIO is input to the general input port, it is turned on, that is, it outputs a low level to the synchronous signal bus COM2; x If it is a low-level square wave signal, a high-level square wave signal is output to the synchronization signal bus COM2.

[0078] Specifically, step S10 includes:

[0079] Step S101: Generate a globally unified synchronization signal based on the square wave signal, capture the falling edge of the synchronization signal as the carrier control enable signal, and select the phase at this moment as the carrier phase reference value ψ ref ;

[0080] Step S102: Calculate the initial carrier phase adjustment value of each module based on the carrier phase reference value, introduce the phase deviation caused by the signal delay of each module to optimize the initial carrier phase adjustment value, and obtain the carrier phase adjustment value of each module.

[0081] As an example, in step S101, see Figure 3 , due to the switch tube Q b The existence of the signal sending unit 311, the first terminal and the second terminal have the collector open circuit characteristics, if the collector is connected to the power supply VCC2 through the pull-up resistor R5 and the light-emitting diode of the optical coupler U2, the synchronous signal bus COM1 and the synchronous signal bus COM2 can realize the "line and" logic, that is, as long as there is a module through the square wave signal GPIO sent by the signal sending unit x The synchronous signal bus COM1 and the synchronous signal bus COM2 will be pulled down to show a low level; and only when all modules send square wave signals GPIO through the signal sending unit x Only when both are at a low level can the synchronization signal bus COM1 and the synchronization signal bus COM2 be pulled high. Through the "wired-AND" logic, it can be ensured that when modules 31 to 3N simultaneously send square wave signals to the synchronization signal bus COM2, a globally unified synchronization signal is generated on the synchronization signal bus COM1 and the synchronization signal bus COM2.

[0082] Furthermore, when there is a globally unified synchronization signal on the synchronization signal bus COM1 and the synchronization signal bus COM2, the module 31 receives the square wave signal containing the carrier phase information through the signal receiving unit 312. When the synchronization signal bus COM1 and the synchronization signal bus COM2 are at a high level, the square wave signals are both low, the light-emitting diode of the optocoupler U2 is turned off, and the general output port receives the synchronization signal GPIO y Pull up to the power supply V33D, showing a high level; when the synchronization signal bus COM1 and the synchronization signal bus COM2 are low, the general output port receives the synchronization signal GPIO y Pulled down to the ground GND, it presents a low level. Therefore, the input and output logics of the signal receiving unit 312 are consistent.

[0083] As an example, see Figure 4 , Figure 4 This is a schematic diagram of the synchronization signal generation logic of this application. Figure 4In Module 31 Carrier and Module 32 Carrier, the vertical axis represents the peak value of the set triangular wave. This triangular carrier is typically generated by the built-in Enhanced Pulse Width Modulator (EPWM). In up / down counting mode, the EPWM's Time-Base Counter (TBCTR) starts at an initial value of 0 and increments by 1 with each clock signal (TBCLK). This value continues until it reaches the value set in the Time-Base Period Register (TBPRD). Thereafter, the TBCTR decrements by 1 with each clock signal. When the TBCTR returns to its initial value of 0, the next cycle begins. Figure 4 The vertical coordinates of module 31GPIOx and module 32GPIOx are the logical binary signal sizes, which are either 0 or 1. Figure 4 It can be seen that no matter what the frequency and initial phase of the carrier of modules 31 to 3N in the synchronization signal generating circuit are, the falling edge of the synchronization signal will always correspond to the zero crossing point of the carrier of one of the modules. y The falling edge in is used as the carrier synchronization control enable signal. When modules 31 to 3N capture the synchronization signal GPIO y When the falling edge of ref is 0°.

[0084] Furthermore, if the carrier phase of modules 31 to 3N is i and the carrier phase reference value ψ ref If there is a deviation, the module’s own carrier phase ψ is adjusted according to the carrier synchronization control enable signal. i Adjust. Among them, ψ i Represents the carrier phase of the i-th module.

[0085] In step S102, according to the carrier phase reference value ψ ref , calculate the initial carrier phase adjustment value Δψ of each module i0 , introduce the phase deviation caused by the signal delay of each module to optimize the initial carrier phase adjustment amount Δψ i0 , get the carrier phase adjustment value Δψ of each module i . Among them, Δψ i Indicates the carrier phase adjustment value of the i-th module.

[0086] As an example, based on the carrier phase reference value ψ ref At the time of selecting the carrier synchronization control enable signal, the carrier phase of each module is ψ i and the carrier phase reference value ψref Do the difference and get the initial carrier phase adjustment Δψ of the i-th module i0 .

[0087] As an example, the carrier phase deviation is caused by the module synchronization signal delay. To avoid unnecessary actions, the detected carrier phase needs to be compensated for the deviation. Considering the consistency of hardware parameters, it can be approximately considered that the signal delay of each module is basically the same, that is, the carrier phase of each module is ψ i and the carrier phase reference value ψ ref Therefore, before the formal operation of the shunt converter of the doubly fed wind power generation system, a certain module can be made to automatically send and receive synchronization signals to determine the phase deviation ψ caused by the delay. D , and using the phase deviation ψ D Correct the carrier phase detection link. Finally, the actual carrier phase adjustment value Δψ of the i-th module can be obtained. i for:

[0088] Δψ i =Δψ i0 -ψ D Formula (1)

[0089] In step S20, please refer to Figure 1 In step S20, it is determined whether the parallel converter of the doubly-fed wind power generation system is stable and the initial carrier synchronization is completed. If so, the process proceeds to step S30; if not, the process proceeds to step S70.

[0090] As an example, the method of judging whether the parallel converter of the doubly fed wind power generation system is stable or the initial carrier synchronization is completed includes: in the initial carrier synchronization stage or dynamic adjustment stage of the parallel converter of the doubly fed wind power generation system, directly using the initial phase adjustment amount to perform phase adjustment so that the carrier phases between each module are basically in phase.

[0091] Furthermore, because the software filtering strategy only fine-tunes the phase between modules, the phase differences between modules are significant before the DFIG parallel converter becomes unstable, making direct software filtering impossible. After determining whether the DFIG parallel converter is stable and initial carrier synchronization is complete, if so, the software filtering strategy is enabled in step S30 to suppress phase differences caused by delay fluctuations. If not, the process proceeds to step S70.

[0092] In step S30, refer to Figure 1 In step S30, enter the software filtering program and calculate the carrier phase adjustment amount Δψ i After the parallel converter of the doubly fed wind power generation system is in stable operation, the average value of the dynamic update of the specific carrier synchronization control enable signal is calculated, and the average value Δψ is calculated. aveand the carrier phase adjustment amount Δψ i The difference.

[0093] As an example, let Δψ ave is the carrier phase adjustment value Δψ i The average value within a specific period, the average value Δψ ave After the shunt converter of the doubly fed wind power generation system is in stable operation, every N ave The carrier synchronization control enable signal is dynamically updated to ensure the accuracy of subsequent filtering judgment, the average value Δψ ave The specific expression of is shown in formula (2).

[0094]

[0095] Specifically, in actual operation, the average value Δψ ave will stabilize near 0°, Δψ i(k) Indicates the carrier phase adjustment amount of the i-th module when the k-th carrier synchronization control enable signal arrives.

[0096] Furthermore, we get the average value Δψ ave Then, calculate the carrier phase adjustment value Δψ i and the average value Δψ ave difference.

[0097] Furthermore, in order to avoid the sudden change of signal delay on the average value Δψ ave The impact of calculation, when the carrier phase adjustment value Δψ obtained in a certain detection i and the average value Δψ ave The difference exceeds the software filtering threshold ψ f When the average value Δψ ave This value will be ignored in the calculation process. At the same time, if the average value Δψ before and after the update ave If the difference is too large, the average value Δψ will also be determined. ave If the calculated value is invalid, continue to use the average value Δψ before the update ave Perform filtering judgment until the next value update.

[0098] Among them, the software filter threshold ψ f The selection basis is: the maximum value of the carrier phase difference change Δψ between two adjacent carrier synchronization control enable signals max Assume that the carrier synchronization control enable signal frequency is f oN (Hz), the rated carrier frequency is f cN (Hz), the crystal oscillator frequency error is ±e osc (PPM), the maximum value of the carrier phase difference change between two adjacent carrier synchronization control enable signals Δψ max It can be expressed as:

[0099]

[0100] Furthermore, considering the uncertainty factors in actual working conditions, the software filtering threshold ψ f The selection of should leave a certain margin to avoid affecting the normal carrier phase adjustment process. f for:

[0101] ψ f =k f ·Δψ max Formula (4)

[0102] Among them, k f is the margin coefficient, which can generally be selected as 2 to 3.

[0103] In step S40, refer to Figure 1 In step S40, it is determined whether the difference is greater than the software filtering threshold ψ f If so, the carrier phase adjustment amount is limited to the average value, and the process goes to step S50; if not, the carrier phase adjustment amount obtained by this detection is used, and the process goes to step 70.

[0104] As an example, when software filtering is performed, if the detected carrier phase adjustment value Δψ i and the average value Δψ ave The difference exceeds the software filtering threshold ψ f , it is determined that the signal delay has fluctuated significantly, and the carrier phase adjustment amount Δψ i will be limited to the mean value Δψ ave Enter the subsequent carrier phase adjustment link to avoid the carrier phase ψ i If the detected carrier phase adjustment value Δψ i and the average value Δψ ave The difference does not exceed the software filtering threshold ψ f , then the carrier phase adjustment value Δψ obtained from the actual detection is used i Enter the subsequent carrier phase adjustment link.

[0105] As an example, see Figure 5 , Figure 5 This is a schematic diagram showing the effect of delay fluctuation on carrier phase detection. Assuming that the signal delay of module 32 is stable, the signal delay of module 31 occasionally fluctuates due to interrupt priority, etc., that is, the transmission delay of module 31 is t d2r-1 , receiving delay t d3-1 If it is inconsistent with module 32, the carrier phase deviation caused by the signal delay of the two modules is inconsistent, and the phase deviation of module 31 is ψ D1, the phase deviation of module 32 is ψ D2 .

[0106] At this time, if carrier synchronization is to be achieved, the carrier phase adjustment amount of module 31 needs to be: Δψ1=ψ1-ψ ref -ψ D1 , the carrier phase adjustment amount of module 32 is: Δψ2=ψ2-ψ ref -ψ D2 However, the phase deviation ψ D It cannot be updated in real time and can only be determined as a fixed value ψ before the shunt converter of the doubly fed wind power generation system is officially put into operation. D2 Therefore, the actual carrier phase adjustment amount of module 31 is: Δψ1 = ψ1 - ψ ref -ψ D2 , then the carrier phase of the two modules will eventually have |ψ D1 -ψ D2 | phase difference, synchronization can only be achieved when the delay fluctuation returns to normal. In this case, the process proceeds to step S50. If there is no delay fluctuation in modules 31 to 3N, the process proceeds to step S70.

[0107] In step S50, refer to Figure 1 In step S50, the filtering times determination procedure is entered to determine whether multiple software filterings are performed continuously. If so, the process proceeds to step S60; if not, the process proceeds to step S70.

[0108] In step S60, refer to Figure 1 In step S60, the fault protection program is entered, the software filtering is immediately disabled, and the actual detected carrier phase adjustment amount is used to enter step S70.

[0109] As an example, since the duration of the large fluctuation of signal delay is limited, generally several enable signal cycles, when software filtering is performed multiple times in succession, it can be considered that the software filtering fails and the actual carrier phase ψ i A change has occurred, and the software filter must be disabled immediately. The actual detected carrier phase adjustment value Δψ is then used. i Enter the subsequent carrier phase adjustment link.

[0110] In step S70, refer to Figure 1 In step S70, the carrier phase adjustment step is entered, and the carrier phase adjustment amount Δψ is adjusted according to the carrier phase adjustment amount Δψ. i , using a period register to change the carrier frequency, only allowing the set value of the period register to fluctuate between TBPRD*, TBPRD*+1 and TBPRD*-1, and indirectly changing the carrier phase ψ by determining the carrier adjustment period and carrier adjustment direction of the carrier phase i, to achieve the carrier phase synchronization goal of each module.

[0111] As an example, the period register TBPRD is used to change the carrier frequency. Figure 6 , Figure 6 Figure 3 is a schematic diagram of the carrier phase adjustment process under different initial phases. In order to limit the fluctuation range of the carrier frequency to a minimum, the traditional frequency and phase modulation scheme is improved as follows: the set value of the period register TBPRD is only allowed to fluctuate between TBPRD*, TBPRD*+1 and TBPRD*-1.

[0112] Furthermore, according to the different adjustment directions, the carrier phase adjustment process under different initial phase differences can be divided into two categories. When the carrier synchronization control enable signal arrives, if the carrier phase adjustment amount Δψ calculated by this module is i At (0°, 180°], it means that the module's own carrier phase ψ i Leading the carrier phase reference value ψ ref , it is necessary to increase the carrier period, that is, set the value of the period register TBPRD to TBPRD*+1; if the carrier phase adjustment value Δψ calculated by this module i At (-180°, 0°), it means that the module's own carrier phase ψ i Lagging behind the carrier phase reference value ψ ref , it is necessary to reduce the carrier period, that is, adjust the setting value of the period register to TBPRD*-1.

[0113] Furthermore, if we want to achieve the carrier phase ψ i For accurate adjustment, it is necessary not only to determine the adjustment direction but also to know the adjustment period. When the period register is set to TBPRD*±1, the phase adjustment amplitude ψ within one carrier period is regu for:

[0114]

[0115] From this, the carrier adjustment period N can be further calculated regu :

[0116]

[0117] As an example, if the calculated carrier adjustment period N regu Less than the number of carrier adjustment cycles between two carrier synchronization control enable signals (approximately the ratio of carrier frequency to modulation wave frequency, that is, the carrier ratio N c ), then in the first N regu The value of the period register TBPRD is adjusted to TBPRD*±1 for each carrier period. c -N regu) cycles to restore the value of the period register TBPRD to TBPRD* to achieve accurate phase adjustment. regu Greater than carrier ratio N c , the value of the period register TBPRD is adjusted to TBPRD*±1 before the next carrier synchronization control enable signal arrives. In this case, carrier synchronization cannot be achieved within one power frequency cycle. The carrier phase difference that was not fully adjusted in the previous cycle will continue to be adjusted after the next enable signal arrives until carrier synchronization is complete.

[0118] In fact, the situation of large carrier phase difference usually occurs in the startup phase of the parallel converter of the doubly fed wind power generation system. After the carrier synchronization control is initially enabled and the system enters a stable state, due to the small difference in carrier frequency, the carrier phase difference between each module changes slowly and the value is small. In most cases, the calculated regulation period N regu Both are less than the carrier ratio N c Therefore, the performance of this frequency modulation and phase modulation scheme can meet the actual application requirements.

[0119] In step S80, refer to Figure 1 In step S80, the carrier synchronization of one adjustment cycle is completed.

[0120] As an example, after the carrier synchronization of one adjustment cycle is completed, it is determined whether there is a delay fluctuation during the next adjustment cycle. If not, it directly enters the carrier phase adjustment link. If it is determined whether there is a fault, if there is no fault, the carrier phase adjustment amount Δψ after software filtering is used. i Carrier phase adjustment is performed. If the fault still exists, the actual detected carrier phase adjustment value Δψ is still used. i Carrier phase adjustment is performed. This mechanism can be used to implement fault protection for software filtering.

[0121] This application proposes a carrier synchronization control method for a parallel converter in a doubly fed wind power generation system, which aims to achieve carrier phase synchronization of the parallel converter system within one power frequency cycle. i , the carrier phase is adjusted according to the adjustment direction and adjustment period to achieve carrier phase synchronization among modules, avoiding the complex parameter setting process. It has the advantages of simple principle and easy implementation. Furthermore, this method introduces a software filtering strategy that effectively suppresses the adverse effects of occasional fluctuations in signal delay, thereby improving carrier synchronization performance and enhancing the suppression of high-frequency circulating currents. This method is implemented entirely through a software control strategy, eliminating the need for additional hardware controllers, making it highly applicable and low-cost.

[0122] Although the present application has been disclosed above with reference to the embodiments, they are not intended to limit the present application. Anyone with ordinary knowledge in the technical field may make slight changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be determined by the scope of the appended patent application.

Claims

1. A carrier synchronization control method for parallel converters in a doubly-fed wind power generation system, characterized in that: Including, including steps S10 to S80: Step S10: Calculating the carrier phase adjustment amount of each module in the synchronization signal generation circuit according to the square wave signal containing its own carrier phase information sent by the parallel converter of the doubly-fed wind power generation system; Step S20: Determine whether the parallel converter of the doubly-fed wind power generation system is stable and the initial carrier synchronization is completed. If so, proceed to step S30; if not, proceed to step S70; Step S30: Entering the software filtering program, calculating the average value of the carrier phase adjustment amount dynamically updated every specific carrier synchronization control enable signal after the shunt converter of the doubly fed wind power generation system is stably operating, and expressed by the formula: Where Δψ ave represents the average value, Δψ i(k) N represents the carrier phase adjustment amount of the i-th module when the k-th carrier synchronization control enable signal arrives. ave Indicates the number of carrier synchronization control enable signal intervals; The software filtering threshold is selected based on the maximum value of the carrier phase difference between two adjacent carrier synchronization control enable signals. The maximum value is expressed as follows: Where Δψ max The maximum value of the carrier phase difference between two adjacent carrier synchronization control enable signals, f oN Indicates the power frequency, f cN Indicates the rated carrier frequency, ±e osc Indicates the crystal oscillator frequency error; The software filtering threshold is expressed as follows: ψ f =k f ·Dp max Among them, ψ f Indicates the software filtering threshold, k f represents the margin factor; Calculating a difference between the average value and the carrier phase adjustment amount; Step S40: Determine whether the difference is greater than the software filtering threshold. If so, the carrier phase adjustment amount is limited to the average value, and the process proceeds to step S50. If not, the carrier phase adjustment amount obtained in this detection is used, and the process proceeds to step 70. Step S50: Enter the filtering times judgment procedure to judge whether multiple software filterings are performed continuously. If yes, then enter step S60; if not, then enter step S70; Step S60: Entering the fault protection program, immediately disabling software filtering, and using the actually detected carrier phase adjustment amount to enter step S70; Step S70: Entering the carrier phase adjustment link, according to the carrier phase adjustment amount, using the period register to change the carrier frequency, only allowing the set value of the period register to fluctuate between TBPRD*, TBPRD*+1 and TBPRD*-1, by determining the carrier phase adjustment period and carrier adjustment direction, thereby indirectly changing the carrier phase to achieve the carrier phase synchronization target of each module; When the period register is calculated to be set to TBPRD*±1, the adjustment period is expressed as follows: Among them, N regu represents the adjustment period, ψ regu It represents the phase adjustment amplitude within one carrier cycle and is expressed as: Step S80: Carrier synchronization of one adjustment cycle is completed.

2. A carrier synchronization control method for a parallel converter in a doubly-fed wind power generation system according to claim 1, characterized in that: The synchronization signal generating circuit includes: any number of modules, a first synchronization signal bus, and a second synchronization signal bus, each module is connected to the first synchronization signal bus and the second synchronization signal bus respectively; each module includes: a signal sending unit, a signal receiving unit, a first ferrite bead and a second ferrite bead, the first terminal of the signal sending unit is connected to the first synchronization signal bus through the first ferrite bead, and the second terminal of the signal sending unit is connected to the second synchronization signal bus through the second ferrite bead; the first terminal of the signal receiving unit is connected to the series midpoint of the first terminal of the signal sending unit and the first ferrite bead.

3. A carrier synchronization control method for a parallel converter in a doubly-fed wind power generation system according to claim 2, characterized in that: The step S10 includes: Step S101: Generate a globally unified synchronization signal according to the square wave signal, capture the falling edge of the synchronization signal as a carrier control enable signal, and select the phase at this moment as a carrier phase reference value; Step S102: Calculate the initial carrier phase adjustment value of each module based on the carrier phase reference value, introduce the phase deviation caused by the signal delay of each module to optimize the initial carrier phase adjustment value, and obtain the carrier phase adjustment value of each module.

4. A carrier synchronization control method for a parallel converter in a doubly-fed wind power generation system according to claim 3, characterized in that: In the step S102, based on the carrier phase reference value, at the time when the carrier synchronization control enable signal is selected, the carrier phase of each module is subtracted from the carrier phase reference value to obtain the initial carrier phase adjustment amount of each module; the phase deviation caused by the signal delay of each module is introduced, including: before the synchronization signal generation circuit is officially operated, a certain module is enabled to spontaneously transmit and receive synchronization signals, thereby determining the phase deviation caused by the delay.

5. The carrier synchronization control method for parallel converters in a doubly-fed wind power generation system according to claim 3, wherein: In the step S20, the determination of whether the parallel converter of the doubly fed wind power generation system is stable and the initial carrier synchronization is completed includes: in the initial carrier synchronization stage or dynamic adjustment stage of the parallel converter of the doubly fed wind power generation system, directly using the initial phase adjustment amount to perform phase adjustment so that the carrier phases between the modules are basically in phase.

6. The carrier synchronization control method for a parallel converter of a doubly-fed wind power generation system according to claim 1, characterized in that: The step S30 includes: dynamically updating the average value every specific carrier synchronization control enable signal after the synchronization signal generating circuit is stably operating; when the difference between the carrier phase adjustment amount obtained by a certain detection and the average value exceeds the software filtering threshold, the average value calculation process will ignore the average value; when the difference between the average values ​​before and after the update is too large, the calculated value of the average value will also be judged to be invalid, and the average value before the update will continue to be used for filtering judgment until the next value update.

7. The carrier synchronization control method for parallel converters in a doubly-fed wind power generation system according to claim 1, wherein: In step S70, depending on the adjustment direction, when the carrier synchronization control enable signal arrives, if the carrier phase adjustment amount calculated by this module is at (0°, 180°], the setting value of the adjustment period register is TBPRD*+1; if the carrier phase adjustment amount calculated by this module is at (-180°, 0°), the setting value of the adjustment period register is TBPRD*-1.

8. The carrier synchronization control method for parallel converters in a doubly-fed wind power generation system according to claim 7, characterized in that: After calculating the carrier adjustment period, if the carrier adjustment period is less than the number of carrier adjustment periods between two carrier synchronization control enable signals, the value of the period register is adjusted to TBPRD*±1 within the carrier adjustment period, and the value of the period register is restored to TBPRD* within the remaining period; if the carrier adjustment period is greater than the number of carrier adjustment periods between two carrier synchronization control enable signals, the value of the period register is adjusted to TBPRD*±1 before the next carrier synchronization control enable signal arrives.

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