Frame conversion DCSK system and communication method based on pulse position modulation

Abstract

The invention discloses a frame conversion DCSK system based on pulse position modulation and a communication method, the system comprises a modulator and a demodulator, and the modulator and the demodulator transmit signals through a channel; the modulator is used for generating a chaotic signal and applying dynamic frame transformation to the chaotic signal to construct a frame structure with time slot variability; and the demodulator is used for receiving the modulation signal sent by the modulator to obtain a received signal, and carrying out dynamic frame structure adjustment and multi-path delay alignment processing on the received signal. Compared with the prior art, the method has the advantages that a frame transformation mechanism and a pulse position modulation technology are introduced, so that the reconstruction of a chaos signal frame structure and the optimization of an information mapping mode are realized. Partial information bits are used for pulse position mapping, and only a single pulse is excited in a sparse vector, so that a modulation signal has stronger anti-interference capability, and the robustness of a system in a low signal-to-noise ratio environment is effectively improved.

Description

Technical Field

[0001] The present invention relates to the technical field of secure communication, in particular to a frame conversion DCSK system and a communication method based on pulse position modulation. Background Art

[0002] Chaotic communication, due to its initial value sensitivity and aperiodicity, holds broad application potential for improving communication system security. Differential Chaos Shift Keying (DCSK), a typical incoherent chaotic communication scheme, boasts advantages such as simple structure, ease of implementation, and robustness against multipath interference. DCSK systems utilize a transmission reference structure, dividing each symbol period into a reference time slot and an information time slot, and then employ the autocorrelation characteristics of chaotic signals for demodulation.

[0003] However, traditional DCSK systems have some significant limitations. First, half of the time slots are used to transmit reference signals that carry no information, resulting in low energy utilization and limiting the system's transmission efficiency. Second, its fixed frame structure and rigid time slot configuration lead to deficiencies in spectrum utilization and anti-interception performance. Furthermore, with the increasing demand for high-speed, highly secure communications, the conflict between DCSK's speed and security has become increasingly prominent.

[0004] To address the shortcomings of the DCSK system, some researchers have proposed the Frame-Transform-Based Differential Chaos Shift Keying (FT-DCSK) system. This system effectively improves system security by dynamically adjusting the length of each time slot. However, because it lacks fundamental improvements to the transmission mode of the reference and data signals, it still has limitations in terms of transmission rate and energy efficiency. Summary of the Invention

[0005] The purpose of the present invention is to provide a frame conversion DCSK system based on pulse position modulation, which improves the bit transmission rate, optimizes the energy utilization efficiency, and shows better overall performance.

[0006] To achieve the above object, the present invention provides the following technical solution: a frame-shifted DCSK system based on pulse position modulation, comprising a modulator and a demodulator, wherein the modulator and the demodulator transmit signals through a channel;

[0007] The modulator is used to generate a chaotic signal and apply dynamic frame transformation to the chaotic signal to construct a frame structure with time slot variability;

[0008] The PPM modulator maps some of the information bits to be transmitted to the corresponding time positions to form a sparse pulse signal. At the same time, the remaining information bits are embedded in the chaotic signal through polarity modulation to form a polarity modulated signal. The sparse pulse signal and the polarity modulated signal are combined to form a complete transmission signal frame. The signal frame contains multiple time slot units, and the length of each time slot changes dynamically according to the frame conversion strategy. Finally, it is sent to the demodulator through the channel.

[0009] The demodulator is used to receive the modulated signal sent by the modulator, obtain the received signal, and perform dynamic frame structure adjustment and multipath delay alignment processing on it; extract the maximum correlation value position in the received signal through correlation detection to determine the information bits carried by the pulse position modulation; at the same time, judge the remaining DCSK modulated bits based on the correlation polarity of the detected position, thereby achieving complete recovery of the original transmitted information.

[0010] Preferably, the modulator includes a chaotic signal generator, a first convertible module, a modulator delay unit, a holder, a bit signal converter, a PPM modulator, a polarity modulation module, a first multiplier, a second multiplier and a switch selector;

[0011] The chaotic signal generator is used to generate two signals, one of which is used as a reference signal to be transmitted to the switch selector, and the other is used as a chaotic signal to provide a carrier for the modulation process;

[0012] The first convertible module is used to dynamically adjust the time slot length of each frame in the chaotic signal;

[0013] The modulator delay unit delays the input chaotic signal by a whole frame according to the set frame duration, so that the chaotic signal generated by the chaotic signal generator is strictly aligned in time, ensuring that the differential demodulation operation in the system can be carried out correctly.

[0014] The holder is used to delay and copy the input chaotic signal to generate multiple identical copies, and send the same chaotic signal to different modulation paths;

[0015] The bit signal converter converts a plurality of input binary bits into a decimal integer for use as a pulse position index;

[0016] The PPM modulator, m c The bit information is mapped to a unique pulse position, and a "1" is set in the sparse vector to indicate the pulse location, and the rest are 0. The sparse vector is multiplied by the delayed and replicated chaotic signal through the first multiplier to generate a sparse pulse signal;

[0017] The polar modulation module maps one information bit to a polarity bit to form a DCSK modulation component;

[0018] The first multiplier and the second multiplier respectively undertake the PPM and DCSK modulation tasks, and merge the sparse pulse signal and the polarity modulation signal through time domain structure splicing to construct a complete FT-PPM-DCSK modulation signal;

[0019] The switch selector is used to selectively output a reference signal or a modulation signal according to the frame conversion pulse position information.

[0020] Preferably, the demodulator includes a second convertible module, a multi-branch delay unit, a third multiplier, a correlation detection module, a module value calculator, a comparator, a PPM position determiner and a polarity determiner;

[0021] The second convertible module is used to generate the same time slot lengths of adjacent frames in the chaotic signal as the modulator, ensuring that the demodulation process matches the modulation process;

[0022] The multi-branch delay unit delays and expands the received signal according to the PPM index structure to form multiple branches;

[0023] The third multiplier is used to calculate the product of the received signal and the delayed chaotic signal reconstructed locally by the demodulator at each sampling point;

[0024] The correlation detection module is used to integrate and accumulate the output result of the third multiplier within a spread spectrum frame length, so as to obtain the correlation energy value corresponding to each candidate position;

[0025] The modulus calculator is used to perform amplitude extraction operations on each correlation value;

[0026] The comparator finds the maximum value of the correlation value output from the multiple branches, and the maximum value is the PPM index bit;

[0027] The PPM position determiner maps the index position back to m c PPM bits to achieve complete restoration of information;

[0028] The polarity determiner determines whether the DCSK bit is +1 or -1 according to the positive or negative value of the maximum correlation value;

[0029] Combining the PPM mapping bits and the DCSK modulation bits output by the polarity judgement device, the m c +1 complete restoration of the information bit.

[0030] The present invention also provides the following technical solution: a communication method comprising the following steps:

[0031] Step 1: The chaotic signal generator generates a chaotic signal;

[0032] Step 2: dynamic frame transformation;

[0033] Step 3: Set the information bits and divide the pulse position index mapping and polarity mapping;

[0034] Step 4: The transmitter constructs signal delay and modulation signals;

[0035] Step 5: The modulator sends the modulated signal through the channel to the demodulator and restores the frame structure;

[0036] Step 6: Construct a multi-branch delay structure for the received signal and perform correlation operation with the chaotic signal reconstructed locally by the demodulator;

[0037] Step 7: Extract the maximum correlation value and restore the PPM bit corresponding to the pulse position index;

[0038] Step 8: Determine the DCSK polarity bit based on the sign of the maximum correlation value;

[0039] Step 9: Combine the restored PPM and polarity modulation bits and complete the bit error rate evaluation.

[0040] Preferably, in step 1, the chaotic signal generator uses a chaotic mapping function to generate a discrete time chaotic signal, which is expressed as This chaotic signal provides the basic modulation template for the entire system and is combined with the input bit stream to form the modulated signal;

[0041] The dynamic frame conversion in step 2 is specifically performed by adjusting the time length β of each time slot in the frame in the first convertible module. n , forming a dynamically transformed frame structure.

[0042] Preferably, step 3 is specifically as follows:

[0043] The m to be transmitted c +1 information bit is divided into two parts, the first m c Position a k Used for PPM mapping, the last 1 bit is b k For polar modulation; where a k is the PPM mapping bit, which is mapped to a sparse pulse vector S PPM , in the sparse vector of length Q, the only bit is 1 and the rest are 0; and b k is the polarity modulation bit, which takes a value of ±1 after conversion and is used for subsequent DCSK polarity modulation operations.

[0044] Preferably, step 4 is specifically as follows:

[0045] The chaotic signal xi Delayed Beta n units, and get the delayed signal And replicate P times to form multiple branches; the PPM modulator converts the sparse vector S PPM The delayed and replicated chaotic signal is multiplied to generate a sparse pulse signal; finally, the sparse pulse signal is multiplied by the mapped polarity modulation bit b k , construct the modulation signal s i,k ;

[0046]

[0047] Among them, b i ∈{-1,1} is the information bit, is the Cronea operator, The chaos generator generates a length of β n The chaotic signal is delayed by β n The new chaotic signal is formed after the units are connected, and n represents the number of different delays used in the communication system; the information bit is transmitted at a position in the PPM frame, and the position is determined by the mapping bit; For PPM signals, Q represents the total number of time slots in an information-bearing signal, where Indicates S PPM The e l The first position is 1; e l It is a position index modulation symbol obtained by converting the mapping bits.

[0048] Preferably, step 5 is specifically as follows:

[0049] The modulator generates the modulated signal s i,k Sent to the demodulator through the transmission channel; the demodulator first receives the signal r i,k , and then the second convertible module generates the frame control parameter β consistent with the sending end n , used to restore the original frame structure to ensure the synchronization and correctness of subsequent processing; the initial received signal r i,k By the output signal s i,k and noise signal n i Composition, as shown in formula (2);

[0050]

[0051] Where L represents the number of channels, δ(t-τ l ) represents the unit impulse function, α l and τ l They represent the propagation gain coefficient and path delay of the lth channel respectively. When the number of channels is 1 and α l =1,τl = 0, the multipath Rayleigh fading channel can be approximated as an AWGN channel; n i Represents additive white Gaussian noise with mean 0 and variance N0 / 2.

[0052] Preferably, step 6 is to delay the received signal to form P-path delay branches, each delayed by β n ,2β n ,…,Pβ n Each delayed signal is multiplied with the chaotic signal reconstructed locally by the demodulator and summed, and the output is the related energy value I1, I2, ..., I P , reflects the similarity between the received signal and the chaotic signal at each possible index position;

[0053] Step 7 is to calculate all relevant energy values ​​I1, I2, ..., I P Take the absolute value and use the comparator to find the position index of the maximum correlation value; the index value corresponding to the maximum correlation value is extracted by the PPM position decision device and converted into m c PPM bit Complete the recovery of PPM modulation information;

[0054] In step 8, the values ​​input to the extreme value judge are I1, I2, ..., I P In one of the branches, the polarity decision device performs sign detection on the maximum value of the PPM pulse: if it is positive, the polarity bit is determined. If it is negative, it is judged as Thus, the DCSK modulation part of the information can be restored.

[0055] Preferably, step 9 is specifically as follows:

[0056] The recovered PPM bits With DCSK polarity bit Merge to get the complete m c +1 information bit is compared bit by bit with the original input bit stream at the transmitter, and the bit error rate is counted and calculated to evaluate the overall transmission performance of the system.

[0057] Compared with the prior art, the present invention has the following beneficial effects:

[0058] Compared with existing methods, the system and method of the present invention achieves reconstruction of the chaotic signal frame structure and optimization of information mapping by introducing a frame transformation mechanism and pulse position modulation technology. By using some information bits for pulse position mapping, only a single pulse is excited in a sparse vector, making the modulated signal more resistant to interference, thereby effectively improving the system's robustness in low signal-to-noise ratio environments.

[0059] The system and method of the present invention divide information bits into PPM mapping bits and DCSK polarity bits, respectively used for pulse position selection and polarity modulation, forming a composite modulation structure. This not only improves information carrying efficiency but also enables synchronous transmission of multi-bit information without increasing bandwidth overhead. Combined with the frame transformation process, the structures between different reference signals are more complex and diverse, effectively preventing signal interception or identification, and improving system security.

[0060] The system and method of the present invention realize the simultaneous carrying of PPM and DCSK modulation information in a frame structure, effectively taking into account the balance between communication rate, security and energy consumption, and are suitable for wireless communication scenarios with high requirements for low power consumption and high security. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 This is a structural diagram of the modulator of the present invention.

[0062] Figure 2 This is a structural diagram of the demodulator of the present invention.

[0063] Figure 3 is a flow chart of the communication method of the present invention.

[0064] Figure 4 Schematic diagram of the signal frame structure of the present invention.

[0065] Figure 5 This is a comparison diagram of data rate and bit energy between the FT-PPM-DCSK system of the present invention and the FT-DCSK system.

[0066] Figure 6 For the different m of the present invention c Impact on the bit error performance of the FT-PPM-DCSK communication system. DETAILED DESCRIPTION

[0067] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0068] See also Figure 1-2 The present invention provides a technical solution: a frame transform differential chaotic shift keying system based on pulse position modulation, including a modulator and a demodulator, which transmit signals through a channel.

[0069] The modulator is used to generate a chaotic signal and apply dynamic frame transformation to the chaotic signal to construct a frame structure with time slot variability;

[0070] Part of the information bits to be transmitted are mapped to the corresponding time positions through the PPM modulator to form a sparse pulse signal; at the same time, the remaining information bits are embedded in the chaotic signal through polarity modulation to form a polarity modulated signal; the sparse pulse signal and the polarity modulated signal are combined to form a complete transmission signal frame, which contains multiple time slot units, and the length of each time slot changes dynamically according to the frame transformation strategy, and is finally sent to the demodulator through the channel.

[0071] like Figure 1 As shown, the modulator in this embodiment includes a chaotic signal generator, a first convertible module, a modulator delay unit, a holder, a bit signal converter, a PPM modulator, a polarity modulation module, a first multiplier, a second multiplier and a switch selector;

[0072] The chaotic signal generator is used to generate two signals, one of which is used as a reference signal to be transmitted to the switch selector, and the other is used as a chaotic signal to provide a carrier for the modulation process;

[0073] The first convertible module is used to dynamically adjust the time slot length of each frame in the chaotic signal;

[0074] In this embodiment, the first convertible module significantly reduces the correlation between adjacent information bits by adjusting the time slot length of each adjacent frame, thereby improving signal concealment. This design not only enhances the concealment of information transmission but also significantly improves the security of the communication system without increasing decoding complexity.

[0075] The modulator delay unit delays the input chaotic signal by a whole frame through the set frame duration, so that the chaotic signal generated by the chaotic signal generator is strictly corresponding in time, ensuring that the differential demodulation operation in the system can be carried out correctly.

[0076] The retainer is used to delay and copy the input chaotic signal to generate multiple identical copies and send the same chaotic signal to different modulation paths.

[0077] In this embodiment, the chaotic signal is first transformed by frame and then delayed by β n , and then replicated P times to construct the multipath structure after PPM mapping. Each branch corresponds to a PPM index bit for the corresponding delay correlation matching at the receiving end.

[0078] The bit signal converter converts a plurality of input binary bits into a decimal integer for use as a pulse position index;

[0079] The PPM modulator, m cThe bit information is mapped to a unique pulse position, and a "1" is set in the sparse vector to indicate the pulse location, and the rest are 0. The sparse vector is multiplied by the delayed and replicated chaotic signal through the first multiplier to generate a sparse pulse signal;

[0080] In this embodiment, the PPM modulator implements a one-to-one mapping relationship, that is, the binary bit stream is mapped to the only non-zero bit in the sparse vector, thereby realizing position information modulation and improving transmission efficiency.

[0081] The polar modulation module maps one information bit to a polarity bit to form a DCSK modulation component;

[0082] In this embodiment, the polar modulation module multiplies the chaotic segments extracted by the PPM modulator with the polarity bits through a second multiplier to implement DCSK modulation, so that the information bits form a polarity modulated signal, thereby supporting non-coherent reception.

[0083] The first multiplier and the second multiplier, in this embodiment, respectively undertake the two modulation tasks of PPM and DCSK, and merge the sparse pulse signal and the polarity modulation signal through structural splicing in the time domain to construct a complete FT-PPM-DCSK modulation signal.

[0084] The switch selector is used to selectively output a reference signal or a modulated signal based on the frame-shifted pulse position information. Based on the input information bits, the output path is controlled within each subframe to transmit signals at different time positions, thereby completing a differential chaotic keying modulation operation based on pulse position modulation.

[0085] like Figure 2 As shown, the demodulator is used to receive the modulated signal sent by the modulator, obtain the received signal, and perform dynamic frame structure adjustment and multipath delay alignment processing on it; extract the maximum correlation value position in the received signal through correlation detection to determine the information bits carried by the pulse position modulation; at the same time, judge the remaining DCSK modulated bits based on the correlation polarity of the detected position, thereby achieving complete recovery of the original transmitted information.

[0086] The demodulator of this embodiment includes a second convertible module, a multi-branch delay unit, a third multiplier, a correlation detection module, a module value calculator, a comparator, a PPM position determiner, and a polarity determiner;

[0087] The second convertible module is used to generate the same time slot lengths of adjacent frames in the chaotic signal as the modulator, ensuring that the demodulation process matches the modulation process;

[0088] In this embodiment, the second convertible module of the demodulator generates a frame conversion delay sequence consistent with the transmitting end according to preset rules to achieve synchronous reconstruction of the frame structure, ensuring that the structure of the received signal in each time slot is consistent with the transmitting end, thereby improving the demodulation accuracy of the system under the dynamic frame structure.

[0089] The multi-branch delay unit delays and expands the received signal according to the PPM index structure to form multiple branches;

[0090] In this embodiment, the demodulator expands the received signal through a multi-path delay line, and different delay paths correspond to possible index positions of the PPM, forming multiple parallel processing channels.

[0091] The third multiplier is configured to calculate the product of the received signal and the delayed chaotic signal locally reconstructed by the demodulator at each sampling point. The locally reconstructed chaotic reference signal is generated by a chaotic signal generator in the demodulator and constructed through a delay and replication module to be consistent with the chaotic signal used by the transmitter.

[0092] The correlation detection module is used to integrate and accumulate the output result of the third multiplier within a spread spectrum frame length, so as to obtain the correlation energy value corresponding to each candidate position.

[0093] In this implementation, the received signal, after undergoing multi-branch delay processing, is correlated with the chaotic signal reconstructed locally by the demodulator, generating multiple branch correlation outputs. These correlation outputs are used for subsequent peak detection and bit decision operations, effectively enhancing the system's ability to resolve multipath signals.

[0094] The modulus calculator is used to perform amplitude extraction operations on each correlation value.

[0095] In this implementation, each correlation value is fed into a corresponding modulus calculator to calculate its absolute value for subsequent pulse position comparison and judgment. Modulo-processing the correlation values ​​effectively eliminates polarity interference in position judgment, thereby improving the system's judgment accuracy.

[0096] The comparator finds the maximum value of the correlation value output from the multiple branches, and the maximum value is the PPM index bit;

[0097] In this embodiment, the multiple branch signals output by the correlation detection module are sent to the comparator, which compares all correlation values ​​and extracts the position index corresponding to the maximum correlation value. This index is the pulse position information corresponding to the PPM modulation part.

[0098] The PPM position determiner maps the index position back to m c PPM bits are used to achieve complete restoration of information.

[0099] In this embodiment, the position corresponding to the maximum correlation value is restored to m through a preset inverse mapping relationship. c bit of binary information, thus completing the recovery of the PPM modulated information.

[0100] The polarity determiner determines whether the DCSK bit is +1 or -1 according to the positive or negative value of the maximum correlation value;

[0101] In this embodiment, after obtaining the maximum correlation value, the polarity determiner further determines its positive or negative direction. If the maximum correlation value is positive, the corresponding polarity bit is determined to be "+1"; if it is negative, it is determined to be "-1", thereby completing the determination of the DCSK modulated bit.

[0102] Combining the PPM mapping bits and the DCSK modulation bits output by the polarity judgement device, the m c +1 complete restoration of the information bit.

[0103] See also Figure 3-4 The present invention provides another technical solution: a communication method of a frame transformation differential chaotic shift keying system based on pulse position modulation, comprising the following steps:

[0104] Step 1: The chaotic signal generator generates a chaotic signal;

[0105] The chaotic signal generator uses a chaotic mapping function to generate a discrete time chaotic signal, which is expressed as where x i,k The kth chaotic signal sample in the i-th frame of the communication system is used for subsequent modulation and spread spectrum operations. This chaotic signal provides the basic modulation template for the entire system and is combined with the input bit stream to form the modulated signal.

[0106] Step 2: dynamic frame transformation;

[0107] In this embodiment, the time length β of each time slot in the frame is adjusted in the first convertible module. n , forming a dynamically transformed frame structure.

[0108] Step 3: Set the information bits and divide the pulse position index mapping and polarity mapping;

[0109] In this embodiment, the m to be transmitted c +1 information bit is divided into two parts, the first m c Position a k Used for PPM mapping, the last 1 bit is b k Used for polar modulation. k is the PPM mapping bit, which is mapped to a sparse pulse vector S PPM, in the sparse vector of length Q, the only bit is 1 and the rest are 0; and b k is the polarity modulation bit, which takes a value of ±1 after conversion and is used for subsequent DCSK polarity modulation operations.

[0110] Step 4: The transmitter constructs signal delay and modulation signals;

[0111] In this embodiment, the chaotic signal x i Delayed Beta n units, and get the delayed signal And replicated P times to form multiple branches. The PPM modulator converts the sparse vector S PPM The sparse pulse signal is multiplied by the delayed and replicated chaotic signal. Finally, the sparse pulse signal is multiplied by the mapped polarity modulation bit b k , construct the modulation signal s i,k .

[0112]

[0113] Among them, b i ∈{-1,1} is the information bit, is the Cronea operator, The chaos generator generates a length of β n The chaotic signal is delayed by β n The new chaotic signal is formed after the units are mixed, and n represents the number of different delays used in the communication system. The information bit is transmitted at a position in the PPM frame, which is determined by the mapping bit. is a PPM signal, and Q represents the total number of time slots in an information-carrying signal. Indicates S PPM The e l Each position is 1. l It is a position index modulation symbol obtained by converting the mapping bits.

[0114] Step 5: The modulator sends the modulated signal through the channel to the demodulator and restores the frame structure;

[0115] In this embodiment, the modulator generates a modulated signal s i,k The demodulator first receives the signal r i,k , and then the second convertible module generates the frame control parameter β consistent with the sending end n , used to restore the original frame structure to ensure the synchronization and correctness of subsequent processing. The initial received signal r i,k By the output signal s i,k and noise signal n iComposition, as shown in formula (2);

[0116]

[0117] Where L represents the number of channels, δ(t-τ l ) represents the unit impulse function, α l and τ l They represent the propagation gain coefficient and path delay of the lth channel respectively. When the number of channels is 1 and α l =1,τ l = 0, the multipath Rayleigh fading channel can be approximated as an AWGN channel. i Represents additive white Gaussian noise with mean 0 and variance N0 / 2.

[0118] Step 6: Construct a multi-branch delay structure for the received signal and perform correlation operation with the chaotic signal reconstructed locally by the demodulator;

[0119] In this embodiment, the received signal is delayed to form P delay branches, which are delayed by β n ,2β n ,…,Pβ n Each delayed signal is multiplied with the chaotic signal reconstructed locally by the demodulator and summed, and the output is the related energy value I1, I2, ..., I P , reflecting the similarity between the received signal and the chaotic signal at each possible index position.

[0120] Step 7: Extract the maximum correlation value and restore the PPM bit corresponding to the pulse position index;

[0121] In this embodiment, for all relevant energy values ​​I1, I2, ..., I P Take the absolute value and use the comparator to find the position index of the maximum correlation value. The index value corresponding to the maximum correlation value is extracted by the PPM position decision device and converted into m c PPM bit Complete the recovery of PPM modulation information.

[0122] Step 8: Determine the DCSK polarity bit based on the sign of the maximum correlation value;

[0123] In this embodiment, the values ​​input to the extreme value judgement device are I1, I2, ..., I P In one of the branches, the polarity decision device performs sign detection on the maximum value of the PPM pulse: if it is positive, the polarity bit is determined. If it is negative, it is judged as Thus, the DCSK modulation part of the information can be restored.

[0124] Step 9: Combine the restored PPM and polarity modulation bits and complete the bit error rate evaluation;

[0125] In this embodiment, the recovered PPM bits With DCSK polarity bit Merge to get the complete m c The +1 information bit is compared bit by bit with the original input bit stream at the transmitter, the number of bit errors is counted, and the bit error rate is calculated to evaluate the overall transmission performance of the system.

[0126] See also Figure 5-6 In order to verify the technical effect of this embodiment, the following tests are performed:

[0127] Energy utilization analysis: in m c = 3 as an example, in the frame-transformed DCSK system based on pulse position modulation (FT-PPM-DCSK) of this embodiment, each symbol period consists of a reference signal and an information signal. The reference signal is a complete chaotic sequence with a length of β n The information signal is generated by the modulator by framing the reference signal into Q frames of length β. n In each symbol period, the information bit controls the position of one frame to insert the modulation content related to the reference signal, and the remaining Q-1 positions are filled with zero values. Therefore, the time length for the system to transmit a frame signal is (Q+1)β n T c The time length for FT-DCSK system to transmit one frame of signal is 2β n T c .

[0128] The information transmission rate of FT-PPM-DCSK is:

[0129]

[0130] The information transmission rate of FT-DCSK is:

[0131]

[0132] Therefore, the transmission rate ratio between the two can be defined as:

[0133]

[0134] Where E represents the percentage increase in data rate of FT-PPM-DCSK relative to FT-DCSK. Assuming that the two systems transmit the same bit information and have the same symbol duration, substituting equations (3) and (4) into equation (5) yields:

[0135]

[0136] The transmission information bit energy of the FT-PPM-DCSK system is:

[0137]

[0138] The transmission information bit energy of the FT-DCSK system is:

[0139]

[0140] Similarly, the energy saving ratio of the FT-PPM-DCSK system to the FT-DCSK system can be defined as:

[0141]

[0142] Assuming that the two systems transmit the same bit information and the symbol duration is the same, substituting equations (7) and (8) into equation (9) yields:

[0143]

[0144] FT-PPM-DCSK system in different m c The data rate improvement percentage and energy saving percentage of the FT-DCSK system under the same value are as follows: Figure 5 The results show that the FT-PPM-DCSK system has a c =1 and m c = 2, the data rate is increased by about 33% and 20% respectively compared with FT-DCSK, and the energy efficiency is increased by about 25% and 17% simultaneously, indicating its dual advantages in speed and energy saving. c As the time overhead introduced by PPM increases, symbol transmission time increases, reducing data rates. Furthermore, a higher number of modulation bits increases system complexity and reduces energy efficiency. This suggests that FT-PPM-DCSK has an optimal performance range. Beyond this range, performance may deteriorate compared to the original FT-DCSK system due to the increased overhead.

[0145] Confidentiality analysis: In the experiment, PPM-DCSK and FT-PPM-DCSK use the same chaotic sequence and modulation parameters and transmit the same number of bits, so the modulation parameter space K of the two is ξ The same, then the PPM-DCSK key space calculation expression is:

[0146] K PPM-DCSK =K ξ ×K 固定SF =M×1=M (11)

[0147] The FT-PPM-DCSK key space consists of three parts: modulation parameters, m-sequence generation mechanism, and SF average permutation number. Among them, the m-sequence is generated by a linear feedback shift register (LFSR) with a length of 10 bits. Its key space is determined by the initial state, and after excluding the all-zero state, it totals K m序列 =2 10 -1 = 1023 possibilities, approximately 10 3 In order to eliminate the contingency of a single group experiment, the test was carried out in 10 groups of heterogeneous communication scenarios, and the number of unique SF arrangements in each experimental group was accurately counted. v Based on the assumption that the SF permutation numbers of each experimental group are independent and equally weighted, the logarithm of the permutation numbers is calculated and the arithmetic mean is taken, and then converted into actual values. The dynamic parameter of the SF jump of the multi-scenario is calculated to be 9.55×10 24 Key statistical features such as system autocorrelation and power spectral density vary randomly with SF, making it difficult for attackers to build effective statistical inference models based on historical observation data.

[0148] Therefore, the key space calculation expression of FT-PPM-DCSK is

[0149] K FT-PPM-DCSK =K ξ ×K m序列 ×K SF平均排列数 =9.55×10 27 M (12)

[0150] The safety advantage K' is:

[0151]

[0152] The FT-PPM-DCSK system uses the triple mechanisms of chaos sensitivity, permutation and combination complexity, and m-sequence unpredictability. Even if an attacker obtains part of the key components, he cannot infer the remaining components or historical / future keys, thus increasing the key space from M to 10 27 M, which makes up for the security defects of PPM-DCSK caused by insufficient modulation parameter accuracy.

[0153] Different mapping factors m c Impact on the system: Figure 6 It can be seen that as the mapping factor m c As the m c The value can effectively improve the system's anti-noise ability. However, despite the higher m c This provides better bit error rate performance, but also results in additional bandwidth consumption and increased system complexity. Therefore, in practical applications, it is necessary to balance bit error rate performance with resource utilization efficiency to optimize system design.

Claims

1. A frame-shifted DCSK system based on pulse position modulation, characterized by: comprising a modulator and a demodulator, wherein the modulator and the demodulator transmit signals through a channel; The modulator is used to generate a chaotic signal and apply dynamic frame transformation to the chaotic signal to construct a frame structure with time slot variability; Part of the information bits to be transmitted are mapped to the corresponding time positions through the PPM modulator to form a sparse pulse signal; at the same time, the remaining information bits are embedded in the chaotic signal through polarity modulation to form a polarity modulated signal; The sparse pulse signal is combined with the polar modulation signal to form a complete transmission signal frame. The signal frame contains multiple time slot units, and the length of each time slot changes dynamically according to the frame conversion strategy. Finally, it is sent to the demodulator through the channel; The demodulator is used to receive the modulated signal sent by the modulator, obtain the received signal, and perform dynamic frame structure adjustment and multipath delay alignment processing on the received signal; The maximum correlation value position in the received signal is extracted through correlation detection to determine the information bits carried by the pulse position modulation; at the same time, the remaining DCSK modulated bits are judged based on the correlation polarity of the detected position, thereby achieving complete recovery of the original transmitted information.

2. The pulse position modulation based frame conversion DCSK system according to claim 1, characterized in that: The modulator includes a chaotic signal generator, a first convertible module, a modulator delay unit, a retainer, a bit signal converter, a PPM modulator, a polarity modulation module, a first multiplier, a second multiplier and a switch selector; The chaotic signal generator is used to generate two signals, one of which is used as a reference signal to be transmitted to the switch selector, and the other is used as a chaotic signal to provide a carrier for the modulation process; The first convertible module is used to dynamically adjust the time slot length of each frame in the chaotic signal; The modulator delay unit delays the input chaotic signal by a whole frame according to the set frame duration, so that the chaotic signal generated by the chaotic signal generator is strictly aligned in time, ensuring that the differential demodulation operation in the system can be carried out correctly. The holder is used to delay and copy the input chaotic signal to generate multiple identical copies, and send the same chaotic signal to different modulation paths; The bit signal converter converts a plurality of input binary bits into a decimal integer for use as a pulse position index; The PPM modulator, m c The bit information is mapped to a unique pulse position, and a "1" is set in the sparse vector to indicate the pulse location, and the rest are 0. The sparse vector is multiplied by the delayed and replicated chaotic signal through the first multiplier to generate a sparse pulse signal; The polar modulation module maps one information bit to a polarity bit to form a DCSK modulation component; The first multiplier and the second multiplier respectively undertake the PPM and DCSK modulation tasks, and merge the sparse pulse signal and the polarity modulation signal through time domain structure splicing to construct a complete FT-PPM-DCSK modulation signal; The switch selector is used to selectively output a reference signal or a modulation signal according to the frame conversion pulse position information.

3. The pulse position modulation based frame conversion DCSK system according to claim 2, characterized in that: The demodulator includes a second convertible module, a multi-branch delay unit, a third multiplier, a correlation detection module, a module value calculator, a comparator, a PPM position determiner and a polarity determiner; The second convertible module is used to generate the same time slot lengths of adjacent frames in the chaotic signal as the modulator, ensuring that the demodulation process matches the modulation process; The multi-branch delay unit delays and expands the received signal according to the PPM index structure to form multiple branches; The third multiplier is used to calculate the product of the received signal and the delayed chaotic signal reconstructed locally by the demodulator at each sampling point; The correlation detection module is used to integrate and accumulate the output result of the third multiplier within a spread spectrum frame length, so as to obtain the correlation energy value corresponding to each candidate position; The modulus calculator is used to perform amplitude extraction operations on each correlation value; The comparator finds the maximum value of the correlation value output from the multiple branches, and the maximum value is the PPM index bit; The PPM position determiner maps the index position back to m c PPM bits to achieve complete restoration of information; The polarity determiner determines whether the DCSK bit is +1 or -1 according to the positive or negative value of the maximum correlation value; Combining the PPM mapping bits and the DCSK modulation bits output by the polarity judgement device, the m c +1 complete restoration of the information bit.

4. A communication method, implemented based on the pulse position modulation based frame shift DCSK system according to claim 3, characterized in that: The following steps are involved: Step 1: The chaotic signal generator generates a chaotic signal; Step 2: dynamic frame transformation; Step 3: Set the information bits and divide the pulse position index mapping and polarity mapping; Step 4: The transmitter constructs signal delay and modulation signals; Step 5: The modulator sends the modulated signal through the channel to the demodulator and restores the frame structure; Step 6: Construct a multi-branch delay structure for the received signal and perform correlation operation with the chaotic signal reconstructed locally by the demodulator; Step 7: Extract the maximum correlation value and restore the PPM bit corresponding to the pulse position index; Step 8: Determine the DCSK polarity bit based on the sign of the maximum correlation value; Step 9: Combine the restored PPM and polarity modulation bits and complete the bit error rate evaluation.

5. The communication method according to claim 4, wherein: In step 1, the chaotic signal generator uses a chaotic mapping function to generate a discrete time chaotic signal, which is expressed as This chaotic signal provides the basic modulation template for the entire system and is combined with the input bit stream to form the modulated signal; The dynamic frame conversion in step 2 is specifically performed by adjusting the time length β of each time slot in the frame in the first convertible module. n , forming a dynamically transformed frame structure.

6. The communication method according to claim 5, wherein: Step 3 is specifically as follows: The m to be transmitted c +1 information bit is divided into two parts, the first m c Position a k Used for PPM mapping, the last 1 bit is b k For polar modulation; where a k is the PPM mapping bit, which is mapped to a sparse pulse vector S PPM , in the sparse vector of length Q, the only bit is 1 and the rest are 0; and b k is the polarity modulation bit, which takes a value of ±1 after conversion and is used for subsequent DCSK polarity modulation operations.

7. The communication method according to claim 6, wherein: Step 4 is specifically as follows: The chaotic signal x i Delayed Beta n units, and get the delayed signal And replicate P times to form multiple branches; The PPM modulator converts the sparse vector S into PPM Multiplying the delayed and replicated chaotic signal to generate a sparse pulse signal; Finally, the sparse pulse signal is multiplied by the mapped polarity modulation bit b k , construct the modulation signal s i,k ; Among them, b i ∈{-1,1} is the information bit, is the Cronea operator, Indicates that the chaos generator generates a length of β n The chaotic signal is delayed by β n The new chaotic signal is formed after the units are connected, and n represents the number of different delays used in the communication system; the information bit is transmitted at a position in the PPM frame, and the position is determined by the mapping bit; For PPM signals, Q represents the total number of time slots in an information-bearing signal, where Indicates S PPM The e l The first position is 1; e l It is a position index modulation symbol obtained by converting the mapping bits.

8. The communication method according to claim 7, wherein: Step 5 is specifically as follows: The modulator generates the modulated signal s i,k sent to a demodulator via a transmission channel; The demodulator first receives the signal r i,k , and then the second convertible module generates the frame control parameter β consistent with the sending end n , used to restore the original frame structure to ensure the synchronization and correctness of subsequent processing; the initial received signal r i,k By the output signal s i,k and noise signal n i Composition, as shown in formula (2); Where L represents the number of channels, δ(t-τ l ) represents the unit impulse function, α l and τ l They represent the propagation gain coefficient and path delay of the lth channel respectively. When the number of channels is 1 and α l =1,τ l = 0, the multipath Rayleigh fading channel can be approximated as an AWGN channel; n i Represents additive white Gaussian noise with mean 0 and variance N0 / 2.

9. The communication method according to claim 8, wherein: Step 6 is to delay the received signal to form P-path delay branches, which are delayed by β n ,2β n ,…,Pβ n Each delayed signal is multiplied with the chaotic signal reconstructed locally by the demodulator and summed, and the output is the related energy value I1, I2, ..., I P , reflects the similarity between the received signal and the chaotic signal at each possible index position; Step 7 is to calculate all relevant energy values ​​I1, I2, ..., I P Take the absolute value and use the comparator to find the position index of the maximum correlation value; the index value corresponding to the maximum correlation value is extracted by the PPM position decision device and converted into m c PPM bit Complete the recovery of PPM modulation information; In step 8, the values ​​input to the extreme value judge are I1, I2, ..., I P In one of the branches, the polarity decision device performs sign detection on the maximum value of the PPM pulse: if it is positive, the polarity bit is determined. If it is negative, it is judged as Thus, the DCSK modulation part of the information can be restored.

10. The communication method according to claim 9, wherein: Step 9 is specifically as follows: The recovered PPM bits With DCSK polarity bit Merge to get the complete m c +1 information bit is compared bit by bit with the original input bit stream at the transmitter, and the bit error rate is counted and calculated to evaluate the overall transmission performance of the system.

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