Mass transfer method and micro display device

Abstract

The invention relates to a mass transfer method and a micro-display device. In the mass transfer method, a target wafer is selectively stripped, a plurality of splicing blocks with intersection areas are formed on a bearing plate, and a plurality of micro light-emitting chips in the intersection areas corresponding to a plurality of subsequently spliced adjacent splicing blocks are in a random and complementary distribution state. The intersection areas of the adjacent splicing blocks are overlapped and aligned, and mutual embedding between the adjacent splicing blocks is realized based on the intersection areas, so that the boundary between the adjacent splicing blocks is not a continuous line any more, and the splicing boundary is faded; on the basis of the complementary design of a plurality of intersection regions, a regular overlapping splicing array is formed at the junction of the adjacent splicing blocks, so that the adjacent splicing blocks look like a whole, and the splicing boundary between the adjacent splicing blocks is further faded.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a mass transfer method and a micro display device. Background Art

[0002] The next-generation display technology developed from Micro LED / Mini LED is highly favored by manufacturers due to its multiple advantages, including high brightness, high contrast, and long life. However, the challenge during the manufacturing process is how to transfer thousands of LEDs to the display backplane and unify them, which has led to the development of mass transfer technology.

[0003] In the mass transfer process used in the Micro / Mini field, since the product size is often larger, it will go through multiple pick-up and bonding of small blocks to form the final product. In the actual process, due to differences in equipment repeatability and block preparation repeatability, the pressure / temperature / tilt / offset of each block when bonding to the backplane cannot be completely consistent, so a seam will form at the boundary between blocks. Since it is a physical seam caused by the difference in bonding of the chips on both sides, the seam can be observed regardless of whether the screen is off or on, and at many angles.

[0004] Therefore, there is an urgent need for a simple and efficient mass transfer technology solution to eliminate the seams between adjacent blocks during transfer and splicing. Summary of the Invention

[0005] In view of the above-mentioned deficiencies in the prior art, the purpose of the present application is to provide a mass transfer technology solution for a micro-display device, to selectively peel off the target wafer, to form a plurality of splicing blocks with an intersection area on a receiving plate, and the plurality of micro-light-emitting chips in the intersection area corresponding to the subsequent splicing of the adjacent plurality of splicing blocks are randomly and complementary distributed. During the subsequent splicing, the mutual embedding between the adjacent splicing blocks is achieved by overlapping and aligning the intersection areas of the adjacent plurality of splicing blocks, and based on the complementary design of the intersection area, a regular overlapping splicing array is formed at the junction between the adjacent splicing blocks to blur the splicing boundary line between the adjacent splicing blocks.

[0006] The present invention provides a mass transfer method, comprising the steps of:

[0007] Providing a target wafer, wherein the target wafer includes a plurality of micro-light-emitting chips arranged in an array;

[0008] The target wafer is selectively peeled off to peel off the plurality of micro-luminescent chips onto a receiving plate; wherein the receiving plate is formed with a plurality of splicing blocks, each of the splicing blocks has an intersection area, and the plurality of micro-luminescent chips in each intersection area are randomly and complementary distributed;

[0009] The micro-light emitting chips on each of the splicing blocks are picked up in sequence and transferred to a backplane, so as to form a target display array by splicing a plurality of the splicing blocks.

[0010] In the above-mentioned mass transfer method, the target wafer is selectively stripped to form a plurality of splicing blocks with intersection areas on the receiving plate, and the plurality of micro-light-emitting chips in the intersection areas corresponding to the subsequent adjacent splicing blocks are randomly and complementary distributed. During the subsequent splicing, the intersection areas of the adjacent plurality of splicing blocks are overlapped and aligned, and the mutual embedding between the adjacent splicing blocks is achieved based on the intersection areas, so that the dividing line between the adjacent splicing blocks is no longer a continuous line, and the splicing dividing line is weakened; based on the complementary design of the plurality of intersection areas, a regular overlapping splicing array is formed at the junction between the adjacent splicing blocks, so that the adjacent splicing blocks look more like a whole, and the splicing dividing line between the adjacent splicing blocks is further weakened.

[0011] Optionally, the target display array is formed by splicing M×N splicing blocks, and the M×N splicing blocks are spliced ​​in an M×N array, wherein M and N are integers greater than or equal to 1 and are not both 1.

[0012] Optionally, when splicing to form the target display array, the intersection areas of adjacent splicing blocks are overlapped and aligned to form a regular overlapping splicing array, the overlapping splicing array including a first overlapping splicing array and a second overlapping splicing array. The step of selectively peeling the target wafer, peeling the plurality of micro-luminescent chips onto a receiving plate, and forming splicing blocks on the receiving plate includes:

[0013] On the basis of reserving the intersection area at the adjacent splicing position of each splicing block, analyzing and zoning the target display array to obtain the shape and size of each splicing block, the adjacent splicing requirements of each splicing block, and the shape, size and position of the intersection area in each splicing block, wherein the splicing block has the intersection area and the independent area;

[0014] According to the adjacent splicing requirements of each splicing block, the intersection area in each splicing block is divided into a first sub-intersection area and a second sub-intersection area, the first sub-intersection area is subsequently used for overlapping and aligning two adjacent splicing blocks to form a regular first overlapping splicing array, and the second sub-intersection area is subsequently used for overlapping and aligning three or more adjacent splicing blocks to form a regular second overlapping splicing array;

[0015] The plurality of micro-luminescent chips on the target wafer are selectively peeled off onto a receiving plate, and each splicing block is formed on the receiving plate. A plurality of micro-luminescent chips distributed in a regular array are formed in the independent area of ​​the splicing block, and a plurality of micro-luminescent chips distributed in a random array are formed in the first sub-intersection area, and the arrays formed by the micro-luminescent chips in the first sub-intersection area corresponding to the two adjacent splicing blocks subsequently are complementary, and a plurality of micro-luminescent chips distributed in a random array are formed in the second sub-intersection area, and the micro-luminescent chips distributed in a regular array are formed after the three or more adjacent splicing blocks subsequently correspond to the second sub-intersection area and are overlapped and aligned.

[0016] Optionally, the shape of the splicing block includes at least one of a rectangle, a pentagon, and a hexagon.

[0017] Optionally, M and N are both 2, the target display array is formed by splicing four splicing blocks in a 2×2 array, and the shape of the splicing blocks is square.

[0018] Optionally, when forming each of the splicing blocks on the receiving plate, the plurality of micro-luminescent chips are randomly distributed in the first sub-intersection area, and the steps of complementing the arrays formed by the micro-luminescent chips in the first sub-intersection area corresponding to the two adjacent splicing blocks include:

[0019] For the two adjacent splicing blocks that are subsequently spliced ​​together, a first micro-luminescent chip array is first formed in the first sub-intersection area of ​​the first splicing block, and then a second micro-luminescent chip array complementary to the first micro-luminescent chip array is formed in the first sub-intersection area of ​​the second splicing block, wherein the first micro-luminescent chip array includes a plurality of micro-luminescent chips distributed in a random array.

[0020] Optionally, when forming a first micro-luminescent chip array in the first sub-intersection area of ​​the first splicing block, whether the micro-luminescent chip exists at each position in the first micro-luminescent chip array is determined by randomly generating a 01 code string or tossing a coin point by point.

[0021] Optionally, when the second micro-luminescent chip array is formed in the first sub-intersection area of ​​the second splicing block, the presence of the micro-luminescent chip at each position is reversed with reference to the distribution of the micro-luminescent chips in the first micro-luminescent chip array: if the micro-luminescent chip exists at the corresponding position in the first micro-luminescent chip array, the micro-luminescent chip does not exist at the corresponding position in the second micro-luminescent chip array; if the micro-luminescent chip does not exist at the corresponding position in the first micro-luminescent chip array, the micro-luminescent chip exists at the corresponding position in the second micro-luminescent chip array.

[0022] Optionally, when forming each of the splicing blocks on the receiving plate, the plurality of micro-luminescent chips are randomly arrayed in the second sub-intersection area, and subsequently three or more adjacent splicing blocks are overlapped and aligned corresponding to the second sub-intersection area to form the micro-luminescent chips distributed in a regular array, comprising:

[0023] For the second sub-intersection areas of three or more adjacent stitching blocks that are subsequently stitched together, the micro-luminescent chip at each position in the corresponding area of ​​the second overlapping stitching array is randomly assigned to the corresponding position in the second sub-intersection area of ​​one of the stitching blocks one by one, and the corresponding positions in the second sub-intersection areas of the other stitching blocks that are not assigned are left vacant, thereby forming a corresponding micro-luminescent chip array in the second sub-intersection area of ​​each stitching block.

[0024] Optionally, when forming each of the splicing blocks on the receiving plate, the plurality of micro-luminescent chips are randomly arrayed in the second sub-intersection area, and subsequently three or more adjacent splicing blocks are overlapped and aligned corresponding to the second sub-intersection area to form the micro-luminescent chips distributed in a regular array, comprising:

[0025] For the second sub-intersection area of ​​the three or more adjacent splicing blocks that are subsequently spliced ​​together, the second overlapping splicing array is randomly split multiple times in a step-by-step manner, and each split forms two micro-luminescent chip arrays to obtain three or more micro-luminescent chip arrays. The micro-luminescent chip arrays are laid out one by one to form the second sub-intersection area of ​​the three or more adjacent splicing blocks.

[0026] Optionally, when the target display array is formed by splicing a plurality of the splicing blocks, the first sub-intersection areas of two adjacent spliced ​​splicing blocks are overlapped and aligned to form a regular first overlapping splicing array, and part of the micro-luminescent chips within the first overlapping splicing array are successively pressed twice by the pickup plate.

[0027] Optionally, when the target display array is formed by splicing a plurality of the splicing blocks, the second sub-intersection areas of three or more adjacent spliced ​​splicing blocks are overlapped and aligned to form a regular second overlapping splicing array, and some of the micro-luminescent chips within the second overlapping splicing array are successively pressed by the pickup plate twice or more.

[0028] Based on the same inventive concept, the present invention further provides a micro display device, comprising:

[0029] Back panel;

[0030] Three target display arrays are transferred and set on the backplane using any of the mass transfer methods described above, the target display arrays are monochrome display arrays, the micro-luminescent chips in the first target display array are red micro-luminescent chips, the micro-luminescent chips in the second target display array are green micro-luminescent chips, and the micro-luminescent chips in the third target display array are blue micro-luminescent chips, and the three target display arrays are interlaced to form a color display array, the color display array includes a plurality of pixel points arranged in an array, and each pixel point includes one red micro-luminescent chip, one green micro-luminescent chip and one blue micro-luminescent chip arranged adjacent to each other.

[0031] In the aforementioned micro-display device, three monochrome target display arrays are first formed on the backplane based on the mass transfer method. Due to the overlapping and complementary design of the block intersection areas when splicing to form the target display arrays, the splicing boundaries of the target display arrays are effectively eliminated, making the target display arrays complete and integrated, and improving the bonding yield of the intersection areas. Then, based on the interlaced arrangement of the three target display arrays corresponding to the three primary colors, a complete color display array is finally formed. The monochrome target display array has good integrity, unclear boundaries, and a high bonding yield. Correspondingly, the color display array has good integrity, unclear boundaries, and a high bonding yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figures 1-9 This is a process flow chart of a mass transfer process in the prior art;

[0033] Figure 10 Schematic diagram of the steps of the mass transfer method of the present invention;

[0034] Figure 11-12 、 Figure 24-26 is a process flow chart of a mass transfer method according to an embodiment of the present invention;

[0035] Figure 13-Figure 23 A schematic diagram of a process for selectively stripping to form a splicing block in one embodiment of the present invention;

[0036] Figures 27-30 A schematic diagram of a process for splicing a plurality of splicing blocks according to an embodiment of the present invention;

[0037] Figure 31 FIG. 4 is a schematic diagram of the division of the target display array in another embodiment of the present invention.

[0038] Description of reference numerals:

[0039] 1-target wafer; 11-chip substrate; 12-micro-luminescent chip; 2-receiving plate; 21-receiving substrate; 22-receiving adhesive; 3-pickup plate; 31-pickup substrate; 32-pickup adhesive; 4-back plate; b1, b2, b3, b4-splicing blocks; b10, b20, b30, b40-independent areas; b011, b011a, b011b, b012, b012a, b012b, b013, b013a, b013b, b014, b014a, b014b-first sub-intersection area; b02, b02a, b02b, b02c, b02d-second sub-intersection area. DETAILED DESCRIPTION

[0040] To facilitate understanding of the present application, a more comprehensive description of the present application will be provided below with reference to the accompanying drawings. The accompanying drawings illustrate preferred embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and comprehensive understanding of the disclosure of the present application.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0042] As described in the background technology above, the inventors have discovered that in the mass transfer process in the Micro LED / Mini LED field, multiple smaller blocks consisting of micro-light-emitting chips are successively picked up and bonded and then placed on a backplane to form a large-size display product.

[0043] In detail, such as Figures 1-9 FIG. 1 shows a mass transfer process in the prior art, which includes the following steps:

[0044] S01、 Figure 1-Figure 2 As shown, a plurality of micro-luminescent chips 12 arranged in an array on a target wafer 1 are transferred to a receiving plate 2 through a laser lift-off process, and a regular splicing block is formed on the receiving plate 2. The regular splicing block includes a plurality of micro-luminescent chips 12 distributed in a regular array;

[0045] S02, such as Figure 3-Figure 5 As shown, each splicing block is picked up in sequence by the pickup plate 3, and each splicing block is transferred and set on the back plate 4 in sequence by a hot pressing bonding process;

[0046] S03, such as Figure 6-Figure 9As shown, when each splicing block is transferred and set on the back plate 4 in sequence, a large-area target display array is formed by splicing multiple splicing blocks;

[0047] Among them, the receiving plate 2 and the pickup plate 3 are both laminated structures, the receiving plate 2 includes a receiving substrate 21 (such as sapphire) and a receiving adhesive 22, and the pickup plate 3 includes a pickup substrate 31 and a pickup adhesive 32; the back plate 4 is provided with solder pad bumps for bonding to the electrode pins of the micro-luminescent chip 12.

[0048] However, in the actual mass transfer process, due to differences in equipment repeatability, splicing block preparation repeatability, etc., the pressure, temperature, tilt, offset, etc. when each splicing block is bonded to the backplane 4 cannot be completely consistent, and obvious splicing seams will be formed at the boundaries between the splicing blocks, such as Figure 9 As shown, at the same time, due to the physical seam caused by the difference in chip bonding in the splicing blocks on both sides, a relatively obvious seam can be observed regardless of whether the screen is off or on, and at many angles.

[0049] Based on this, the present application hopes to provide a solution that can solve the above technical problems, the details of which will be explained in the subsequent embodiments.

[0050] like Figure 10 As shown, the present invention provides a mass transfer method, which includes the steps of:

[0051] S1. Providing a target wafer, wherein the target wafer includes a plurality of micro-luminescent chips arranged in an array;

[0052] S2. Selectively peeling the target wafer and peeling the multiple micro-luminescent chips onto a receiving plate; wherein the receiving plate is formed with a plurality of splicing blocks, each splicing block has an intersection area, and the multiple micro-luminescent chips in each intersection area are randomly and complementary distributed;

[0053] S3. Pick up the micro-light-emitting chips on each splicing block in sequence and transfer them to the backplane to form a target display array through splicing multiple splicing blocks.

[0054] In detail, in step S1, Figure 11 As shown, a target wafer 1 is provided, which includes a chip substrate 11 and a plurality of micro-luminescent chips 12. The plurality of micro-luminescent chips 12 are arranged in a regular array on the chip substrate 11. The target wafer 1 can be prepared by existing epitaxial growth, epitaxy and other processes, which will not be repeated here.

[0055] In detail, in step S2, as Figure 12As shown, the selective laser lift-off technology is used to selectively lift off the target wafer 1, and multiple micro-luminescent chips 12 are peeled off onto the receiving plate 2, forming a splicing block on the receiving plate 2. The splicing block has an intersection area, and the multiple micro-luminescent chips 12 in the intersection area corresponding to the subsequent splicing of adjacent multiple splicing blocks are randomly and complementary distributed.

[0056] In more detail, the step S2 of selectively peeling the target wafer 1 and peeling the plurality of micro-light-emitting chips 12 onto the receiving plate 2 to form a splicing block on the receiving plate 2 further includes:

[0057] S21. Based on reserving intersection areas at adjacent splicing positions of each splicing block, analyzing and zoning the target display array to obtain the shape and size of each splicing block, the adjacent splicing requirements of each splicing block, and the shape, size, and position of the intersection area within each splicing block. The splicing block has an intersection area and an independent area.

[0058] S22. Based on the adjacent splicing requirements of each splicing block, the intersection area within each splicing block is divided into a first sub-intersection area and a second sub-intersection area. The first sub-intersection area is subsequently used for overlapping and aligning two adjacent splicing blocks to form a regular first overlapping splicing array. The second sub-intersection area is subsequently used for overlapping and aligning three or more adjacent splicing blocks to form a regular second overlapping splicing array.

[0059] S23. Selectively peel off the multiple micro-luminescent chips on the target wafer onto the receiving plate, form various splicing blocks on the receiving plate, form multiple micro-luminescent chips distributed in a regular array in independent areas of the splicing blocks, form multiple micro-luminescent chips distributed in a random array in the first sub-intersection area, and the arrays formed by the micro-luminescent chips in the first sub-intersection area corresponding to the two adjacent splicing blocks subsequently are complementary, form multiple micro-luminescent chips distributed in a random array in the second sub-intersection area, and the micro-luminescent chips distributed in a regular array are formed after the three or more adjacent splicing blocks subsequently corresponding to the second sub-intersection area are overlapped and aligned.

[0060] Furthermore, in step S21, before forming the splicing blocks, on the basis of reserving the intersection area at the adjacent places, the target display array to be formed on the subsequent back panel 4 is first analyzed and divided to obtain the shape and size of each splicing block, the adjacent splicing requirements of each splicing block, and the shape, size and position of the intersection area within each splicing block. The splicing blocks have intersection areas and independent areas.

[0061] Generally, in order to facilitate subsequent splicing management, the target display array can be divided into M×N regular splicing blocks. The subsequent target display array is formed by overlapping and splicing M×N splicing blocks, and the M×N splicing blocks are spliced ​​in an M×N array, where M and N are integers greater than or equal to 1 and are not both 1 at the same time.

[0062] In an optional embodiment of the present invention, Figure 13 As shown, M and N are 2 respectively, dividing the target display array into 2×2=4 regular stitching blocks, each of which is square in shape. The subsequent target display array is formed by overlapping and stitching the 4 stitching blocks in a 2×2 array, and each stitching block has a stitching intersection area with the other three adjacent stitching blocks.

[0063] In detail, such as Figure 13 As shown, the splicing block b1 has an intersection area of ​​the independent area b10 and the periphery, the splicing block b2 has an intersection area of ​​the independent area b20 and the periphery, the splicing block b3 has an intersection area of ​​the independent area b30 and the periphery, and the splicing block b4 has an intersection area of ​​the independent area b40 and the periphery.

[0064] It should be noted that the overlapping stitching array formed by overlapping and stitching multiple stitching blocks in the subsequent step S4 includes a first overlapping stitching array and a second overlapping stitching array. The first overlapping stitching array is a regular micro-luminescent chip array obtained by overlapping and aligning only two adjacent stitching blocks, and the second overlapping stitching array is a regular micro-luminescent chip array obtained by overlapping and aligning three or more adjacent stitching blocks.

[0065] Furthermore, in step S22, before forming the stitching blocks, it is also necessary to divide the intersection area within each stitching block according to the adjacent stitching requirements of each stitching block, and divide the intersection area into a first sub-intersection area and a second sub-intersection area. The first sub-intersection area is subsequently used for the overlapping alignment setting of two adjacent stitching blocks to form a first overlapping stitching array, and the second sub-intersection area is subsequently used for the overlapping alignment setting of three or more adjacent stitching blocks to form a second overlapping stitching array.

[0066] In an optional embodiment of the present invention, Figure 13As shown, according to the adjacent splicing requirements of each splicing block, the intersection area within each splicing block is further divided, the first sub-intersection area b011 is the intersection area between the splicing block b1 and the splicing block b2, the first sub-intersection area b012 is the intersection area between the splicing block b1 and the splicing block b3, the first sub-intersection area b013 is the intersection area between the splicing block b3 and the splicing block b4, the first sub-intersection area b014 is the intersection area between the splicing block b4 and the splicing block b2, and the second sub-intersection area b02 is the intersection area between the splicing block b1, the splicing block b2, the splicing block b3 and the splicing block b4.

[0067] Therefore, the spliced ​​block b1 has an independent area b10, a first sub-intersection area b011 (recorded as the first sub-intersection area b011a), a first sub-intersection area b012 (recorded as the first sub-intersection area b012a), and a second sub-intersection area b02 (recorded as the second sub-intersection area b02a). The spliced ​​block b2 has an independent area b20, a first sub-intersection area b011 (recorded as the first sub-intersection area b011b), a first sub-intersection area b014 (recorded as the first sub-intersection area b014a), and a second sub-intersection area b02 (recorded as the second sub-intersection area b02b ), the splicing block b3 has an independent area b30, the first sub-intersection area b012 (recorded as the first sub-intersection area b012b), the first sub-intersection area b013 (recorded as the first sub-intersection area b013a) and the second sub-intersection area b02 (recorded as the second sub-intersection area b02c), and the splicing block b4 has an independent area b40, the first sub-intersection area b013 (recorded as the first sub-intersection area b013b), the first sub-intersection area b014 (recorded as the first sub-intersection area b014b) and the second sub-intersection area b02 (recorded as the second sub-intersection area b02d).

[0068] Furthermore, the step S23 of selectively peeling off the plurality of micro-light-emitting chips 12 on the target wafer 1 onto the receiving plate 2 and forming various splicing blocks on the receiving plate 2 includes:

[0069] S231, forming a plurality of micro-light-emitting chips 12 distributed in a regular array in the independent area of ​​the splicing block;

[0070] S232, a plurality of micro-light-emitting chips 12 are randomly distributed in the first sub-intersection area, and the arrays formed by the micro-light-emitting chips 12 in the first sub-intersection area are complementary to each other in two adjacent splicing blocks that are subsequently spliced;

[0071] S233 , forming a plurality of micro-light-emitting chips 12 distributed in a random array in the second sub-intersection area, and subsequently overlapping and aligning three or more adjacent splicing blocks corresponding to the second sub-intersection area to form micro-light-emitting chips 12 distributed in a regular array.

[0072] Specifically, in step S231 , a regular micro-luminescent chip array is first formed in an independent area that does not require overlap.

[0073] In an optional embodiment of the present invention, Figure 14 As shown, a plurality of micro-luminescent chips 12 distributed in a regular array are formed in the independent area b10 of the splicing block b1, a plurality of micro-luminescent chips 12 distributed in a regular array are formed in the independent area b20 of the splicing block b2, a plurality of micro-luminescent chips 12 distributed in a regular array are formed in the independent area b30 of the splicing block b3, and a plurality of micro-luminescent chips 12 distributed in a regular array are formed in the independent area b40 of the splicing block b4.

[0074] Specifically, when forming each splicing block on the receiving plate 2, a plurality of micro-light-emitting chips 12 are randomly distributed in the first sub-intersection area, and the arrays formed by the micro-light-emitting chips 12 in the first sub-intersection area of ​​the two adjacent splicing blocks are complementary to each other, step S232 includes:

[0075] For the two adjacent splicing blocks that are subsequently spliced, a first micro-luminescent chip array is first formed in the first sub-intersection area of ​​the first splicing block, and then a second micro-luminescent chip array complementary to the first micro-luminescent chip array is formed in the first sub-intersection area of ​​the second splicing block. The first micro-luminescent chip array includes multiple micro-luminescent chips distributed in a random array.

[0076] When the first micro-luminescent chip array is formed in the first sub-intersection area of ​​the first splicing block, it is possible to determine whether a micro-luminescent chip 12 exists at each position in the first micro-luminescent chip array by at least randomly generating a 01 code string or tossing a coin point by point.

[0077] In an optional embodiment of the present invention, Figure 15-18 As shown, first, a 01 code string is randomly generated or a coin is tossed point by point to determine whether a micro-luminescent chip 12 exists at each position in the first sub-intersection area b011a, b012a, b013a and b014a. For example, 0 in the 01 code string indicates that there is no micro-luminescent chip 12, and 1 indicates that there is a micro-luminescent chip 12. For example, the front side of the coin facing up indicates that there is a micro-luminescent chip 12, and the back side of the coin facing up indicates that there is no micro-luminescent chip 12, etc., which are not limited here.

[0078] Furthermore, when forming the second micro-luminescent chip array in the first sub-intersection area of ​​the second splicing block, the presence of the micro-luminescent chip 12 at each position is inverted with reference to the distribution of the micro-luminescent chips 12 in the first micro-luminescent chip array:

[0079] If a micro-luminescent chip 12 exists at a corresponding position in the first micro-luminescent chip array, then no micro-luminescent chip 12 exists at a corresponding position in the second micro-luminescent chip array;

[0080] If there is no micro-luminescent chip 12 at the corresponding position in the first micro-luminescent chip array, then there is a micro-luminescent chip 12 at the corresponding position in the second micro-luminescent chip array.

[0081] In an optional embodiment of the present invention, Figure 15-18 As shown, referring to the distribution of the micro-luminescent chips 12 in the first micro-luminescent chip array, the distribution is reversed, "yes → no, no → yes", to form a second micro-luminescent chip array, the distribution of the first sub-intersection area b011a is reversed to obtain the distribution of the first sub-intersection area b011b, the distribution of the first sub-intersection area b012a is reversed to obtain the distribution of the first sub-intersection area b012b, the distribution of the first sub-intersection area b013a is reversed to obtain the distribution of the first sub-intersection area b013b, and the distribution of the first sub-intersection area b014a is reversed to obtain the distribution of the first sub-intersection area b014b.

[0082] Specifically, when forming each splicing block on the receiving plate 2, a plurality of micro-light-emitting chips are randomly distributed in the second sub-intersection area, and three or more adjacent splicing blocks are subsequently overlapped and aligned corresponding to the second sub-intersection area to form a step S233 of regularly distributed micro-light-emitting chips, including:

[0083] For the second sub-intersection areas of three or more adjacent splicing blocks that are subsequently spliced ​​together, the micro-luminescent chips 12 at each position in the corresponding area of ​​the second overlapping splicing array are randomly assigned to the corresponding positions in the second sub-intersection areas of one of the splicing blocks one by one, and the corresponding positions in the second sub-intersection areas of other splicing blocks that have not been assigned are left vacant, thereby forming a corresponding micro-luminescent chip array in the second sub-intersection areas of each splicing block.

[0084] In an optional embodiment of the present invention, Figure 19 As shown, each micro-luminescent chip 12 in the regular second overlapping splicing array formed by subsequent overlapping in the second sub-intersection area b02 is randomly assigned to the corresponding position in the second sub-intersection areas b02a, b02b, b02c and b02d, thereby forming a corresponding micro-luminescent chip array in the second sub-intersection areas b02a, b02b, b02c and b02d.

[0085] It is understandable that other random methods can be used to form three or more overlapping and aligned micro-luminescent chip arrays in the second sub-intersection area, such as:

[0086] For the second sub-intersection area of ​​three or more adjacent splicing blocks, the second overlapping splicing array is randomly split multiple times in a step-by-step manner, and each split forms two micro-luminescent chip arrays to obtain three or more micro-luminescent chip arrays. The micro-luminescent chip arrays are laid out one by one to form the second sub-intersection area of ​​three or more adjacent splicing blocks.

[0087] In an optional embodiment of the present invention, Figure 15-18 The formation of the first sub-intersection area shown is similar. The second overlapping spliced ​​array formed by subsequent overlapping alignment in the second sub-intersection area is first randomly split for the first time to obtain two micro-luminescent chip arrays. Then, at least one of the micro-luminescent chip arrays is split for the second time to finally form three or four micro-luminescent chip arrays. If more micro-luminescent chip arrays are needed, a third split is performed, and so on. No further details will be given here.

[0088] Therefore, based on the array distribution of the micro-luminescent chips 12 in the independent area, the first sub-intersection area and the second sub-intersection area in each splicing block, the target wafer 1 is selectively peeled off, and the multiple micro-luminescent chips 12 are peeled off onto the receiving plate 2 to form multiple splicing blocks on the receiving plate 2.

[0089] In an optional embodiment of the present invention, Figure 20 As shown, referring to the array distribution of the micro-light-emitting chips 12 in the independent area b10, the first sub-intersection area b011a, the first sub-intersection area b012a and the second sub-intersection area b02a, the target wafer 1 is selectively peeled off to form a splicing block b1 on the receiving plate 2; Figure 21 As shown, referring to the array distribution of the micro-light-emitting chips 12 in the independent area b20, the first sub-intersection area b011b, the first sub-intersection area b014a and the second sub-intersection area b02b, the target wafer 1 is selectively peeled off to form a splicing block b2 on the receiving plate 2; Figure 22 As shown, referring to the array distribution of the micro-light-emitting chips 12 in the independent area b30, the first sub-intersection area b012b, the first sub-intersection area b013a and the second sub-intersection area b02c, the target wafer 1 is selectively peeled off to form a splicing block b3 on the receiving plate 2; Figure 23 As shown, referring to the array distribution of the micro-light-emitting chips 12 in the independent area b40, the first sub-intersection area b013b, the first sub-intersection area b014b and the second sub-intersection area b02d, the target wafer 1 is selectively stripped to form a splicing block b4 on the receiving plate 2.

[0090] In detail, in step S3, as Figure 24 As shown, each splicing block is picked up in sequence by the picking plate 3. Figure 20-23The four splicing blocks b1 to b4 are picked up and transferred in sequence, and a hot pressing bonding process is used, such as Figure 25-26 As shown, each splicing block is transferred and set on the back panel 4 in sequence; at the same time, a target display array is formed by splicing multiple splicing blocks, and the intersection areas of adjacent splicing blocks are overlapped and aligned, and a regular overlapping splicing array is formed based on two or more intersection areas to eliminate the splicing boundaries between adjacent splicing blocks.

[0091] In an optional embodiment of the present invention, Figures 27-30 As shown, the splicing block b1 is first transferred to the corresponding position of the backboard 4; then the splicing block b2 is transferred to the corresponding position of the backboard 4, and the first sub-intersection area b011b of the splicing block b2 is overlapped and aligned with the first sub-intersection area b011a of the splicing block b1, so as to realize the adjacent overlapping splicing of the splicing block b2 and the splicing block b1, and form a regular first overlapping splicing array in the overlapping alignment area of ​​the first sub-intersection area b011b and the first sub-intersection area b011a; then the splicing block b3 is transferred to the corresponding position of the backboard 4, and the first sub-intersection area b012b of the splicing block b3 is overlapped and aligned with the first sub-intersection area b012a of the splicing block b1, so as to realize the adjacent overlapping splicing of the splicing block b3 and the splicing block b2, and form a regular first overlapping splicing array in the overlapping alignment area of ​​the first sub-intersection area b012b and the first sub-intersection area b012 a) an overlapping alignment area of ​​the first sub-intersection area b013b of the splicing block b4 is overlapped and aligned with the first sub-intersection area b013a of the splicing block b3 to realize adjacent overlapping splicing of the splicing block b4 and the splicing block b3, and a regular first overlapping splicing array is formed in the overlapping alignment area of ​​the first sub-intersection area b013b and the first sub-intersection area b013a, and the first sub-intersection area b014b of the splicing block b4 is overlapped and aligned with the first sub-intersection area b014a of the splicing block b2 to realize adjacent overlapping splicing of the splicing block b4 and the splicing block b2, and a regular first overlapping splicing array is formed in the overlapping alignment area of ​​the first sub-intersection area b014b and the first sub-intersection area b014a.

[0092] At the same time, the second sub-intersection area b02a of the splicing block b1, the second sub-intersection area b02b of the splicing block b2, the second sub-intersection area b02c of the splicing block b3, and the second sub-intersection area b02d of the splicing block b4 are aligned and overlapped to form a regular second overlapping splicing array; and then combined with the regular array composed of multiple micro-light-emitting chips 12 in the independent area b10 of the splicing block b1, the independent area b20 of the splicing block b2, the independent area b30 of the splicing block b3, and the independent area b40 of the splicing block b4, so far, as shown in FIG. Figure 30 As shown, a regular target display array is formed on the back panel 4.

[0093] In the above-mentioned mass transfer method, the target wafer 1 is selectively peeled off to form a plurality of splicing blocks with intersection areas on the receiving plate 2, and the plurality of micro-light-emitting chips 12 in the intersection areas corresponding to the subsequent adjacent splicing blocks are randomly and complementary distributed. During the subsequent splicing, the intersection areas of the adjacent plurality of splicing blocks are overlapped and aligned, and the mutual embedding between the adjacent splicing blocks is achieved based on the intersection areas, so that the boundary line between the adjacent splicing blocks is no longer a continuous line, and the splicing boundary line is weakened; at the same time, based on the complementary design of the plurality of intersection areas, a regular overlapping splicing array is formed at the junction between the adjacent splicing blocks, so that the adjacent splicing blocks look more like a whole, and the splicing boundary line between the adjacent splicing blocks is further weakened.

[0094] It is understood that the division and splicing form of the target display array is not limited to the following: Figure 13 The four overlapping square tiles shown can also be tiles of other numbers and shapes. That is, the tiled tile array is not limited to a 2×2 array, but can also be 2×3, 3×3, 4×4, and so on, with the corresponding number of tiles not limited to 4. The tiled tile shape is not limited to a square, but can also be other complex shapes such as triangles, rectangles, pentagons, and hexagons.

[0095] In an optional embodiment of the present invention, Figure 31 As shown, the target display array is divided into a plurality of adjacent overlapping hexagonal tiles arranged in an array. The central tile has six first sub-intersection areas and six second sub-intersection areas. The first sub-intersection areas are used for overlapping and aligning two adjacent tile tiles, and the second sub-intersection areas are used for overlapping and aligning three adjacent tile tiles. The specific process of selective stripping to form each tile tile can be referred to the description of the above embodiment and will not be repeated here.

[0096] In addition, it should be noted that, for the first sub-intersection area and the second sub-intersection area that are arranged to overlap and align, some of the micro-luminescent chips 12 therein are pressed by the unified pickup plate 3 at least twice in succession.

[0097] In detail, when a target display array is formed by splicing multiple splicing blocks, the first sub-intersection areas of two adjacent splicing blocks are overlapped and aligned to form a regular first overlapping splicing array, and some of the micro-luminescent chips in the first overlapping splicing array are successively pressed twice by the picking plate.

[0098] In an optional embodiment of the present invention, Figure 28As shown, when the splicing block b2 overlaps and splices with the splicing block b1, the micro-luminescent chip 12 in the first sub-intersection area b011a is first pressed by the pickup plate 3 corresponding to the splicing block b1, and then pressed by the pickup plate 3 corresponding to the splicing block b2.

[0099] In detail, when a target display array is formed by splicing multiple splicing blocks, the second sub-intersection areas of three or more adjacent splicing blocks are overlapped and aligned to form a regular second overlapping splicing array, and some of the micro-luminescent chips in the second overlapping splicing array are successively pressed by the picking plate twice or more.

[0100] In an optional embodiment of the present invention, Figures 27-30 As shown, based on the overlapping splicing of the four splicing blocks b1, b2, b3 and b4, the micro-luminescent chips 12 in the second sub-intersection area b02a are pressed four times in sequence by the pickup plates 3 corresponding to the splicing blocks b1, b2, b3 and b4; the micro-luminescent chips 12 in the second sub-intersection area b02b are pressed three times in sequence by the pickup plates 3 corresponding to the splicing blocks b2, b3 and b4; and the micro-luminescent chips 12 in the second sub-intersection area b02c are pressed twice in sequence by the pickup plates 3 corresponding to the splicing blocks b3 and b4.

[0101] In this way, during the subsequent splicing, some of the micro-luminescent chips 12 in the intersection area are pressed at least twice in succession, which can unify the different inclination angles of the micro-luminescent chips 12, reduce the inclination of the micro-luminescent chips 12, and further weaken the dividing line; at the same time, for the micro-luminescent chips 12 that are not compacted during the first bonding in the intersection area, there is a certain probability of improving this phenomenon through secondary hot pressing bonding, thereby improving the bonding and lighting yield of the micro-luminescent chips 12.

[0102] Based on the same inventive concept, the present invention further provides a micro display device, comprising:

[0103] Back panel 4;

[0104] Three target display arrays are transferred and set on the backplane 4 using the above-mentioned mass transfer method. The target display arrays are monochrome display arrays. The micro-luminescent chips 12 in the first target display array are red micro-luminescent chips, the micro-luminescent chips 12 in the second target display array are green micro-luminescent chips, and the micro-luminescent chips 12 in the third target display array are blue micro-luminescent chips. The three target display arrays are interlaced to form a color display array. The color display array includes a plurality of pixel points arranged in an array, and each pixel point includes a red micro-luminescent chip, a green micro-luminescent chip and a blue micro-luminescent chip arranged adjacent to each other.

[0105] In the above-mentioned micro-display device, three monochrome target display arrays are first formed on the backplane 4 based on the mass transfer method. Due to the overlapping and complementary design of the block intersection areas when splicing to form each target display array, the splicing dividing lines of the target display arrays are effectively eliminated, making each target display array complete and integrated, and improving the bonding yield of the intersection area; then, based on the mutual staggered arrangement of the three target display arrays corresponding to the three primary colors, a complete color display array is finally formed. The color display array has good integrity, unclear dividing lines and high bonding yield.

[0106] It should be understood that the application of the present invention is not limited to the above examples. For those skilled in the art, improvements or changes can be made based on the above description. All these improvements and changes should fall within the scope of protection of the claims attached to the present invention.

Claims

1. A mass transfer method, characterized in that: Including steps: Providing a target wafer, wherein the target wafer includes a plurality of micro-light-emitting chips arranged in an array; The target wafer is selectively peeled off to peel off the plurality of micro-luminescent chips onto a receiving plate; wherein the receiving plate is formed with a plurality of splicing blocks, each of the splicing blocks has an intersection area, and the plurality of micro-luminescent chips in each intersection area are randomly and complementary distributed; The micro-light emitting chips on each of the splicing blocks are picked up in sequence and transferred to a backplane, so as to form a target display array by splicing a plurality of the splicing blocks.

2. The mass transfer method according to claim 1, wherein: The target display array is formed by splicing M×N splicing blocks, and the M×N splicing blocks are spliced ​​in an M×N array, wherein M and N are integers greater than or equal to 1 and are not both 1.

3. The method for mass transfer according to claim 2, wherein: When the target display array is formed by splicing, the intersection areas of adjacent splicing blocks are overlapped and aligned to form a regular overlapping splicing array, the overlapping splicing array including a first overlapping splicing array and a second overlapping splicing array. The step of selectively peeling the target wafer and peeling the plurality of micro-light-emitting chips onto a receiving plate includes: reserving the intersection areas at adjacent splicing positions of each splicing block, analyzing and zoning the target display array, obtaining the shape and size of each splicing block, the adjacent splicing requirements of each splicing block, and the shape, size, and position of the intersection area in each splicing block, wherein the splicing block has the intersection area and an independent area; According to the adjacent splicing requirements of each splicing block, the intersection area in each splicing block is divided into a first sub-intersection area and a second sub-intersection area, the first sub-intersection area is subsequently used for overlapping and aligning two adjacent splicing blocks to form a regular first overlapping splicing array, and the second sub-intersection area is subsequently used for overlapping and aligning three or more adjacent splicing blocks to form a regular second overlapping splicing array; The plurality of micro-luminescent chips on the target wafer are selectively peeled off onto a receiving plate, and each splicing block is formed on the receiving plate. A plurality of micro-luminescent chips distributed in a regular array are formed in the independent area of ​​the splicing block, and a plurality of micro-luminescent chips distributed in a random array are formed in the first sub-intersection area, and the arrays formed by the micro-luminescent chips in the first sub-intersection area corresponding to the two adjacent splicing blocks subsequently are complementary, and a plurality of micro-luminescent chips distributed in a random array are formed in the second sub-intersection area, and the micro-luminescent chips distributed in a regular array are formed after the three or more adjacent splicing blocks subsequently correspond to the second sub-intersection area and are overlapped and aligned.

4. The method for mass transfer according to claim 3, wherein: The shape of the splicing block includes at least one of a rectangle, a pentagon, and a hexagon.

5. The method for mass transfer according to claim 4, wherein: M and N are 2 respectively, and the target display array is formed by splicing four splicing blocks in a 2×2 array, and the shape of the splicing blocks is square.

6. The mass transfer method according to claim 3, wherein: When each of the splicing blocks is formed on the receiving plate, the plurality of micro-luminescent chips are randomly distributed in the first sub-intersection area, and the array formed by the micro-luminescent chips in the first sub-intersection area corresponding to the two adjacent splicing blocks is complementary, including: For the two adjacent splicing blocks that are subsequently spliced ​​together, a first micro-luminescent chip array is first formed in the first sub-intersection area of ​​the first splicing block, and then a second micro-luminescent chip array complementary to the first micro-luminescent chip array is formed in the first sub-intersection area of ​​the second splicing block, wherein the first micro-luminescent chip array includes a plurality of micro-luminescent chips distributed in a random array.

7. The method for mass transfer according to claim 6, wherein: When a first micro-luminescent chip array is formed in the first sub-intersection area of ​​the first splicing block, whether the micro-luminescent chip exists at each position in the first micro-luminescent chip array is determined by randomly generating a 01 code string or tossing a coin point by point.

8. The method for mass transfer according to claim 7, wherein: When forming the second micro-luminescent chip array in the first sub-intersection area of ​​the second splicing block, referring to the distribution of the micro-luminescent chips in the first micro-luminescent chip array, the presence of the micro-luminescent chip at each position is inverted: if the micro-luminescent chip exists at the corresponding position in the first micro-luminescent chip array, then the micro-luminescent chip does not exist at the corresponding position in the second micro-luminescent chip array; If the micro-luminescent chip does not exist at the corresponding position in the first micro-luminescent chip array, the micro-luminescent chip exists at the corresponding position in the second micro-luminescent chip array.

9. The method for mass transfer according to claim 3, wherein: When each of the splicing blocks is formed on the receiving plate, the multiple micro-luminescent chips are randomly arrayed in the second sub-intersection area, and the three or more adjacent splicing blocks are overlapped and aligned corresponding to the second sub-intersection area to form the micro-luminescent chips distributed in a regular array, including: for the second sub-intersection area of ​​the three or more adjacent splicing blocks that are subsequently spliced, the micro-luminescent chips at each position in the corresponding area of ​​the second overlapping splicing array are randomly assigned to the corresponding position in the second sub-intersection area of ​​one of the splicing blocks one by one, and the corresponding positions in the second sub-intersection area of ​​the other splicing blocks that are not assigned are left vacant, thereby forming a corresponding micro-luminescent chip array in the second sub-intersection area of ​​each of the splicing blocks.

10. The mass transfer method according to claim 3, wherein: When each of the splicing blocks is formed on the receiving plate, the plurality of micro-luminescent chips are randomly distributed in the second sub-intersection area, and three or more adjacent splicing blocks are subsequently overlapped and aligned corresponding to the second sub-intersection area to form the micro-luminescent chips distributed in a regular array, including: For the second sub-intersection area of ​​the three or more adjacent splicing blocks that are subsequently spliced ​​together, the second overlapping splicing array is randomly split multiple times in a step-by-step manner, and each split forms two micro-luminescent chip arrays to obtain three or more micro-luminescent chip arrays. The micro-luminescent chip arrays are laid out one by one to form the second sub-intersection area of ​​the three or more adjacent splicing blocks.

11. The mass transfer method according to claim 3, wherein: When the target display array is formed by splicing a plurality of the splicing blocks, the first sub-intersection areas of two adjacent spliced ​​splicing blocks are overlapped and aligned to form a regular first overlapping splicing array, and part of the micro-luminescent chips within the first overlapping splicing array are successively pressed twice by the pickup plate.

12. The mass transfer method according to claim 3, wherein: When the target display array is formed by splicing a plurality of the splicing blocks, the second sub-intersection areas of three or more adjacent spliced ​​splicing blocks are overlapped and aligned to form a regular second overlapping splicing array, and some of the micro-luminescent chips within the second overlapping splicing array are successively pressed by the pickup plate twice or more.

13. A micro display device, characterized in that: include: Back panel; Three target display arrays are transferred and set on the backplane using the mass transfer method according to any one of claims 1 to 12, the target display arrays being monochrome display arrays, the micro-luminescent chips in the first target display array being red micro-luminescent chips, the micro-luminescent chips in the second target display array being green micro-luminescent chips, and the micro-luminescent chips in the third target display array being blue micro-luminescent chips, and the three target display arrays are interlaced to form a color display array, the color display array comprising a plurality of pixel points arranged in an array, each pixel point comprising one adjacent red micro-luminescent chip, one green micro-luminescent chip, and one blue micro-luminescent chip.

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