Digital-analog hybrid simulation method and device

Abstract

The invention provides a digital-analog hybrid simulation method and device.The method comprises the steps that a simulation modeling file is generated according to design information of an analog circuit of a chip, and the simulation modeling file comprises a digital netlist, device library configuration, device mapping configuration, simulation control parameters, simulation signal variables and digital-analog interface conversion rules; and performing digital circuit simulation according to the design information of the digital circuit of the chip and the simulation modeling file, and generating a digital-analog hybrid simulation result of the chip. According to the method provided by the invention, the compatibility between digital-analog hybrid simulation tools can be improved.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a digital-analog hybrid simulation method and device. Background Art

[0002] Mixed-analog simulation can identify problems with analog and digital chip functionality and coordination, and can even reveal internal functional implementation errors in analog and digital circuits, avoiding chip rework. A high percentage of problems are discovered during mixed-analog simulation, demonstrating the importance of mixed-analog simulation in chip verification.

[0003] Currently, in mixed-analog simulation, there's a lack of clear integration between analog development tools, analog simulators, and digital simulators. This results in independent and incompatible tools from different vendors, posing significant challenges to hybrid simulation, which requires multi-tool collaboration. Therefore, new hybrid simulation methods are urgently needed to improve tool compatibility and reduce the user experience cost of hybrid simulation. Summary of the Invention

[0004] The present application provides a mixed-analog simulation method and device, which can improve the compatibility between mixed-analog simulation tools and reduce the cost of users in mixed-analog simulation.

[0005] In a first aspect, a mixed digital-analog simulation method is provided, the method comprising: generating a simulation modeling file according to the design information of the analog circuit of the chip, the simulation modeling file comprising a digital netlist, a device library configuration, a device mapping configuration, simulation control parameters, simulation signal variables and digital-analog interface conversion rules, the digital netlist comprising a netlist obtained by digitally modeling the analog circuit, the device library configuration being used to define multiple device library configurations for digitally modeling the analog circuit, the device mapping configuration being used to define a mapping relationship between the modules of the analog circuit and the multiple device libraries, the simulation control parameters comprising control parameters for performing mixed digital-analog simulation, the simulation signal variables comprising global variables in the mixed digital-analog simulation, and the digital-analog interface conversion rules being used to define conversion rules for the interface between the digital circuit and the analog circuit; performing digital circuit simulation according to the design information of the digital circuit of the chip and the simulation modeling file to generate a mixed digital-analog simulation result of the chip.

[0006] The present application provides a mixed-analog simulation method that can generate specific simulation modeling files based on the design information of the analog circuit of the chip, improve the compatibility between mixed-analog simulation tools, and reduce the user's usage cost in mixed-analog simulation.

[0007] It should be understood that the design information of the chip includes the design information of the analog circuit and the design information of the digital circuit.

[0008] Digital modeling is used to convert analog circuit design information into digital domain design information. For example, analog development tools can use digital modeling to convert analog circuit design information into digital domain design information, including but not limited to converting analog signals into digital signals and related configuration information for the conversion process.

[0009] A device library is a collection of electronic component models used in chip design and simulation. A device library typically contains various device models, such as transistors, resistors, capacitors, inductors, amplifiers, logic gates, and their variants and parameterized models.

[0010] The device mapping configuration is used to define a mapping relationship between modules of an analog circuit and multiple device libraries. Exemplarily, the device mapping configuration can establish a one-to-one correspondence between modules of an analog circuit and device libraries.

[0011] Mixed-analog simulation is a comprehensive approach used to simulate the behavior of both digital and analog circuits. It combines digital and analog simulation techniques to simulate the interaction of digital and analog signals within the same system. In mixed-analog simulation, simulation tools consider the interplay between digital and analog circuits, including how digital signals drive the analog circuits, how analog signals respond to digital circuits, and the interconnections and interfaces between the two circuits. This provides more accurate results, helping designers identify and resolve potential issues.

[0012] Global variables are variables defined in a program with global scope. They can be accessed and used from anywhere in the program, not limited to a specific function or code block.

[0013] In combination with the first aspect, in some implementations of the first aspect, the simulation modeling file also includes a file list, and the file list includes one or more description files for performing the digital modeling on the module of the analog circuit.

[0014] The file list is read by the digital simulator. In one possible implementation, each modeling file (.v / .sv) circuit description complies with the IEEE Std 1800 protocol standard.

[0015] The present application provides a mixed digital-analog simulation method that can generate a specific simulation modeling file based on the design information of the analog circuit of the chip. The file list in the simulation modeling file can facilitate users to understand the process information of digital modeling and support the reuse of circuit design information.

[0016] In combination with the first aspect, in certain implementations of the first aspect, the digital netlist includes any one or more of the module instantiation of the analog circuit, the port connection relationship of the analog circuit, and the sub-library description of the analog circuit. The module instantiation is used to create a module object of the analog circuit, and the sub-library description is used to group the modules of the analog circuit.

[0017] For example, the library description keyword is (*library="lib_name"*), which defines the start declaration of the library. The digital simulator can automatically complete the library partitioning process based on this keyword field. In one possible implementation, the digital netlist description syntax can comply with the IEEE Std 1800 protocol standard.

[0018] Module instantiation refers to creating an instance of a module in a hardware description language (HDL) to use the module in a design. In HDL, a module is an abstract unit used to represent the function and structure of a circuit and can contain elements such as inputs, outputs, internal logic, and interconnections. When a defined module needs to be used in a design, a specific instance of the module can be created by instantiating it. Module instantiation places the module definition in a design hierarchy and assigns a unique name to the instance. This instance can then be referenced and used in the design, connecting and interacting with other instances and logic.

[0019] The library description is used to divide different modules of analog circuits into different libraries, each of which represents a class or group of related modules. For example, there can be an amplifier library, a filter library, an oscillator library, and so on. The modules in each library have similar characteristics, interfaces, and usage methods. The method provided in this application provides better reusability, management, and design abstraction by grouping different modules into different libraries.

[0020] The present application provides a mixed-analog simulation method. The digital netlist in the simulation modeling file may include any one or more of module instantiation, port connection relationship, and library description of analog circuits, which can better manage circuit modules and ports and reduce the user's usage cost in mixed-analog simulation.

[0021] In combination with the first aspect, in certain implementations of the first aspect, the simulation control parameters include any one or more of process settings, temperature settings, and simulation duration.

[0022] Exemplarily, the process setting may include setting of process nodes, setting of device parameters, etc.

[0023] Temperature is an important factor affecting circuit performance. By setting the appropriate temperature, you can simulate the behavior of the circuit under actual operating conditions.

[0024] The present application provides a mixed-analog simulation method, which can improve the compatibility between mixed-analog simulation tools and reduce the cost of users in mixed-analog simulation by specifying simulation control parameters.

[0025] In combination with the first aspect, in certain implementations of the first aspect, the digital-to-analog interface conversion rules include logic value conversion rules for converting analog signals to digital signals, voltage conversion rules for converting digital signals to analog signals, conversion voltage thresholds between digital signals and analog signals, conversion time between digital signals and analog signals, output resistance values ​​for converting digital signals to analog signals, and any one or more of the scope of application of the digital-to-analog interface conversion rules.

[0026] The logic value conversion rules for analog signals to digital signals are used to specify how the continuous changes of analog signals are discretized into a series of discrete digital values. These digital values ​​are usually represented in binary form to facilitate processing and storage in digital systems.

[0027] The voltage conversion rules for digital signals to analog signals are used to specify how discrete digital signals are converted into continuous analog signals to facilitate processing and output by analog systems.

[0028] The conversion voltage thresholds between digital and analog signals include analog-to-digital conversion voltage threshold 1 and digital-to-analog conversion voltage threshold 2. The conversion voltage thresholds may also be referred to as conversion reference voltages.

[0029] The output resistance value of a digital signal converted to an analog signal includes the resistance range and resistance units. The output voltage or current of an analog signal is often affected by several factors, such as output impedance. Output impedance can be considered the equivalent resistance within the analog output terminal, which determines the output drive strength of the analog signal. Generally speaking, lower output impedance indicates higher drive efficiency.

[0030] The present application provides a mixed digital-analog simulation method, which can improve the compatibility between mixed digital-analog simulation tools and reduce the cost of users in mixed digital-analog simulation by stipulating digital-analog interface conversion rules.

[0031] In a second aspect, a mixed digital-analog simulation method is provided, which includes: obtaining mixed digital-analog simulation information, the mixed digital-analog simulation information including mixed simulation conditions, mixed simulation instructions, mixed simulation parameters and compilation interaction information, the mixed simulation conditions including setting conditions for performing mixed digital-analog simulation, the mixed simulation instructions are used to indicate the objects and simulators for performing the mixed digital-analog simulation, the mixed simulation parameters include control parameters for performing the mixed digital-analog simulation, and the compilation interaction information is used to indicate compilation rules between the digital simulator and the analog simulator; generating a mixed digital-analog simulation result of the chip based on the design information of the digital circuit of the chip, the design information of the analog circuit of the chip and the mixed digital-analog simulation information.

[0032] The present application provides a mixed-analog simulation method that can limit the interface information interaction between analog circuits and digital circuits by setting mixed-analog simulation information, improve the compatibility between mixed-analog simulation tools, and reduce the user's usage cost in mixed-analog simulation.

[0033] It should be understood that the design information of the chip includes the design information of the analog circuit and the design information of the digital circuit.

[0034] Mixed-analog simulation is a comprehensive approach used to simulate the behavior of both digital and analog circuits. It combines digital and analog simulation techniques to simulate the interaction of digital and analog signals within the same system. In mixed-analog simulation, simulation tools consider the interplay between digital and analog circuits, including how digital signals drive the analog circuits, how analog signals respond to digital circuits, and the interconnections and interfaces between the two circuits. This provides more accurate results, helping designers identify and resolve potential issues.

[0035] The simulator for performing mixed digital-analog simulation includes any one or more of a digital simulator and an analog simulator.

[0036] In combination with the second aspect, in some implementations of the second aspect, the hybrid simulation conditions include any one or more of simulation accuracy setting, multi-threading options, analog circuit compilation and simulation options, and hybrid simulation test information output.

[0037] Simulation accuracy refers to the degree of closeness or error between the simulation results and the actual behavior of the actual circuit model when simulating a circuit model. It reflects the accuracy and reliability of the simulation process.

[0038] The multithreading option includes the option to process simulation tasks in parallel using multiple threads. This allows the simulation task to be broken down into multiple subtasks and processed simultaneously on multiple processor cores or computers to speed up the simulation.

[0039] Analog circuit compilation and simulation options refer to the options and parameters that can be set during analog circuit design and simulation to control the behavior and configuration of the compilation and simulation process. These options can be adjusted based on design requirements and simulation goals to achieve the desired simulation results and performance.

[0040] Hybrid simulation test output refers to the various information and data generated and output during hybrid simulation testing. The specific method and format for outputting hybrid simulation test information depends on the simulation tool and test platform used. Generally, this information can be output and recorded in the form of graphical waveforms, reports, log files, or other data formats for subsequent analysis and evaluation.

[0041] The present application provides a mixed-analog simulation method that can limit the interface information interaction between analog circuits and digital circuits by setting mixed simulation conditions, improve the compatibility between mixed-analog simulation tools, and reduce the user's usage cost in mixed-analog simulation.

[0042] In combination with the second aspect, in some implementations of the second aspect, the hybrid simulation instruction includes any one or more of analog simulation object specification, analog simulator specification, and digital simulator specification.

[0043] The simulation object refers to the specific circuit, module, or component to be simulated and analyzed. It can be an entire electronic circuit or a submodule or component within the circuit.

[0044] The present application provides a mixed digital-analog simulation method, which can limit the process of mixed digital-analog simulation by setting mixed simulation instructions, improve the compatibility between mixed digital-analog simulation tools, and reduce the user's usage cost in mixed digital-analog simulation.

[0045] In combination with the second aspect, in certain implementations of the second aspect, the hybrid simulation parameters include using a preset analog circuit module to replace the digital circuit module, mapping rules between digital circuit ports and analog circuit ports, case matching rules for replacing component names between digital circuits and analog circuits, logic value mapping rules for the interface between the digital circuit and the analog circuit, conversion voltage threshold, conversion voltage coefficient, scope of digital-to-analog conversion rules, and any one or more of the mapping relationship between the internal resistance value of the digital signal to analog signal and the digital drive strength.

[0046] The logic value mapping rules of the interface between digital circuits and analog circuits refer to the fact that the interface between digital circuits and analog circuits usually requires logic value mapping to ensure correct signal transmission and interoperability. For example, in the mapping of digital circuits to analog circuits, a logic low level (usually represented as 0) can be mapped to a specific voltage in the analog circuit, such as 0V or a voltage close to 0V; a logic high level (usually represented as 1) can be mapped to another specific voltage in the analog circuit, such as 5V or a voltage close to 5V. In the mapping of analog circuits to digital circuits, the analog voltage can be converted into a logic value in the digital circuit through a comparator or a threshold circuit. If the analog signal exceeds the conversion voltage threshold, it is mapped to a logic high level (usually 1); if the analog signal is lower than the conversion voltage threshold, it is mapped to a logic low level (usually 0).

[0047] The conversion voltage thresholds include analog-to-digital conversion voltage threshold 1 and digital-to-analog conversion voltage threshold 2. The conversion voltage thresholds may also be referred to as conversion reference voltages.

[0048] The conversion voltage coefficient is a scaling factor used when converting an analog signal to a digital signal, or vice versa. During the digital-to-analog conversion process, you can use the target signal voltage as the reference voltage and multiply the reference voltage by the conversion voltage coefficient to set the conversion voltage threshold. This is a more efficient way to set the conversion voltage threshold, rather than specifying a specific threshold.

[0049] The scope of digital-to-analog conversion rules includes the scope of any one or more of the following: using preset analog circuit modules to replace digital circuit modules, mapping rules between digital circuit ports and analog circuit ports, case matching rules for component name replacement between digital circuits and analog circuits, and logical value mapping rules for the interface between the digital circuit and the analog circuit.

[0050] The mapping relationship between the internal resistance value and digital drive strength when converting digital signals to analog signals refers to the relationship between the internal resistance value of the driver circuit and the digital drive strength when the digital signal is converted to an analog signal through the driver circuit. The internal resistance value of the driver circuit refers to the resistance value of the driver circuit's output port. It can affect the output current and voltage of the digital-to-analog conversion. Lower internal resistance values ​​provide stronger current driving capability, while higher internal resistance values ​​limit the output current capability. Digital drive strength refers to the strength value defined in SystemVerilog for the driving source of a digital signal. When a digital signal has multiple driving sources, the driving source with the strongest driving strength drives the target digital signal. This mapping relationship refers to the relationship between the internal resistance value of the driver circuit and the digital drive strength. In other words, by selecting the appropriate internal resistance value of the driver circuit, the drive strength when converting digital signals to analog signals can be controlled.

[0051] The present application provides a mixed-analog simulation method that can limit the mixed-analog simulation process by setting mixed simulation parameters, improve the compatibility between mixed-analog simulation tools, and reduce the user's usage cost in mixed-analog simulation.

[0052] In combination with the second aspect, in certain implementations of the second aspect, the compiled interaction information includes any one or more of the instantiation hierarchy information of the analog circuit module in the chip design, the instantiation hierarchy information inside the analog circuit module, and the circuit port information format.

[0053] The instantiation hierarchy information of a chip design typically contains multiple levels, from high-level system-level descriptions to low-level module-level descriptions. The instantiation hierarchy information of an analog circuit module in a chip design refers to the location or number of layers within these multiple levels.

[0054] The instantiation hierarchy information within the analog circuit module includes the hierarchy structure within the submodule of the analog circuit. The analog circuit module may contain multiple levels of submodules, from lower-level functional units to higher-level composite components.

[0055] The circuit port information format includes information formats and description rules such as port naming, port direction, and port type.

[0056] The present application provides a mixed-analog simulation method that can limit the process of mixed-analog simulation by setting compilation interaction information, improve the compatibility between mixed-analog simulation tools, and reduce the user's usage cost in mixed-analog simulation.

[0057] In combination with the second aspect, in certain implementations of the second aspect, generating a digital-analog mixed simulation result of the chip based on the design information of the digital circuit of the chip, the design information of the analog circuit of the chip and the digital-analog mixed simulation information includes: performing digital circuit simulation according to the design information of the digital circuit, the design information of the analog circuit and the digital-analog mixed simulation information to generate a digital simulation result; performing analog circuit simulation according to the design information of the digital circuit, the design information of the analog circuit and the digital-analog mixed simulation information to generate an analog simulation result; wherein the digital-analog mixed simulation result includes the analog simulation result and the digital simulation result.

[0058] The digital simulator simulates the digital circuit based on the digital circuit design information, the analog circuit design information, and the mixed-analog / digital simulation information to generate digital simulation results. The analog simulator simulates the analog circuit based on the digital circuit design information, the analog circuit design information, and the mixed-analog / digital simulation information to generate analog simulation results.

[0059] The present application provides a mixed-analog simulation method that can limit the interface information interaction between analog circuits and digital circuits by setting mixed-analog simulation information, improve the compatibility between mixed-analog simulation tools, and reduce the user's usage cost in mixed-analog simulation.

[0060] According to a third aspect, a computer device is provided, which includes: a processing module for generating a simulation modeling file based on the design information of the analog circuit of the chip, the simulation modeling file including a digital netlist, a device library configuration, a device mapping configuration, simulation control parameters, simulation signal variables and digital-to-analog interface conversion rules, the digital netlist including a netlist obtained by digitally modeling the analog circuit, the device library configuration for defining multiple device library configurations for digitally modeling the analog circuit, the device mapping configuration for defining a mapping relationship between the modules of the analog circuit and the multiple device libraries, the simulation control parameters including control parameters for performing digital-to-analog mixed simulation, the simulation signal variables including global variables in the digital-to-analog mixed simulation, and the digital-to-analog interface conversion rules for defining conversion rules for the interface between the digital circuit and the analog circuit; a simulation module for performing digital circuit simulation based on the design information of the digital circuit of the chip and the simulation modeling file to generate a digital-to-analog mixed simulation result of the chip.

[0061] In combination with the third aspect, in certain implementations of the third aspect, the simulation modeling file further includes a file list, and the file list includes one or more description files for performing the digital modeling on the module of the analog circuit.

[0062] In combination with the third aspect, in certain implementations of the third aspect, the digital netlist includes any one or more of the module instantiation of the analog circuit, the port connection relationship of the analog circuit, and the sub-library description of the analog circuit. The module instantiation is used to create the module object of the analog circuit, and the sub-library description is used to group the modules of the analog circuit.

[0063] In combination with the third aspect, in certain implementations of the third aspect, the simulation control parameters include any one or more of process settings, temperature settings, and simulation duration.

[0064] In combination with the third aspect, in certain implementations of the third aspect, the digital-to-analog interface conversion rules include any one or more of the logic value conversion rules for converting analog signals to digital signals, the voltage conversion rules for converting digital signals to analog signals, the conversion voltage threshold between the digital signal and the analog signal, the conversion time between the digital signal and the analog signal, the output resistance value of the digital signal to the analog signal, and the scope of application of the digital-to-analog interface conversion rules.

[0065] The beneficial effects of the third aspect and any possible implementation of the third aspect correspond to the beneficial effects of the first aspect and any possible implementation of the first aspect, and will not be elaborated on here.

[0066] In a fourth aspect, a computer device is provided, which includes: an acquisition module for acquiring digital-analog mixed simulation information, the digital-analog mixed simulation information including mixed simulation conditions, mixed simulation instructions, mixed simulation parameters and compilation interaction information, the mixed simulation conditions including setting conditions for performing digital-analog mixed simulation, the mixed simulation instructions for indicating the objects and simulators for performing the digital-analog mixed simulation, the mixed simulation parameters including control parameters for performing the digital-analog mixed simulation, and the compilation interaction information for indicating compilation rules between the digital simulator and the analog simulator; a simulation module for generating a digital-analog mixed simulation result of the chip based on the design information of the digital circuit of the chip, the design information of the analog circuit of the chip and the mixed simulation information.

[0067] In combination with the fourth aspect, in certain implementations of the fourth aspect, the hybrid simulation conditions include any one or more of simulation accuracy setting, multi-threading options, analog circuit compilation and simulation options, and hybrid simulation test information output.

[0068] In combination with the fourth aspect, in certain implementations of the fourth aspect, the hybrid simulation instruction includes any one or more of analog simulation object specification, analog simulator specification, and digital simulator specification.

[0069] In combination with the fourth aspect, in certain implementations of the fourth aspect, the hybrid simulation parameters include using a preset analog circuit module to replace the digital circuit module, mapping rules between digital circuit ports and analog circuit ports, case matching rules for replacing component names between digital circuits and analog circuits, logic value mapping rules for the interface between the digital circuit and the analog circuit, conversion voltage threshold, conversion voltage coefficient, scope of digital-to-analog conversion rules, and any one or more of the mapping relationship between the internal resistance value of the digital signal to analog signal and the digital drive strength.

[0070] In combination with the fourth aspect, in certain implementations of the fourth aspect, the compiled interaction information includes any one or more of the instantiation hierarchy information of the analog circuit module in the chip design, the instantiation hierarchy information inside the analog circuit module, and the circuit port information format.

[0071] In combination with the fourth aspect, in certain implementations of the fourth aspect, the simulation module is specifically used to: perform digital circuit simulation based on the design information of the digital circuit, the design information of the analog circuit and the mixed simulation information to generate digital simulation results; perform analog circuit simulation based on the design information of the digital circuit, the design information of the analog circuit and the mixed simulation information to generate analog simulation results; wherein the digital-analog mixed simulation results include the analog simulation results and the digital simulation results.

[0072] The beneficial effects of the fourth aspect and any possible implementation of the fourth aspect correspond to the beneficial effects of the second aspect and any possible implementation of the second aspect, and will not be elaborated on here.

[0073] In a fifth aspect, an embodiment of the present application provides a computer device, which includes a processor, which is used to couple with a memory, read and execute instructions and / or program codes in the memory to execute the first aspect or any possible implementation of the first aspect.

[0074] In a sixth aspect, an embodiment of the present application provides a computer device, which includes a processor, which is used to couple with a memory, read and execute instructions and / or program codes in the memory to execute the second aspect or any possible implementation of the second aspect.

[0075] In the seventh aspect, an embodiment of the present application provides a computer-readable storage medium, which stores program code. When the computer storage medium runs on a computer, it enables the computer to execute the first aspect or any possible implementation of the first aspect.

[0076] In an eighth aspect, an embodiment of the present application provides a computer-readable storage medium, which stores program code. When the computer storage medium runs on a computer, it enables the computer to execute the second aspect or any possible implementation of the second aspect.

[0077] In a ninth aspect, an embodiment of the present application provides a computer program product, which includes: a computer program code, which, when running on a computer, enables the computer to execute the first aspect or any possible implementation of the first aspect.

[0078] In a tenth aspect, an embodiment of the present application provides a computer program product, which includes: a computer program code, which, when running on a computer, enables the computer to execute the second aspect or any possible implementation of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0079] Figure 1 This is a schematic diagram of a mixed analog-digital simulation scenario for analog circuit modeling provided in an embodiment of the present application.

[0080] Figure 2 It is a schematic diagram of a digital-analog hybrid simulation scenario with digital design at the top and analog design at the bottom.

[0081] Figure 3 It is a schematic diagram of a mixed analog and digital simulation scenario with analog design at the top and digital design at the bottom.

[0082] Figure 4 This is an exemplary flow chart of a digital-analog hybrid simulation method provided in an embodiment of the present application.

[0083] Figure 5 This is an exemplary flow chart of another digital-analog hybrid simulation method provided in an embodiment of the present application.

[0084] Figure 6 This is an exemplary flowchart of an embodiment of the present application for completing digital-analog hybrid simulation using analog circuit modeling.

[0085] Figure 7 This is an exemplary flowchart provided in an embodiment of the present application for completing digital-analog hybrid simulation using non-analog circuit modeling.

[0086] Figure 8 This is a structural example diagram of a computer device provided in an embodiment of the present application.

[0087] Figure 9 This is a structural example diagram of another computer device provided in an embodiment of the present application.

[0088] Figure 10 This is a structural example diagram of another computer device provided in an embodiment of the present application.

[0089] Figure 11 This is an example diagram of a computer program product provided in an embodiment of the present application. DETAILED DESCRIPTION

[0090] The technical solutions in the embodiments of the present application will be described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making any creative efforts should fall within the scope of protection of this application.

[0091] In the embodiments of this application, words such as "exemplary" and "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" should not be construed as preferred or advantageous over other embodiments or designs. Rather, the use of the word "exemplary" is intended to present concepts in a concrete way.

[0092] The business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field will know that with the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0093] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in yet other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0094] In this application, "at least one" means one or more, and "more" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: including the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, c can be single or multiple.

[0095] To facilitate understanding of the embodiments of the present application, some definitions involved in the present application are first briefly explained.

[0096] 1. Electronic design automation (EDA): refers to the design method that uses computer-aided design software to complete the functional design, synthesis, verification, physical design (including layout, routing, layout, design rule checking, etc.) of very large-scale integrated circuit chips.

[0097] 2. Simulation Program with Integrated Circuit Emphasis (SPICE): A language and simulator software used for circuit description and simulation. It is used to verify the integrity of circuit connections and functionality, and to predict circuit behavior. It is often used as a standard for analog circuits and transistor-level circuit descriptions.

[0098] 3. Real number model (RNM): This uses real numbers to represent and process quantized continuous values, such as voltage, current, speed, and temperature. Real number modeling of analog circuits can be performed using real / wreal variables.

[0099] 4. Real / wired real (real / wreal) variables: Data types used in hardware description languages ​​(HDLs) to represent continuous real values ​​in digital circuits. This data type is commonly used for modeling and processing analog signals, as well as for describing and manipulating real values ​​in digital signal processing (DSP) and mixed-signal systems.

[0100] 5. Register transfer level (RTL): describes the behavior of the circuit by describing the logical functions between registers.

[0101] 6. Analog to digital (A2D): The interface that converts the analog output to the digital output in the analog-to-digital interface.

[0102] 7. Digital to analog (D2A): The interface that converts the digital output of a digital-to-analog interface to the analog output.

[0103] 8. Verification procedural interface (VPI): Verification procedural interface specified by IEEE Std 1800 protocol.

[0104] 9. Digital-analog chip: A digital-analog chip refers to an integrated circuit chip that integrates analog circuit and digital circuit processing. The chip has both analog signal processing parts and digital circuits to complete the required structures and algorithms, etc., ultimately realizing complex signal processing and control systems.

[0105] 10. Kirchhoff's current law (KCL): The sum of the currents flowing into a node in a circuit is equal to the sum of the currents flowing out of it.

[0106] 11. Kirchhoff's voltage law (KVL): The algebraic sum of the potential differences (voltages) across all elements in a closed loop is equal to zero.

[0107] Industry surveys show that among all the reasons for respinning analog-to-digital chips, the four largest are: incorrect analog-to-digital interface wiring, analog circuit functional errors, logic functional errors, and functional errors between the digital and analog interfaces. Chip respins caused by analog-to-digital interface functional issues often result in significant cost and delay product launches. These chip issues can be identified early through EDA verification. Mixed-analog simulation can uncover issues with analog-to-digital chip functionality and coordination, and even internal functional implementation errors in analog and digital circuits, thus avoiding chip respins. Mixed-analog simulation accounts for a high percentage of the problems discovered, demonstrating the importance of mixed-analog simulation in chip verification.

[0108] However, in current mixed-analog simulation, there is a lack of clear docking methods between analog development tools, analog simulators, digital simulators and other tools, resulting in the independence and incompatibility of tools from various manufacturers, which brings great costs and challenges to mixed-analog simulation that requires multiple tools to work together.

[0109] Figure 1 This is a schematic diagram of a mixed analog-digital simulation scenario for analog circuit modeling provided in an embodiment of the present application.

[0110] In this application scenario, analog circuits are converted to digital circuits through digital modeling, and digital simulation is uniformly performed by a digital simulator. Digital designs can be described using languages ​​such as Verilog and Very High-Speed ​​Hardware Description Language (VHDL), while analog designs can be handled using tools such as RNM.

[0111] For the hybrid simulation scenario of analog circuit modeling, this application provides a complete SystemVerilog RNM modeling solution standard, including digital netlist, device library configuration, device mapping configuration, simulation control parameters, simulation signal variables and digital-to-analog interface conversion rules.

[0112] Figure 2 and Figure 3Schematic diagram of a hybrid simulation scenario of non-analog circuit modeling provided by an embodiment of the present application. In this application scenario, analog circuits are simulated by analog simulators, and digital circuits are simulated by digital simulators.

[0113] in, Figure 2 This diagram illustrates a mixed-analog simulation scenario, with digital design at the top and analog design at the bottom. Digital design can be described using languages ​​like Verilog and VHDL, while analog design can be handled using netlists in formats like SPICE, Spectre, and ELDO.

[0114] Figure 3 This diagram illustrates a mixed-analog simulation scenario, with analog design at the top and digital design at the bottom. Digital design can be described using languages ​​like Verilog and VHDL, while analog design can be handled using netlists in formats like SPICE, Spectre, and ELDO.

[0115] For the hybrid simulation scenario of non-analog circuit modeling, this application provides a collaborative simulation interaction interface standard between a digital simulator and an analog simulator, including hybrid simulation conditions, hybrid simulation instructions, hybrid simulation parameters, and compilation interaction information.

[0116] Figure 4 This is an exemplary flow chart of a digital-analog hybrid simulation method provided in an embodiment of the present application. Figure 1 In the scenario shown, the analog circuit is converted into a digital circuit through digital modeling, and the digital simulation is uniformly completed by a digital simulator.

[0117] 410 , generating a simulation modeling file according to the design information of the analog circuit of the chip.

[0118] Chip design information includes both analog and digital circuit design information. Analog development tools use digital modeling to generate simulation modeling files based on the chip's analog circuit design information. These files include a digital netlist, device library configuration, device mapping configuration, simulation control parameters, simulation signal variables, and digital-to-analog interface conversion rules. Optionally, they may also include a file list.

[0119] The digital netlist includes a netlist obtained by digitally modeling an analog circuit. The device library configuration is used to define multiple device library configurations for digitally modeling an analog circuit. The device mapping configuration is used to define the mapping relationship between analog circuit modules and multiple device libraries. Simulation control parameters include control parameters for performing mixed-analog simulation. Simulation signal variables include global variables in mixed-analog simulation. Digital-analog interface conversion rules are used to define conversion rules for the interface between digital circuits and analog circuits. The file list includes one or more description files for digitally modeling analog circuit modules.

[0120] 420, generate digital-analog mixed simulation results of the chip.

[0121] Digital circuit simulation is performed based on the design information and simulation modeling files of the chip's digital circuit to generate the chip's digital-analog mixed simulation results.

[0122] Figure 5 This is an exemplary flow chart of another digital-analog hybrid simulation method provided by the embodiment of the present application. Figure 2 or Figure 3 In the scenario shown, the analog circuit is simulated by an analog simulator, and the digital circuit is simulated by a digital simulator.

[0123] 510, obtaining digital-analog hybrid simulation information.

[0124] The mixed-analog simulation information includes mixed-simulation conditions, mixed-simulation instructions, mixed-simulation parameters, and compilation interaction information. The mixed-simulation conditions include the setup conditions for performing mixed-analog simulation, the mixed-simulation instructions indicate the objects and simulators for performing mixed-analog simulation, the mixed-simulation parameters include the control parameters for performing mixed-analog simulation, and the compilation interaction information indicates the compilation rules between the digital simulator and the analog simulator.

[0125] The simulator for performing mixed digital-analog simulation includes any one or more of a digital simulator and an analog simulator.

[0126] 520, generate digital-analog mixed simulation results of the chip.

[0127] The design information of the chip includes the design information of the analog circuit and the design information of the digital circuit.

[0128] Generate a digital-analog mixed simulation result for the chip based on the chip's digital circuit design information, the chip's analog circuit design information, and the mixed simulation information. For example, digital circuit simulation can be performed based on the digital circuit design information, the analog circuit design information, and the mixed simulation information to generate a digital simulation result. Simultaneously, analog circuit simulation can be performed based on the digital circuit design information, the analog circuit design information, and the mixed simulation information to generate an analog simulation result. The digital-analog mixed simulation result includes both an analog simulation result and a digital simulation result.

[0129] Figure 6 This is an exemplary flowchart of an embodiment of the present application for completing digital-analog hybrid simulation using analog circuit modeling.

[0130] 611, digital modeling.

[0131] The analog circuit design information of the chip is obtained, and digital modeling is performed based on the analog circuit design information, wherein the digital modeling can convert the analog circuit design information into design information in the digital domain.

[0132] The embodiments of the present application can use SystemVerilog syntax for digital modeling. The SystemVerilog language supports real-type data operations. At the same time, SystemVerilog syntax supports flexible library specification, redirection, and nested expressions, supporting the integration and reuse of complex analog and digital circuits. The embodiments of the present application can use SystemVerilog extended syntax for port transmission. SystemVerilog extended syntax also supports real-type data operations. The combination of the two supports analog circuit KVL / KCL.

[0133] 612, generating a model file.

[0134] The embodiment of the present application can perform digital modeling on different modules of the analog circuit design and generate corresponding digital model files, such as model1.sv, model2.sv, and model3.sv.

[0135] 613, perform circuit model unit verification.

[0136] Optionally, the embodiment of the present application may also perform circuit model unit verification on the digital model file to ensure the accuracy of converting the analog signal into the digital signal.

[0137] 614,Circuit Model Integration.

[0138] Circuit model integration generates simulation modeling files, which include a digital netlist, device library configuration, device mapping configuration, simulation control parameters, simulation signal variables, and digital-to-analog interface conversion rules. Optionally, they can also include a file list. Table 1 describes the meaning of the simulation modeling files.

[0139] Table 1

[0140] name source meaning Digital Netlist Analog output Netlist obtained by digital modeling of analog circuits Device library configuration Analog output Define multiple device library configurations for digitally modeling analog circuits Device Mapping Configuration Analog output Define the mapping relationship between analog circuit modules and multiple device libraries Simulation control parameters Analog output Control parameters for mixed-analog simulation Simulation signal variables Analog output Global variables in mixed-analog simulation Digital-to-analog interface conversion rules Analog output Define conversion rules for interfaces between digital and analog circuits File list Analog output One or more description files that digitally model the modules of an analog circuit

[0141] (1) Digital netlist:

[0142] A digital netlist is a netlist obtained by digitally modeling an analog circuit. The digital netlist may include any one or more of the module instantiation of the analog circuit, the port connection relationship of the analog circuit, and the library description of the analog circuit. Among them, the analog circuit module instantiation is used to create a module object of the analog circuit. The library description is used to group the modules of the analog circuit. Exemplarily, the library description keyword is (*library="lib_name"*), which is used to define the start declaration of the library. The digital simulator can automatically complete the library processing based on this keyword field. In one possible implementation, the digital netlist description syntax can follow the IEEE Std1800 protocol standard.

[0143] Digital modeling is used to convert analog circuit design information into digital domain design information. For example, analog development tools can use digital modeling to convert analog circuit design information into digital domain design information, including but not limited to converting analog signals into digital signals and related configuration information for the conversion process.

[0144] Module instantiation refers to creating an instance of a module in a hardware description language (HDL) to use the module in a design. In HDL, a module is an abstract unit used to represent the function and structure of a circuit and can contain elements such as inputs, outputs, internal logic, and interconnections. When a defined module needs to be used in a design, a specific instance of the module can be created by instantiating it. Module instantiation places the module definition in a design hierarchy and assigns a unique name to the instance. This instance can then be referenced and used in the design, connecting and interacting with other instances and logic.

[0145] The library description is used to divide different modules of analog circuits into different libraries, each of which represents a class or group of related modules. For example, there can be an amplifier library, a filter library, an oscillator library, and so on. The modules in each library have similar characteristics, interfaces, and usage methods. The method provided in this application provides better reusability, management, and design abstraction by grouping different modules into different libraries.

[0146] (2) Device library configuration:

[0147] The device library configuration includes the declaration of the device library for digital modeling, and the device library declaration includes the naming of the device library divided in the digital modeling. In a possible implementation, the rules of the device library configuration can follow the IEEE Std 1800 protocol standard.

[0148] A device library is a collection of electronic component models used in chip design and simulation. A device library typically contains various device models, such as transistors, resistors, capacitors, inductors, amplifiers, logic gates, and their variants and parameterized models.

[0149] (3) Device mapping configuration:

[0150] Analog circuit design often encounters module duplication, leading to one-to-many mapping issues during module instantiation. Therefore, through device mapping configuration, all modules that need to be mapped to a device library can be specified. Modules with multiple name conflicts can then be bound to the corresponding device library as required, ultimately completing the mapping of analog circuit modules to the device library. Furthermore, this configuration binding supports nested configurations, enabling nested and reused configurations. In one possible implementation, the device mapping configuration rules can adhere to the IEEE Std 1800 protocol standard.

[0151] (4) Simulation control parameters:

[0152] Simulation control parameters include those for mixed-analog and digital simulations, including, but not limited to, process settings, temperature settings, and simulation duration. Temperature is a significant factor affecting circuit performance. By setting the appropriate temperature, you can simulate circuit behavior under actual operating conditions.

[0153] Exemplarily, the process setting may include setting of process nodes, setting of device parameters, etc.

[0154] (5)Simulation signal variables:

[0155] Simulation signal variables are used to declare and define global variables, such as global variables used in hybrid simulation.

[0156] Global variables are variables defined in a program with global scope. They can be accessed and used from anywhere in the program, not limited to a specific function or code block.

[0157] (6) Digital-to-analog interface conversion rules:

[0158] In mixed-analog simulation, signals are directly transferred between the digital and analog domains. Digital-analog interface conversion rules include, but are not limited to, analog-to-digital logic value (0 / 1 / x / z) conversion rules, digital-to-analog voltage conversion rules, digital-to-analog conversion voltage thresholds, digital-to-analog conversion times, digital-to-analog output resistance values, and the scope of the digital-to-analog interface conversion rules. The scope of the digital-to-analog interface conversion rules can be global, module-specific, and / or instance-specific.

[0159] The logic value conversion rules for analog signals to digital signals are used to specify how the continuous changes of analog signals are discretized into a series of discrete digital values. These digital values ​​are usually represented in binary form to facilitate processing and storage in digital systems.

[0160] The voltage conversion rules for digital signals to analog signals are used to specify how discrete digital signals are converted into continuous analog signals to facilitate processing and output by analog systems.

[0161] The conversion voltage thresholds between digital and analog signals include analog-to-digital conversion voltage threshold 1 and digital-to-analog conversion voltage threshold 2. The conversion voltage thresholds may also be referred to as conversion reference voltages.

[0162] The output resistance value of a digital signal converted to an analog signal includes the resistance range and resistance units. The output voltage or current of an analog signal is often affected by several factors, such as output impedance. Output impedance can be considered the equivalent resistance within the analog output terminal, which determines the output drive strength of the analog signal. Generally speaking, lower output impedance indicates higher drive efficiency.

[0163] (7) File list:

[0164] The file list includes one or more description files for digitally modeling modules of an analog circuit, and the file list is read by a digital simulator. In a possible implementation, each modeling file (.v / .sv) circuit description complies with the IEEE Std 1800 protocol standard.

[0165] 615, digital modules and analog model assembly.

[0166] The chip includes analog circuit design and digital circuit design. The analog circuit design is converted into an analog model in the digital domain (digital netlist) through digital modeling, and assembled with the chip's original digital modules or verified digital modules to obtain a simulation object. At the same time, a simulation test platform (TestBench) is constructed to facilitate subsequent digital simulation testing.

[0167] 616, digital simulation.

[0168] The digital simulator performs digital circuit simulation and simulation debugging on the assembled simulation object through device library configuration, device mapping configuration, simulation control parameters, simulation signal variables and digital-to-analog interface conversion rules. Optionally, it can also use file lists to obtain the final digital-to-analog mixed simulation results.

[0169] The embodiment of the present application can complete the digital modeling of analog circuits based on SystemVerilog. It can support the digital simulator to independently complete the digital-analog mixed simulation under the premise of meeting the simulation accuracy requirements of the analog part, thus solving the performance bottleneck of the analog netlist simulation of analog circuits in the prior art, reducing the amount of computation required for the digital-analog mixed simulation, and improving the speed of circuit simulation. At the same time, the digital modeling of analog circuits is completed based on SystemVerilog, which reduces the cost for users to learn analog syntax such as Verilog-AMS and Verilog-A, improves the efficiency of digital modeling of digital-analog mixed simulation, fully utilizes the flexibility of SystemVerilog syntax, supports increasingly complex digital-analog chip integration applications, and efficient reuse of circuits. At the same time, it supports the application of a variety of digital circuit verification methods to digital-analog mixed simulation, thereby improving chip verification efficiency.

[0170] Figure 7 This is an exemplary flowchart provided in an embodiment of the present application for completing digital-analog hybrid simulation using non-analog circuit modeling.

[0171] In this embodiment, the analog and digital simulators coordinate digital simulation control and signal data exchange via SystemVerilog's VPI functions. Table 2 shows some of the VPI functions, which are supported by both the digital and analog simulators. VPI function behavior can refer to the IEEE Std 1800 protocol.

[0172] Table 2

[0173] Serial number VPI Function Function behavior 1 vpi_register_cb Returns a handle to the callback object being registered. 2 vpi_register_systf Returns the callback object handle of a user-defined system task or function. 3 vpi_handle_by_name Returns a handle to the object identified by a specific name. 4 vpi_handle_by_index Returns a handle that references an object in an ordered one-to-many relationship using an index. 5 vpi_handle Returns a handle that points to the object in a one-to-one relationship. 6 vpi_iterate Returns a handle to an iterator object used to scan a one-to-many relationship. 7 vpi_scan Use an iterator object to return handles to the objects in a one-to-many relationship. 8 vpi_get Used to get the integer or Boolean property value of an object in the Verilog simulation environment. 9 vpi_get_str Used to get the string property value of an object in the Verilog simulation environment. 10 vpi_get_value Used to obtain the analog value of an object in the Verilog simulation environment. 11 vpi_put_value Returns a handle to the scheduled event object. 12 vpi_get_time Read the current simulation time. 13 vpi_printf Writes a limited number of parameters to the simulator output channels and the log file. 14 vpi_compare_objects Checks whether two handles refer to the same object. 15 vpi_chk_error Gets the error status and error information of the last call to a VPI routine. 16 vpi_get_vlog_info Retrieves data about tool invocation options. 17 vpi_control Control simulation execution (such as stop, end).

[0174] The embodiment of the present application adopts the VPI of the IEEE Std 1800 protocol for digital-analog collaborative simulation control, forms a docking standard between different simulators, and improves the compatibility between different simulation tools.

[0175] 710 , performing analog circuit simulation based on the digital circuit design information, the analog circuit design information, and the digital-analog hybrid simulation information to generate an analog simulation result.

[0176] The mixed-analog simulation information includes mixed-simulation conditions, mixed-simulation instructions, mixed-simulation parameters, and compilation interaction information. The mixed-simulation conditions include the setup conditions for performing mixed-analog simulation, the mixed-simulation instructions indicate the objects and simulators for performing mixed-analog simulation, the mixed-simulation parameters include the control parameters for performing mixed-analog simulation, and the compilation interaction information indicates the compilation rules between the digital simulator and the analog simulator.

[0177] The hybrid simulation conditions include any one or more of simulation accuracy setting, multi-threading option, analog circuit compilation and simulation option, and hybrid simulation test information output.

[0178] Simulation accuracy refers to the degree of closeness or error between the simulation results and the actual behavior of the actual circuit model when simulating a circuit model. It reflects the accuracy and reliability of the simulation process.

[0179] The multithreading option includes the option to process simulation tasks in parallel using multiple threads. This allows the simulation task to be broken down into multiple subtasks and processed simultaneously on multiple processor cores or computers to speed up the simulation.

[0180] Analog circuit compilation and simulation options refer to the options and parameters that can be set during analog circuit design and simulation to control the behavior and configuration of the compilation and simulation process. These options can be adjusted based on design requirements and simulation goals to achieve the desired simulation results and performance.

[0181] Hybrid simulation test output refers to the various information and data generated and output during hybrid simulation testing. The specific method and format for outputting hybrid simulation test information depends on the simulation tool and test platform used. Generally, this information can be output and recorded in the form of graphical waveforms, reports, log files, or other data formats for subsequent analysis and evaluation.

[0182] Hybrid simulation instructions include specifying one or more of an analog simulation object, an analog simulator, or a digital simulator. An analog simulation object refers to the specific circuit, module, or component to be simulated. It can be an entire electronic circuit or a submodule or component within a circuit.

[0183] The hybrid simulation parameters include replacing digital circuit modules with preset analog circuit modules, mapping rules between digital circuit ports and analog circuit ports, case matching rules for component name replacement between digital circuits and analog circuits, logic value mapping rules for interfaces between digital circuits and analog circuits, conversion voltage thresholds, conversion voltage coefficients, the scope of digital-to-analog conversion rules, and any one or more of the mapping relationship between the internal resistance value of digital signals converted to analog signals and the digital drive strength.

[0184] The logic value mapping rules of the interface between digital circuits and analog circuits refer to the fact that the interface between digital circuits and analog circuits usually requires logic value mapping to ensure correct signal transmission and interoperability. For example, in the mapping of digital circuits to analog circuits, a logic low level (usually represented as 0) can be mapped to a specific voltage in the analog circuit, such as 0V or a voltage close to 0V; a logic high level (usually represented as 1) can be mapped to another specific voltage in the analog circuit, such as 5V or a voltage close to 5V. In the mapping of analog circuits to digital circuits, the analog voltage can be converted into a logic value in the digital circuit through a comparator or a threshold circuit. If the analog signal exceeds the conversion voltage threshold, it is mapped to a logic high level (usually 1); if the analog signal is lower than the conversion voltage threshold, it is mapped to a logic low level (usually 0).

[0185] The conversion voltage thresholds include analog-to-digital conversion voltage threshold 1 and digital-to-analog conversion voltage threshold 2. The conversion voltage thresholds may also be referred to as conversion reference voltages.

[0186] The conversion voltage coefficient is a scaling factor used when converting an analog signal to a digital signal, or vice versa. During the digital-to-analog conversion process, you can use the target signal voltage as the reference voltage and multiply the reference voltage by the conversion voltage coefficient to set the conversion voltage threshold. This is a more efficient way to set the conversion voltage threshold, rather than specifying a specific threshold.

[0187] The scope of digital-to-analog conversion rules includes the scope of any one or more of the following: using preset analog circuit modules to replace digital circuit modules, mapping rules between digital circuit ports and analog circuit ports, case matching rules for component name replacement between digital circuits and analog circuits, and logical value mapping rules for the interface between the digital circuit and the analog circuit.

[0188] The compilation interaction information includes any one or more of the instantiation level information of the analog circuit module in the chip design, the instantiation level information inside the analog circuit module, and the circuit port information format.

[0189] The instantiation hierarchy information of a chip design typically contains multiple levels, from high-level system-level descriptions to low-level module-level descriptions. The instantiation hierarchy information of an analog circuit module in a chip design refers to the location or number of layers within these multiple levels.

[0190] The instantiation hierarchy information within the analog circuit module includes the hierarchy structure within the submodule of the analog circuit. The analog circuit module may contain multiple levels of submodules, from lower-level functional units to higher-level composite components.

[0191] The circuit port information format includes information formats and description rules such as port naming, port direction, and port type.

[0192] The analog simulator can perform analog circuit simulation based on digital circuit design information, analog circuit design information and digital-analog mixed simulation information to generate analog simulation results.

[0193] 720 , perform digital circuit simulation based on the digital circuit design information, the analog circuit design information, and the digital-analog hybrid simulation information to generate a digital simulation result.

[0194] The digital simulator simulates the digital circuit based on the digital circuit design information, the analog circuit design information, and the mixed-analog simulation information to generate a digital simulation result, wherein the mixed-analog simulation result includes the analog simulation result obtained in step 710 and the digital simulation result obtained in step 720.

[0195] The embodiment of the present application provides VPI-controlled digital-analog co-simulation based on the IEEE Std 1800 protocol, as well as a complete set of control processes and commands. This enables digital simulators and analog simulators to support low-cost digital-analog hybrid simulation, with a standardized control interface and complete functionality. Compared to the prior art, the digital-analog hybrid simulation method provided by this application uses the more widely used SystemVerilog syntax. SystemVerilog is now the mainstream language for digital circuits and verification, with a more flexible syntax, which introduces a richer set of verification convergence methods for digital-analog hybrid simulation.

[0196] The above describes the digital-analog hybrid simulation method according to the embodiment of the present application. Figure 8 、 Figure 9 and Figure 10 The apparatus and device according to the embodiments of the present application are described.

[0197] The embodiment of the present application further provides a computer storage medium in which program instructions are stored. When the program instructions are executed, the following may be included: Figures 4 to 7 Part or all of the steps of the digital-analog hybrid simulation method in the corresponding embodiment.

[0198] Figure 8 This is a diagram illustrating a structure of a computer device 800 provided in an embodiment of the present application. The computer device 800 includes a processing module 810 and a simulation module 820. The processing module 810 and the simulation module 820 can be implemented in software, hardware, or a combination of both.

[0199] The processing module 810 is used to generate a simulation modeling file based on the design information of the analog circuit of the chip to execute Figure 4 410 in the method, Figure 6 611 to 614 of the Methods.

[0200] The simulation module 820 is used to simulate the digital circuit according to the design information of the digital circuit of the chip and the simulation modeling file, generate the digital-analog mixed simulation results of the chip, and execute Figure 4 420 in the method, Figure 6 615 and 616 in Methods.

[0201] Figure 9 This is a diagram illustrating a structure of a computer device 900 provided in an embodiment of the present application. The computer device 900 includes an acquisition module 910 and a simulation module 920. The acquisition module 910 and the simulation module 920 can be implemented in software, hardware, or a combination of both.

[0202] The acquisition module 910 is used to obtain the mixed simulation information to perform Figure 5 510 in the method, Figure 7 710 and 720 in the method.

[0203] The simulation module 920 is used to generate a digital-analog mixed simulation result of the chip based on the design information of the digital circuit of the chip, the design information of the analog circuit of the chip and the digital-analog mixed simulation information, and execute Figure 5 520 in the method, Figure 7 710 and 720 in the method.

[0204] Figure 10 This is a diagram illustrating another structure of a computer apparatus 1000 provided in an embodiment of the present application. The computer apparatus 1000 includes a processor 1002, a communication interface 1003, and a memory 1004. An example of the computer apparatus 1000 is a computing device.

[0205] The methods disclosed in the above embodiments of the present application can be applied to or implemented by processor 1002. Processor 1002 can be a central processing unit (CPU), or other general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc. The general-purpose processor can be a microprocessor or any conventional processor. During implementation, each step of the above method can be performed by hardware integrated logic circuits or software instructions in processor 1002. The methods, steps, and logic block diagrams disclosed in the embodiments of the present application can be implemented or executed. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of the present application can be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor.

[0206] The memory 1004 may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. The non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DRRAM). It should be noted that the memory of the methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0207] The processor 1002, the memory 1004 and the communication interface 1003 can communicate with each other via a bus. The memory 1004 stores executable code, and the processor 1002 reads the executable code in the memory 1004 to execute the corresponding method. The memory 1004 may also include an operating system and other software modules required for running processes. The operating system may be LINUX TM , UNIX TM , WINDOWS TM wait.

[0208] For example, the executable code in memory 1004 is used to implement Figures 4 to 7 The method shown, the processor 1002 reads the executable code in the memory 1004 to execute Figures 4 to 7 The method shown.

[0209] In some embodiments of the present application, the disclosed methods may be implemented as computer program instructions encoded in a machine-readable format on a computer-readable storage medium or on other non-transitory media or articles of manufacture. Figure 11Schematically illustrates a conceptual partial view of an example computer program product, arranged in accordance with at least some embodiments presented herein, comprising a computer program for executing a computer process on a computing device. In one embodiment, the example computer program product 1400 is provided using a signal-bearing medium 1401. The signal-bearing medium 1401 may include one or more program instructions 1402 that, when executed by one or more processors, may provide the above-described instructions for executing a computer process. Figures 4 to 7 Thus, for example, reference to Figures 4 to 7 In the embodiment shown in , one or more features thereof may be borne by one or more instructions associated with the signal bearing medium 1401.

[0210] In some examples, signal-bearing medium 1401 may include computer-readable media 1403, such as, but not limited to, a hard drive, a compact disc (CD), a digital video disc (DVD), a digital tape, a memory, a read-only memory (ROM), or a random access memory (RAM), etc. In some embodiments, signal-bearing medium 1401 may include computer-recordable media 1404, such as, but not limited to, a memory, a read / write (R / W) CD, a R / W DVD, etc. In some embodiments, signal-bearing medium 1401 may include communication media 1405, such as, but not limited to, digital and / or analog communication media (e.g., fiber optic cables, waveguides, wired communication links, wireless communication links, etc.). Thus, for example, signal-bearing medium 1401 may be communicated via a wireless form of communication media 1405 (e.g., a wireless communication medium that complies with the IEEE 802.11 standard or other transmission protocols). One or more program instructions 1402 may be, for example, computer-executable instructions or logic-implemented instructions. In some examples, the aforementioned computing device can be configured to provide various operations, functions, or actions in response to one or more program instructions 1402 communicated to the computing device by computer-readable media 1403, computer-recordable media 1404, and / or communication media 1405. It should be understood that the arrangement described herein is merely for illustrative purposes. Thus, it will be understood by those skilled in the art that other arrangements and other elements (e.g., machines, interfaces, functions, sequences, and functional groups, etc.) can be used instead, and some elements can be omitted altogether according to the desired result. In addition, many of the described elements can be implemented as discrete or distributed components or in any appropriate combination and position to implement functional entities in conjunction with other components.

[0211] Those skilled in the art will appreciate that the units and method steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0212] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0213] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0214] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0215] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0216] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0217] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A digital-analog hybrid simulation method, characterized in that: include: Generate a simulation modeling file according to the design information of the analog circuit of the chip, the simulation modeling file including a digital netlist, a device library configuration, a device mapping configuration, simulation control parameters, simulation signal variables and digital-to-analog interface conversion rules, the digital netlist including a netlist obtained by digitally modeling the analog circuit, the device library configuration is used to define multiple device library configurations for digitally modeling the analog circuit, the device mapping configuration is used to define a mapping relationship between the modules of the analog circuit and the multiple device libraries, the simulation control parameters include control parameters for performing digital-to-analog mixed simulation, the simulation signal variables include global variables in the digital-to-analog mixed simulation, and the digital-to-analog interface conversion rules are used to define conversion rules for the interface between the digital circuit and the analog circuit; Digital circuit simulation is performed according to the design information of the digital circuit of the chip and the simulation modeling file to generate a digital-analog mixed simulation result of the chip.

2. The method according to claim 1, characterized in that The simulation modeling file further includes a file list, which includes one or more description files for performing the digital modeling on the module of the analog circuit.

3. The method according to claim 1 or 2, characterized in that The digital netlist includes any one or more of the module instantiation of the analog circuit, the port connection relationship of the analog circuit, and the sub-library description of the analog circuit. The module instantiation is used to create the module object of the analog circuit, and the sub-library description is used to group the modules of the analog circuit.

4. The method according to any one of claims 1 to 3, characterized in that The simulation control parameters include any one or more of process settings, temperature settings, and simulation duration.

5. The method according to any one of claims 1 to 4, characterized in that The digital-to-analog interface conversion rules include any one or more of the logic value conversion rules for converting analog signals to digital signals, the voltage conversion rules for converting digital signals to analog signals, the conversion voltage threshold between the digital signal and the analog signal, the conversion time between the digital signal and the analog signal, the output resistance value of the digital signal to the analog signal, and the scope of application of the digital-to-analog interface conversion rules.

6. A computer device, characterized in that: include: a processing module, configured to generate a simulation modeling file based on design information of an analog circuit of a chip, the simulation modeling file including a digital netlist, a device library configuration, a device mapping configuration, simulation control parameters, simulation signal variables, and digital-to-analog interface conversion rules; the digital netlist including a netlist obtained by digitally modeling the analog circuit; the device library configuration defining multiple device library configurations for digitally modeling the analog circuit; the device mapping configuration defining a mapping relationship between modules of the analog circuit and the multiple device libraries; the simulation control parameters including control parameters for performing mixed digital-analog simulation; the simulation signal variables including global variables in the mixed digital-analog simulation; and the digital-to-analog interface conversion rules defining conversion rules for an interface between a digital circuit and the analog circuit; The simulation module is used to perform digital circuit simulation based on the design information of the digital circuit of the chip and the simulation modeling file to generate a digital-analog mixed simulation result of the chip.

7. The device according to claim 6, characterized in that The simulation modeling file further includes a file list, which includes one or more description files for performing the digital modeling on the module of the analog circuit.

8. The device according to claim 6 or 7, characterized in that The digital netlist includes any one or more of the module instantiation of the analog circuit, the port connection relationship of the analog circuit, and the sub-library description of the analog circuit. The module instantiation is used to create the module object of the analog circuit, and the sub-library description is used to group the modules of the analog circuit.

9. The device according to any one of claims 6 to 8, characterized in that The simulation control parameters include any one or more of process settings, temperature settings, and simulation duration.

10. The device according to any one of claims 6 to 9, characterized in that The digital-to-analog interface conversion rules include any one or more of the logic value conversion rules for converting analog signals to digital signals, the voltage conversion rules for converting digital signals to analog signals, the conversion voltage threshold between the digital signal and the analog signal, the conversion time between the digital signal and the analog signal, the output resistance value of the digital signal to the analog signal, and the scope of application of the digital-to-analog interface conversion rules.

11. A computer device, characterized in that: include: A processor, wherein the processor is configured to be coupled to a memory, read and execute instructions and / or program codes in the memory, so as to perform the method according to any one of claims 1 to 5.

12. A computer-readable medium, characterized in that The computer-readable medium stores a computer program code, and when the computer program code is run on a computer, the computer is caused to perform the method according to any one of claims 1 to 5.

13. A computer program product, characterized in that The computer program product comprises a computer program code, which, when run on a computer, causes the computer to perform the method according to any one of claims 1 to 5.

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