Semiconductor wafer measuring method and related equipment

Abstract

The invention relates to the technical field of semiconductors, in particular to a semiconductor wafer measuring method and related equipment. A target layout of a wafer to be measured is divided into a plurality of unit areas, and each unit area comprises an initial addressing point; the initial addressing points are screened through a reference distance interval with the measuring point as the center, at least one reference addressing point is obtained, and each reference addressing point is located in the reference distance interval; determining a target addressing point based on the graph density of the unit area where each reference addressing point is located and the graph density of each unit area adjacent to the reference addressing point; and measuring the wafer to be measured based on the target addressing point and the measurement point. According to the invention, the appropriate target addressing point is efficiently and automatically grabbed, the efficiency and accuracy of wafer data measurement are improved, the labor cost is saved, the measurement period is shortened, the measurement error caused by improper selection of the addressing point is effectively avoided, and the measurement accuracy is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor wafer measurement method and related equipment. Background Art

[0002] Wafer feedback is a crucial step in the tape-out process after OPC (Optical Proximity Correction). It guides the establishment of semiconductor manufacturing process recipes and modules, and can efficiently verify the exposure / etching quality of chip graphics. By selecting measurement points on the wafer layout for measurement, it can be verified whether the wafer layout corrected for optical proximity effect is consistent with the target pattern on the mask.

[0003] With the continuous updating of semiconductor technology nodes, chips are gradually developing towards miniaturization, diversification and high integration. The key dimensions on the chip continue to decrease, and the density of graphics per unit area on the layout continues to increase. The amount of data and information that the wafer needs to feedback is larger and more complex. The number of measurement points has doubled, and their locations are random. The surrounding environment is complex and diverse, which brings challenges to the efficient and accurate positioning of the measurement points. Summary of the Invention

[0004] In order to solve the problems of the prior art, the embodiment of the present invention provides a semiconductor wafer measurement method and related equipment. The technical solution is as follows:

[0005] In one aspect, a semiconductor wafer measurement method is provided, comprising:

[0006] Obtaining a target layout of a wafer to be measured; the target layout includes measurement points;

[0007] Divide the target layout into multiple unit areas, each unit area includes an initial addressing point;

[0008] Screening multiple initial addressing points by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each reference addressing point being within the reference distance interval;

[0009] Determine the target addressing point based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point;

[0010] The wafer to be measured is measured based on the target addressing points and measurement points.

[0011] In one exemplary embodiment, the semiconductor wafer measurement method further includes:

[0012] A scanning device is used to scan the target layout; the scanning device includes a first window and a second window, the first window represents the field of view of the measurement point, and the second window represents the field of view of each initial addressing point;

[0013] A reference distance interval is determined based on the first viewing window, the second viewing window, and a maximum addressing range of the scanning device.

[0014] In an exemplary embodiment, determining a reference distance interval based on the first viewing window, the second viewing window, and a maximum addressing range of a scanning device includes:

[0015] When the first window and the second window do not overlap and their vertices coincide, determining a minimum reference distance of the reference distance interval based on a side length of the first window and a side length of the second window;

[0016] When the first window and the second window do not overlap, determining a maximum reference distance of the reference distance interval based on a maximum addressing range of the scanning device, a side length of the first window, and a side length of the second window;

[0017] Based on the minimum reference distance and the maximum reference distance, a reference distance interval is determined.

[0018] In an exemplary embodiment, determining the minimum reference distance of the reference distance interval based on the side length of the first viewing window and the side length of the second viewing window includes:

[0019] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0020] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0021] Half of the first sum is taken as the minimum reference distance of the reference distance interval.

[0022] In an exemplary embodiment, determining the maximum reference distance of the reference distance interval based on the maximum addressing range of the scanning device, the side length of the first window, and the side length of the second window includes:

[0023] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0024] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0025] The maximum reference distance of the reference distance interval is obtained by subtracting the maximum addressing range of the scanning device from half of the first sum.

[0026] In an exemplary embodiment, the target layout is divided into a plurality of unit areas, each unit area including an initial addressing point, including:

[0027] Evenly divide the target layout into multiple square unit areas, where the side length of each square unit area is the side length of the second window;

[0028] The geometric center point of each square unit area is used as the initial addressing point of the corresponding square unit area.

[0029] In an exemplary embodiment, the multiple initial addressing points are screened by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, including:

[0030] Taking the measurement point as the center, remove the initial addressing points within the circle with the minimum reference distance as the radius, and remove the initial addressing points outside the circle with the maximum reference distance as the radius;

[0031] The remaining initial addressing points are retained to obtain at least one reference addressing point.

[0032] In an exemplary embodiment, determining the target addressing point based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point includes:

[0033] For each reference addressing point, determining a statistical value of the difference between the pattern density of the unit area where the reference addressing point is located and the pattern density of each adjacent unit area;

[0034] Compare the difference statistics corresponding to each reference addressing point, and use the reference addressing point corresponding to the target difference statistics as the target addressing point.

[0035] In an exemplary embodiment, determining the statistical value of the difference between the pattern density of the unit area where the reference addressing point is located and the pattern density of each adjacent unit area includes:

[0036] Determining a first pattern density of a unit area where a reference addressing point is located and a second pattern density of each unit area adjacent to the reference addressing point; and determining a pattern density difference value between the first pattern density and each second pattern density;

[0037] A difference statistic is determined based on the pattern density difference values ​​between the first pattern density and each second pattern density.

[0038] In one exemplary embodiment, measuring a wafer to be measured based on a target addressing point and a measurement point includes:

[0039] Obtain the coordinates of the measurement point in the target layout, as well as the coordinates of the target addressing point in the target layout;

[0040] Determine the distance between the target addressing point and the measuring point based on the coordinates of the measuring point in the target layout and the coordinates of the target addressing point in the target layout;

[0041] Locate the measurement point on the wafer to be measured based on the distance between the target addressing point and the measurement point;

[0042] The measurement results are obtained based on the measurement points on the wafer to be measured.

[0043] In one exemplary embodiment, the semiconductor wafer measurement method further includes:

[0044] Obtain the lithography results of the wafer to be measured; the lithography results are obtained after correction for the optical proximity effect;

[0045] Generate graphic data system information of the wafer to be measured based on the lithography results;

[0046] The target layout is obtained from the graphic data system information of the wafer to be measured according to the preset measurement area, and the layout weaknesses are selected as measurement points according to the target measurement rules.

[0047] In another aspect, a semiconductor wafer measurement device is provided, comprising:

[0048] A layout acquisition module is used to obtain a target layout of the wafer to be measured; the target layout includes measurement points;

[0049] A graphics segmentation module is used to segment the target layout into multiple unit areas, each unit area includes an initial addressing point;

[0050] A reference addressing point selection module is used to screen multiple initial addressing points through a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each reference addressing point being located within the reference distance interval;

[0051] A target addressing point determination module, configured to determine a target addressing point based on a pattern density of a unit area where each reference addressing point is located and a pattern density of each unit area adjacent to the reference addressing point;

[0052] The measurement module is used to measure the wafer to be measured based on the target addressing point and the measurement point.

[0053] In one exemplary embodiment, the semiconductor wafer metrology apparatus further includes:

[0054] A scanning module is used to scan the target layout using a scanning device; the scanning device includes a first window and a second window, the first window represents the field of view of the measurement point, and the second window represents the field of view of each initial addressing point;

[0055] The calculation module is used to determine a reference distance interval based on the first viewing window, the second viewing window and the maximum addressing range of the scanning device.

[0056] In an exemplary embodiment, the calculation module is further configured to:

[0057] When the first window and the second window do not overlap and their vertices coincide, the minimum reference distance of the reference distance interval is determined based on the side length of the first window and the side length of the second window; when the first window and the second window do not overlap, the maximum reference distance of the reference distance interval is determined based on the maximum addressing range of the scanning device, the side length of the first window and the side length of the second window; and the reference distance interval is determined based on the minimum reference distance and the maximum reference distance.

[0058] In an exemplary embodiment, the calculation module is further configured to:

[0059] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0060] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0061] Half of the first sum is taken as the minimum reference distance of the reference distance interval.

[0062] In an exemplary embodiment, the calculation module is further configured to:

[0063] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0064] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0065] The maximum reference distance of the reference distance interval is obtained by subtracting the maximum addressing range of the scanning device from half of the first sum.

[0066] In an exemplary embodiment, the graph segmentation module is further configured to:

[0067] Evenly divide the target layout into multiple square unit areas, where the side length of each square unit area is the side length of the second window;

[0068] The geometric center point of each square unit area is used as the initial addressing point of the corresponding square unit area.

[0069] In an exemplary embodiment, the reference addressing point selection module is further configured to:

[0070] Taking the measurement point as the center, remove the initial addressing points within the circle with the minimum reference distance as the radius, and remove the initial addressing points outside the circle with the maximum reference distance as the radius;

[0071] The remaining initial addressing points are retained to obtain at least one reference addressing point.

[0072] In an exemplary embodiment, the target addressing point determination module is further configured to:

[0073] For each reference addressing point, determining a statistical value of the difference between the pattern density of the unit area where the reference addressing point is located and the pattern density of each adjacent unit area;

[0074] Compare the difference statistics corresponding to each reference addressing point, and use the reference addressing point corresponding to the target difference statistics as the target addressing point.

[0075] In an exemplary embodiment, the target addressing point determination module is further configured to:

[0076] Determining a first pattern density of a unit area where a reference addressing point is located and a second pattern density of each unit area adjacent to the reference addressing point; and determining a pattern density difference value between the first pattern density and each second pattern density;

[0077] A difference statistic is determined based on the pattern density difference values ​​between the first pattern density and each second pattern density.

[0078] In an exemplary embodiment, the measurement module is further configured to:

[0079] Obtain the coordinates of the measurement point in the target layout, as well as the coordinates of the target addressing point in the target layout;

[0080] Determine the distance between the target addressing point and the measuring point based on the coordinates of the measuring point in the target layout and the coordinates of the target addressing point in the target layout;

[0081] Locate the measurement point on the wafer to be measured based on the distance between the target addressing point and the measurement point;

[0082] The measurement results are obtained based on the measurement points on the wafer to be measured.

[0083] In an exemplary embodiment, the semiconductor wafer measurement apparatus further includes a measurement point acquisition module configured to:

[0084] Obtain the lithography results of the wafer to be measured; the lithography results are obtained after correction for the optical proximity effect;

[0085] Generate graphic data system information of the wafer to be measured based on the lithography results;

[0086] The target layout is obtained from the graphic data system information of the wafer to be measured according to the preset measurement area, and the layout weaknesses are selected as measurement points according to the target measurement rules.

[0087] In another aspect, an electronic device for semiconductor wafer measurement is provided, comprising:

[0088] memory for storing computer programs;

[0089] The processor is used to execute the program instructions stored in the memory, so that the semiconductor wafer measurement method described above is implemented when the processor executes the computer program.

[0090] On the other hand, a computer-readable storage medium is further provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the semiconductor wafer measurement method described above are implemented.

[0091] By adopting the above technical solution, the present invention can have the following beneficial effects:

[0092] The present invention divides the target layout of the wafer to be measured into multiple unit areas, each unit area including an initial addressing point; the multiple initial addressing points are screened by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each reference addressing point being located within the reference distance interval; the target addressing point is determined based on the graphic density of the unit area where each reference addressing point is located and the graphic density of each unit area adjacent to the reference addressing point. This simplifies the redundant and complicated preparatory work based on scanning device measurement, and can quickly and accurately determine the target addressing point corresponding to the measurement point. Then, wafer measurement is performed based on the distance between the measurement point and the target addressing point. This process addresses the problem of larger measurement point data and more complex surrounding environments at advanced nodes, while taking into account the requirements of measurement cycle and accuracy. It combines graphic density calculation and system sampling to achieve efficient and automated capture of appropriate target addressing points, improve the efficiency and accuracy of wafer data measurement, and is automated and simple to operate, saving labor costs, reducing measurement cycle, effectively avoiding measurement errors caused by improper target addressing point selection, and improving wafer measurement accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0093] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0094] Figure 1 A schematic diagram of a traditional addressing point selection method;

[0095] Figure 2 A schematic diagram of another traditional addressing point selection method;

[0096] Figure 3 A schematic diagram of a process flow of a semiconductor wafer measurement method provided by an embodiment of the present invention;

[0097] Figure 4a and Figure 4b A schematic diagram of a target layout segmentation method provided by an embodiment of the present invention;

[0098] Figure 5 A schematic diagram of a method for determining a reference addressing point provided by an embodiment of the present invention;

[0099] Figure 6 A schematic diagram of a method for determining a minimum reference distance and a maximum reference distance provided by an embodiment of the present invention;

[0100] Figure 7a and Figure 7b Schematic diagram of calculating the density of graphics per unit area provided by an embodiment of the present invention;

[0101] Figures 8a to 8c This is a schematic diagram comparing the measurement results of different schemes;

[0102] Figure 9 A schematic diagram of a device for running a semiconductor wafer measurement method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0103] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.

[0104] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe specific objects or a sequence. It should be understood that the numbers used in this way are interchangeable where appropriate so that the embodiments of the present invention described herein can be implemented in sequences other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or inherent to these processes, methods, products, or devices.

[0105] It should be understood that when an element or layer is referred to as being "on," "adjacent to," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent to, connected to, or coupled to the other element or layer, or there can be intervening elements or layers. Conversely, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there can be no intervening elements or layers. It should be understood that while the terms first, second, third, etc. may be used to describe various elements, components, regions, layers, and / or parts, these elements, components, regions, layers, and / or parts should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or part from another. Thus, without departing from the teachings of the present invention, a first element, component, region, layer, or part discussed below may be represented as a second element, component, region, layer, or part. Furthermore, when a second element, component, region, layer, or part is discussed, it does not necessarily mean that the first element, component, region, layer, or part is present in the present invention.

[0106] The production of semiconductor devices often involves photolithography, a process that transfers patterns. An exposure light source projects a preset pattern onto the wafer through a mask. After development, the desired pattern is formed using photoresist. The width of the resulting pattern is known as the critical dimension. Due to light diffraction and interference, the edges of the photolithographic pattern may not be fully etched, resulting in discrepancies from the target pattern on the mask. Therefore, Optical Proximity Correction (OPC) is used to correct for this exposure distortion, ensuring that the photolithographic pattern on the wafer matches the target pattern on the mask.

[0107] Wafer feedback is a crucial step in the post-OPC tape-out process, guiding the establishment of semiconductor manufacturing process recipes and modules, and efficiently verifying the exposure / etching quality of chip patterns. Measurements can be made at selected points on the wafer layout to verify that the wafer layout, after optical proximity effect correction, is consistent with the target pattern on the mask.

[0108] With the continuous advancement of semiconductor technology nodes, chips are gradually moving towards miniaturization, diversification, and high integration. Key dimensions on chips continue to decrease, while the density of patterns per unit area on the layout continues to increase. The amount of data and information required to be fed back from wafers is becoming increasingly large and complex. The multiplication of measurement points, their random locations, and the complex and diverse surrounding environments present challenges for efficient and accurate positioning of measurement points.

[0109] Observation and measurement using scanning devices, such as scanning electron microscopes (SEMs), are commonly used wafer inspection methods during OPC measurement. Addressing points (APs) are often used to assist in locating measurement points during scanning device measurement. Addressing points are typically selected as characteristic pattern nodes on the wafer layout to facilitate identification and positioning by the scanning device. The measurement frame is then positioned at the precise actual measurement location on the wafer based on the distance between the measurement point and the addressing point. Appropriate addressing points enable efficient and accurate SEM measurement.

[0110] There are two methods for setting the addressing points used for scanning device measurement: one is to manually identify and judge during the process of selecting the measurement point, and manually mark the addressing points at appropriate positions around the measurement point. Figure 1 As shown; secondly, when designing the wafer layout, highly characteristic marks are placed within a certain distance around the main pattern as preset addressing points. The preset addressing points can be captured by the script during subsequent measurement. Figure 2 shown.

[0111] However, for the first method, when the number of measurement points is large, manually marking the addressing points is extremely time-consuming and inefficient. Attention must also be paid to the measurement frame sizes of the addressing and measurement points, as well as the distance between the two measurement frames, to avoid overlap between the measurement frames of the addressing and measurement points. This is because the pattern in the overlapping area is scanned multiple times, causing the photoresist to deform, and the critical dimensions to be inaccurate and unusable. For the second method, scripts are used to capture preset feature markers as addressing points. This is both fixed and accidental. On the one hand, the markers must be unique and not affect the performance of the main pattern. On the other hand, such preset markers often do not exist in the finished packaging products used in actual applications. Therefore, a new automated judgment method is needed to select appropriate addressing points, so as to quickly and accurately locate the measurement points for wafer measurement, verify whether the wafer layout corrected for optical proximity effects is consistent with the target pattern on the mask, and improve the efficiency and accuracy of wafer data measurement.

[0112] refer to Figure 3, which shows a flow chart of a semiconductor wafer measurement method provided by an embodiment of the present invention. It should be noted that this specification provides method operation steps as described in the embodiment or flow chart, but may include more or fewer operation steps based on conventional or non-creative labor. The sequence of steps listed in the embodiment is only one way of executing the sequence of many steps and does not represent the only execution sequence. When the actual system device or product is executed, it can be executed in sequence or in parallel according to the method shown in the embodiment or the accompanying drawings (for example, a parallel processor or a multi-threaded processing environment). The conductor wafer measurement method provided by an embodiment of the present invention includes the following steps:

[0113] In step S301 , a target layout of a wafer to be measured is obtained; the target layout includes measurement points.

[0114] In a specific implementation, the wafer to be measured is a semiconductor wafer that has been corrected for the optical proximity effect, and the target layout is a photolithography layout to be measured for the wafer to be measured. In one exemplary embodiment, a portion of the pattern on the photolithography layout of the wafer to be measured is selected as the target layout; in another exemplary embodiment, the entire pattern on the photolithography layout of the wafer to be measured is selected as the target layout. Therefore, in this embodiment of the present invention, the target layout can be a portion of the photolithography layout of the wafer to be measured or the entire photolithography layout. The measurement area is determined based on the actual measurement requirements and is not limited here. The target layout includes at least one measurement point.

[0115] In an exemplary embodiment, before step S301, the semiconductor wafer measurement method may further include:

[0116] Obtain the lithography results of the wafer to be measured; the lithography results are obtained after correction for the optical proximity effect;

[0117] Generate graphic data system information of the wafer to be measured based on the lithography results;

[0118] The target layout is obtained from the graphic data system information of the wafer to be measured according to the preset measurement area, and the layout weaknesses are selected as measurement points according to the target measurement rules.

[0119] In a specific implementation, it can be seen from the above that the wafer to be measured is a semiconductor wafer that has been corrected for the optical proximity effect. Based on the lithography results of the wafer to be measured, the graphic data system information of the wafer to be measured is generated. In an embodiment of the present invention, the graphic data system refers to GDS (Geometry Data Standard), which is a back-end format for describing the wafer layout. The graphic data system information includes but is not limited to transistor size, quantity, physical position and size information, physical size and position information of connecting lines, etc. It can be understood that the graphic data system information has a corresponding relationship with the wafer to be measured, and can fully define the physical information of the wafer to be measured.

[0120] According to the preset measurement area, the target layout is obtained from the graphic data system information, and at least one measurement point is selected from the target layout according to the target measurement rules. In specific implementation, the measurement point can be selected by combining manual experience methods and target measurement rules to select layout weaknesses (usually the special layout parts that are most prone to problems in the wafer to be measured), such as graphics with relatively small lithography process windows, locations where repeated defects are prone to occur in different graphic spaces, edges or endpoints of graphic contours, etc., which are not limited here.

[0121] In this embodiment of the present invention, observation and measurement are performed using a scanning device. Prior to scanning, the GDS data of the target layout is imported into the scanning device. To select addressing points on the target layout of the wafer to be measured, so that the scanning device can identify and locate the measurement points, the following steps can be used.

[0122] In step S302 , the target layout is divided into a plurality of unit areas, each unit area including an initial addressing point.

[0123] In a specific implementation, the target layout is divided into multiple unit areas. The division method can be uniform division or uneven division. For example, in one embodiment, in order to uniformly sample, the target layout is evenly divided into multiple unit areas. The shape of the unit area can be any shape such as square, triangle, hexagon, etc. In one embodiment, in order to ensure that the sampling area can cover any area of ​​the target layout as much as possible, the target layout can be evenly divided into multiple square unit areas. The division method of the target layout into multiple unit areas and the shape of the unit area are not limited here.

[0124] For each unit area, the preset point of each unit area is used as the initial addressing point of the corresponding unit area. The preset point can be a point that is relatively easy to select and identify for each unit area. For example, in one embodiment, the geometric center point of each unit area is used as the initial addressing point of the corresponding unit area; in another embodiment, one endpoint of each unit area is used as the initial addressing point of the corresponding unit area.

[0125] In one exemplary embodiment, reference Figure 4a As shown, step S302 may include: evenly dividing the target layout into a plurality of square unit areas, and taking the geometric center point of each square unit area as the initial addressing point AP of the corresponding square unit area F (AP F1 ~AP Fn ).

[0126] In step S303, a plurality of initial addressing points are screened by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each of which is located within the reference distance interval.

[0127] In the specific implementation, this step and the steps described below are all implemented for each measurement point on the target layout. If not specifically stated, it can be understood that the measurement point is any measurement point on the target layout. The reference distance interval has a left endpoint value and a right endpoint value. The reference distance interval centered on the measurement point can be understood as a ring with the measurement point as the center, the outer diameter of the ring is the right endpoint value of the reference distance interval, and the inner diameter of the ring is the left endpoint value of the reference distance interval. For example, if the coordinates of the measurement point are (0,0), the left endpoint value and the right endpoint value of the reference distance interval are 1 and 2, then the reference distance interval centered on the measurement point is the area where the ring with (0,0) as the center, the outer diameter is 2, and the inner diameter is 1 is located.

[0128] refer to Figure 5 As shown, the reference distance interval centered on the measurement point is on the target layout. At the same time, the target layout contains multiple initial addressing points. The multiple initial addressing points are screened by the reference distance interval centered on the measurement point, and the initial addressing points located in the reference distance interval are used as reference addressing points. That is, the initial addressing points contained in the circular area with the measurement point as the center and the reference distance interval as the radius are used as reference addressing points AP. S (AP S1 ~AP Sm ).

[0129] As can be seen from the foregoing, embodiments of the present invention utilize observation and measurement using a scanning device. In exemplary embodiments, the scanning device comprises a scanning electron microscope (SEM). Specifically, the scanning device includes a first window and a second window. The first window represents the field of view of each measurement point, while the second window represents the field of view of each initial addressing point. The reference distance interval can be determined based on the first window, the second window, and the maximum addressing range of the scanning device.

[0130] In an exemplary embodiment, determining a reference distance interval based on the first viewing window, the second viewing window, and a maximum addressing range of a scanning device comprises the following steps:

[0131] (1) when the first window and the second window do not overlap and their vertices coincide, determining the minimum reference distance of the reference distance interval based on the side length of the first window and the side length of the second window;

[0132] (2) determining a maximum reference distance of the reference distance interval based on a maximum addressing range of the scanning device, a side length of the first window, and a side length of the second window when the first window and the second window do not overlap;

[0133] (3) Based on the minimum reference distance and the maximum reference distance, determine the reference distance interval.

[0134] In a specific implementation, it is assumed that the side length of the first window is a, the side length of the second window is b, and the maximum addressing range of the scanning device is c.

[0135] For the minimum reference distance of the reference distance interval, the situation where the first window and the second window do not overlap and the vertices coincide is the minimum distance between the measurement point and any initial addressing point under the premise of avoiding the overlap of the measurement frame of the initial addressing point and the measurement frame of the measurement point. Figure 6 As shown, the minimum reference distance can be determined based on the side length of the first window and the side length of the second window. In an exemplary embodiment, determining the minimum reference distance of the reference distance interval based on the side length of the first window and the side length of the second window includes:

[0136] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0137] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0138] Half of the first sum is taken as the minimum reference distance of the reference distance interval.

[0139] Specifically, based on the side length a of the first window, the diagonal of the first window is determined to be Determine the diagonal of the second window based on the side length a of the second window Sum the diagonal of the first window and the diagonal of the second window to get the first sum value Half of the first sum The minimum reference distance for the reference distance interval.

[0140] Continue to refer Figure 6The maximum reference distance of the reference distance interval is the maximum distance between the measurement point and any initial address point within the maximum addressing range of the scanning device, provided that the first window and the second window do not overlap. In one exemplary embodiment, determining the maximum reference distance of the reference distance interval based on the maximum addressing range of the scanning device, the side length of the first window, and the side length of the second window may include:

[0141] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0142] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0143] The maximum reference distance of the reference distance interval is obtained by subtracting the maximum addressing range of the scanning device from half of the first sum.

[0144] Specifically, based on the side length a of the first window, the diagonal of the first window is determined to be Determine the diagonal of the second window based on the side length a of the second window Sum the diagonal of the first window and the diagonal of the second window to get The maximum addressing range of the scanning device is c, and the maximum addressing range of the scanning device is subtracted from half of the first sum to obtain That is, the maximum reference distance in the reference distance interval is obtained.

[0145] Based on the minimum reference distance and the maximum reference distance, the reference distance interval is determined. The minimum reference distance can be used as the left endpoint value of the reference distance interval, and the maximum reference distance can be used as the right endpoint value of the reference distance interval.

[0146] After determining the minimum reference distance and the maximum reference distance of the reference distance interval, in an exemplary embodiment, multiple initial addressing points are screened using the reference distance interval centered on the measurement point to obtain at least one reference addressing point, including:

[0147] Taking the measurement point as the center, remove the initial addressing points within the circle with the minimum reference distance as the radius, and remove the initial addressing points outside the circle with the maximum reference distance as the radius;

[0148] The remaining initial addressing points are retained to obtain at least one reference addressing point.

[0149] In a specific implementation, the initial addressing points within the reference distance interval are screened with the measurement point as the center of the circle. The initial addressing points within the area around the measurement point that is less than the minimum reference distance are removed, and the initial addressing points within the area around the measurement point that is greater than the maximum reference distance are removed. The remaining initial addressing points are used as reference addressing points. In addition, by reasonably dividing the target layout into multiple unit areas, at least one reference addressing point can be obtained. For example, in an exemplary embodiment, the reference addressing point Figure 4b , divide the target layout evenly into multiple square unit areas, and the side length of each square unit area is the side length b of the second window.

[0150] In step S304, the target addressing point is determined based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point.

[0151] In a specific implementation, the graphic density of each unit area is calculated separately. For example, in an exemplary implementation, the target layout is evenly divided into multiple square unit areas, and the graphic density of each square unit area is calculated. The graphic density refers to the density distribution of the graphics contained in each square unit area in the corresponding square unit area. The graphic density distribution can be characterized by the area occupied by the graphics in the corresponding square unit area. The calculation method of the graphic density can refer to the existing technology and will not be repeated here.

[0152] Examples of unit areas adjacent to the reference addressing point can be found in Figure 7a and Figure 7b , for the reference addressing point AP S1 For the reference addressing point AP, the adjacent unit areas are G1 to G8. S3 For example, its adjacent unit areas are H1 to H5. The pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point are calculated. By comparing the pattern density difference between the unit area where each reference addressing point is located and the adjacent unit areas, the greater the difference, the more unique the unit area where the reference addressing point is located. The reference addressing point corresponding to the most unique unit area is used as the target addressing point of the measurement point. It can be understood that there is only one target addressing point.

[0153] In an exemplary embodiment, step S304 may include:

[0154] (1) For each reference addressing point, determine the statistical value of the difference between the pattern density of the unit area where the reference addressing point is located and the pattern density of each adjacent unit area.

[0155] In one exemplary embodiment, this step may include:

[0156] Determining a first pattern density of a unit area where a reference addressing point is located and a second pattern density of each unit area adjacent to the reference addressing point; and determining a pattern density difference value between the first pattern density and each second pattern density;

[0157] A difference statistic is determined based on the pattern density difference values ​​between the first pattern density and each second pattern density.

[0158] In a specific implementation, for each reference addressing point, the pattern density of the unit area where the reference addressing point is located is recorded as a first pattern density, and the pattern density of each unit area adjacent to the reference addressing point is recorded as a second pattern density. Pattern density differences between the first pattern density and each second pattern density are determined. The pattern density difference values ​​may be calculated as the absolute values ​​of the differences between the first pattern density and each second pattern density. The number of absolute values ​​of the differences is consistent with the number of unit areas adjacent to the reference addressing point.

[0159] Based on the pattern density difference between the first pattern density and each second pattern density, a difference statistic is determined. In one exemplary embodiment, the difference statistic can be a difference average, i.e., averaging the pattern density differences between the first pattern density and each second pattern density. In another exemplary embodiment, the difference statistic can be a difference variance, i.e., calculating the variance of the pattern density differences between the first pattern density and each second pattern density. The difference statistic can be calculated based on actual conditions and is not described in detail here. Through the above method, each reference addressing point can be assigned a corresponding difference statistic.

[0160] (2) Compare the difference statistics corresponding to each reference addressing point, and use the reference addressing point corresponding to the target difference statistics as the target addressing point.

[0161] In a specific implementation, the difference in graphic density between the unit area where each reference addressing point is located and the adjacent unit areas can be compared to determine the corresponding difference statistical values. The reference addressing point corresponding to the target difference statistical value is then used as the target addressing point. The target difference statistical value indicates that the unit area where the corresponding reference addressing point is located is the most unique. In one exemplary embodiment, the difference statistical value is the average difference value, and the target difference statistical value is the maximum average difference value. In another exemplary embodiment, the difference statistical value can be the variance, and the target difference statistical value is the maximum variance. Through the above implementation, the target addressing point corresponding to the measurement point can be obtained.

[0162] It should be noted that the calculation of the graphic density can also be performed in advance, that is, after the target layout is evenly divided into multiple square unit areas, the graphic density of each square unit area is calculated and then directly applied in step S304. The timing of calculating the graphic density is not limited here.

[0163] In step S305 , the wafer to be measured is measured based on the target addressing point and the measurement point.

[0164] In one exemplary embodiment, measuring a wafer to be measured based on a target addressing point and a measurement point includes:

[0165] Obtain the coordinates of the measurement point in the target layout, as well as the coordinates of the target addressing point in the target layout;

[0166] Determine the distance between the target addressing point and the measuring point based on the coordinates of the measuring point in the target layout and the coordinates of the target addressing point in the target layout;

[0167] Locate the measurement point on the wafer to be measured based on the distance between the target addressing point and the measurement point;

[0168] The measurement results are obtained based on the measurement points on the wafer to be measured.

[0169] In a specific implementation, the distance between the target addressing point and the measurement point can be determined based on the coordinates of the measurement point in the target layout and the coordinates of the target addressing point in the target layout. Then, based on the distance between the target addressing point and the measurement point, the physical measurement point on the wafer to be measured can be accurately and quickly located. Then, based on the physical measurement point on the wafer to be measured, the measurement result can be obtained, and the lithographic pattern represented by it can be compared with the expected lithographic pattern formed by the actual mask, thereby verifying the wafer lithography quality.

[0170] It should be noted that the distance calculation between the target addressing point and the measurement point can also be performed in advance, that is, after the target layout is evenly divided into multiple square unit areas, the distance between each initial addressing point and the measurement point is calculated, and then the distance between the target addressing point and the measurement point in the initial addressing point is directly selected in step S305. This is not limited here.

[0171] Through the above-mentioned embodiments, the target layout of the wafer to be measured is divided into multiple unit areas, each unit area including an initial addressing point; the multiple initial addressing points are screened by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each reference addressing point being located within the reference distance interval; the target addressing point is determined based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point, thereby simplifying the redundant and complex preparatory work of measurement based on a scanning device, and can quickly and accurately determine the target addressing point corresponding to the measurement point, and then perform wafer measurement based on the distance between the measurement point and the addressing point. This process addresses the problem of larger measurement point data and more complex surrounding environments at advanced nodes, while taking into account the requirements of measurement cycle and accuracy. By combining pattern density calculation and system sampling, the process achieves efficient and automated capture of appropriate target addressing points, improving data measurement efficiency and accuracy. The method can be written into a script for automated execution, is simple to operate, saves labor costs, reduces measurement cycle, effectively avoids measurement errors caused by improper addressing point selection, and improves measurement accuracy.

[0172] In order to demonstrate the advantages of the method provided by the embodiment of the present invention, the measurement point positioning results obtained by the traditional addressing point selection method are compared with the measurement point positioning results obtained by the method of the present invention, as shown in FIG8 . Figure 8a is the desired photolithographic pattern of the actual mask, Figure 8b It is the measurement point positioning result obtained by using the traditional addressing point selection method. Figure 8c The following table shows the measurement point positioning results obtained using the addressing point selection method of the present invention. It can be seen that the present invention can accurately locate measurement points. Furthermore, referring to the data in Table 1, the addressing point selection efficiency of the present invention is comparable to that of the automatic capture method using a machine script, and the measurement point positioning success rate is superior to that of completely manual marking. Therefore, the present method has the advantages of both high success rate and high speed.

[0173] Table 1

[0174] Addressing point selection method Measurement point positioning failure rate Addressing point selection efficiency (point / min) Script automatic crawling 30～50％ >100 Completely manual labeling <5％ 3～4 The present invention <2％ >100

[0175] Corresponding to the above-mentioned task processing method, an embodiment of the present invention further provides a semiconductor wafer measurement device. Since the semiconductor wafer measurement device provided by the embodiment of the present invention corresponds to the semiconductor wafer measurement methods provided by the above-mentioned embodiments, the implementation methods of the above-mentioned semiconductor wafer measurement methods are also applicable to the semiconductor wafer measurement device provided by this embodiment, and will not be repeated in the embodiment of the present invention.

[0176] refer to Figure 9, which is a schematic structural diagram of a semiconductor wafer measurement device provided by an embodiment of the present invention. The device has the function of implementing the semiconductor wafer measurement method in the above method embodiment. The function can be implemented by hardware or by hardware executing corresponding software. The device may include:

[0177] The layout acquisition module 910 is used to acquire a target layout of the wafer to be measured; the target layout includes measurement points;

[0178] A graphic segmentation module 920 is used to segment the target layout into a plurality of unit areas, each unit area including an initial addressing point;

[0179] A reference addressing point selection module 930 is configured to screen a plurality of initial addressing points using a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each of which is within the reference distance interval;

[0180] A target addressing point determination module 940 is configured to determine a target addressing point based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point;

[0181] The measurement module 950 is used to measure the wafer to be measured based on the target addressing point and the measurement point.

[0182] In one exemplary embodiment, the semiconductor wafer metrology apparatus further includes:

[0183] A scanning module is used to scan the target layout using a scanning device; the scanning device includes a first window and a second window, the first window represents the field of view of the measurement point, and the second window represents the field of view of each initial addressing point;

[0184] The calculation module is used to determine a reference distance interval based on the first viewing window, the second viewing window and the maximum addressing range of the scanning device.

[0185] In an exemplary embodiment, the calculation module is further configured to:

[0186] When the first window and the second window do not overlap and their vertices coincide, the minimum reference distance of the reference distance interval is determined based on the side length of the first window and the side length of the second window; when the first window and the second window do not overlap, the maximum reference distance of the reference distance interval is determined based on the maximum addressing range of the scanning device, the side length of the first window and the side length of the second window; and the reference distance interval is determined based on the minimum reference distance and the maximum reference distance.

[0187] In an exemplary embodiment, the calculation module is further configured to:

[0188] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0189] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0190] Half of the first sum is taken as the minimum reference distance of the reference distance interval.

[0191] In an exemplary embodiment, the calculation module is further configured to:

[0192] determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window;

[0193] Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value;

[0194] The maximum reference distance of the reference distance interval is obtained by subtracting the maximum addressing range of the scanning device from half of the first sum.

[0195] In an exemplary embodiment, the graph segmentation module 920 is further configured to:

[0196] Evenly divide the target layout into multiple square unit areas, where the side length of each square unit area is the side length of the second window;

[0197] The geometric center point of each square unit area is used as the initial addressing point of the corresponding square unit area.

[0198] In an exemplary embodiment, the reference addressing point selection module 930 is further configured to:

[0199] Taking the measurement point as the center, remove the initial addressing points within the circle with the minimum reference distance as the radius, and remove the initial addressing points outside the circle with the maximum reference distance as the radius;

[0200] The remaining initial addressing points are retained to obtain at least one reference addressing point.

[0201] In an exemplary embodiment, the target addressing point determination module 940 is further configured to:

[0202] For each reference addressing point, determining a statistical value of the difference between the pattern density of the unit area where the reference addressing point is located and the pattern density of each adjacent unit area;

[0203] Compare the difference statistics corresponding to each reference addressing point, and use the reference addressing point corresponding to the target difference statistics as the target addressing point.

[0204] In an exemplary embodiment, the target addressing point determination module 940 is further configured to:

[0205] Determining a first pattern density of a unit area where a reference addressing point is located and a second pattern density of each unit area adjacent to the reference addressing point; and determining a pattern density difference value between the first pattern density and each second pattern density;

[0206] A difference statistic is determined based on the pattern density difference values ​​between the first pattern density and each second pattern density.

[0207] In an exemplary embodiment, the measurement module 950 is further configured to:

[0208] Obtain the coordinates of the measurement point in the target layout, as well as the coordinates of the target addressing point in the target layout;

[0209] Determine the distance between the target addressing point and the measuring point based on the coordinates of the measuring point in the target layout and the coordinates of the target addressing point in the target layout;

[0210] Locate the measurement point on the wafer to be measured based on the distance between the target addressing point and the measurement point;

[0211] The measurement results are obtained based on the measurement points on the wafer to be measured.

[0212] In an exemplary embodiment, the semiconductor wafer measurement apparatus further includes a measurement point acquisition module configured to:

[0213] Obtain the lithography results of the wafer to be measured; the lithography results are obtained after correction for the optical proximity effect;

[0214] Generate graphic data system information of the wafer to be measured based on the lithography results;

[0215] The target layout is obtained from the graphic data system information of the wafer to be measured according to the preset measurement area, and the layout weaknesses are selected as measurement points according to the target measurement rules.

[0216] In another aspect, an electronic device for semiconductor wafer measurement is provided, comprising:

[0217] memory for storing computer programs;

[0218] The processor is used to execute the program instructions stored in the memory, so that the semiconductor wafer measurement method described above is implemented when the processor executes the computer program.

[0219] On the other hand, a computer-readable storage medium is further provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of the semiconductor wafer measurement method described above are implemented.

[0220] In a specific implementation, the storage medium may be located in at least one of the multiple network servers in the computer network. Optionally, in an embodiment of the present invention, the storage medium may include, but is not limited to, a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk, among other media capable of storing program code.

[0221] In another aspect, the present invention further provides a computer program product or computer program, comprising computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the semiconductor wafer measurement method provided in the above-described method embodiment.

[0222] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be based on the scope defined by the claims.

Claims

1. A semiconductor wafer measurement method, characterized in that: include: Obtain the target layout of the wafer to be measured; The target layout includes measurement points; Dividing the target layout into a plurality of unit areas, each of the unit areas includes an initial addressing point; Screening a plurality of the initial addressing points by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each of the reference addressing points being located within the reference distance interval; Determining a target addressing point based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point; The wafer to be measured is measured based on the target addressing point and the measurement point.

2. The semiconductor wafer measurement method according to claim 1, wherein: Also includes: Scanning the target layout using a scanning device; The scanning device includes a first window and a second window, the first window represents the field of view of the measurement point, and the second window represents the field of view of each of the initial addressing points; The reference distance interval is determined based on the first viewing window, the second viewing window, and a maximum addressing range of the scanning device.

3. The semiconductor wafer measurement method according to claim 2, wherein: The determining the reference distance interval based on the first viewing window, the second viewing window, and the maximum addressing range of the scanning device includes: When the first window and the second window do not overlap and their vertices coincide, determining a minimum reference distance of the reference distance interval based on a side length of the first window and a side length of the second window; In a case where the first window and the second window do not overlap, determining a maximum reference distance of the reference distance interval based on a maximum addressing range of the scanning device, a side length of the first window, and a side length of the second window; The reference distance interval is determined based on the minimum reference distance and the maximum reference distance.

4. The semiconductor wafer measurement method according to claim 3, wherein: The determining of the minimum reference distance of the reference distance interval based on the side length of the first window and the side length of the second window includes: determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window; Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value; Half of the first sum is used as the minimum reference distance of the reference distance interval.

5. The semiconductor wafer measurement method according to claim 3, wherein: Determining the maximum reference distance of the reference distance interval based on the maximum addressing range of the scanning device, the side length of the first window, and the side length of the second window includes: determining a diagonal of the first viewing window based on a side length of the first viewing window, and determining a diagonal of the second viewing window based on a side length of the second viewing window; Summing the diagonal of the first window and the diagonal of the second window to obtain a first sum value; The maximum reference distance of the reference distance interval is obtained by subtracting the maximum addressing range of the scanning device from half of the first sum value.

6. The semiconductor wafer measurement method according to claim 2, wherein: The target layout is divided into a plurality of unit areas, each of which includes an initial addressing point, including: Evenly dividing the target layout into a plurality of square unit areas, where the side length of each square unit area is the side length of the second window; The geometric center point of each square unit area is used as the initial addressing point of the corresponding square unit area.

7. The semiconductor wafer measurement method according to claim 2, wherein: The method of screening the plurality of initial addressing points by using a reference distance interval centered on the measurement point to obtain at least one reference addressing point includes: Taking the measurement point as the center, removing the initial addressing points within the circle with the minimum reference distance as the radius, and removing the initial addressing points outside the circle with the maximum reference distance as the radius; The remaining initial addressing points are retained to obtain at least one reference addressing point.

8. The semiconductor wafer measurement method according to claim 1, wherein: The determining of the target addressing point based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point includes: For each of the reference addressing points, determining a statistical value of a difference between a pattern density of a unit area where the reference addressing point is located and pattern densities of adjacent unit areas; The difference statistics corresponding to the reference addressing points are compared, and the reference addressing point corresponding to the target difference statistics is used as the target addressing point.

9. The semiconductor wafer measurement method according to claim 8, wherein: Determining the statistical value of the difference between the pattern density of the unit area where the reference addressing point is located and the pattern density of each adjacent unit area includes: Determining a first pattern density of a unit area where the reference addressing point is located and a second pattern density of each unit area adjacent to the reference addressing point; and determining a pattern density difference value between the first pattern density and each of the second pattern densities; The difference statistic value is determined based on the pattern density difference values ​​between the first pattern density and each of the second pattern densities.

10. The semiconductor wafer measurement method according to claim 1, wherein: The measuring the wafer to be measured based on the target addressing point and the measurement point includes: Obtaining the coordinates of the measurement point in the target layout and the coordinates of the target addressing point in the target layout; Determining a distance between the target addressing point and the measurement point based on the coordinates of the measurement point in the target layout and the coordinates of the target addressing point in the target layout; Positioning the measurement point on the wafer to be measured according to the distance between the target addressing point and the measurement point; A measurement result is obtained based on the measurement points on the wafer to be measured.

11. The semiconductor wafer measurement method according to claim 1, wherein: The method further comprises: Obtaining a photolithography result of the wafer to be measured; the photolithography result is obtained after correction for an optical proximity effect; Generate graphic data system information of the wafer to be measured based on the photolithography result; The target layout is obtained from the graphic data system information of the wafer to be measured according to a preset measurement area, and layout weaknesses are selected as the measurement points according to target measurement rules.

12. A semiconductor wafer measurement device, characterized in that: include: A layout acquisition module is used to obtain the target layout of the wafer to be measured; The target layout includes measurement points; A graphic segmentation module, configured to segment the target layout into a plurality of unit areas, each of the unit areas including an initial addressing point; a reference addressing point selection module, configured to screen the plurality of initial addressing points by a reference distance interval centered on the measurement point to obtain at least one reference addressing point, each of the reference addressing points being within the reference distance interval; a target addressing point determination module, configured to determine the target addressing point based on the pattern density of the unit area where each reference addressing point is located and the pattern density of each unit area adjacent to the reference addressing point; A measurement module is used to measure the wafer to be measured based on the target addressing point and the measurement point.

13. An electronic device for semiconductor wafer measurement, characterized in that: include: memory for storing computer programs; A processor is configured to execute the program instructions stored in the memory, so that the semiconductor wafer measurement method according to any one of claims 1 to 11 is implemented when the processor executes the computer program.

14. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the semiconductor wafer measurement method according to any one of claims 1 to 11 are implemented.

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