Plane micro-nano vacuum diode based on self-packaging vacuum channel and preparation method thereof
By using a planar micro-nano vacuum diode with a self-encapsulated vacuum channel and utilizing hyperbolic nanostructure and rapid thermal oxidation technology to form a self-encapsulated oxide layer, the dependence of the micro-nano vacuum diode on high vacuum is solved, normal operation and testing under different vacuum environments are achieved, and the preparation process is simplified.
Patent Information
- Application Number
- CN202510597733.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-09
- Publication Date
- 2025-09-26
AI Technical Summary
Existing micro-nano vacuum diodes require a high-vacuum working and testing environment, which limits their miniaturization and integration development.
A planar micro-nano vacuum diode with a self-encapsulated vacuum channel is used. A self-encapsulated oxide layer is formed through hyperbolic nanostructure and rapid thermal oxidation technology, which wraps the nano-micro-tip cathode, vacuum channel and nano-micro-tip anode to form a Si/SiO2 core-shell structure, and a self-encapsulated vacuum channel is formed by stress release.
The normal operation and testing of micro-nano vacuum diodes are achieved without relying on high vacuum environments, which simplifies the preparation process and adapts to applications in extreme environments.
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Figure CN120709123A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of vacuum electronic devices, and more particularly to a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel and a preparation method thereof. Background Art
[0002] The micro-nano vacuum diode, based on a field emission cathode structure, is a novel vacuum electronic device developed based on the principles of traditional vacuum tubes and incorporating micro-nanofabrication technologies. By employing a field emission cathode structure instead of a hot cathode structure, it boasts a smaller size and lower power consumption than traditional vacuum diodes, making it more suitable for integration and miniaturization to meet the demands of high-speed information processing and high-frequency communication integrated circuits. Because it utilizes a vacuum channel as a carrier transport "medium," electrons are transported ballistically in a vacuum, resulting in high transmission speeds and immunity to lattice and impurity scattering. This offers advantages over solid-state devices, including low signal distortion, fast switching speeds, and high output power, promising broad application prospects in high-frequency communications (such as terahertz radio frequency). Furthermore, because the vacuum channel environment lacks the radiation-induced defects found in solid semiconductors and is immune to direct damage from particle bombardment, micro-nano vacuum diodes offer superior high-temperature and radiation resistance compared to solid-state devices in harsh environments. This holds promise for applications in extreme-environment electronics (such as deep space exploration and nuclear industry control circuits) and miniature X-ray sources.
[0003] Currently, submicron-scale electron transport distances still require a relatively high vacuum working and testing environment, which to some extent limits the miniaturization and integration of micro-nano vacuum diodes. To address this problem, various methods have been proposed, such as shortening the device's vacuum channel so that its channel length is less than the mean free path of electrons in air (~55nm), thereby reducing the device's need for high vacuum; and encapsulating the vacuum channel at the nanoscale to enable electron transport within a nanovacuum chamber. Although these methods have made it possible to integrate and operate micro-nano vacuum diodes in atmospheric environments, the generally complex processes and high requirements for preparation conditions still cannot fundamentally change their dependence on high vacuum working and testing environments. Micro-nano vacuum diodes still need to be operated in a vacuum chamber with a high vacuum level.
[0004] The prior art discloses a method for manufacturing a constant current diode and a constant current diode, comprising: forming a first mask layer on the surface of a substrate; using the first mask layer as a mask, ion implanting the substrate to form an ion implantation layer; forming a second mask layer above the ion implantation layer; removing the first mask layer; etching the substrate to form a trench using the second mask layer as a mask; and forming a metal layer in the trench. The diode manufactured using this method requires a high vacuum environment. Summary of the Invention
[0005] The present invention addresses the drawback of the prior art in that it requires a high vacuum environment, and provides a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel and a preparation method thereof. The diode has the characteristic of not relying on a high vacuum environment.
[0006] The primary purpose of the present invention is to solve the above technical problems, and the technical solutions of the present invention are as follows:
[0007] A planar micro-nano vacuum diode based on a self-encapsulated vacuum channel, comprising: a substrate and a hyperbolic nanostructure;
[0008] The hyperbolic nanostructure is arranged on the upper surface of the substrate,
[0009] The hyperbolic nanostructure includes: a nano-micro tip cathode, a nano-micro tip anode, a self-encapsulated oxide layer and a vacuum channel;
[0010] The nano-micro tip cathode and the nano-micro tip anode are on a first straight line, and the gap between the tip of the nano-micro tip cathode and the tip of the nano-micro tip anode is a vacuum channel; the self-encapsulated oxide layer wraps the nano-micro tip cathode, the vacuum channel and the nano-micro tip anode.
[0011] A method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel includes:
[0012] S1: Obtain and clean an SOI substrate; the SOI substrate includes a first material layer, an insulating layer, and a second material layer stacked in a vertical direction;
[0013] S2: Spin-coating a first mask layer on the upper surface of the first material layer of the SOI substrate;
[0014] S3: performing electron beam lithography on the first mask layer to obtain a hyperbolic nanostructure mask;
[0015] S4: performing reactive ion etching on the first material layer of the SOI substrate based on the hyperbolic nanostructure mask to etch out a basic hyperbolic nanostructure;
[0016] S5: treating the basic hyperbolic nanostructure using a rapid thermal oxidation technique to obtain a hyperbolic nanostructure;
[0017] S6: The insulating layer and the second material layer form a substrate to obtain a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel.
[0018] Furthermore, the material of the first mask layer is photoresist.
[0019] Furthermore, the material of the first material layer is P-Si, the material of the insulating layer is SiO2, and the material of the second material layer is P-Si.
[0020] Furthermore, in step S5, the basic hyperbolic nanostructure is processed using a rapid thermal oxidation technique to obtain a hyperbolic nanostructure, comprising:
[0021] S501: heating the basic hyperbolic nanostructure to a first preset temperature at a first heating rate;
[0022] S502: After waiting for a first preset time, cooling the basic hyperbolic nanostructure to a second preset temperature at a first cooling rate;
[0023] S503: naturally cooling the basic hyperbolic nanostructure to a third preset temperature;
[0024] S504: Repeat steps S501 to S503 until a first preset number of times is reached;
[0025] S505: heating the basic hyperbolic nanostructure to a first preset temperature at a first heating rate;
[0026] S506: After waiting for a first preset time, the basic hyperbolic nanostructure is cooled to a second preset temperature at a second cooling rate, and the thinnest part of the basic hyperbolic nanostructure is broken to form a vacuum channel, a nano-micro-tip cathode, and a nano-micro-tip anode. Simultaneously, a self-encapsulating oxide layer is formed on the surface of the basic hyperbolic nanostructure, thereby obtaining a hyperbolic nanostructure.
[0027] S507: Naturally cool the hyperbolic nanostructure to a third preset temperature.
[0028] Furthermore, the first preset temperature is 1000°C, the second preset temperature is 750°C, and the third preset temperature is 60°C.
[0029] Furthermore, the first preset number of times is 3 times.
[0030] Furthermore, the second cooling rate is a cooling rate of 50°C / s, the first cooling rate is a cooling rate of 10°C / s, and the first heating rate is a heating rate of 50°C / s.
[0031] Furthermore, the first preset time is 1 to 5 minutes.
[0032] Furthermore, the rapid thermal oxidation is performed in a pure oxygen environment.
[0033] Compared with the prior art, the present invention has the following beneficial effects:
[0034] The vacuum diode of the present invention adopts a hyperbolic nanostructure, and the self-encapsulated oxide layer wraps the nanometer micro-tip cathode, vacuum channel and nanometer micro-tip anode, so that the diode does not rely on a high vacuum environment.
[0035] The manufacturing method of the present invention adopts rapid thermal oxidation technology to form a self-encapsulated insulating layer on the surface of the hyperbolic nanostructure, and utilizes the stress of the interface at the center of the bow tie to form a vacuum channel and a nano-micro-tip cathode and a nano-micro-tip anode both on the first straight line, thereby preparing a micro-nano vacuum diode with a self-encapsulated vacuum channel; this method has low requirements for extremely high temperature conditions and a simple process flow. BRIEF DESCRIPTION OF THE DRAWINGS
[0036] Figure 1 This is a structural diagram of the planar micro-nano vacuum diode based on the self-encapsulated vacuum channel provided in Example 1.
[0037] Figure 2 This is a structural diagram of the substrate provided in Example 1.
[0038] Figure 3 This is a structural diagram of the substrate and the first mask layer provided in Example 1.
[0039] Figure 4 Schematic diagram of the hyperbolic nanostructure pattern provided in Example 1.
[0040] Figure 5 Schematic diagram of the basic hyperbolic nanostructure provided in Example 1.
[0041] Figure 6 Schematic diagram of a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel provided in Example 1.
[0042] Figure 7 A line graph showing temperature and time for the rapid thermal oxidation process provided in Example 1.
[0043] Figure 8 This is an electron microscope image of a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel provided in Example 1 at a vertical 90-degree viewing angle.
[0044] Figure 9 This is an electron microscope image of a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel provided in Example 1, tilted at a 45-degree viewing angle.
[0045] Figure 10 A top view of the physical model of the planar micro-nano vacuum diode based on the self-encapsulated vacuum channel provided in Example 1.
[0046] Figure 11 A cross-sectional view of a physical model of a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel provided in Example 1 at a tilted forty-five degree viewing angle.
[0047] Figure 12 This is an electron microscope image of the etched area of the planar micro-nano vacuum diode based on the self-encapsulated vacuum channel provided in Example 1.
[0048] Figure 13 This is an electron microscope cross-sectional view of a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel provided in Example 1, taken at a tilted forty-five degree angle.
[0049] Figure 14 This is the IV characteristic curve of the planar micro-nano vacuum diode based on the self-encapsulated vacuum channel provided in Example 1.
[0050] Figure 15 This is the FN curve of the planar micro-nano vacuum diode based on the self-encapsulated vacuum channel provided in Example 1.
[0051] Figure 16 IV characteristic curves of the planar micro-nano vacuum diode based on the self-encapsulated vacuum channel provided in Example 1 under different vacuum environments DETAILED DESCRIPTION
[0052] The accompanying drawings are for illustrative purposes only and are not to be construed as limiting this patent;
[0053] In order to better illustrate this embodiment, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual product size;
[0054] It is understandable to those skilled in the art that some well-known structures and descriptions thereof may be omitted in the drawings.
[0055] The technical solution of the present invention is further described below with reference to the accompanying drawings and embodiments.
[0056] Example 1
[0057] like Figure 1 As shown, a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel includes: a substrate 1, a hyperbolic nanostructure 2;
[0058] The hyperbolic nanostructure 2 is arranged on the upper surface of the substrate 1.
[0059] The hyperbolic nanostructure 2 includes: a nano-micro-tip cathode 201, a nano-micro-tip anode 202, a self-encapsulated oxide layer 203 and a vacuum channel 204;
[0060] The nano-micro-tip cathode 201 and the nano-micro-tip anode 202 are on a first straight line, and the gap between the tip of the nano-micro-tip cathode 201 and the tip of the nano-micro-tip anode 202 is a vacuum channel 204; the self-encapsulated oxide layer 203 wraps the nano-micro-tip cathode 201, the vacuum channel 204 and the nano-micro-tip anode 202.
[0061] A method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel includes:
[0062] S1: If Figure 2 As shown, an SOI substrate is obtained and cleaned; the SOI substrate comprises a first material layer, an insulating layer, and a second material layer stacked in a vertical direction;
[0063] S2: If Figure 3 As shown, a first mask layer is spin-coated on the upper surface of the first material layer of the SOI substrate;
[0064] S3: Figure 4 As shown, the first mask layer is subjected to electron beam lithography to obtain a hyperbolic nanostructure mask;
[0065] S4: As Figure 5 As shown, based on the hyperbolic nanostructure mask, reactive ion etching is performed on the first material layer of the SOI substrate to etch out a basic hyperbolic nanostructure;
[0066] S5: If Figure 6 As shown, the basic hyperbolic nanostructure is processed by using a rapid thermal oxidation technique to obtain a hyperbolic nanostructure;
[0067] S6: The insulating layer and the second material layer form a substrate to obtain a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel.
[0068] Furthermore, the material of the first mask layer is photoresist.
[0069] Furthermore, the material of the first material layer is P-Si, the material of the insulating layer is SiO2, and the material of the second material layer is P-Si.
[0070] It should be noted that the base wafer is an SOI wafer and the second layer is an insulating layer.
[0071] Furthermore, in step S5, the basic hyperbolic nanostructure is processed using a rapid thermal oxidation technique to obtain a hyperbolic nanostructure, comprising:
[0072] S501: heating the basic hyperbolic nanostructure to a first preset temperature at a first heating rate;
[0073] S502: After waiting for a first preset time, cooling the basic hyperbolic nanostructure to a second preset temperature at a first cooling rate;
[0074] S503: naturally cooling the basic hyperbolic nanostructure to a third preset temperature;
[0075] S504: Repeat steps S501 to S503 until a first preset number of times is reached;
[0076] S505: heating the basic hyperbolic nanostructure to a first preset temperature at a first heating rate;
[0077] S506: After waiting for a first preset time, the basic hyperbolic nanostructure is cooled to a second preset temperature at a second cooling rate, and the thinnest part of the basic hyperbolic nanostructure is broken to form a vacuum channel, a nano-micro-tip cathode, and a nano-micro-tip anode. Simultaneously, a self-encapsulating oxide layer is formed on the surface of the basic hyperbolic nanostructure, thereby obtaining a hyperbolic nanostructure.
[0078] S507: Naturally cool the hyperbolic nanostructure to a third preset temperature.
[0079] It should be noted that the preparation method of the present invention adopts rapid thermal oxidation technology to form a self-encapsulated insulating layer on the surface of the hyperbolic nanostructure (the Si on the surface of the hyperbolic nanostructure is gradually oxidized and consumed to form a SiO2 oxide layer), and utilizes the stress at the interface between Si and SiO2 at the center of the bow tie (the Si / SiO2 core-shell structure interface forms stress on the surface of the silicon structure wrapped by it due to the volume expansion of the silicon dioxide shell layer), so that the Si-Si bond at the thinnest point is broken, forming a self-encapsulated vacuum channel and a nano-micro-tip cathode and a nano-micro-tip anode both on the first straight line, thereby preparing a micro-nano vacuum diode with a self-encapsulated vacuum channel.
[0080] Under the oxidation temperature of 900-1100℃ in the rapid thermal oxidation process (RTO), the volume expansion of the silicon dioxide layer (thickness 50-75nm) generated by silicon oxidation is utilized to generate Si / SiO2 interface tensile stress greater than the fracture tensile stress threshold of silicon (4.4-12GPa) at the thinnest part of the bowtie-shaped Si hyperbolic nanostructure (design width 110-150nm); at the same time, by regulating the heating rate (40-60℃ / s) and the cooling rate (5-60℃ / s), the stress is rapidly released at the Si / SiO2 interface, inducing the controlled fracture of the Si-Si bond at the thinnest part of the nano-micro-tip structure, and finally forming a Si / SiO2 core-shell self-encapsulated vacuum channel and a self-aligned nano-micro-tip structure (cathode and anode), and realizing full SiO2 encapsulation.
[0081] like Figure 7As shown, in the rapid thermal oxidation process (RTO), in order to achieve the controllable staged release of stress at the interface between Si and SiO2, the present invention splits the traditional continuous long-term thermal oxidation process into multiple short-term rapid thermal oxidation cycles, and the single oxidation time is controlled at 1-5min. Taking the total oxidation time of 20min in this embodiment as an example, it is divided into 4 independent oxidation cycles, each oxidation time is 5 minutes, as shown in the figure. Under pure oxygen environment conditions, a rapid thermal annealing device equipped with 12 halogen lamp arrays (single lamp power 1.5kW) is used to increase the sample surface temperature from room temperature to 1000℃ at a heating rate of 50℃ / s and maintain the constant temperature for 5 minutes to oxidize the surface of the silicon substrate to form a silicon dioxide layer. Subsequently, the water cooling system is started, and the sample surface temperature is gradually reduced from 1000℃ to 750℃ at a rate of 10℃ / s. Then, the air cooling system is switched to allow the sample to cool naturally to 60℃ to complete a single oxidation cycle. After repeating the above oxidation cycle three times, the cooling rate was increased to 50℃ / s (1000℃ to 750℃) in the cooling stage of the fourth cycle. Through the synergistic effect of interface tensile stress and sudden cooling effect, the Si / SiO2 interface stress in the center area of the hyperbolic nanostructure bow tie was quickly released, and finally a self-encapsulated vacuum channel and a nano-micro-tip cathode and nano-micro-tip anode were formed, both of which were on the first straight line. The electron microscope image of the prepared planar micro-nano vacuum diode based on the self-encapsulated vacuum channel is shown below. Figure 8 and Figure 9 shown.
[0082] In order to characterize whether the thinnest part of the bowtie-shaped nano-micro tip structure is broken under the stress at the interface of Si and SiO2 after the rapid thermal oxidation process (RTO), forming a separated cathode and anode, the nano-micro tip structure was subjected to focused ion beam etching using a focused ion beam and focused electron beam exposure system to obtain a cross-sectional image of the center of the nano-micro tip structure. The etched area and cross-sectional image are shown in Figure 2. Figures 10 to 13 As shown in the figure. From the cross-sectional view at the center of the nano-micro tip structure, it can be seen that during the RTO process, the Si on the surface of the nano-micro tip structure is consumed by continuous oxidation into SiO2, and the thickness of the oxide layer continues to increase. The Si / SiO2 core-shell structure interface forms stress on the surface of the silicon structure wrapped by it due to the volume expansion of the silicon dioxide shell. When the oxidation reaches a certain extent, the stress at the interface of Si and SiO2 approaches the tensile stress threshold (4.4-12GPa) of the Si-Si bond fracture. Then, the device is rapidly cooled. Under the dual effects of the stress at the Si / SiO2 interface and the rapid cooling, the Si-Si bond at the thinnest part of the nano-micro tip structure breaks, thereby forming a vacuum channel and separated cathode and anode.
[0083] Furthermore, the first preset temperature is 1000°C, the second preset temperature is 750°C, and the third preset temperature is 60°C.
[0084] Furthermore, the first preset number of times is 3 times.
[0085] Furthermore, the second cooling rate is a cooling rate of 50°C / s, the first cooling rate is a cooling rate of 10°C / s, and the first heating rate is a heating rate of 50°C / s.
[0086] Furthermore, the first preset time is 1 to 5 minutes.
[0087] Furthermore, the rapid thermal oxidation is performed in a pure oxygen environment, and the oxygen flow rate introduced into the rapid thermal oxidation chamber is 1000 cc / min.
[0088] The present invention conducts electrical testing on the prepared micro-nano vacuum diode, grounding the cathode and applying a voltage V to the anode. a , the anode current I a , draw the IV characteristics and FN curve of the nano-micro tip structure as shown Figures 14 and 15 As shown in the IV characteristic curve, the anode current of this embodiment shows an exponential growth trend as the anode voltage increases. And in the FN curve, the FN curve of this embodiment shows an obvious linear trend under high voltage conditions (linear correlation coefficient R 2 >0.98). According to the Fowler-Nordheim (FN) equation of field emission theory, this confirms that the cathode cone emits electrons through quantum tunneling under the action of a strong electric field. The electrons then reach the anode via ballistic transport in the vacuum channel, forming a controllable anode current.
[0089] The diode of the present invention is placed in an ultra-high vacuum test chamber, and the high vacuum degree is adjusted in a step-by-step manner (from 10 -9 Torr to 10 -5 Torr), and the low vacuum degree can be adjusted step by step (from 10 -5 During this process, the IV characteristic curves of the device under different vacuum environments (including atmospheric environment 760Torr) were obtained, as shown in Figure 2. Figure 16 shown.
[0090] It is worth noting that under different vacuum conditions (10 -9 The device operates normally in the vacuum range of 100 to 760 Torr, and the IV characteristic curves show a certain degree of overlap. This phenomenon demonstrates that the designed self-encapsulated vacuum channel structure effectively maintains the vacuum environment in the device channel; the device maintains relatively stable field emission characteristics under different vacuum conditions; and the device can operate and be tested in atmospheric conditions, rather than in a high-cost, large-volume vacuum chamber.
[0091] The same or similar reference numerals correspond to the same or similar components;
[0092] The terms used in the drawings to describe positional relationships are for illustrative purposes only and should not be construed as limiting this patent;
[0093] Obviously, the above embodiments of the present invention are merely examples for the purpose of clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Those skilled in the art will appreciate that other variations or modifications can be made based on the above description. It is not necessary and impossible to enumerate all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the claims of the present invention.
Claims
1. A planar micro-nano vacuum diode based on a self-encapsulated vacuum channel, characterized in that: include: Substrate (1), hyperbolic nanostructure (2); The hyperbolic nanostructure (2) is arranged on the upper surface of the substrate (1), The hyperbolic nanostructure (2) comprises: a nanometer micro-tip cathode (201), a nanometer micro-tip anode (202), a self-encapsulated oxide layer (203) and a vacuum channel (204); The nano-micro tip cathode (201) and the nano-micro tip anode (202) are on a first straight line, and a gap between the tip of the nano-micro tip cathode (201) and the tip of the nano-micro tip anode (202) is a vacuum channel (204); the self-encapsulated oxide layer (203) wraps the nano-micro tip cathode (201), the vacuum channel (204) and the nano-micro tip anode (202).
2. A method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel, applied to the vacuum diode according to claim 1, characterized in that: include: S1: Obtain and clean an SOI substrate; the SOI substrate includes a first material layer, an insulating layer, and a second material layer stacked in a vertical direction; S2: Spin-coating a first mask layer on the upper surface of the first material layer of the SOI substrate; S3: performing electron beam lithography on the first mask layer to obtain a hyperbolic nanostructure mask; S4: performing reactive ion etching on the first material layer of the SOI substrate based on the hyperbolic nanostructure mask to etch out a basic hyperbolic nanostructure; S5: treating the basic hyperbolic nanostructure using a rapid thermal oxidation technique to obtain a hyperbolic nanostructure; S6: The insulating layer and the second material layer form a substrate to obtain a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel.
3. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 2, characterized in that: The material of the first mask layer is photoresist.
4. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 2, characterized in that: The material of the first material layer is P-Si, the material of the insulating layer is SiO2, and the material of the second material layer is P-Si.
5. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 2, characterized in that: The step S5, using a rapid thermal oxidation technique to process the basic hyperbolic nanostructure to obtain the hyperbolic nanostructure, comprises: S501: heating the basic hyperbolic nanostructure to a first preset temperature at a first heating rate; S502: After waiting for a first preset time, cooling the basic hyperbolic nanostructure to a second preset temperature at a first cooling rate; S503: naturally cooling the basic hyperbolic nanostructure to a third preset temperature; S504: Repeat steps S501 to S503 until a first preset number of times is reached; S505: heating the basic hyperbolic nanostructure to a first preset temperature at a first heating rate; S506: After waiting for a first preset time, the basic hyperbolic nanostructure is cooled to a second preset temperature at a second cooling rate, and the thinnest part of the basic hyperbolic nanostructure is broken to form a vacuum channel, a nano-micro-tip cathode, and a nano-micro-tip anode. Simultaneously, a self-encapsulating oxide layer is formed on the surface of the basic hyperbolic nanostructure, thereby obtaining a hyperbolic nanostructure. S507: Naturally cool the hyperbolic nanostructure to a third preset temperature.
6. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 5, characterized in that: The first preset temperature is 1000°C, the second preset temperature is 750°C, and the third preset temperature is 60°C.
7. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 5, characterized in that: The first preset number of times is 3 times.
8. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 5, characterized in that: The second cooling rate is 50°C / s, the first cooling rate is 10°C / s, and the first heating rate is 50°C / s.
9. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 5, characterized in that: The first preset time is 1 to 5 minutes.
10. The method for preparing a planar micro-nano vacuum diode based on a self-encapsulated vacuum channel according to claim 5, characterized in that: The rapid thermal oxidation is carried out in a pure oxygen environment.