Composite pulse magnetron sputtering power supply output pulse forming circuit and control method
Through the output pulse forming circuit of the composite pulse magnetron sputtering power supply, the half-bridge parallel and asymmetric cascade mode is adopted, and the peak current mode is combined with the in-phase and out-of-phase frequency doubling chopping. The problem of accurate and repeated control of the pulse current value and waveform shape in the existing technology is solved, and the stability and repeatability of the coating process are improved.
Patent Information
- Application Number
- CN202510858806.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-25
- Publication Date
- 2025-09-26
AI Technical Summary
Existing high-power pulsed magnetron sputtering power supplies have shortcomings in the precise and repeated control of pulse current value and waveform shape, charge accumulation on the target surface, and arc generation, which affect the stability and repeatability of the coating process.
A composite pulse magnetron sputtering power supply output pulse forming circuit is adopted. Through half-bridge parallel and asymmetric cascade mode, combined with the peak current mode of in-phase and out-of-phase frequency doubling chopping, the negative pulse current value and waveform shape are accurately controlled. After the negative pulse ends, a positive voltage is applied to accelerate the transport of sputtering particles and quickly attenuate the residual energy of the arc.
The precise and repeated control of each pulse current value and waveform shape of the high-power pulse magnetron sputtering power supply is achieved, which improves the stability and repeatability of the coating process and reduces the impact of the arc on the coating quality.
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Figure CN120710481A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of high-power pulsed magnetron sputtering, and in particular to a composite pulsed magnetron sputtering power supply output pulse forming circuit and control method. Background Art
[0002] High-power pulsed magnetron sputtering (HIPIMS) is an emerging high-ionization rate magnetron sputtering technology with technical advantages including high film density and smoothness, high film-substrate interface bonding strength, and good uniformity of film thickness on the surface of complex-shaped workpieces.
[0003] High-power pulsed magnetron sputtering power supply is one of the key core technologies in HIPIMS and is crucial to the coating preparation process. Existing high-power pulsed magnetron sputtering power supplies mainly use constant power or constant current mode output to accurately control the coating preparation process. The constant current high-power pulsed magnetron sputtering power supply can be used to control the cathode current in the magnetron sputtering system. It is mainly used to prepare pure metal and alloy films. Its output voltage is variable, but the output current is constant. The constant power high-power pulsed magnetron sputtering power supply can be used to control the cathode power in the magnetron sputtering system to make the power constant during the magnetron sputtering process. It is often used to prepare oxide and other compound films to ensure precise control of chemical composition, microstructure and physical properties.
[0004] During magnetron sputtering, the ignition voltage (which varies from 600V to 2000V, depending on the design of the device and atmosphere parameters, and ranges from 300V to 800V) is much higher than the sputtering voltage (which varies from 300V to 800V, depending on the design of the device and atmosphere parameters, and ranges from 20Hz to 10kHz). High-power pulsed magnetron sputtering has a low duty cycle, with a frequency ranging from 20Hz to 10kHz and a pulse width ranging from 20μs to 500μs. Consequently, the pulse output lasts for a long time, extinguishing the magnetron sputtering glow and requiring a higher voltage to trigger the next pulse. Furthermore, longer pulse widths increase the charge accumulation on the target surface, making it more susceptible to target sparking. Furthermore, high magnetron sputtering voltages are also prone to sparking. Furthermore, when depositing oxide coatings, the target surface is susceptible to target poisoning and sparking. When the target sparks, an arc is generated on the target surface, converting the normal magnetron sputtering current into an arc current, ejecting large particles and affecting the coating process. In short, magnetron sputtering suffers from large load fluctuations, which lead to unstable power output current and power, and thus compromise the repeatability of the coating process.
[0005] Conventional high-power pulsed magnetron sputtering power supplies often use an average current mode, lacking precise constant current control for each pulse. When the output current is below the overcurrent threshold, the output current fluctuates with load changes (until the set pulse width ends). When the output current exceeds the overcurrent protection threshold, the power supply shuts down, and the current pulse width does not reach the set value. When the current is below the set value, the power supply lacks an accelerated output characteristic, and the output current may end before reaching the set value. Furthermore, conventional high-power pulsed magnetron sputtering power supplies do not specifically provide a high ignition voltage to quickly trigger target discharge, which can result in difficulty or delayed ignition at the pulse leading edge. This affects the pulse current shape and the proper plasma discharge coating mechanism. Some high-power pulsed magnetron sputtering power supplies use a DC power supply and a pulse power supply in parallel. The DC power supply maintains the target in a constant sputtering state. This configuration results in the high-power pulsed sputtering process being accompanied by a conventional magnetron sputtering process. Conventional high-power pulsed magnetron sputtering power supplies lack adjustable control over the pulse current's soft-start ramp-up edge, making them inadequately matched to the vacuum discharge characteristics of various target materials, limiting their application. Precise and repeatable control of each pulse current value and waveform shape in high-power pulsed magnetron sputtering technology is crucial to the stability and repeatability of the coating process. This precise and repeatable control of the pulse current value and waveform shape impacts the precise and repeatable control of the pulse power, which in turn affects the coating process in constant power mode applications.
[0006] Conventional high-power pulsed magnetron sputtering power supplies, when the sputtering current is high at the end of the negative pulse voltage (i.e., when a large number of sputtered particles are still present near the target surface), do not apply a forward voltage to accelerate the transport of sputtered particles to the substrate surface, resulting in a low sputtering rate. Furthermore, during the negative pulse discharge period of conventional high-power magnetron sputtering power supplies, when the load ignites and an arc discharge occurs, overcurrent protection shutdown technology is generally used to shut down the output. However, the residual energy of the arc current in the load circuit is still high and is released automatically. From the perspective of the power supply, this residual arc energy is not actively and quickly suppressed and attenuated.
[0007] Because current high-frequency, high-power semiconductor switching tubes operate at frequencies exceeding 20kH and currents exceeding 300A, and their collector-emitter blocking voltage (Vces) is typically 1200V, a safe operating voltage is generally below 600V. Furthermore, a high-power switching tube with a Vces of 1700V would operate at too low a frequency; 1700V would not reach the 2000V starting voltage for magnetron sputtering. High-frequency chopping output can suppress high-frequency ripple when the filter inductance is small. Therefore, achieving high-current, high-voltage, and high-frequency output with a single tube is difficult.
[0008] It is precisely the above-mentioned technical issues such as the precise and repeated control of the pulse current value and the pulse current waveform shape, the positive pulse accelerating the transport of a large number of particles from the target surface to the workpiece surface (during the period when a large number of sputtered particles exist), and the rapid decay of the residual energy of the arc that cause the application and promotion of high-power pulsed magnetron sputtering coating technology to encounter many problems. Summary of the Invention
[0009] In order to solve the problems that the existing technology cannot accurately and repeatedly control the pulse current value and the pulse current waveform shape, no positive voltage is applied to accelerate the transport of sputtered particles to the substrate surface after the negative pulse is turned off, and the arc current participation energy of the load circuit is still relatively high after the negative pulse overcurrent turns off the switch tube, the present application proposes a composite pulse magnetron sputtering power supply output pulse forming circuit and control method.
[0010] This application is implemented through the following technical solutions: A composite pulse magnetron sputtering power supply output pulse forming circuit, the pulse forming circuit comprising: N groups of left half-bridge circuits, each group having an internal topological structure as follows: a DC power supply end of at least one half-bridge circuit composed of semiconductor switching devices is connected in parallel to a DC power supply, a midpoint output end of each half-bridge circuit is respectively connected to an input end of an inductor, an output end of each inductor passes through a current sensor, all output cables passing through the current sensors are connected in parallel as the main power output end of the left half-bridge circuit, and the negative end of the DC power supply serves as the main power input end of the left half-bridge circuit; and the gate input ends of all semiconductor switching devices in each group of left half-bridge circuits are connected to the corresponding drive circuit of the left half-bridge circuit, the signal output end of each current sensor in each group of left half-bridge circuits is respectively connected to the positive comparison input end of a comparator, the main power output end of the previous left half-bridge circuit in the N groups of left half-bridge circuits is connected to the main power input end of the next left half-bridge circuit, and the main power output end of the last left half-bridge circuit is connected to the vacuum chamber; N is an integer greater than or equal to 2; and a group of right half-bridge circuits, wherein the internal topology of the right half-bridge circuits is as follows: a DC power supply end of at least one half-bridge circuit composed of semiconductor switching devices is connected in parallel to a DC power supply, and the midpoints of all half-bridge circuits are connected in parallel as the main power output end of the right half-bridge circuit connected to the target material in the vacuum chamber; and the gate input ends of all semiconductor switching devices in the right half-bridge circuit are connected to the corresponding drive circuit of the right half-bridge circuit, and the negative end of the DC power supply in the right half-bridge circuit is connected to the negative end of the DC power supply in the first-stage left half-bridge circuit in the N groups of left half-bridge circuits; Among them, the negative comparison input terminals of all comparators are connected to the signal output terminals of the digital-to-analog converter, and the output terminals of all comparators, the signal input terminals of the digital-to-analog converter, and the signal input terminals of all driving circuits are connected to the control circuit to realize peak current mode control combining in-phase and out-of-phase frequency multiplication chopping.
[0011] In some embodiments, the value of the cascade number N of the left half-bridge circuit depends on the voltage of the negative pulse output by the pulsed magnetron sputtering power supply and the safe operating voltage of the selected semiconductor switching device.
[0012] In some embodiments, the number of half-bridge circuits within each group of the left half-bridge circuits depends on the current of the negative pulse output by the pulsed magnetron sputtering power supply, the safe operating current of the selected semiconductor switching device, and the pulsating frequency within the selected output negative long pulse; the pulsating frequency refers to the pulse frequency formed after the negative long pulse output by the pulsed magnetron sputtering power supply is chopped by multiple high-frequency switches and filtered by the filtering inductor.
[0013] In some embodiments, the voltage amplitude of the DC power supply inside each group of the left half-bridge circuits is fixed, and the value depends on the safe operating voltage of the semiconductor switching devices selected therein.
[0014] In some embodiments, the voltage amplitude of the DC power supply inside the right half-bridge circuit is variable, and the range of variation is 0-200V.
[0015] In some embodiments, the driving circuit is composed of an isolation circuit and a power amplifier; And / or, the control circuit is composed of a programmable logic device and a peripheral circuit.
[0016] On the other hand, the present application also proposes a control method based on the output pulse forming circuit of the composite pulse magnetron sputtering power supply, the control method comprising: The negative pulse width, positive pulse width, negative pulse current, negative pulse starting voltage holding time, negative pulse current soft start time and negative pulse current flat top time output by the pulse forming circuit are controlled by the control circuit; The amplitude and waveform shape of the negative pulse current are controlled by setting the soft-start leading edge time, pulse flat-top time and amplitude of the pulse signal or DC signal output by the digital-to-analog converter; The driving control method of the semiconductor switching devices inside the left half-bridge circuit of group N adopts peak current mode control combining in-phase and out-of-phase frequency doubling chopping.
[0017] In some embodiments, the peak current mode control combining in-phase and out-of-phase frequency doubling chopping specifically includes: The driving control method of the upper bridge arm semiconductor switching devices within the N groups of left half-bridge circuits adopts peak current mode control to accurately control the output peak current of each semiconductor switching device, and ultimately synthesize a total negative pulse current; the driving signal frequency and period of the upper bridge arm semiconductor switching devices within the N groups of left half-bridge circuits are the same, and the phases are the same in the initial stage of negative pulse output, so as to output a high starting voltage to ignite the magnetron target discharge, and the time of the same phase in the initial stage of negative pulse output is controllable to control the holding time of the starting voltage; After the starting voltage holding time ends, the driving signals of the upper-arm semiconductor switching devices in the N groups of left half-bridge circuits begin to be output in phase shift, including the phase shift output between the upper-arm semiconductor switching devices in each group of left half-bridge circuits and the phase shift output between the left half-bridge circuits, so that the upper-arm semiconductor switching devices and inductor outputs in all left half-bridge circuits operate in the phase shift frequency doubling mode, thereby increasing the pulsation frequency.
[0018] In some embodiments, the overall turn-off time of the upper bridge arm semiconductor switching devices within the N groups of the left half-bridge circuit depends on the trailing edge time of the negative pulse output by the pulsed magnetron sputtering power supply and the time it takes to turn off the negative pulse when the load generates an arc.
[0019] In some embodiments, the turn-on time of the lower arm semiconductor switching device inside the right half-bridge circuit depends on the leading edge time of the negative pulse output by the pulse magnetron sputtering power supply; the turn-off time of the lower arm semiconductor switching device of the right half-bridge circuit depends on the trailing edge time of the negative pulse output by the pulse magnetron sputtering power supply and the time of turning off the negative pulse when the load generates an arc.
[0020] In some embodiments, the turn-on and turn-off timings of the N groups of lower-arm semiconductor switching devices within the left half-bridge circuit and the upper-arm semiconductor switching devices within the right half-bridge circuit depend on the forward pulse timing output by the pulsed magnetron sputtering power supply.
[0021] In some embodiments, 1 μs-5 μs after the driving signals of the upper bridge arm semiconductor switching devices in the N groups of left half-bridge circuits and the lower bridge arm semiconductor switching devices in the right half-bridge circuits end, while the negative pulse current persists, the lower bridge arm semiconductor switching devices in the N groups of left half-bridge circuits and the upper bridge arm semiconductor switching devices in the right half-bridge circuits are turned on to apply a positive pulse to the target material.
[0022] This application proposes a circuit and control method for output pulse formation in a composite pulsed magnetron sputtering power supply. This circuit utilizes a half-bridge parallel and asymmetric half-bridge cascade connection, along with a multi-segment peak current mode that combines in-phase and out-of-phase frequency multiplication and chopping. This allows for precise and repeatable control of both the negative pulse current value and waveform shape. Furthermore, after the negative pulse generates an arc, an asymmetric positive bias voltage is applied in the reverse direction to rapidly attenuate the arc's residual energy, minimizing the arc's impact on the coating process quality. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] The drawings described herein are used to provide a further understanding of the embodiments of the present application, constitute a part of the present application, and do not constitute a limitation of the embodiments of the present application. In the drawings: Figure 1 This is a block diagram of the pulse forming circuit structure proposed in an embodiment of the present application; Figure 2 for Figure 1 Schematic diagram of the driving signal and output waveform of the semiconductor switching device of the pulse forming circuit shown; Figure 3 This is the first example of the pulse forming circuit structure proposed in the embodiment of the present application; Figure 4 This is the second example of the pulse forming circuit structure proposed in the embodiment of the present application. DETAILED DESCRIPTION
[0024] Hereinafter, the terms "include" or "may include" as used in various embodiments of the present application indicate the presence of an invented function, operation, or element, and do not limit the addition of one or more functions, operations, or elements. In addition, as used in various embodiments of the present application, the terms "include," "have," and their cognates are intended only to indicate specific features, numbers, steps, operations, elements, components, or combinations of the foregoing, and should not be understood as excluding the presence of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing or the possibility of adding one or more features, numbers, steps, operations, elements, components, or combinations of the foregoing.
[0025] In various embodiments of the present application, the expression "or" or "at least one of A or / and B" includes any or all combinations of the words listed simultaneously. For example, the expression "A or B" or "at least one of A or / and B" may include A, may include B, or may include both A and B.
[0026] The expressions (such as "first", "second", etc.) used in the various embodiments of the present application may modify the various constituent elements in the various embodiments, but may not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used to distinguish one element from other elements. For example, a first user device and a second user device indicate different user devices, although both are user devices. For example, without departing from the scope of the various embodiments of the present application, a first element may be referred to as a second element, and similarly, a second element may also be referred to as a first element.
[0027] It should be noted that when a component is described as being “connected” to another component, the first component may be directly connected to the second component, and a third component may be “connected” between the first and second components. Conversely, when a component is described as being “directly connected” to another component, it can be understood that there is no third component between the first and second components.
[0028] The terms used in the various embodiments of the application are only used to describe the purpose of specific embodiments and are not intended to limit the various embodiments of the application. As used herein, the singular form is intended to also include the plural form, unless the context clearly indicates otherwise. Unless otherwise limited, all terms used here (including technical terms and scientific terms) have the same meaning as the meaning generally understood by those of ordinary skill in the art of the application. The terms (such as the terms defined in the dictionary generally used) will be interpreted as having the same meaning as the contextual meaning in the relevant technical field and will not be interpreted as having idealized meaning or too formal meaning, unless clearly defined in the various embodiments of the application.
[0029] In order to make the objectives, technical solutions and advantages of this application more clear, the present application is further described in detail below in conjunction with examples and drawings. The schematic implementation methods of this application and their descriptions are only used to explain this application and are not intended to limit this application.
[0030] Example 1 This embodiment proposes a composite pulse magnetron sputtering power supply output pulse forming circuit, which adopts an asymmetric half-bridge cascade topology structure with switching tubes in parallel and series, and combines a multi-segment (within each pulse width) peak current mode that combines in-phase and out-of-phase frequency doubling chopping to achieve precise and repeated control of the negative pulse current value and the waveform shape of the negative pulse current. In addition, after the negative pulse is turned off, a positive bias is applied during the period when a large number of sputtered particles (negatively charged) still exist to transport them to the surface of the coated substrate. After the negative pulse overcurrent turns off the switching tube, a positive bias is quickly applied to quickly attenuate the residual energy of the arc.
[0031] The pulse forming circuit proposed in this embodiment includes: N groups of left half-bridge circuits, one group of right half-bridge circuits, a digital-to-analog converter DAC and a control circuit; where N is an integer greater than or equal to 2, which represents the number of stages of the left half-bridge circuits connected in series.
[0032] Each left half-bridge circuit includes at least one half-bridge circuit comprised of semiconductor switching devices. The DC power supply terminals of all half-bridge circuits are connected in parallel to their internal DC power supplies. The midpoint output terminal of each half-bridge circuit is connected to the input terminal of a corresponding inductor. The output terminal of each inductor passes through a current sensor. The output cables passing through the current sensors are connected in parallel as the main power output terminal of the left half-bridge circuit. The negative terminal of the DC power supply serves as the main power input terminal of the left half-bridge circuit. N groups of left half-bridge circuits are connected in cascade, i.e., the main power output terminal of the preceding left half-bridge circuit is connected to the main power input terminal of the following left half-bridge circuit, and the main power input terminal of the first left half-bridge circuit is connected to the negative line segment of the DC power supply of the right half-bridge circuit. The main power output terminal of the last left half-bridge circuit is connected to a vacuum chamber, which is then connected to ground.
[0033] Optionally, the number N of series-connected left half-bridge circuits depends on the voltage of the negative pulse output by the high-power pulse magnetron sputtering power supply and the safe operating voltage of the selected semiconductor switching device. How many half-bridge circuits are connected in parallel inside the N groups of left half-bridge circuits depends on the current of the negative pulse output by the high-power pulse magnetron sputtering power supply, the safe operating current of the selected semiconductor switching device, and the pulsation frequency of the output negative long pulse. The pulsation frequency refers to the pulse frequency formed after the negative long pulse output by the high-power pulse magnetron sputtering power supply is chopped by multiple high-frequency switches and filtered by the filter inductor. The higher the pulsation frequency, the smaller the ripple. The voltage amplitude of the DC power supply inside the N groups of left half-bridge circuits is fixed, and its amplitude depends on the safe operating voltage of the semiconductor switching device selected therein.
[0034] The right half-bridge circuit includes at least one half-bridge circuit constructed from semiconductor switching devices. The DC power supply terminals of all half-bridge circuits are connected in parallel to their internal DC power supplies. The midpoints of all half-bridge circuits are connected in parallel to serve as the main power output terminal of the right half-bridge circuit, which is connected to the target within the vacuum chamber. The negative terminal of the DC power supply within the right half-bridge circuit is connected to the negative terminal of the DC power supply within the first-stage left half-bridge circuit (i.e., the main power input terminal of the first-stage left half-bridge circuit). Optionally, the voltage amplitude of the DC power supply within the right half-bridge circuit is variable, ranging from 0 to 200V.
[0035] The signal output end of each current sensor in each group of left half-bridge circuits is respectively connected to the positive comparison input end of a comparator, the negative comparison input ends of all comparators are connected to the signal output end of the digital-to-analog converter DAC, and the output ends of all comparators are respectively connected to multiple input ends of the control circuit.
[0036] The signal input end of the digital-to-analog converter DAC is connected to the output end of the control circuit, and the control circuit controls the analog signal output waveform of the digital-to-analog converter DAC.
[0037] The gate input terminals of the semiconductor switching devices in N groups of left half-bridge circuits and one group of right half-bridge circuits are respectively connected to their corresponding drive circuits, and the signal input terminals of all the drive circuits are respectively connected to multiple output terminals of the control circuit.
[0038] The current sensor, comparator, digital-to-analog converter, control circuit and driving circuit realize the driving control logic of the peak current mode.
[0039] Optionally, the driving circuit may be composed of an isolation circuit and a power amplifier circuit.
[0040] Optionally, the control circuit may be composed of a programmable logic device and peripheral circuits.
[0041] The control method of the power supply output pulse forming circuit proposed in this embodiment includes: The control circuit is used to control the negative pulse width, positive pulse width, negative pulse current, negative pulse starting voltage holding time, negative pulse current soft start time, and negative pulse current flat top time output by the power supply output pulse forming circuit.
[0042] The analog signal output by the digital-to-analog converter DAC is a pulse signal or a DC signal with adjustable soft-start leading edge time, adjustable pulse flat top time and adjustable amplitude, so as to control the amplitude and waveform shape of the negative pulse current.
[0043] The driving control method of the upper-arm semiconductor switching devices of the N groups of left half-bridge circuits adopts peak current mode control to accurately control the output peak current of each semiconductor switching device and ultimately accurately synthesize the total negative pulse current; the driving signal frequency and period of the upper-arm semiconductor switching devices of the N groups of left half-bridge circuits are the same, and the phases are the same in the initial stage of high-power negative pulse output, so as to output a higher starting voltage to ignite the discharge of the magnetron target material, and the time of the same phase in the initial stage of high-power negative pulse output can be set to control the holding time of the starting voltage.
[0044] After the starting voltage holding time ends, the drive signals of the upper-arm semiconductor switching devices of the N groups of left half-bridge circuits begin to be output in phase shift, including the phase shift output between the upper-arm semiconductor switching devices within each group of left half-bridge circuits and the phase shift output between the left half-bridge circuits, so that the upper-arm semiconductor switching devices and inductor outputs of all left half-bridge circuits operate in a phase shift frequency doubling mode, thereby increasing the pulsation frequency of the negative pulse output current and making the current control accuracy higher.
[0045] The overall turn-off time of the upper-arm semiconductor switching devices of the N groups of left half-bridge circuits depends on the trailing edge time of the negative pulse output by the high-power pulse magnetron sputtering power supply and the time of turning off the negative pulse when an arc is generated in the load.
[0046] The conduction time of the semiconductor switch device of the lower arm of the right half-bridge circuit depends on the leading edge time of the negative pulse output by the high-power pulse magnetron sputtering power supply.
[0047] The turn-off time of the semiconductor switch device of the lower arm of the right half-bridge circuit depends on the trailing edge time of the negative pulse output by the high-power pulse magnetron sputtering power supply and the time of turning off the negative pulse when an arc is generated in the load.
[0048] The turn-on and turn-off timings of the lower-arm semiconductor switching devices of the N groups of left half-bridge circuits and the upper-arm semiconductor switching devices of the right half-bridge circuits depend on the forward pulse timing output by the high-power pulsed magnetron sputtering power supply.
[0049] 1μs-5μs after the driving signals of the upper bridge arm semiconductor switching devices of the N groups of left half-bridge circuits and the lower bridge arm semiconductor switching devices of the right half-bridge circuits end, while the negative pulse current persists, the lower bridge arm semiconductor switching devices of the N groups of left half-bridge circuits and the upper bridge arm semiconductor switching devices of the right half-bridge circuits are turned on to apply a positive pulse to the target material.
[0050] This embodiment adopts a combination of half-bridge parallel and half-bridge asymmetric cascade modes, multi-stage peak current mode control combining in-phase and out-of-phase frequency doubling chopping, and multi-waveform settings of the digital-to-analog converter, which improves the accuracy of each pulse current output by the high-power pulse magnetron sputtering power supply. At the same time, the negative pulse voltage and current waveforms can be controlled to ensure the starting ability of the power supply. The negative pulse starting current, the negative pulse current soft start time and the negative pulse current flat top value can be accurately controlled, so that each pulse current value and pulse current waveform shape of the high-power pulse magnetron sputtering technology can be accurately and repeatedly controlled, thereby improving the adaptability, controllability and load matching capability of the high-power pulse magnetron sputtering power supply, and making the contribution of the output characteristics of the high-power pulse magnetron sputtering power supply to the stability and repeatability of the coating process controllable and stable.
[0051] In addition, when the sputtering current of a high-power pulsed magnetron sputtering power supply is large at the end of the negative pulse voltage (i.e., when a large number of sputtered particles are still present near the target surface), applying a forward voltage accelerates the transport of sputtered particles to the substrate surface, thereby increasing the sputtering rate. Furthermore, during the negative pulse discharge of the high-power magnetron sputtering power supply, when the load ignites and generates an arc discharge, the negative pulse output switching device turns off the output, and a positive pulse is quickly applied to the load, which will quickly attenuate the residual energy of the arc and reduce the impact of the arc on the quality of the coating process.
[0052] In addition, the high-power pulsed magnetron sputtering power supply adopts multi-stage peak current mode control within the long pulse width of the negative pulse output. Even if the load generates an arc and the load current rises rapidly, the peak current mode control will quickly turn off the currently turned-on semiconductor switching device and limit the output current to the current setting value. Instead of turning off the semiconductor switching device only when the current climbs to the overcurrent setting threshold value or other arc judgment conditions are met, it suppresses the current climb.
[0053] This embodiment uses Figure 1 The structure block diagram of a power supply output pulse forming circuit shown in FIG. 1 further illustrates the above-mentioned power supply output pulse forming circuit. The power supply output pulse forming circuit includes: N groups of left half-bridge circuits are provided, each group comprising n half-bridge circuits formed by semiconductor switching devices. This embodiment is described using the structure of the first group of left half-bridge circuits as an example. This first group of left half-bridge circuits includes a half-bridge circuit formed by Q1-1 and Q2-1, a half-bridge circuit formed by Q1-2 and Q2-2, ..., and a half-bridge circuit formed by Q1-n and Q2-n. Each of the n half-bridge circuits is connected in parallel with its corresponding DC power supply V1. The midpoint output terminals of the n half-bridge circuits are connected to the input terminals of corresponding inductors L1-1, L1-2, ..., L1-n, respectively. The output terminals of the n inductors pass through corresponding current sensors Lem1-1, Lem1-2, ..., Lem1-n, and are connected in parallel through output cables passing through the current sensors as the main power output terminals of the first group of left half-bridge circuits. The negative terminal of the DC power supply V1 serves as the main power input terminal of the first group of left half-bridge circuits. Figure 1 The N groups of left half-bridge circuits in the power supply output pulse forming circuit shown have the same circuit topology structure, so the structures of the other groups of left half-bridge circuits are not described here.
[0054] N groups of left half-bridge circuits are connected in cascade, with the first group of left half-bridge circuits serving as the first-stage left half-bridge circuit, with its main electrical output connected to the main electrical input of the second group of left half-bridge circuits, the main electrical output of the second group of left half-bridge circuits connected to the main electrical input of the third group of left half-bridge circuits, and so on, with the main electrical output of the N-1th group of left half-bridge circuits connected to the main electrical input of the Nth group of left half-bridge circuits, that is, the Nth group of left half-bridge circuits serving as the last-stage left half-bridge circuit, with its main electrical output connected to the vacuum chamber.
[0055] A right half-bridge circuit comprises n half-bridge circuits formed by semiconductor switching devices, namely, a half-bridge circuit formed by T1-1 and T2-1, a half-bridge circuit formed by T1-2 and T2-2, ..., and a half-bridge circuit formed by T1-n and T2-n. Each of the n half-bridge circuits is connected in parallel to its corresponding DC power supply Vp, and the midpoints of the n half-bridge circuits are connected in parallel to form the main electrical output of the right half-bridge circuit, which is connected to the target material within the vacuum chamber. The negative terminal of the DC power supply Vp is connected to the negative terminal of the DC power supply V1 within the first left half-bridge circuit.
[0056] The signal output terminals of all current sensors in the N groups of left half-bridge circuits are respectively connected to the positive comparison input terminals of their corresponding comparators. This embodiment uses the first group of left half-bridge circuits as an example. The signal output terminals of n current sensors, namely, Lem1-1, Lem1-2, ..., Lem1-n, are respectively connected to the positive comparison input terminals of comparators U1-1, U1-2, ..., U1-n. Similarly, the signal output terminals of the other groups of current sensors are respectively connected to the positive comparison input terminals of their corresponding comparators. This will not be further described here.
[0057] The negative comparison inputs of all comparators are connected to the output of the digital-to-analog converter DAC, and the outputs of all comparators are respectively connected to multiple inputs of the control circuit, and the input of the digital-to-analog converter DAC is connected to the output of the control circuit.
[0058] All left half-bridge circuits and right half-bridge circuits are respectively provided with a corresponding driving circuit, that is, the first group of left half-bridge circuits corresponds to driving circuit 1, the second group of left half-bridge circuits corresponds to driving circuit 2, and so on. The Nth group of left half-bridge circuits corresponds to driving circuit N, and the right half-bridge circuit corresponds to driving circuit p.
[0059] The gate input terminals of the semiconductor switch devices in all the left half-bridge circuits and the right half-bridge circuits are respectively connected to the corresponding drive circuits, and the control terminals of all the drive circuits are respectively connected to the multiple output terminals of the control circuits.
[0060] Figure 2 The schematic diagram of the semiconductor switch device drive signal and the power supply output pulse forming circuit output waveform is given, as shown in Figure 2 As shown, the driving signal frequency f and period T of the upper bridge arm semiconductor switching devices (i.e., Q2-1, Q2-2, ..., Q2-n, Q4-1, Q4-2, ..., Q4-n and Qm-1, Qm-2, ..., Qm-n) of the first group of left half-bridge circuits, the second group of left half-bridge circuits, ..., and the Nth group of left half-bridge circuits are the same; The driving signals of the upper bridge arm semiconductor switching devices of the first group of left half-bridge circuits, the second group of left half-bridge circuits, ..., and the Nth group of left half-bridge circuits have the same phase in the initial stage of high-power negative pulse output, so as to output a higher starting high voltage to ignite the magnetron target discharge; and the time of the same phase in the initial stage can be set to control the holding time of the starting voltage; After the ignition voltage holding time ends, the drive signals of the upper bridge arm semiconductor switching devices of the first group of left half-bridge circuits, the second group of left half-bridge circuits, ..., and the Nth group of left half-bridge circuits begin to be output in phase shift. The phase shift time of the upper bridge arm semiconductor switching devices within each group of left half-bridge circuits is t1=T / n, and the phase shift time between each group of left half-bridge circuits is t2=T / (N*n). This allows the upper bridge arm semiconductor switching devices and inductor outputs of all left half-bridge circuits to operate in a phase shift frequency multiplication mode. The pulsation frequency of the high-power negative pulse output current is F=N*n*f. The higher the pulsation frequency, the smaller the current ripple and the higher the current control accuracy. The overall turn-off time of the upper bridge arm semiconductor switching devices of the first group of left half-bridge circuits, the second group of left half-bridge circuits, ..., and the Nth group of left half-bridge circuits depends on the trailing edge time of the negative pulse output by the high-power pulse magnetron sputtering power supply and the time of turning off the negative pulse when an arc is generated in the load; The conduction time of the semiconductor switching devices (i.e., T1-1, T1-2, ..., T1-n) of the lower arm of the right half-bridge circuit depends on the leading edge time of the negative pulse output of the high-power pulse magnetron sputtering power supply; The turn-on and turn-off timings of all the semiconductor switching devices of the lower bridge arm of the left half-bridge circuit (i.e., Q1-1, Q1-2, ..., Q1-n, Q3-1, Q3-2, ..., Q3-n and Q(m-1)-1, Q(m-1)-2, ..., Q(m-1)-n) and the semiconductor switching devices of the upper bridge arm of the right half-bridge circuit (i.e., T2-1, T2-2, ..., T2-n) depend on the forward pulse timing output by the high-power pulsed magnetron sputtering power supply; 1μs-5μs after the driving signals of the upper bridge arm semiconductor switching devices of the first group of left half-bridge circuits, the second group of left half-bridge circuits, ..., the Nth group of left half-bridge circuits and the lower bridge arm semiconductor switching devices of the right half-bridge circuits end, while the negative pulse current persists, all the lower bridge arm semiconductor switching devices of the left half-bridge circuits and the upper bridge arm semiconductor switching devices of the right half-bridge circuits are turned on, applying a positive pulse to the target material.
[0061] Example 2 This embodiment proposes a high-power, high-precision composite pulse magnetron sputtering power supply output pulse forming circuit structure example 1, which uses two groups of left half-bridge circuits in cascade (i.e., N=2), and each group of left half-bridge circuits includes four half-bridge circuits composed of IGBTs (FF400R17KE4), and the right half-bridge circuit also includes four half-bridge circuits composed of IGBTs, as shown in the following example. Figure 3As shown in Figure 1, the DC power supplies V1 and V2 have a voltage amplitude of 1000V. The upper-side semiconductor switches of the first and second left-half-bridge circuits are switched on and off in phase at a switching frequency of 40kHz. The lower-side semiconductor switches of the right-half-bridge circuits are on, so the negative pulse starting voltage can be superimposed to 2000V. Each IGBT in each left-half-bridge circuit uses peak current mode control. Peak current mode control sets the current (digital-to-analog converter DAC output signal) to 250A. Each IGBT outputs 250A, and the combined output current of the four IGBTs is 1000A. The DAC frequency and pulse width (modulation signal) are the frequency and pulse width of the negative pulses output by the high-power pulsed magnetron sputtering power supply. The four IGBTs in each left-half-bridge circuit use staggered chopping operation, so the high-frequency ripple frequency within the negative pulse width (modulation signal pulse width) is 320kHz (carrier frequency). The waveform shape of the modulation signal determines the shape of the negative pulse current. The core components of the drive circuit are HCPL-3120 and transistors. The control circuit is based on the EPM1270T144C5 chip with peripheral circuits. The core component of the digital-to-analog converter DAC is the AD7392.
[0062] Example 3 This embodiment proposes a second example of a circuit structure for forming an output pulse of a high-power, high-precision composite pulse magnetron sputtering power supply, which uses two groups of left half-bridge circuits in cascade (i.e., N=2), wherein the first group of left half-bridge circuits includes one half-bridge circuit composed of IGBTs (FF1800R17IP5), the second group of left half-bridge circuits includes four half-bridge circuits composed of IGBTs, and the right half-bridge circuit includes four half-bridge circuits composed of IGBTs, as shown in FIG. Figure 3As shown in the figure, the DC power supplies V1 and V2 have a voltage amplitude of 1000V. The upper-side semiconductor switching devices in the first left half-bridge circuit are on for the duration of the negative pulse ignition voltage. The upper-side semiconductor switching devices in the second left half-bridge circuit are switched on and off in phase at a switching frequency of 40kHz, while the lower-side semiconductor switching devices in the right half-bridge circuit are on. Therefore, the negative pulse ignition voltage can be superimposed to 2000V. Each IGBT in the second left half-bridge circuit uses peak current mode control. The peak current mode control sets the current (digital-to-analog converter DAC output signal) to 250A. Each IGBT outputs 250A, and the combined output current of the four IGBTs is 1000A. The frequency and pulse width (modulation signal) of the DAC output signal are the frequency and pulse width of the negative pulses output by the high-power pulsed magnetron sputtering power supply. The four IGBTs in the second left half-bridge circuit use staggered chopping operation, so the high-frequency ripple frequency within the negative pulse width (modulation signal pulse width) is 160kHz (carrier frequency). The waveform of the modulation signal determines the shape of the negative pulse current. The core components of the drive circuit are the HCPL-3120 and transistors. The control circuit is based on the EPM1270T144C5 chip with peripheral circuits. The core component of the digital-to-analog converter (DAC) is the AD7392.
[0063] The specific implementation methods described above further illustrate the purpose, technical solutions and beneficial effects of this application. It should be understood that the above description is only the specific implementation methods of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of this application should be included in the scope of protection of this application.
Claims
1. A composite pulse magnetron sputtering power supply output pulse forming circuit, characterized in that: The pulse forming circuit comprises: N groups of left half-bridge circuits, each group having an internal topological structure as follows: a DC power supply end of at least one half-bridge circuit composed of semiconductor switching devices is connected in parallel to a DC power supply, a midpoint output end of each half-bridge circuit is respectively connected to an input end of an inductor, an output end of each inductor passes through a current sensor, all output cables passing through the current sensors are connected in parallel as the main power output end of the left half-bridge circuit, and the negative end of the DC power supply serves as the main power input end of the left half-bridge circuit; and the gate input ends of all semiconductor switching devices in each group of left half-bridge circuits are connected to the corresponding drive circuit of the left half-bridge circuit, the signal output end of each current sensor in each group of left half-bridge circuits is respectively connected to the positive comparison input end of a comparator, the main power output end of the previous left half-bridge circuit in the N groups of left half-bridge circuits is connected to the main power input end of the next left half-bridge circuit, and the main power output end of the last left half-bridge circuit is connected to the vacuum chamber; N is an integer greater than or equal to 2; and a group of right half-bridge circuits, wherein the internal topology of the right half-bridge circuits is as follows: a DC power supply end of at least one half-bridge circuit composed of semiconductor switching devices is connected in parallel to a DC power supply, and the midpoints of all half-bridge circuits are connected in parallel as the main power output end of the right half-bridge circuit connected to the target material in the vacuum chamber; and the gate input ends of all semiconductor switching devices in the right half-bridge circuit are connected to the corresponding drive circuit of the right half-bridge circuit, and the negative end of the DC power supply in the right half-bridge circuit is connected to the negative end of the DC power supply in the first-stage left half-bridge circuit in the N groups of left half-bridge circuits; Among them, the negative comparison input terminals of all comparators are connected to the signal output terminals of the digital-to-analog converter, and the output terminals of all comparators, the signal input terminals of the digital-to-analog converter, and the signal input terminals of all driving circuits are connected to the control circuit to realize peak current mode control combining in-phase and out-of-phase frequency multiplication chopping.
2. The composite pulse magnetron sputtering power supply output pulse forming circuit according to claim 1, characterized in that: The value of the cascade number N of the left half-bridge circuit depends on the voltage of the negative pulse output by the pulsed magnetron sputtering power supply and the safe operating voltage of the selected semiconductor switching device.
3. The composite pulse magnetron sputtering power supply output pulse forming circuit according to claim 1, characterized in that: The number of half-bridge circuits within each group of the left half-bridge circuits depends on the current of the negative pulse output by the pulse magnetron sputtering power supply, the safe operating current of the selected semiconductor switching device and the selected pulsating frequency within the output negative long pulse; the pulsating frequency refers to the pulse frequency formed after the negative long pulse output by the pulse magnetron sputtering power supply is chopped by multiple high-frequency switches and filtered by the filter inductor.
4. The composite pulse magnetron sputtering power supply output pulse forming circuit according to claim 1, characterized in that: The voltage amplitude of the DC power supply inside each group of the left half-bridge circuits is fixed, and the value depends on the safe operating voltage of the semiconductor switching devices selected therein.
5. The composite pulse magnetron sputtering power supply output pulse forming circuit according to claim 1, characterized in that: The voltage amplitude of the DC power supply inside the right half-bridge circuit is variable, and the variation range is 0~200V.
6. The composite pulse magnetron sputtering power supply output pulse forming circuit according to claim 1, characterized in that: The driving circuit is composed of an isolation circuit and a power amplifier; And / or, the control circuit is composed of a programmable logic device and a peripheral circuit.
7. A control method for a composite pulse magnetron sputtering power supply output pulse forming circuit according to any one of claims 1 to 6, characterized in that: The control method includes: The negative pulse width, positive pulse width, negative pulse current, negative pulse starting voltage holding time, negative pulse current soft start time and negative pulse current flat top time output by the pulse forming circuit are controlled by the control circuit; The amplitude and waveform shape of the negative pulse current are controlled by setting the soft-start leading edge time, pulse flat-top time and amplitude of the pulse signal or DC signal output by the digital-to-analog converter; The driving control method of the semiconductor switching devices inside the left half-bridge circuit of group N adopts peak current mode control combining in-phase and out-of-phase frequency doubling chopping.
8. The control method according to claim 7, characterized in that: The peak current mode control combining in-phase and out-of-phase frequency doubling chopping specifically includes: The driving control method of the upper bridge arm semiconductor switching devices within the N groups of left half-bridge circuits adopts peak current mode control to accurately control the output peak current of each semiconductor switching device, and ultimately synthesize a total negative pulse current; the driving signal frequency and period of the upper bridge arm semiconductor switching devices within the N groups of left half-bridge circuits are the same, and the phases are the same in the initial stage of negative pulse output, so as to output a high starting voltage to ignite the magnetron target discharge, and the time of the same phase in the initial stage of negative pulse output is controllable to control the holding time of the starting voltage; After the starting voltage holding time ends, the driving signals of the upper-arm semiconductor switching devices in the N groups of left half-bridge circuits begin to be output in phase shift, including the phase shift output between the upper-arm semiconductor switching devices in each group of left half-bridge circuits and the phase shift output between the left half-bridge circuits, so that the upper-arm semiconductor switching devices and inductor outputs in all left half-bridge circuits operate in the phase shift frequency doubling mode, thereby increasing the pulsation frequency.
9. The control method according to claim 7 or 8, characterized in that: The overall turn-off time of the upper bridge arm semiconductor switching devices in the left half-bridge circuit of group N depends on the trailing edge time of the negative pulse output by the pulse magnetron sputtering power supply and the time of turning off the negative pulse when the load generates an arc.
10. The control method according to claim 7 or 8, characterized in that: The turn-on time of the lower arm semiconductor switch device inside the right half-bridge circuit depends on the leading edge time of the negative pulse output by the pulse magnetron sputtering power supply; the turn-off time of the lower arm semiconductor switch device of the right half-bridge circuit depends on the trailing edge time of the negative pulse output by the pulse magnetron sputtering power supply and the time of turning off the negative pulse when the load generates an arc.
11. The control method according to claim 7 or 8, characterized in that: The turn-on and turn-off timings of the N groups of lower-arm semiconductor switching devices in the left half-bridge circuit and the upper-arm semiconductor switching devices in the right half-bridge circuit depend on the forward pulse timing output by the pulsed magnetron sputtering power supply.
12. The control method according to claim 7 or 8, characterized in that: 1μs-5μs after the driving signals of the upper bridge arm semiconductor switching devices inside the left half-bridge circuit of the N group and the lower bridge arm semiconductor switching devices inside the right half-bridge circuit end, while the negative pulse current continues, the lower bridge arm semiconductor switching devices inside the left half-bridge circuit of the N group and the upper bridge arm semiconductor switching devices inside the right half-bridge circuit are turned on to apply a positive pulse to the target material.