Display panel, preparation method of display panel and electronic equipment

Abstract

The embodiment of the invention provides a display panel, a preparation method of the display panel and electronic equipment, and relates to the technical field of display, the display panel comprises a display area and a dam area, and the display panel comprises a substrate, at least one conductive layer, an insulating layer and a touch layer. The at least one conductive layer is located on one side of the substrate, and the conductive layer comprises signal wires; the insulating layer is located on the side, away from the substrate, of the at least one conductive layer, and the thickness of the insulating layer in the display area is larger than that of the insulating layer in the dam area; the touch layer is located on the side, away from the substrate, of the insulating layer and comprises touch wires, and the touch wires are located in the display area. According to the display panel, the thickness of the insulating layer in the display area is set to be larger than that of the insulating layer in the dam area, the risk that the metal wires in the dam area are damaged can be reduced while signal interference of the signal wires in the conductive layer on the touch wires in the touch layer is reduced, and therefore the touch effect and the display effect of the display panel can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing a display panel, and an electronic device. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display panels.

[0003] However, there are still some problems with display panels that need to be solved urgently. Summary of the Invention

[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a display panel, wherein the display panel includes a display area and a dam area, and the display panel includes:

[0005] substrate;

[0006] at least one conductive layer located on one side of the substrate, the conductive layer comprising a signal trace;

[0007] an insulating layer located on a side of at least one of the conductive layers away from the substrate, wherein the thickness of the insulating layer in the display area is greater than the thickness of the insulating layer in the dam area;

[0008] A touch layer is located on a side of the insulating layer away from the substrate, the touch layer includes touch traces, and the touch traces are located in the display area.

[0009] In some possible implementations, along a direction away from the substrate, the at least one conductive layer includes a first conductive layer, a second conductive layer, and a third conductive layer stacked in sequence;

[0010] Preferably, the display panel further includes a non-display area, and the non-display area includes the dam area;

[0011] Preferably, the dam area comprises a dam structure, and an orthographic projection of the dam structure on the substrate at least partially surrounds an orthographic projection of the display area on the substrate.

[0012] In some possible implementations, the insulating layer includes a first planarization layer, the first planarization layer is located on a side of the third conductive layer away from the substrate, and a thickness of the first planarization layer in the display area is greater than a thickness of the first planarization layer in the dam area;

[0013] Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the display area ranges from 3 μm to 5 μm;

[0014] Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the dam area ranges from 1.5 um to 2.2 um.

[0015] In some possible implementations, the display panel further includes a fourth conductive layer located on a side of the first planarization layer away from the substrate, and the fourth conductive layer is reused as the touch layer;

[0016] Preferably, the display panel further comprises an isolation structure located on a side of the fourth conductive layer away from the substrate;

[0017] Preferably, at least a portion of the fourth conductive layer extends to the bank region.

[0018] In some possible implementations, along a direction away from the substrate, the at least one conductive layer includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer stacked in sequence;

[0019] Preferably, the display panel further comprises an isolation conductive layer located on a side of the fourth conductive layer away from the substrate, the isolation conductive layer comprises an isolation structure and the touch wiring arranged on the same layer, and the isolation structure and the touch wiring are insulated from each other.

[0020] In some possible implementations, the insulating layer includes the first planarization layer and the second planarization layer, the first planarization layer is located on a side of the third conductive layer away from the substrate, and the second planarization layer is located between the isolation conductive layer and the first planarization layer;

[0021] Preferably, the thickness of the first planarization layer in the display area is greater than the thickness of the first planarization layer in the dam area, and / or the thickness of the second planarization layer in the display area is greater than the thickness of the second planarization layer in the dam area;

[0022] Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the display area ranges from 3 μm to 5 μm;

[0023] Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the dam area ranges from 1.5 μm to 2.2 μm;

[0024] Preferably, along a direction perpendicular to the substrate, the thickness of the second planarization layer in the display area ranges from 2.2 μm to 3 μm;

[0025] Preferably, along a direction perpendicular to the substrate, the thickness of the second planarization layer in the dam area ranges from 1.5 um to 2.2 um.

[0026] In some possible implementations, the isolation structure encloses an isolation opening, and the display panel further includes a light-emitting sub-pixel at least partially located within the isolation opening.

[0027] In some possible implementations, the light-emitting sub-pixel includes a first electrode layer, a light-emitting functional layer, and a second electrode layer stacked sequentially in a direction away from the substrate;

[0028] Preferably, the first electrode layer includes a first electrode, the light-emitting functional layer includes a light-emitting portion, the second electrode layer includes a second electrode, the isolation opening exposes at least a portion of the first electrode, the light-emitting portion is located in the isolation opening, and the second electrode is electrically connected to the isolation structure.

[0029] In some possible embodiments, the display panel further includes a first encapsulation layer located on the side of the second electrode layer away from the substrate, the first encapsulation layer including an encapsulation unit, the encapsulation unit at least partially extending from the side of the isolation structure to the side of the isolation structure away from the substrate, the side of the isolation structure being the surface of the isolation structure facing the isolation opening.

[0030] In some possible embodiments, the display panel further includes a pixel defining layer located on a side of the first electrode layer away from the substrate, and the isolation structure is located on a side of the pixel defining layer away from the substrate; the pixel defining layer includes a pixel opening exposing at least a portion of the first electrode, and an orthographic projection of the isolation structure on the substrate is located between orthographic projections of two adjacent pixel openings on the substrate;

[0031] Preferably, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the isolation opening on the substrate.

[0032] In some possible implementations, the isolation structure includes a first isolation portion and a second isolation portion stacked sequentially in a direction away from the substrate, and the orthographic projection of the first isolation portion on the substrate is located within the orthographic projection of the second isolation portion on the substrate.

[0033] In some possible implementations, the second electrode of the light-emitting sub-pixel is electrically connected to the first isolation portion; and / or the isolation structure further includes a third isolation portion located on a side of the first isolation portion facing the substrate, and the second electrode of the light-emitting sub-pixel is electrically connected to the third isolation portion;

[0034] Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes titanium metal.

[0035] In some possible implementations, the present application further provides a display panel, comprising a display area and a dam area, and comprising:

[0036] substrate;

[0037] at least one conductive layer located on one side of the substrate, the conductive layer comprising a signal trace;

[0038] an insulating layer located on a side of at least one of the conductive layers away from the substrate, wherein the thickness of the insulating layer in the display area is greater than the thickness of the insulating layer in the dam area;

[0039] A touch layer located on a side of the insulating layer away from the substrate and an isolation structure located on a side of the touch layer away from the substrate, the touch layer including touch traces, or an isolation conductive layer located on a side of the insulating layer away from the substrate, the isolation conductive layer including the isolation structure and the touch traces arranged on the same layer, the isolation structure and the touch traces being insulated from each other, and the touch traces being located in the display area.

[0040] In some possible implementations, the present application further provides a method for preparing a display panel, wherein the display panel includes a display area and a dam area, and the method includes:

[0041] providing a substrate;

[0042] forming at least one conductive layer on one side of the substrate, the conductive layer including a signal trace;

[0043] forming an insulating layer on a side of at least one of the conductive layers away from the substrate, wherein the thickness of the insulating layer in the display area is greater than the thickness of the insulating layer in the dam area;

[0044] A touch layer is formed on a side of the insulating layer away from the substrate. The touch layer includes touch traces, and the touch traces are located in the display area.

[0045] In some possible implementations, the step of forming an insulating layer on a side of the conductive layer away from the substrate includes:

[0046] forming an insulating material layer on a side of the conductive layer away from the substrate;

[0047] forming an insulating layer with a thickness greater than that in the dam area in the display area by using a half-tone mask;

[0048] Preferably, the insulating layer includes a first planarization layer, the touch layer reuses a fourth conductive layer, and the step of forming the touch layer on a side of the insulating layer away from the substrate includes:

[0049] forming a hard mask layer on a side of the first planarization layer away from the substrate;

[0050] forming a patterned organic glue layer on a side of the hard mask layer away from the substrate;

[0051] Based on the patterned organic glue layer, etching the hard mask layer in a direction perpendicular to the substrate;

[0052] Based on the etched hard mask layer, etching the first planarization layer in a direction perpendicular to the substrate to form a via hole in the display area and a dam structure in the dam area;

[0053] removing the patterned organic glue layer and the hard mask layer in sequence;

[0054] The fourth conductive layer is formed on a side of the first planarization layer away from the substrate, the fourth conductive layer includes the touch trace, and at least a portion of the fourth conductive layer extends to the dam area.

[0055] In some possible implementations, the present application further provides an electronic device, which includes the display panel described in the present application, or includes a display panel prepared by the method for preparing the display panel described in the present application.

[0056] Compared with the related art, this application has at least the following beneficial effects:

[0057] The present application provides a display panel, a method for preparing a display panel, and an electronic device. By setting the thickness of the insulating layer in the display area to be greater than the thickness of the insulating layer in the dam area, it is possible to reduce the interference of the signal lines in the conductive layer on the touch line signals in the touch layer while reducing the risk of damage to the metal lines in the dam area, thereby improving the touch effect and display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0059] Figure 1 A schematic cross-sectional view of a display panel in the related art provided in an embodiment of the present application;

[0060] Figure 2 A schematic cross-sectional view of a display panel provided in an embodiment of the present application;

[0061] Figure 3 A schematic top view of a display panel provided in an embodiment of the present application;

[0062] Figure 4 A schematic cross-sectional view of a touch wiring of a display panel provided by an embodiment of the present application located on a fourth conductive layer;

[0063] Figure 5 A schematic cross-sectional view of a display panel provided by an embodiment of the present application, in which the touch wiring is located in the fourth conductive layer and includes an isolation structure;

[0064] Figure 6 This is a cross-sectional schematic diagram of a touch wiring of a display panel provided by an embodiment of the present application located in an isolation conductive layer;

[0065] Figure 7 A second cross-sectional schematic diagram showing a touch wiring of a display panel provided by an embodiment of the present application located on an isolation conductive layer;

[0066] Figure 8 The third cross-sectional schematic diagram of the touch wiring of the display panel provided by the embodiment of the present application located in the isolation conductive layer;

[0067] Figure 9 A schematic cross-sectional view of a three-layer structure in an isolation structure provided in an embodiment of the present application;

[0068] Figure 10 A schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0069] Figure 11 A flowchart of a specific execution method of step S12 provided in an embodiment of the present application;

[0070] Figure 12 A cross-sectional schematic diagram of forming an insulating material layer on a side of a conductive layer away from a substrate provided in an embodiment of the present application;

[0071] Figure 13 A cross-sectional schematic diagram of a method for differentially designing the thickness of an insulating material layer in a display area and a thickness of a dam area using a half-tone mask according to an embodiment of the present application;

[0072] Figure 14 A flowchart of a specific execution method of step S14 provided in an embodiment of the present application;

[0073] Figure 15 A schematic cross-sectional view of forming a hard mask layer on a side of a first planarization layer away from a substrate according to an embodiment of the present application;

[0074] Figure 16 A cross-sectional schematic diagram of forming an organic adhesive material layer on a side of a hard mask layer away from a substrate provided in an embodiment of the present application;

[0075] Figure 17 A schematic cross-sectional view of an embodiment of the present application showing an organic adhesive material layer formed into a patterned organic adhesive layer through exposure and development;

[0076] Figure 18 A schematic cross-sectional view of a hard mask layer after being etched by a wet etching process on the basis of a patterned organic glue layer provided in an embodiment of the present application;

[0077] Figure 19 A schematic cross-sectional view of etching a first flat surface by a dry etching process based on etching a hard mask layer according to an embodiment of the present application;

[0078] Figure 20 A cross-sectional schematic diagram of removing a patterned organic adhesive layer according to an embodiment of the present application;

[0079] Figure 21 A cross-sectional schematic diagram of removing a hard mask layer by a wet etching process provided in an embodiment of the present application;

[0080] Figure 22 A schematic cross-sectional view of forming a fourth conductive layer on a side of the first planarization layer away from the substrate, provided in an embodiment of the present application.

[0081] Reference numerals: 101, substrate; 102, buffer layer; 103, gate insulating layer; 104, capacitor dielectric layer; 105, interlayer insulating layer; 106, first planarizing layer; 107, second planarizing layer; 108, semiconductor layer; 109, first conductive layer; 110, second conductive layer; 111, third conductive layer; 112, fourth conductive layer; 2, conductive layer; 3, insulating layer; 4, touch layer; 5, touch trace; 6, signal Routing; 7. Dam structure; 8. Metal routing; 9. Pixel definition layer; 91. Pixel opening; 10. Light-emitting portion; 11. Second electrode; 12. Packaging unit; 13. Isolation opening; 14. Isolation structure; 141. First isolation portion; 142. Second isolation portion; 143. Third isolation portion; 15. First electrode; 16. Isolation conductive layer; 17. Insulating material layer; 18. Hard mask layer; 19. Organic glue layer; 20. Via. DETAILED DESCRIPTION

[0082] To make the objectives, technical solutions, and advantages of the embodiments of the present application more clear, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Generally, the components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0083] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. All other embodiments obtained by persons of ordinary skill in the art based on the embodiments in the present application without making any creative efforts shall fall within the scope of protection of the present application.

[0084] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, it does not need to be further defined or explained in subsequent drawings.

[0085] In the description of this application, it should be noted that the terms "center," "upper," "lower," "vertical," "horizontal," "inner," "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the inventive product is typically placed when in use. These terms are intended solely to facilitate the description of this application and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," "third," etc., are used solely to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0086] It should be noted that, in the absence of conflict, different features in the embodiments of the present application can be combined with each other.

[0087] See Figure 1 The display panel in the related art includes a display area AA and a non-display area AB, wherein the non-display area AB includes a dam area AC. The display panel includes a substrate 101, a conductive layer 2 located on one side of the substrate 101, an insulating layer 3 located on the side of the conductive layer 2 away from the substrate 101, and a touch layer 4 located on the side of the insulating layer 3 away from the substrate 101. The conductive layer 2 includes a signal trace 6, and the touch layer 4 includes a touch trace 5. During the implementation of the present invention, the inventors discovered that the related art has the following problem: parasitic capacitance is generated between the signal trace 6 and the touch trace 5 located in the display area AA, thereby affecting the touch performance of the display panel.

[0088] In view of this, this embodiment provides a solution that can reduce the signal interference of the signal line 6 in the conductive layer 2 on the touch line 5 in the touch layer 4, and reduce the risk of damage to the metal line 8 in the dam area AC. The solution provided by this embodiment is described in detail below.

[0089] Patents PCT / CN2023 / 134518, 202410125513.9, 202311222756.6, 202311451935.7, 202311110881.8, and 202310759370.2 record relevant technical solutions for the isolation structure, and their contents are incorporated into this application by reference for reference.

[0090] See Figure 2 and Figure 3 This embodiment provides a display panel, which includes a display area AA and a dam area AC. The display panel also includes a non-display area AB, the non-display area AB includes the dam area AC, the dam area AC includes a dam structure 7, and the orthographic projection of the dam structure 7 on the substrate 101 at least partially surrounds the orthographic projection of the display area AA on the substrate 101. The display panel includes a substrate 101, at least one conductive layer 2, an insulating layer 3 and a touch layer 4.

[0091] At least one conductive layer 2 is located on one side of the substrate 101, and the conductive layer 2 includes a signal line 6. The signal line 6 may include at least one of a scan control signal line, a light emission control signal line, or a data signal line.

[0092] The insulating layer 3 is located on a side of the substrate 101 away from at least one conductive layer 2, and the thickness of the insulating layer 3 in the display area AA is greater than the thickness of the insulating layer 3 in the dam area AC; the touch layer 4 is located on a side of the insulating layer 3 away from the substrate 101, and the touch layer 4 includes a touch trace 5, which is located in the display area AA.

[0093] The insulating layer 3 can make the touch line 5 and the signal line 6 located in different film layers and insulated from each other, thereby increasing the thickness of the insulating layer 3 in the display area AA, reducing the parasitic capacitance between the touch line 5 and the signal line 6, thereby reducing the interference of mutual radio frequency signals between the touch line 5 and the signal line 6, and further improving the touch effect of the display panel.

[0094] The thickness of the insulating layer 3 located in the dam area AC is relatively thin, so the height of the dam structure 7 in the dam area AC is relatively low. During the preparation of the display panel, the organic glue layer is more easily adhered to the dam structure 7. In the process of patterning the metal trace 8 on the side of the dam structure 7 away from the substrate 101, it is not easy to damage the metal trace 8. For example, it is not easy to over-etch the metal trace 8 or etch away the side of the metal trace 8 away from the substrate 101, thereby improving the display performance of the display panel.

[0095] Based on the above design, in this embodiment, the thickness of the insulating layer 3 located in the display area AA and the thickness of the insulating layer 3 located in the dam area AC are differentiated. That is, by setting the thickness of the insulating layer 3 in the display area AA to be greater than the thickness of the insulating layer 3 in the dam area AC, the signal interference of the signal line 6 in the conductive layer 2 on the touch line 5 in the touch layer 4 can be reduced, while the risk of damage to the metal line 8 in the dam area AC can be reduced, thereby improving the touch effect and display effect of the display panel.

[0096] For some possible implementations, see Figure 4 , along a direction away from the substrate 101 , the at least one conductive layer 2 includes a first conductive layer 109 , a second conductive layer 110 and a third conductive layer 111 stacked in sequence.

[0097] The display panel also includes a buffer layer 102 located on one side of the substrate 101 and a semiconductor layer 108 located on the side of the buffer layer 102 away from the substrate 101, the semiconductor layer 108 includes a source region, a drain region and a channel region, the first conductive layer 109 includes a gate and a first capacitor plate, the second conductive layer 110 includes a second capacitor plate, the first capacitor plate and the second capacitor plate form a capacitor, the third conductive layer 111 includes a drain and a source, the drain is electrically connected to the drain region, the source is electrically connected to the source region, and the gate, source and drain form a switching device.

[0098] The display panel also includes a gate insulation layer 103, a capacitor dielectric layer 104, an interlayer insulation layer 105 and a first planarization layer 106. The gate insulation layer 103 is located between the buffer layer 102 and the first conductive layer 109. The capacitor dielectric layer 104 is located between the first conductive layer 109 and the second conductive layer 110. The interlayer insulation layer 105 is located between the second conductive layer 110 and the third conductive layer 111. The first planarization layer 106 is located on the side of the third conductive layer 111 away from the substrate 101. The semiconductor layer 108 is located between the buffer layer 102 and the gate insulation layer 103. The insulation layer 3 includes the first planarization layer 106. The thickness of the first planarization layer 106 in the display area AA is greater than the thickness of the first planarization layer 106 in the dam area AC.

[0099] The display panel also includes a fourth conductive layer 112 located on the side of the first planarization layer 106 away from the substrate 101. The fourth conductive layer 112 reuses the touch layer 4. The metal wiring of the fourth conductive layer 112 is connected to the drain of the third conductive layer 111. The fourth conductive layer 112 also includes a touch wiring 5. At least part of the fourth conductive layer 112 extends to the dam area AC.

[0100] In this embodiment, the touch line 5 is located in the fourth conductive layer 112, the signal line 6 is located in the first conductive layer 109, and / or the second conductive layer 110, and / or the third conductive layer 111, the first planarization layer 106 can serve as the insulating layer 3, and the first planarization layer 106 is located between the third conductive layer 111 and the fourth conductive layer 112.

[0101] The thickness of the first planarization layer 106 is designed differently in the display area AA and the dam area AC. Specifically, the thickness of the first planarization layer 106 in the display area AA is increased, while the thickness of the first planarization layer 106 in the dam area AC remains unchanged. This reduces the parasitic capacitance between the touch traces 5 and the signal traces 6 in the display area AA, thereby reducing radio frequency signal interference between the touch traces 5 and the signal traces 6 and minimizing damage to the metal traces 8 on the side of the dam structure 7 away from the substrate 101.

[0102] Preferably, see again Figure 4 In the direction perpendicular to the substrate 101, the thickness h1 of the first planarization layer 106 in the display area AA ranges from 3 μm to 5 μm. For example, the thickness h1 can be 3 μm, 3.5 μm, 4 μm, 4.5 μm, or 5 μm. Properly setting the thickness h1 can further reduce the parasitic capacitance between the touch traces 5 and the signal traces 6, thereby further reducing the interference of radio frequency signals between the touch traces 5 and the signal traces 6.

[0103] Preferably, see again Figure 4 In the direction perpendicular to the substrate 101, the thickness h2 of the first planarization layer 106 in the dam area AC ranges from 1.5 μm to 2.2 μm. For example, the thickness h2 can be 1.5 μm, 1.7 μm, 2 μm, or 2.2 μm. Properly setting the thickness h2 can further reduce damage to the metal traces extending to the fourth conductive layer 112 on the side of the dam structure 7 away from the substrate 101.

[0104] Preferably, see Figure 5 The display panel further includes an isolation structure 14 located on a side of the fourth conductive layer 112 away from the substrate 101 .

[0105] For some possible implementations, see Figure 6, along the direction away from the substrate 101, at least one conductive layer 2 includes a first conductive layer 109, a second conductive layer 110, a third conductive layer 111 and a fourth conductive layer 112 stacked in sequence, and the display panel also includes an isolation conductive layer 16 located on the side of the fourth conductive layer 112 away from the substrate 101. The isolation conductive layer 16 includes an isolation structure 14 and a touch trace 5 arranged on the same layer, and the isolation structure 14 and the touch trace 5 are insulated from each other.

[0106] The insulating layer 3 includes a first planarization layer 106 and a second planarization layer 107. The first planarization layer 106 is located on the side of the third conductive layer 111 away from the substrate 101, and the second planarization layer 107 is located between the isolation conductive layer 16 and the first planarization layer 106. The thickness of the first planarization layer 106 in the display area AA is greater than the thickness of the first planarization layer 106 in the dam area AC, and / or the thickness of the second planarization layer 107 in the display area AA is greater than the thickness of the second planarization layer 107 in the dam area AC.

[0107] In this embodiment, the touch line 5 is located in the isolation conductive layer 16, that is, the isolation conductive layer 16 is multiplexed as the touch layer, the signal line 6 is located in the first conductive layer 109, and / or, the signal line 6 is located in the second conductive layer 110, and / or, the signal line 6 is located in the third conductive layer 111, and / or, the signal line 6 is located in the fourth conductive layer 112, the first planarization layer 106 and the second planarization layer 107 can serve as the insulating layer 3, the first planarization layer 106 is located between the third conductive layer 111 and the fourth conductive layer 112, and the second planarization layer 107 is located between the fourth conductive layer 112 and the isolation conductive layer 16.

[0108] In some embodiments, see again Figure 6 , the thicknesses of the first planarization layer 106 and the second planarization layer 107 in the display area AA can be increased at the same time, while the thicknesses of the first planarization layer 106 and the second planarization layer 107 in the dam area AC remain unchanged.

[0109] In other embodiments, see Figure 7 , the thickness of the second planarization layer 107 in the display area AA can be increased, the thickness of the first planarization layer 106 and the second planarization layer 107 in the dam area AC remain unchanged, and the thickness of the first planarization layer 106 in the display area AA also remains unchanged.

[0110] In some other embodiments, see Figure 8 , the thickness of the first planarization layer 106 in the display area AA can be increased, the thickness of the first planarization layer 106 and the second planarization layer 107 in the dam area AC remains unchanged, and the thickness of the second planarization layer 107 in the display area AA also remains unchanged.

[0111] In this way, the thickness of the first planarization layer 106 and / or the second planarization layer 107 in the display area AA and the dam area AC is designed differently, which can reduce the parasitic capacitance between the touch line 5 and the signal line 6 located in the display area AA, thereby reducing the interference of mutual radio frequency signals between the touch line 5 and the signal line 6, and is less likely to damage the metal line 8 on the side of the dam structure 7 away from the substrate 101.

[0112] in, Figure 6 Increasing the thickness of the first planarization layer 106 and the second planarization layer 107 in the display area AA can increase the distance between the touch line 5 and the signal line 6 in the direction perpendicular to the substrate 101. Therefore, in this embodiment, the parasitic capacitance between the touch line 5 and the signal line 6 is smaller.

[0113] Increasing the thickness of the first planarization layer 106 and / or the second planarization layer 107 in the display area AA can further improve the flatness of the display area AA, thereby improving the color deviation of the viewing angle of the display panel and further enhancing the display effect of the display panel.

[0114] Preferably, see again Figure 6 In the direction perpendicular to the substrate 101, the thickness h3 of the second planarization layer 107 in the display area AA ranges from 2.2 μm to 3 μm. For example, the thickness h3 can be 2.2 μm, 2.3 μm, 2.5 μm, 2.8 μm, or 3 μm. Properly setting the thickness h3 can further reduce the parasitic capacitance between the touch trace 5 and the signal trace 6, thereby further reducing the interference of radio frequency signals between the touch trace 5 and the signal trace 6.

[0115] Preferably, see again Figure 6 In the direction perpendicular to the substrate 101, the thickness h4 of the second planarization layer 107 in the dam area AC ranges from 1.5 μm to 2.2 μm. For example, the thickness h4 can be 1.5 μm, 1.7 μm, 2 μm, or 2.2 μm. Properly setting the thickness h4 can further reduce damage to the metal traces extending to the fourth conductive layer 112 on the side of the dam structure 7 away from the substrate 101.

[0116] For some possible implementations, see again Figure 5 and Figure 6The isolation structure 14 encloses an isolation opening 13. The display panel further includes a light-emitting sub-pixel at least partially located within the isolation opening 13. The light-emitting sub-pixel includes a first electrode layer, a light-emitting functional layer, and a second electrode layer sequentially stacked in a direction away from the substrate 101. The first electrode layer includes a first electrode 15, the light-emitting functional layer includes a light-emitting portion 10, and the second electrode layer includes a second electrode 11. The isolation opening 13 exposes at least a portion of the first electrode 15, and the light-emitting portion 10 is located within the isolation opening 13. Preferably, the second electrode 11 is electrically connected to the isolation structure 14.

[0117] The display panel further includes a pixel defining layer 9 located on a side of the first electrode layer away from the substrate 101. An isolation structure 14 is located on a side of the pixel defining layer 9 away from the substrate 101. The pixel defining layer 9 includes a pixel opening 91 that exposes at least a portion of the first electrode 15. The orthographic projection of the isolation structure 14 on the substrate 101 is located between the orthographic projections of two adjacent pixel openings 91 on the substrate 101. Preferably, the orthographic projection of the pixel opening 91 on the substrate 101 is located within the orthographic projection of the isolation opening 13 on the substrate 101.

[0118] The metal traces of the fourth conductive layer 112 are electrically connected to the first electrode 15. When forming the light-emitting functional layer, the light-emitting functional layer is disconnected to form multiple spaced light-emitting portions 10. When forming the second electrode layer, the second electrode layer is disconnected to form multiple spaced second electrodes 11. The isolation structure 14 includes a conductive material, and the second electrodes 11 are electrically connected to the isolation structure 14. One first electrode 15, one light-emitting portion 10, and one second electrode 11 form a light-emitting sub-pixel. The first electrode 15 can be an anode, and the second electrode 11 can be a cathode.

[0119] For some possible implementations, see again Figure 5 and Figure 6 The display panel also includes a first packaging layer located on the side of the second electrode layer away from the substrate 101. The first packaging layer includes a packaging unit 12. The packaging unit 12 extends from the side of the isolation structure 14 to the side of the isolation structure 14 away from the substrate 101. The side of the isolation structure 14 is the surface of the isolation structure 14 facing the isolation opening 13.

[0120] The first encapsulation layer is disconnected at the isolation structure 14 to form a plurality of spaced-apart encapsulation units 12 . The encapsulation units 12 can independently encapsulate light-emitting sub-pixels, thereby improving the display characteristics of the display panel.

[0121] Preferably, the display panel further comprises a second encapsulation layer located on a side of the first encapsulation layer away from the substrate 101, and a third encapsulation layer located on a side of the second encapsulation layer away from the substrate 101. In this way, the light-emitting sub-pixels can be better encapsulated.

[0122] Preferably, the display panel further comprises a filter and a cover plate located on a side of the third encapsulation layer away from the substrate 101 , and the cover plate can protect the film layer in the display panel.

[0123] For some possible implementations, see again Figure 8 The isolation structure 14 includes a first isolation portion 141 and a second isolation portion 142 stacked in sequence in a direction away from the substrate 101 , and the orthographic projection of the first isolation portion 141 on the substrate 101 is located within the orthographic projection of the second isolation portion 142 on the substrate 101 .

[0124] Because the second isolation portion 142 is located on the side of the first isolation portion 141 away from the substrate 101 and the lateral width of the second isolation portion 142 is greater than the lateral width of the first isolation portion 141, the second isolation portion 142 disconnects the light-emitting functional layer and the second electrode layer at the isolation structure 14. Thus, the isolation structure 14 formed by the first isolation portion 141 and the second isolation portion 142 can more easily enable independent packaging of each light-emitting sub-pixel.

[0125] For some possible implementations, see again Figure 8 , the second electrode 11 of the light-emitting sub-pixel is electrically connected to the first isolation portion 141; see Figure 9 , and / or, the isolation structure 14 further includes a third isolation portion 143 located on the side of the first isolation portion 141 facing the substrate 101 , and the second electrode 11 of the light-emitting sub-pixel is electrically connected to the third isolation portion 143 .

[0126] The third isolation portion 143 may be made of molybdenum; and / or the first isolation portion 141 may be made of aluminum; and / or the second isolation portion 142 may be made of titanium. Thus, when the isolation structure 14 separates the second electrode layer into the second electrode 11, the second electrode 11 can be more easily electrically connected to the first isolation portion 141 and / or the third isolation portion 143.

[0127] In some possible embodiments, the present application further provides a display panel, which includes a display area AA and a dam area AC, and includes a substrate 101, at least one conductive layer 2, an insulating layer 3, a touch layer 4 and an isolation structure 14.

[0128] At least one conductive layer 2 is located on one side of the substrate 101 , and the conductive layer 2 includes a signal trace 6 .

[0129] The insulating layer 3 is located on a side of the substrate 101 away from the at least one conductive layer 2 , and the thickness of the insulating layer 3 in the display area AA is greater than the thickness of the insulating layer 3 in the bank area AC.

[0130] In some embodiments, see again Figure 5The touch layer 4 is located on a side of the insulating layer 3 away from the substrate 101 , the isolation structure 14 is located on a side of the touch layer 4 away from the substrate 101 , and the touch layer 4 includes touch traces 5 .

[0131] Alternatively, in other embodiments, see again Figure 6 The isolation conductive layer 16 is located on the side of the insulation layer 3 away from the substrate 101. The isolation conductive layer 16 includes an isolation structure 14 and a touch line 5 arranged on the same layer. The isolation structure 14 and the touch line 5 are insulated from each other. The touch line 5 is located in the display area AA.

[0132] In this way, by setting the thickness of the insulating layer 3 in the display area AA to be greater than the thickness of the insulating layer 3 in the dam area AC, the signal interference of the signal line 6 in the conductive layer 2 on the touch line 5 in the touch layer 4 can be reduced while reducing the risk of damage to the metal line 8 in the dam area AC, thereby improving the touch effect and display effect of the display panel.

[0133] In summary, the present application differentiates the thickness of the insulating layer 3 located in the display area AA and the thickness of the insulating layer 3 located in the dam area AC. That is, by setting the thickness of the insulating layer 3 in the display area AA to be greater than the thickness of the insulating layer 3 in the dam area AC, the signal interference of the signal line 6 in the conductive layer 2 on the touch line 5 in the touch layer 4 can be reduced while reducing the risk of damage to the metal line 8 in the dam area AC, thereby improving the touch effect and display effect of the display panel.

[0134] For some possible implementations, see Figure 10 The present application also provides a method for manufacturing a display panel, wherein the display panel includes a display area AA and a dam area AC, and the method includes:

[0135] S10: providing a substrate 101.

[0136] S11 : forming at least one conductive layer 2 on one side of the substrate 101 , wherein the conductive layer 2 includes a signal trace 6 .

[0137] The signal wiring 6 may include at least one of a scanning control signal wiring, a light emitting control signal wiring, or a data signal wiring.

[0138] S12: forming an insulating layer 3 on a side of at least one conductive layer 2 away from the substrate 101, wherein the thickness of the insulating layer 3 in the display area AA is greater than the thickness of the insulating layer 3 in the dam area AC.

[0139] S13 : forming a touch layer 4 on a side of the insulating layer 3 away from the substrate 101 . The touch layer 4 includes touch traces 5 . The touch traces 5 are located in the display area AA.

[0140] The insulating layer 3 can make the touch line 5 and the signal line 6 located in different film layers and insulated from each other. Increasing the thickness of the insulating layer 3 in the display area AA can reduce the parasitic capacitance between the touch line 5 and the signal line 6, thereby reducing the interference of the radio frequency signals between the touch line 5 and the signal line 6, and further improving the touch effect of the display panel.

[0141] The thickness of the insulating layer 3 located in the dam area AC is relatively thin, so the height of the dam structure 7 in the dam area AC is relatively low. During the preparation of the display panel, the organic glue layer is more easily adhered to the dam structure 7. In the process of patterning the metal trace 8 on the side of the dam structure 7 away from the substrate 101, it is not easy to damage the metal trace 8. For example, it is not easy to over-etch the metal trace 8 or etch away the side of the metal trace 8 away from the substrate 101, thereby improving the display performance of the display panel.

[0142] For some possible implementations, see Figure 11 The step of forming an insulating layer 3 on a side of the conductive layer 2 away from the substrate 101 includes:

[0143] S121 : forming an insulating material layer 17 on a side of the conductive layer 2 away from the substrate 101 .

[0144] See Figure 12 An insulating material layer 17 is formed on the side of the conductive layer 2 away from the substrate 101 , and the thickness of the insulating material layer 17 in the display area AA is equal to the thickness in the dam area AC.

[0145] S122: Using a half-tone mask, an insulating layer 3 is formed, the thickness of which is greater in the display area AA than in the dam area AC.

[0146] See Figure 13 , through a half-tone mask, the thickness of the insulating material layer 17 in the display area AA and the thickness in the dam area AC are differentially designed to form an insulating layer 3. Specifically, the thickness of the insulating layer 3 in the display area AA is greater than the thickness in the dam area AC.

[0147] Preferably, in some embodiments, see Figure 14 The insulating layer 3 includes a first planarization layer 106, and the touch layer 4 reuses the fourth conductive layer 112. The step of forming the touch layer 4 on the side of the insulating layer 3 away from the substrate 101 includes:

[0148] S141 : forming a hard mask layer 18 on a side of the first planarization layer 106 away from the substrate 101 .

[0149] See Figure 15A hard mask layer 18 is formed on the side of the first planarization layer 106 away from the substrate 101. The material of the hard mask layer 18 may include indium tin oxide or indium zinc oxide. The hard mask layer 18 can make it easier to differentiate the thickness of the first planarization layer 106 in the display area AA and the thickness in the dam area AC.

[0150] S142 : forming a patterned organic glue layer 19 on a side of the hard mask layer 18 away from the substrate 101 .

[0151] See Figure 16 , an organic glue material layer is formed on a side of the hard mask layer 18 away from the substrate 101 .

[0152] See Figure 17 According to actual conditions, the organic glue material layer is exposed and developed to form a patterned organic glue layer 19.

[0153] S143 : Based on the patterned organic glue layer 19 , the hard mask layer 18 is etched along a direction perpendicular to the substrate 101 .

[0154] See Figure 18 After forming the patterned organic glue layer 19 , the hard mask layer 18 is etched by a wet etching process on the basis of the patterned organic glue layer 19 .

[0155] S144 : Based on the etched hard mask layer 18 , the first planarization layer 106 is etched in a direction perpendicular to the substrate 101 to form a via hole 20 in the display area AA and a dam structure 7 in the dam area AC.

[0156] See Figure 19 On the basis of etching the hard mask layer 18, the first flat layer is etched by a dry etching process to form a via hole 20 in the display area AA and a dam structure 7 in the dam area AC.

[0157] S145: removing the patterned organic glue layer 19 and the hard mask layer 18 in sequence.

[0158] See Figure 20 , remove the patterned organic glue layer 19.

[0159] See Figure 21 , the hard mask layer 18 is removed by a wet etching process.

[0160] S146 : forming a fourth conductive layer 112 on a side of the first planarization layer 106 away from the substrate 101 , wherein the fourth conductive layer 112 includes the touch trace 5 , and at least a portion of the fourth conductive layer 112 extends to the dam area AC.

[0161] See Figure 22A fourth conductive layer 112 is formed on the side of the first planarization layer 106 away from the substrate 101. The metal wiring of the fourth conductive layer 112 is electrically connected to the drain of the third conductive layer 111 through the via 20 on the first planarization layer 106. The fourth conductive layer 112 also includes a touch wiring 5. The metal wiring 8 of the fourth conductive layer 112 extends to the side of the dam structure 7 of the dam area AC away from the substrate 101.

[0162] Preferably, in other embodiments, the step of forming the touch layer 4 on the side of the insulating layer 3 away from the substrate 101 includes: forming an isolation conductive layer 16 on the side of the insulating layer 3 away from the substrate 101, the isolation conductive layer 16 includes an isolation structure 14 and a touch trace 5 arranged on the same layer, the isolation structure 14 and the touch trace 5 are insulated from each other, and the touch trace 5 is located in the display area AA.

[0163] In the display panel formed by the above method, the thickness of the first planarization layer 106 in the display area AA is set to be greater than the thickness of the first planarization layer 106 in the dam area AC. This can reduce the interference of the signal line 6 in the first conductive layer 109 and / or the second conductive layer 110 and / or the third conductive layer 111 on the touch line 5, while reducing the risk of damage to the metal line 8 in the dam area AC, thereby improving the touch effect and display effect of the display panel.

[0164] In some possible implementations, the present application further provides an electronic device comprising the display panel of the present application, or comprising a display panel produced by the method for producing a display panel of the present application. The electronic device may include a device with image processing capabilities, such as a server, a personal computer, or a laptop computer. Because the electronic device includes the display panel of the present application, the electronic device has better display and touch effects.

[0165] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0166] The above-described embodiments merely illustrate several implementations of the present invention, and while their descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent. It should be noted that a person skilled in the art would be able to make numerous variations and improvements without departing from the spirit of the present invention, all of which fall within the scope of protection of the present invention. Therefore, the scope of protection of the patent for this invention shall be determined by the appended claims.

Claims

1. A display panel, characterized in that: The display panel includes a display area and a dam area, and the display panel includes: substrate; at least one conductive layer located on one side of the substrate, the conductive layer comprising a signal trace; an insulating layer located on a side of at least one of the conductive layers away from the substrate, wherein the thickness of the insulating layer in the display area is greater than the thickness of the insulating layer in the dam area; A touch layer is located on a side of the insulating layer away from the substrate, the touch layer includes touch traces, and the touch traces are located in the display area.

2. The display panel according to claim 1, wherein: Along a direction away from the substrate, the at least one conductive layer includes a first conductive layer, a second conductive layer and a third conductive layer stacked in sequence; Preferably, the display panel further includes a non-display area, and the non-display area includes the dam area; Preferably, the dam area comprises a dam structure, and an orthographic projection of the dam structure on the substrate at least partially surrounds an orthographic projection of the display area on the substrate.

3. The display panel according to claim 2, wherein: The insulating layer includes a first planarization layer, the first planarization layer is located on a side of the third conductive layer away from the substrate, and a thickness of the first planarization layer in the display area is greater than a thickness of the first planarization layer in the dam area; Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the display area ranges from 3 μm to 5 μm; Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the dam area ranges from 1.5 um to 2.2 um.

4. The display panel according to claim 3, wherein: The display panel further includes a fourth conductive layer located on a side of the first planarization layer away from the substrate, the fourth conductive layer being reused as the touch layer; Preferably, at least a portion of the fourth conductive layer extends to the bank region; Preferably, the display panel further comprises an isolation structure located on a side of the fourth conductive layer away from the substrate.

5. The display panel according to claim 1, wherein: Along a direction away from the substrate, the at least one conductive layer includes a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer stacked in sequence; Preferably, the display panel further comprises an isolation conductive layer located on a side of the fourth conductive layer away from the substrate, the isolation conductive layer comprises an isolation structure and the touch wiring arranged on the same layer, and the isolation structure and the touch wiring are insulated from each other.

6. The display panel according to claim 5, wherein: The insulating layer includes a first planarization layer and a second planarization layer, the first planarization layer is located on a side of the third conductive layer away from the substrate, and the second planarization layer is located between the isolation conductive layer and the first planarization layer; Preferably, the thickness of the first planarization layer in the display area is greater than the thickness of the first planarization layer in the dam area, and / or the thickness of the second planarization layer in the display area is greater than the thickness of the second planarization layer in the dam area; Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the display area ranges from 3 μm to 5 μm; Preferably, along a direction perpendicular to the substrate, the thickness of the first planarization layer in the dam area ranges from 1.5 μm to 2.2 μm; Preferably, along a direction perpendicular to the substrate, the thickness of the second planarization layer in the display area ranges from 2.2 μm to 3 μm; Preferably, along a direction perpendicular to the substrate, the thickness of the second planarization layer in the dam area ranges from 1.5 um to 2.2 um.

7. The display panel according to any one of claims 4 to 6, characterized in that: The isolation structure encloses an isolation opening, and the display panel further includes a light-emitting sub-pixel at least partially located in the isolation opening.

8. The display panel according to claim 7, wherein: The light-emitting sub-pixel comprises a first electrode layer, a light-emitting functional layer, and a second electrode layer stacked in sequence in a direction away from the substrate; Preferably, the first electrode layer includes a first electrode, the light-emitting functional layer includes a light-emitting portion, the second electrode layer includes a second electrode, the isolation opening exposes at least a portion of the first electrode, and the light-emitting portion is located within the isolation opening; Preferably, the second electrode is electrically connected to the isolation structure; Preferably, the display panel also includes a first encapsulation layer located on the side of the second electrode layer away from the substrate, the first encapsulation layer includes an encapsulation unit, the encapsulation unit at least partially extends from the side of the isolation structure to the side of the isolation structure away from the substrate, and the side of the isolation structure is the surface of the isolation structure facing the isolation opening.

9. The display panel according to claim 8, wherein: The display panel further includes a pixel defining layer located on a side of the first electrode layer away from the substrate, the isolation structure being located on a side of the pixel defining layer away from the substrate; the pixel defining layer including a pixel opening exposing at least a portion of the first electrode, and an orthographic projection of the isolation structure on the substrate being located between orthographic projections of two adjacent pixel openings on the substrate; Preferably, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the isolation opening on the substrate.

10. The display panel according to claim 7, wherein: The isolation structure includes a first isolation portion and a second isolation portion stacked in sequence in a direction away from the substrate, wherein an orthographic projection of the first isolation portion on the substrate is located within an orthographic projection of the second isolation portion on the substrate.

11. The display panel according to claim 10, wherein: The second electrode of the light-emitting sub-pixel is electrically connected to the first isolation portion; and / or the isolation structure further includes a third isolation portion located on a side of the first isolation portion facing the substrate, and the second electrode of the light-emitting sub-pixel is electrically connected to the third isolation portion; Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes titanium metal.

12. A display panel, characterized in that: The display panel includes a display area and a dam area, and the display panel includes: substrate; at least one conductive layer located on one side of the substrate, the conductive layer comprising a signal trace; an insulating layer located on a side of at least one of the conductive layers away from the substrate, wherein the thickness of the insulating layer in the display area is greater than the thickness of the insulating layer in the dam area; A touch layer located on a side of the insulating layer away from the substrate and an isolation structure located on a side of the touch layer away from the substrate, the touch layer including touch traces, or an isolation conductive layer located on a side of the insulating layer away from the substrate, the isolation conductive layer including the isolation structure and the touch traces arranged on the same layer, the isolation structure and the touch traces being insulated from each other, and the touch traces being located in the display area.

13. A method for preparing a display panel, characterized in that: The display panel includes a display area and a dam area, and the method includes: providing a substrate; forming at least one conductive layer on one side of the substrate, the conductive layer including a signal trace; forming an insulating layer on a side of at least one of the conductive layers away from the substrate, wherein the thickness of the insulating layer in the display area is greater than the thickness of the insulating layer in the dam area; A touch layer is formed on a side of the insulating layer away from the substrate. The touch layer includes touch traces, and the touch traces are located in the display area.

14. The method for manufacturing a display panel according to claim 13, wherein: The step of forming an insulating layer on a side of the conductive layer away from the substrate comprises: forming an insulating material layer on a side of the conductive layer away from the substrate; forming an insulating layer with a thickness greater than that in the dam area in the display area by using a half-tone mask; Preferably, the insulating layer includes a first planarization layer, the touch layer reuses the fourth conductive layer, and the step of forming the touch layer on a side of the insulating layer away from the substrate includes: forming a hard mask layer on a side of the first planarization layer away from the substrate; forming a patterned organic glue layer on a side of the hard mask layer away from the substrate; Based on the patterned organic glue layer, etching the hard mask layer in a direction perpendicular to the substrate; Based on the etched hard mask layer, etching the first planarization layer in a direction perpendicular to the substrate to form a via hole in the display area and a dam structure in the dam area; removing the patterned organic glue layer and the hard mask layer in sequence; The fourth conductive layer is formed on a side of the first planarization layer away from the substrate, the fourth conductive layer includes the touch trace, and at least a portion of the fourth conductive layer extends to the dam area.

15. An electronic device, characterized in that: The electronic device comprises the display panel according to any one of claims 1 to 12, or comprises a display panel manufactured by the method for manufacturing a display panel according to claim 13 or 14.

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