Analog fast AGC circuit for a transimpedance amplifier

Abstract

The application discloses an analog fast automatic gain control circuit for a transimpedance amplifier, and belongs to the field of optical communication transimpedance amplifiers. The technical scheme introduces a gain compensation unit in a feedback loop, and comprises an operational amplifier A2, a resistor R2, a MOS tube M1, a MOS tube M2, a resistor R1, a current source, a MOS tube M3, a resistor R3, and a capacitor C2. When the MOS tube M1 works in a linear region, the equivalent resistance is reduced, and the source stage negative feedback circuit cooperates to compensate for the transconductance reduction of the controlled gain adjustment element, so that the open loop gain of the automatic gain control loop is maintained stable. The scheme solves the problem that the response time of the traditional analog automatic gain control is inconsistent when the input signal amplitude changes, realizes consistent loop response time under different input amplitudes, significantly improves the upper limit of the circuit response speed design, avoids the defect that the output amplitude suddenly changes when the digital gain control scheme is switched, and ensures the output stability and high-speed performance.

Description

Technical Field

[0001] This invention relates to the field of transimpedance amplifiers for optical communication, and more specifically to an analog fast automatic gain control circuit for transimpedance amplifiers. Background Technology

[0002] In optical communication transimpedance amplifier applications, the amplitude of the input signal varies greatly, so a gain control circuit is needed to adjust the gain of the transimpedance amplifier to match the amplitude of the input signal and avoid the output signal amplitude being too large, which would cause the circuit to operate in an undesirable operating range.

[0003] Since manual gain control is cumbersome, transimpedance amplifiers typically have built-in automatic gain control, which adjusts the gain by detecting the signal amplitude, thus creating a feedback loop. Due to the presence of this feedback loop, loop stability must be considered during the design phase; excessively high response speeds can lead to loop instability.

[0004] Automatic gain control (AGC) activates only when the input signal amplitude reaches a certain level. The transimpedance gain it controls decreases as the input signal amplitude increases. Initially, when the transimpedance gain is relatively high, the loop stability is worst, requiring assurance of loop stability during AGC activation. As the input signal amplitude increases, the MOSFET controlling Rf in the transimpedance circuit enters the linear region, reducing the gain. This decrease in open-loop gain leads to a longer loop response time. (Refer to...) Figure 1 .

[0005] In some applications of existing transimpedance amplifiers, there is no requirement for circuit settling time. The dominant pole of the automatic gain control loop of the transimpedance amplifier can be controlled to a very low value, so as to obtain reliable stability by sacrificing response speed.

[0006] Some applications have high requirements for circuit operating point settling time and require rapid setup. Taking an analog automatic gain control (AGC) scheme as an example, when the input signal amplitude changes, the transimpedance gain of the transimpedance amplifier adjusts accordingly. The open-loop gain of the AGC circuit also changes with the state of the devices in the loop, as shown in the attached diagram. Figure 1 When MOSFET M1 is turned on, the gain formed by it and resistor RF changes with the state of MOSFET M1. Consequently, the loop response slows down as the open-loop gain decreases, and the voltage response is as follows: Figure 4 As shown. Due to the limitations of existing analog AGC, fast-response transimpedance amplifiers employ digital automatic gain control (AGC). Digital gain control has a significant advantage in response speed, but in terms of output amplitude, the output amplitude of the transimpedance amplifier will suddenly decrease during gain switching, making it unsuitable for some higher-speed linear transimpedance amplifiers. Summary of the Invention

[0007] To address the aforementioned shortcomings in the prior art, this invention provides an analog fast automatic gain control circuit for transimpedance amplifiers.

[0008] To achieve the above-mentioned objectives, the technical solution adopted by this invention is as follows:

[0009] An analog fast automatic gain control circuit for a transimpedance amplifier includes an existing gain control loop and adds a gain compensation unit to the existing gain notification loop. The gain compensation unit is configured to compensate for gain changes of the controlled gain adjustment element to maintain the open-loop gain stability of the automatic gain control loop, thereby ensuring that the loop response time is consistent under different input signal amplitudes.

[0010] Furthermore, the gain compensation unit includes an operational amplifier A2, a resistor R2, MOSFETs M1 and M2, a resistor R1, a current source, a MOSFET M3, a resistor R3, and a capacitor C2; wherein, the operational amplifier A2 is connected to the digital logic module; the resistor R2 is connected to the MOSFETs M1, A2, and M2; the MOSFET M1 is connected to the resistors R2 and M2; the MOSFET M2 is connected to the resistors R2, A2, M1, and R1; the resistor R1 is connected to the MOSFETs M2, M3, and R3; the current source is connected to the resistor R1; the MOSFET M3 is connected to the resistors R1, M2, R3, and C2; the resistor R3 is connected to the MOSFETs M3, R1, M2, and C2; and the capacitor C2 is connected to the MOSFET M3 and R3.

[0011] Furthermore, the MOS transistor M1, as a gain compensation element, has a reduced equivalent resistance when operating in the linear region, which increases the gain of the source-level negative feedback circuit composed of resistor R1, MOS transistor M2, resistor R2, and MOS transistor M1, in order to offset the gain reduction caused by the decrease in transconductance of MOS transistor M1; wherein, the MOS transistor M1 is connected in parallel with resistor R2, and its equivalent resistance change is opposite to the gain change of the controlled gain adjustment element.

[0012] Furthermore, the MOSFET M3 acts as a reset switch, reducing the filtering time constant after being turned on; the resistor R3, connected in parallel with the MOSFET M3, forms the main pole of the automatic gain control loop with the capacitor C2; when the MOSFET M3 is turned on, the main pole moves towards higher frequencies; the capacitor C2 is used for filtering.

[0013] Furthermore, the operational amplifier A2 is configured to output a raised voltage when the input signal voltage vin is lower than the reference voltage VREF, thereby controlling the MOSFET M2 to turn on to form a feedback loop; the digital logic module is used to detect the logic output state; and the current source provides bias current.

[0014] The present invention has the following beneficial effects:

[0015] The automatic gain control of this invention has stability and fast response. By detecting and compensating for the gain of the automatic gain control loop, the change in its gain cancels out the change in the controlled transimpedance gain, ensuring that the response characteristics of the automatic gain control loop are consistent at different transimpedance gains, and improving the design upper limit of the slowest response speed. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of an existing automatic gain control loop.

[0017] Figure 2 This is a schematic diagram of the automatic gain control circuit of the present invention.

[0018] Figure 3 This is an embodiment of a conventional automatic gain control circuit.

[0019] Figure 4 This represents the response of the automatic gain control signal in a traditional architecture under different input amplitudes.

[0020] Figure 5 This invention relates to the response of the automatic gain control signal to the structure under different input amplitudes. Detailed Implementation

[0021] The specific embodiments of the present invention are described below to enable those skilled in the art to understand the present invention. However, it should be understood that the present invention is not limited to the scope of the specific embodiments. For those skilled in the art, various changes are obvious as long as they are within the spirit and scope of the present invention as defined and determined by the appended claims. All inventions utilizing the concept of the present invention are protected.

[0022] An analog fast automatic gain control circuit for a transimpedance amplifier includes an existing gain control loop and adds a gain compensation unit to the existing gain notification loop. The gain compensation unit is configured to compensate for gain changes of the controlled gain adjustment element to maintain the open-loop gain stability of the automatic gain control loop, thereby ensuring that the loop response time is consistent under different input signal amplitudes.

[0023] like Figure 2As shown, the gain compensation unit includes operational amplifier A2, resistor R2, MOSFET M1, MOSFET M2, resistor R1, current source, MOSFET M3, resistor R3, and capacitor C2. Operational amplifier A2 is connected to the digital logic module. Resistor R2 is connected to MOSFET M1, operational amplifier A2, and MOSFET M2. MOSFET M1 is connected to resistor R2 and MOSFET M2. MOSFET M2 is connected to resistor R2, operational amplifier A2, MOSFET M1, and resistor R1. Resistor R1 is connected to MOSFET M2, MOSFET M3, and resistor R3. The current source is connected to resistor R1. MOSFET M3 is connected to resistor R1, MOSFET M2, resistor R3, and capacitor C2. Resistor R3 is connected to MOSFET M3, resistor R1, MOSFET M2, and capacitor C2. Capacitor C2 is connected to MOSFET M3 and resistor R3.

[0024] Figure 2 vin is Figure 1 The output signal of the AGC preamplifier. When the photodiode is not producing light, the vin level is higher than VREF, amplifier A2 outputs a high level, and Vout1 outputs a low level.

[0025] when Figure 1 When the photodiode generates current, the output of the first stage decreases, and Figure 2 VIN levels in China are declining. Figure 2 In the middle, vin below VREF will cause amplifier A2 to work, and when Vout1 voltage is high enough, it will cause... Figure 1 When M1 is activated, a feedback loop is formed.

[0026] Figure 1 The resistor Rf is connected in parallel with the MOSFET M1. Figure 2 In the middle resistor R2 and MOSFET M1 are connected in parallel, when Figure 1 When the current generated by the photodiode is large enough Figure 1 MOSFET M1 and Figure 2 MOSFET M1 will be turned on simultaneously. Once both MOSFETs M1 in the diagrams enter the linear region... Figure 1 The loop gain will decrease due to the reduced transconductance of MOSFET M1. Figure 2 The function of M1 is a degenerate resistor. When operating in the linear region, its equivalent resistance decreases, which increases the source-level negative feedback circuit it forms. Figure 2 The gain of R1, R2, M1, and M2 in the two diagrams is shown. The MOSFET M1 in both diagrams has opposite effects on the gain of the automatic gain control loop, thus canceling each other out. This keeps the gain of the entire automatic gain control loop relatively stable, resulting in a smaller variation in response time under different transimpedance gain conditions.

[0027] If adopted Figure 3 The integrator is used for AGC voltage control when Figure 1 When MOSFET M1 enters the linear region, its transconductance decreases, and the open-loop gain of the loop also decreases. The loop response speed decreases as the gate voltage of the MOSFET increases (the transconductance of the MOSFET decreases).

[0028] like Figure 1 As shown, the external photodiode receives light and generates a photocurrent, which is input into the TIA. After passing through resistor R1 (Rf), the current is converted and output as a voltage signal. The converted voltage signal is used as the input signal of the automatic gain control circuit 4 (AGC). Figure 2 (Vin), and reference level ( Figure 2 The VREF is compared and the control voltage is output ( Figure 2 (vout1) to adjust Figure 1 The on-resistance of MOSFET M1. When the TIA input current increases to a certain level, the AGC control... Figure 1 When MOSFET M1 is turned on, it is connected in parallel with resistor Rf to reduce the equivalent feedback transresistance and prevent the output voltage from being too high, which would cause the circuit to operate in an undesirable region.

[0029] exist Figure 1 The larger the current generated by the photodiode, Figure 2 The lower the vin voltage, the more amplifier A2 starts working when vin is below VREF, resulting in a lower amplifier output voltage and a higher Vout1 voltage. A higher Vout1 voltage will control... Figure 1 The MOSFET M1 is turned on to prevent the VIN voltage from being too low, thus forming a feedback loop.

[0030] Figure 2 The primary function of capacitor C2 is filtering. Resistor R3, connected in parallel with MOSFET M3, forms the dominant pole of the automatic gain control loop with capacitor C2. Because the circuit requires rapid setup, MOSFET M3 is added as a switch. Turning on MOSFET M3 at specific times reduces the filtering time constant, thereby improving the chip's response speed. After MOSFET M3 is turned on, the dominant pole of the loop will shift towards higher frequencies, but this will reduce the overall stability of the loop.

[0031] When the loop is first formed Figure 1 MOSFET M1 is still in the saturation region, where the loop gain is at its maximum and the system is most prone to instability. To ensure loop stability, Figure 2 The switching resistor in the middle cannot be made too small to avoid the dominant pole being too high. If the dominant pole remains unchanged and no other treatment is applied, when... Figure 1 When MOSFET M1 enters the linear region, the open-loop gain of the feedback loop will decrease. The lower the open-loop gain, the slower the loop response speed.

[0032] Figure 2 A feedback MOSFET M1 is introduced. When Figure 1 When MOSFET M1 is turned on, the AGC forms a feedback loop with other circuits. Figure 1 M1 will also be activated at that time. Figure 2 When the voltage Vout1 increases, Figure 1 The gain of MOSFET M1 decreases. Figure 2 In the middle section, MOSFET M1 acts as the degradation resistor in the source-level negative feedback circuit (R1, M2, R2, M1). A decrease in the equivalent resistance increases the gain of the AGC circuit. The two MOSFETs M1 in the two diagrams have opposite effects on the gain, which can cancel each other out, thus ensuring that the open-loop gain of the entire loop remains consistent under different input signal conditions. With the dominant pole unchanged and the open-loop gain constant, the loop response time of the circuit will also remain unchanged.

[0033] Traditional architectures use integrators, which have limited output drive due to factors such as power consumption, area, and design philosophy. Before the Tsetup time, the control voltage is too low, and the capacitor of the control voltage is driven by the current source, so the charging and discharging speed of the capacitor is consistent.

[0034] After the Tsetup time, the loop enters operation as the working point begins to be established.

[0035] As above Figure 1 In the circuit diagram, MOSFET M1 is in the linear region with low gain when a large input signal is received, and in the saturation region with high gain when a small input signal is received. Therefore, the loop response time constants of the two transistors are different. The smaller the transimpedance gain (RF and M1 in parallel), the smaller the gain of MOSFET M1, the smaller the loop gain, and the slower the response.

[0036] The new architecture features a capacitor without current drive. Before the loop starts working, the capacitor is charged and discharged by a resistor. The larger the input signal, the faster the initial response speed. Figure 1 When MOSFET M1 enters the linear region and reduces loop gain, it introduces... Figure 2 MOSFET M1, making Figure 2 When the MOSFET M1 is turned on and Figure 2 The resistor R2 is connected in parallel to reduce the degradation resistance, increase the loop gain, and ensure that the loop time constant remains consistent under different input amplitudes.

[0037] Specific embodiments have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this invention. Therefore, the content of this specification should not be construed as a limitation of this invention.

[0038] Those skilled in the art will recognize that the embodiments described herein are intended to help the reader understand the principles of the invention, and should be understood that the scope of protection of the invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific modifications and combinations based on the technical teachings disclosed in this invention without departing from the spirit of the invention, and these modifications and combinations are still within the scope of protection of this invention.

Claims

1. An analog fast automatic gain control circuit for a transimpedance amplifier comprising both a gain control loop, characterized in that, The gain compensation unit is added in the existing gain control loop to maintain the open loop gain stability of the automatic gain control loop, so as to ensure the consistent loop response time under different input signal amplitudes The existing gain control loop comprises a transimpedance amplifier, a resistance RF and a controlled gain adjustment MOS tube, and the gain compensation unit is configured to compensate the gain variation of the controlled gain adjustment MOS tube, in particular The source and drain of the controlled gain adjustment MOS tube are connected across the resistance RF, the resistance RF is connected across the input and output terminals of the transimpedance amplifier, and the output terminal VOUT1 of the gain compensation unit is connected to the gate of the controlled gain adjustment MOS tube The gain compensation unit comprises an operational amplifier A2, a resistance R2, a MOS tube M1, a MOS tube M2, a resistance R1, a current source, a MOS tube M3, a resistance R3 and a capacitor C2; wherein the resistance R2 is connected in parallel between the source and drain of the MOS tube M1, the output terminal of the operational amplifier A2 is connected to the gate of the MOS tube M2; the source of the MOS tube M2 is connected to the resistance R2 and grounded through the resistance R2, and the drain is connected to the resistance R1, the resistance R3 and the drain of the MOS tube M3; the gate of the MOS tube M3 serves as a switch terminal, the resistance R3 is connected in parallel between the drain and source of the MOS tube M3, the source of the MOS tube M3 is further connected to the capacitor C2 and the gate of the MOS tube M1, and the gate of the MOS tube M1 and the source of the MOS tube M3 serve as the output terminal of the gain compensation unit The MOS tube M1 serves as a gain compensation element, and when operating in the linear region, the equivalent resistance is reduced to increase the gain of the source stage negative feedback circuit composed of the resistance R1, the MOS tube M2, the resistance R2 and the MOS tube M1, so as to offset the gain reduction caused by the decrease of the transconductance of the controlled gain adjustment MOS tube; wherein the MOS tube M1 is connected in parallel with the resistance R2, and the variation of the equivalent resistance thereof is opposite to the gain variation of the controlled gain adjustment element.

2. The analog fast automatic gain control circuit for a transimpedance amplifier of claim 1, wherein, The MOS tube M3 serves as a reset switch, and after being turned on, the filter time constant is reduced; the resistance R3 and the MOS tube M3 are connected in parallel to form a main pole of the automatic gain control loop with the capacitor C2; when the MOS tube M3 is turned on, the main pole moves to high frequency; and the capacitor C2 is used for filtering.

3. The analog fast automatic gain control circuit for a transimpedance amplifier of claim 1, wherein, The operational amplifier A2 is configured to output a raised voltage when the input signal voltage vin is lower than the reference voltage VREF, so as to control the MOS tube M2 to be turned on to form a feedback loop; and the current source provides a bias current.

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