Display driving chip

Abstract

The invention discloses a display driving chip. The display driving chip comprises a resistive random access memory module which is used for storing default register information, mura data and burn in data, and the register information is used for configuring a register; a data input interface of the Demura module is connected to the resistive random access memory module, and the Demura module is configured to extract mura data from the resistive random access memory module and perform Demura compensation by using the mura data; a data input interface of the Gamma calibration module is connected to the resistive random access memory module, and the Gamma calibration module is configured to extract burn in data from the resistive random access memory module and perform Deburn in compensation by using the burn in data. Through the scheme of the embodiment of the invention, the requirements of the DDIC and the TDDI on the storage medium in an upgrading iteration scene can be met, and the plug-in device is simplified, so that the power consumption and the production cost of the DDIC / TDDI are further reduced.

Description

Technical Field

[0001] The present disclosure generally relates to the field of integrated circuit technology. More specifically, the present disclosure relates to a display driver chip. Background Art

[0002] A display driver IC (DDIC) is an integrated circuit used to drive the pixel array of displays such as liquid crystal displays (LCDs) or organic light-emitting diode displays (OLEDs). A touch and display driver integration (TDDI) is an integrated circuit that combines a touchscreen controller and display driver. Both DDIC and TDDI components are responsible for driving the display, receiving image data from a processor or other control unit and converting it into signals suitable for the display panel to display the image correctly.

[0003] In actual designs, mainstream DDICs and TDDIs typically use one-time programmable (OTP) chips to store system settings such as register default values ​​required for register configuration, and external Flash memory to store image processing-related information. Because OTP is a one-time programming technology and cannot be rewritten, it increases the difficulty of DDIC and TDDI software upgrades. Furthermore, external Flash memory requires additional power, increasing the overall power consumption of the DDIC and TDDI, resulting in higher costs.

[0004] In view of this, there is an urgent need to provide a display driver chip solution that can reduce power consumption and production costs while meeting the storage medium requirements of DDIC and TDDI in upgrade and iteration scenarios. Summary of the Invention

[0005] In order to at least solve one or more of the technical problems mentioned above, the present disclosure proposes a display driver chip solution in multiple aspects.

[0006] In a first aspect, the present disclosure provides a display driver chip comprising: a resistive memory module, which is used to store default register information, mura data, and burn-in data, wherein the register information is used to configure the register; a demura module, whose data input interface is connected to the resistive memory module and configured to extract mura data from the resistive memory module and use the data to perform demura compensation; and a gamma calibration module, whose data input interface is connected to the resistive memory module and configured to extract burn-in data from the resistive memory module and use the data to perform demura compensation.

[0007] In some embodiments, the resistive memory module is divided into several storage partitions, including: a register information storage partition for storing default register information, a mura storage partition for storing mura data, and a burn-in storage partition for storing burn-in data.

[0008] In some embodiments, the data input interface of the demura module is connected to the mura storage partition, and the data input interface of the gamma calibration module is connected to the burn-in storage partition.

[0009] In some embodiments, the resistive memory module is provided with an I / O interface for externally reading and / or updating the stored data in the resistive memory module.

[0010] In some embodiments, each of the plurality of storage partitions is provided with an independent I / O interface.

[0011] In some embodiments, the display driver chip further includes: a register module, a data input interface of which is connected to the resistive memory module and configured to: load register information from the resistive memory module to configure the register.

[0012] In some embodiments, the display driver chip further includes: a display decoder module, wherein a data output interface of the display decoder module is connected to a data input interface of a demura module or a gamma calibration module, for decoding display data from outside the display driver chip into pixel RGB signals; the demura module is further configured to perform demura compensation on the pixel RGB signals using mura data; and the gamma calibration module is further configured to perform deburnin compensation on the pixel RGB signals using burn-in data.

[0013] In some embodiments, the resistive memory module is also used to store bit-coding information and program firmware, and the display driver chip also includes: an analog-to-digital converter module, which is used to convert the touch analog signal fed back by the user outside the display driver chip into a digital signal; and an operation unit module, whose data input interface is respectively connected to the analog-to-digital converter module and the resistive memory module, and is used to read the program firmware from the resistive memory module and execute it, so as to perform touch calibration processing on the digital signal according to the bit-coding information read from the resistive memory module.

[0014] In some embodiments, the resistive memory module is also used to store the split coding information and the program firmware, and the display driving chip further comprises: an analog-to-digital converter module, a data output interface of which is connected to the resistive memory module, used to convert the touch analog signal fed back by the user outside the display driving chip into a digital signal and output the digital signal to the resistive memory module for caching; and an operation unit module, a data input interface of which is connected to the resistive memory module, used to read the split coding information, the program firmware and the digital signal from the resistive memory module, and execute the program firmware to perform touch calibration processing on the digital signal according to the split coding information.

[0015] In some embodiments, the resistive memory module is divided into a plurality of storage partitions, and the plurality of storage partitions further comprise: a firmware storage partition used to store the program firmware, and the data input interface of the operation unit module is connected to the firmware storage partition.

[0016] In some embodiments, the display driving chip further comprises: an internal memory module, a data transmission interface of which is connected to the operation unit module, used to store intermediate data generated by the operation unit module during operation.

[0017] In some embodiments, the register information storage partition stores a verification algorithm of the register information modification authority; and the mura storage partition and / or the burn in storage partition stores a conversion algorithm based on a Gamma curve query table.

[0018] In some embodiments, the firmware storage partition stores a caching and acceleration algorithm.

[0019] In some embodiments, the resistive memory module is embedded into the display driving chip.

[0020] By means of the display driving chip provided above, the embodiments of the present disclosure store the default register information, mura data and burn in data by means of the resistive memory module, so as to modify the system settings such as the register information for multiple times when the product is iterated, so as to meet the different register configurations required by upgrading, and further meet the requirements of the storage medium of the DDIC and TDDI in the upgrading iteration scenario. Moreover, by storing the mura data and the burn in data in the memory integrated in the DDIC / TDDI, the external device is simplified, and thus the power consumption and production cost of the DDIC / TDDI are further reduced. BRIEF DESCRIPTION OF DRAWINGS

[0021] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will become readily understood by reading the detailed description below with reference to the accompanying drawings. In the accompanying drawings, several embodiments of the present disclosure are shown in an illustrative and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0022] Figure 1 A schematic diagram of an existing DDIC solution is shown;

[0023] Figure 2 A schematic diagram of an existing TDDI solution is shown;

[0024] Figure 3 An exemplary structural diagram of a display driver chip according to some embodiments of the present disclosure is shown;

[0025] Figure 4 shows an exemplary structural diagram of a display driver chip according to some other embodiments of the present disclosure;

[0026] Figure 5 shows an exemplary structural diagram of a display driver chip according to some other embodiments of the present disclosure;

[0027] Figure 6 An exemplary structural diagram of a resistive memory module according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0028] The following will clearly and completely describe the technical solutions in the embodiments of this disclosure in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of this disclosure, not all of them. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this disclosure.

[0029] It should be understood that the terms “include” and “comprising” used in the specification and claims of the present disclosure indicate the presence of described features, integers, steps, operations, elements and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections thereof.

[0030] It should also be understood that the terminology used in this disclosure is for the purpose of describing specific embodiments only and is not intended to limit the disclosure. As used in this disclosure and the claims, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. It should be further understood that the term "and / or" as used in this disclosure and the claims refers to any and all possible combinations of one or more of the associated listed items, including and including these combinations.

[0031] As used in the specification and claims, the term "if' can be interpreted as meaning "when," or "upon," or "in response to a determination," or "in response to a detection" depending on the context. Similarly, the phrase "if it is determined" or "if [a described condition or event] is detected" can be interpreted as meaning "upon a determination" or "in response to a determination" or "upon detecting [a described condition or event]" or "in response to detecting [a described condition or event]" depending on the context.

[0032] A detailed description of specific embodiments of the disclosure follows, in connection with the accompanying drawings.

[0033] Example application scenarios

[0034] Mainstream DDIC and TDDI usually use OTP to store system settings such as default register values required by configuration registers, and use external Flash to store image processing related information.

[0035] Figure 1 A schematic diagram of an existing DDIC scheme is shown as follows: Figure 1 As shown, the DDIC needs to load the default register information from the OTP when starting. When processing image data, the Demura module and the Gamma calibration module need to extract mura data and burn in data from the external Flash respectively.

[0036] Figure 2 A schematic diagram of an existing TDDI scheme is shown as follows: Figure 2 As shown, the operation unit module in mainstream TDDI loads the default register information from the OTP, loads the quantile encoding information required by the touch screen algorithm from the external Flash, and loads the program firmware from the ROM. When the TDDI is working normally, the external touch screen input analog information is converted into digital signals by the ADC converter and delivered to the operation unit module, which then uses the loaded information to complete the recognition and processing of the touch input information.

[0037] Since OTP only supports single write, when the register information needs to be modified, the OTP needs to be replaced, which affects the convenience and efficiency of software upgrade iteration of DDIC and TDDI. In addition, since the mainstream DDIC / TDDI uses the external Flash scheme, additional power supply is required, which increases the overall power consumption of mainstream DDIC / TDDI and increases the production cost.

[0038] Example application scenarios

[0039] Therefore, the display driving chip scheme provided by the embodiments of the present disclosure can meet the requirements of DDIC and TDDI on storage media in the upgrade iteration scenario, and simplify the external device, thereby further reducing the power consumption and production cost of DDIC / TDDI.

[0040] Figure 3 An exemplary structural diagram of a display driving chip is shown to illustrate some embodiments of the present disclosure, as shown in Figure 3 As shown, the display driving chip 100 comprises a resistive random access memory (RRAM) module 101, a Demura module 103 and a Gamma calibration module 104, a display decoder module 105, and a digital-to-analog converter and source driver module 106. Further, the RRAM module 101 can be selected from a new type of memory such as a variable resistance memory (RRAM), a phase change random access memory (PCRAM), a magnetic random access memory (MRAM), or a ferroelectric memory (FeRAM).

[0041] Among them, the data input interfaces of the Demura module 103 and the Gamma calibration module 104 are connected to the RRAM module 101, and the RRAM module 101 is used to store default register information, mura data and burn in data, and the register information is used to configure the register.

[0042] It should be noted that in some embodiments, the RRAM module 101 can directly use its storage and computing integrated characteristics to call the internally stored register information to complete the configuration of the register. In other embodiments, the display driving chip 100 can further comprise a register module 102, the data input interface of which is connected to the RRAM module 101, so as to load the register information from the RRAM module 101 to configure the register.

[0043] It should be further noted that in actual application, what kind of RAM can be used for the register module 102? This is not limited too much here.

[0044] The following describes the operation process of the display driver chip 100 using the display driver chip 100 including the register module 102 as an example. When the display driver chip 100 is started, the register module 102 loads register information from the resistive memory module 101 to configure the register. For example, the register information includes but is not limited to: chip ID information, analog gamma information, display gamma correction information, and VCOM voltage information. The data output interface of the display decoder module 105 is connected to the data input interface of the demura module 103 or the gamma calibration module 104. After the display decoder module 105 obtains the display data from the display driver chip 300, it decodes it into pixel RGB signals and outputs the pixel RGB signals to the demura module 103 or the gamma calibration module 104 to complete the demura compensation and deburn in compensation of the pixel RGB signals.

[0045] It should be noted that, in practical applications, there is no strict requirement for the execution timing of Demura compensation and Deburn-in compensation. Figure 1 As shown, the data output interface of the display decoder module 105 is connected to the demura module 103, and the data output interface of the demura module 103 is connected to the gamma calibration module 104. At this time, the pixel RGB signal decoded by the display decoder module 105 is output to the demura module 103. The demura module 103 extracts mura data from the resistive memory module 101, uses the mura data to perform demura compensation on the pixel RGB signal, and outputs the demura-compensated pixel RGB signal to the gamma calibration module 104. The gamma calibration module 104 extracts burn-in data from the resistive memory module 101, and uses the burn-in data to perform deburn-in compensation on the demura-compensated pixel RGB signal output by the demura module 103.

[0046] In other embodiments, the data output interface of the display decoder module 105 is connected to the Gamma calibration module 104, and the data output interface of the Gamma calibration module 104 is connected to the Demura module 103. At this time, the pixel RGB signal decoded by the display decoder module 105 is output to the Gamma calibration module 104 to complete Deburn-in compensation. The Gamma calibration module 104 outputs the pixel RGB signal after Deburn-in compensation to the Demura module 103 to perform Demura compensation on the pixel RGB signal after Deburn-in compensation.

[0047] Two methods of compensating pixel RGB signals are introduced above. The embodiments of the present disclosure are applicable to any of the above compensation methods, and no excessive restrictions are imposed here.

[0048] Furthermore, the data input interface of the digital-to-analog converter and the source driver module 106 is connected to the data output interface of the demura module 103 or the gamma calibration module 104. After the demura module 103 completes the final demura compensation or the gamma calibration module 104 completes the final deburn-in compensation, the pixel RGB signal that has undergone demura compensation and deburn-in compensation is output to the digital-to-analog converter and the source driver module 106 to drive the external display panel 107.

[0049] It's important to note that machine vision quantifies display brightness using grayscale, so image uniformity and stability play a crucial role. During inspection, display panels may exhibit brightness uniformity and image retention. To address these two issues, in addition to process improvements, compensation technologies can also be employed. One such external compensation technology involves using external driver circuits or devices to sense the electrical or optical characteristics of pixels and then apply compensation.

[0050] Demura compensation is an external compensation technology, and its process is as follows: First, the display panel is lit and several images are displayed. Then, the above images are captured using a high-resolution and high-precision industrial camera. Then, the pixel color distribution characteristics are analyzed based on the camera data, and the gamma index value of each pixel is calculated. Next, mura data is identified based on the gamma index value and a related algorithm. Then, demura data is generated based on the mura data and the corresponding demura compensation algorithm. Finally, the demura data is burned into the flash memory, and the compensated images are re-photographed to confirm whether the mura has been eliminated. Among them, mura data can be understood as information that characterizes pixels with uneven brightness and / or afterimage phenomenon.

[0051] The luminous efficiency of OLED light-emitting materials decreases as the lighting time increases and / or the light-emitting materials age. In addition, the efficiency decay rate of RGB is not consistent, which will cause brightness decay. In severe cases, it will also lead to color cast. In order to solve the problem of brightness decay, a long-term brightness decay compensation, namely Deburn-in compensation, can be used. When performing Deburn-in compensation, it is necessary to know the brightness, time and calculate the corresponding compensation gain. The burn-in data that needs to be collected mainly include time, brightness, grayscale, picture, temperature and frame rate. Based on this data, the corresponding compensation gain can be calculated by looking up the table. The compensation gain is then adjusted by gamma to output the corresponding compensation target brightness.

[0052] It should be further explained that the Gamma calibration module 104 may be provided with a submodule called a Deburn-in module (not shown in the figure). When performing Deburn-in compensation, the submodule completes the Deburn-in compensation function.

[0053] In some embodiments, the display driver chip may also be integrated with a touch screen controller, such as TDDI. Figure 4 The TDDI solutions of some embodiments of the present disclosure are described.

[0054] Figure 4 illustrative structural diagrams of display driver chips according to other embodiments of the present disclosure are shown in FIG. Figure 4 As shown, the display driver chip 100 includes: a resistive memory module 101, an operation unit module 108, an analog-to-digital converter module 109, a demura module 103 and a gamma calibration module 104, a display decoder module 105 and a digital-to-analog converter and source driver module 106.

[0055] Among them, the data input interface of the operation unit module 108 is connected to the data output interface of the resistive memory module 101 and the analog-to-digital converter module 109. In addition to register information, mura data and burn-in data, the resistive memory module 101 is also used to store quantile coding information and program firmware. The touch input data fed back by the user through the external touch screen needs to be calibrated linearly or non-linearly. This calibration generally pre-calculates the correction data within the entire touch area and stores it in a two-dimensional or multi-dimensional table, also known as quantile coding information. When coordinate conversion is required, the corresponding coefficient is directly found through the quantile coding information for conversion.

[0056] When TDDI is started, the register configuration process is combined with the previous Figure 3 The contents of the embodiments described are similar and will not be repeated here. It should be noted that, in this embodiment, the register information in the resistive memory module 101 is loaded into the arithmetic unit module 108. Therefore, in this embodiment, if the display driver chip includes the register module 102, the register module 102 can be regarded as a submodule within the arithmetic unit module 108, which is used to complete the register configuration function.

[0057] After the user feeds back an analog touch signal through the external touch panel 110, the analog-to-digital converter module 109 converts it into a digital signal and sends it to the arithmetic unit module 108. Due to the direct addressing characteristics of the resistive random access memory, the arithmetic unit can directly read and execute the firmware without loading it onto other storage media. Specifically, the arithmetic unit module 108 reads and executes the firmware from the resistive random access memory module 101, thereby performing touch calibration processing on the digital signal based on the bitwise encoding information read from the resistive random access memory module 101.

[0058] In another embodiment, the digital signal output by the analog-to-digital converter module 109 may also be temporarily stored in the resistive memory module 101 , and the operation unit module 108 may read the bit encoding information, program firmware and digital signal from the resistive memory module 101 to perform touch calibration processing.

[0059] Figure 5 illustrative structural diagrams of display driver chips according to some other embodiments of the present disclosure are shown in FIG. Figure 5 As shown, the display driver chip 100 includes: a resistive memory module 101, an operation unit module 108, an analog-to-digital converter module 109, a demura module 103 and a gamma calibration module 104, a display decoder module 105 and a digital-to-analog converter and source driver module 106.

[0060] The data input interfaces of the arithmetic unit module 108, the demura module 103, and the gamma calibration module 104 are all connected to the resistive memory module 101, and the data output interface of the analog-to-digital converter module 109 is connected to the data input interface of the resistive memory module 101. The analog-to-digital converter module 109 converts the touch analog signal fed back by the user outside the display driver chip into a digital signal and outputs the digital signal to the resistive memory module 101 for buffering. The arithmetic unit module 108 reads the bit-coded information, program firmware, and digital signal from the resistive memory module 101 and executes the program firmware to perform touch calibration processing on the digital signal based on the bit-coded information.

[0061] It should be noted that in Figure 4 and Figure 5 In the display driver chip shown, the external display panel 107 and the touch panel 110 can be the same panel or different independent panels, and no excessive restrictions are imposed here.

[0062] Further, Figure 4 and Figure 5The display driver chip shown may further include: an internal memory module 111 , wherein a data transmission interface of the internal memory module 111 is connected to the operation unit module 108 and is used to store intermediate data generated by the operation performed by the operation unit module 108 .

[0063] In some embodiments, the internal memory module 111 may be a non-volatile magnetic random access memory (MRAM) or a static random access memory (SRAM), which is not particularly limited.

[0064] Furthermore, the above combined Figure 3-Figure 5 The resistive random access memory module described above is embedded within the display driver chip through an embedding process. For example, the resistive random access memory module can utilize embedded resistive random access memory (eRRAM), which is embedded within the display driver chip. Due to its embedded nature, eRRAM's I / O interface can be customized during design to further improve its read / write speed and capacity. Furthermore, given that the production cost of embedded flash memory (eFlash) is higher than that of eRRAM, the DDIC / TDDI solution of this embodiment can further reduce production costs.

[0065] Considering that the external Flash interface is fixed, the read and write communication bandwidth is limited. Figure 3-Figure 5 Based on the display driver chip described above, the resistive random access memory module 101 can be provided with an I / O interface for externally reading and / or updating the stored data in the resistive random access memory module 101. Furthermore, eRRAM supports 22 / 28nm process and is backward compatible, eliminating the cost of an external I / O interface and reducing power consumption.

[0066] Combined with the previous Figure 3-Figure 5 Based on the display driver chip described above, some other embodiments of the present disclosure introduce a storage partitioning mechanism. Figure 6 An exemplary structural diagram of a resistive memory module according to some embodiments of the present disclosure is shown in FIG. Figure 6 As shown, the resistive memory module is divided into n storage partitions, where n is a positive integer. The n storage partitions include: a register information storage partition for storing default register information ( Figure 6 bank0 in the RAID array), a mura storage partition for storing mura data, and a burn-in storage partition for storing burn-in data.

[0067] In this embodiment, the data input interface of the register module 102 is connected to the register information storage partition, the data input interface of the demura module 103 is connected to the mura storage partition, and the data input interface of the gamma calibration module 104 is connected to the burn in storage partition.

[0068] Since both mura data and burn-in data are used for image data processing, in some embodiments, the mura storage partition and the burn-in storage partition can be combined into one storage partition, that is, Figure 6 bank1 in the .

[0069] Combined with the previous Figure 4-Figure 5 Based on the display driver chip described above, the n storage partitions further include: a firmware storage partition for storing program firmware, and the data input interface of the operation unit module 108 is connected to the firmware storage partition ( Figure 6 bank2 in the .

[0070] Furthermore, in some embodiments, the fractional coding information can be stored together with the program firmware in the firmware storage partition. In other embodiments, an independent storage partition for storing fractional coding information can also be set in the n storage partitions, and no excessive restrictions are made here.

[0071] Furthermore, in the aforementioned plurality of storage partitions, each storage partition may be provided with an independent I / O interface, thereby being able to meet the requirements of parallel reading, writing and execution of external modules.

[0072] Furthermore, the parallel design described above can improve the access bandwidth to the resistive memory module 101, thereby accelerating data access. Algorithms can also be combined to accelerate data conversion or constrain data access rights, etc. Exemplarily, the register information storage partition stores a verification algorithm for register information modification permissions, thereby verifying the signature when registers are modified to implement secure access verification. Exemplarily, the mura storage partition and / or the burn-in storage partition stores a conversion algorithm based on a gamma curve lookup table (LUT). Exemplarily, the firmware storage partition stores caching and acceleration algorithms.

[0073] In summary, the disclosed embodiments provide a display driver chip that uses a resistive memory module to store default register information, mura data, and burn-in data, thereby resolving the issue with mainstream DDIC / TDDI, which is limited by the OTP's inability to rewrite and the high difficulty of software upgrades and iterations. The solution of the disclosed embodiments supports multiple upgrades and modifications to product software, meeting the storage medium requirements of DDIC / TDDI in various application scenarios. Furthermore, the solution of the disclosed embodiments can simplify the use of external components, thereby reducing the overall power consumption of the DDIC / TDDI and saving production costs.

[0074] In some embodiments, the disclosed embodiments provide a display driver chip that uses an embedded resistive random access memory, which reduces the manufacturing cost of DDIC / TDDI compared to eFlash.

[0075] In addition, due to the embedded nature of eRRAM, some other embodiments disclosed herein also customize its I / O interface during design to further improve its read / write speed and capacity.

[0076] Other embodiments of the present disclosure also provide a display driver chip with memory partitions. Each memory partition can have an independent I / O interface to meet the needs of parallel reading, writing, and execution of external modules. This parallel design can improve access bandwidth and speed, and can also be combined with algorithmic logic to accelerate data conversion or restrict data access rights.

[0077] When the display driver chip in this embodiment is a TDDI, the arithmetic unit module can directly execute the program firmware in the resistive random access memory module through direct addressing, without the need to load it onto a separate storage medium. After the arithmetic unit module processes the data, it transmits the data to the outside world via an I / O interface. This solution omits the storage medium and reduces the software loading process.

[0078] Although a plurality of embodiments of the present disclosure have been shown and described herein, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Those skilled in the art may conceive of many modifications, changes, and alternatives without departing from the ideas and spirit of the present disclosure. It should be understood that in practicing the present disclosure, various alternatives to the embodiments of the present disclosure described herein may be adopted. The appended claims are intended to define the scope of protection of the present disclosure and therefore cover equivalents or alternatives within the scope of these claims.

Claims

1. A display driver chip, characterized in that: include: A resistive random access memory module (101) is used to store default register information, mura data and burn-in data, wherein the register information is used to configure the register; A demura module (103), whose data input interface is connected to the resistive memory module (101), and configured to: extract the mura data from the resistive memory module (101) and use the data to perform demura compensation; as well as A gamma calibration module (104) has a data input interface connected to the resistive memory module (101) and is configured to extract the burn-in data from the resistive memory module (101) and use the data to perform deburn-in compensation.

2. The display driver chip according to claim 1, wherein: The resistive random access memory module (101) is divided into several storage partitions, which include: a register information storage partition for storing default register information, a mura storage partition for storing mura data, and a burn-in storage partition for storing burn-in data.

3. The display driver chip according to claim 2, wherein: The data input interface of the Demura module (103) is connected to the mura storage partition, and the data input interface of the Gamma calibration module (104) is connected to the burn-in storage partition.

4. The display driver chip according to claim 1, wherein: The resistive memory module (101) is provided with an I / O interface for externally reading and / or updating the stored data in the resistive memory module (101).

5. The display driver chip according to claim 2, wherein: Each of the plurality of storage partitions is provided with an independent I / O interface.

6. The display driver chip according to any one of claims 1 to 5, characterized in that: Also includes: The register module (102) has a data input interface connected to the resistive memory module (101) and is configured to load the register information from the resistive memory module (101) to configure the register.

7. The display driver chip according to any one of claims 1 to 5, characterized in that: Also includes: A display decoder module (105), wherein a data output interface of the display decoder module (105) is connected to a data input interface of the demura module (103) or the gamma calibration module (104), and is used for decoding display data from outside the display driver chip (100) into pixel RGB signals; The Demura module (103) is further configured to: perform Demura compensation on the pixel RGB signal using the mura data; The Gamma calibration module (104) is further configured to perform Deburn-in compensation on the pixel RGB signal using the burn-in data.

8. The display driver chip according to claim 1, wherein: The resistive random access memory module (101) is further used to store bitwise coding information and program firmware, and the display driver chip (100) further includes: an analog-to-digital converter module (109), which is used to convert a touch analog signal fed back by a user outside the display driver chip (100) into a digital signal; and An operation unit module (108), whose data input interface is respectively connected to the analog-to-digital converter module (109) and the resistive memory module (101), is used to read the program firmware from the resistive memory module (101) and execute it, so as to perform touch calibration processing on the digital signal according to the bit-coded information read from the resistive memory module (101).

9. The display driver chip according to claim 1, wherein: The resistive random access memory module (101) is further used to store bitwise coding information and program firmware, and the display driver chip (100) further includes: an analog-to-digital converter module (109), whose data output interface is connected to the resistive memory module (101), for converting a touch analog signal fed back by a user outside the display driver chip (100) into a digital signal, and outputting the digital signal to the resistive memory module (101) for buffering; and An operation unit module (108), whose data input interface is connected to the resistive memory module (101), is used to read the bit-coding information, the program firmware and the digital signal from the resistive memory module (101), and execute the program firmware to perform touch calibration processing on the digital signal according to the bit-coding information.

10. The display driver chip according to claim 8 or 9, characterized in that: The resistive random access memory module (101) is divided into a plurality of storage partitions, and the plurality of storage partitions further include: a firmware storage partition for storing program firmware, and the data input interface of the operation unit module (108) is connected to the firmware storage partition.

11. The display driver chip according to claim 8 or 9, characterized in that: Also includes: An internal memory module (111), whose data transmission interface is connected to the operation unit module (108), is used to store intermediate data generated by the operation performed by the operation unit module (108).

12. The display driver chip according to claim 2, wherein: The register information storage partition stores a verification algorithm for register information modification authority; the mura storage partition and / or the burn-in storage partition stores a conversion algorithm based on a gamma curve lookup table.

13. The display driver chip according to claim 10, wherein: The firmware storage partition stores cache and acceleration algorithms.

14. The display driver chip according to claim 1, wherein: The resistive random access memory module (101) is embedded in the display driver chip.

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