PCB layout optimization method, system and equipment based on evolutionary algorithm and medium

Abstract

The invention discloses a PCB layout optimization method, system and device based on an evolutionary algorithm and a medium, and relates to the field of electronic design automation, and the method comprises the steps: S1, obtaining an initial layout generated by a PCB; s2, judging whether the number of iterations is greater than or equal to the maximum number of iterations; s3, if yes, ending; s4, if not, random disturbance is generated according to the current layout, and a new layout is generated; s5, comparing the new layout with the current layout by adopting an objective function, and judging whether the new layout is superior to the current layout or not; s6, if not, whether the acceptance probability function is larger than a set value or not is judged; s7, if not, returning to S2; s8, if the acceptance probability function is greater than a set value or the new layout is superior to the current layout, taking the new layout as the current layout; and S9, when the current layout is superior to the optimal layout, updating the optimal layout by using the current layout, and returning to S2. According to the method, optimization of the layout of the PCB is realized, and a more ideal layout effect is achieved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic design automation, and in particular to a PCB layout optimization method, system, device and medium based on an evolutionary algorithm. BACKGROUND

[0002] In the field of electronic design automation (EDA), the device layout design of a printed circuit board (PCB) is a crucial link that directly affects the performance, reliability, manufacturability and cost of a product. With the development of electronic products towards miniaturization, high density and complexity, the challenges of PCB layout design are increasing.

[0003] In board-level EDA, existing automatic layout methods often use heuristic search algorithms such as simulated annealing algorithms. The key to this type of algorithm is the design of the objective function. Simulated annealing algorithms are derived from the principle of solid annealing, which solves optimization problems by simulating the random motion of particles at high temperatures and the gradual stabilization process during cooling. The algorithm accepts poor solutions with a probability, avoids being trapped in local optima, and is affected by parameters such as initial temperature and cooling strategy. It is suitable for fields such as combinatorial optimization and machine learning. There are two main problems in the design of the objective function: First, there is no universal objective function that can represent all cases.

[0004] Second, when there are multiple objectives, it is difficult to normalize the data, leading to complex weight design. Many times, only two or three indicators can be used as the objective function. SUMMARY

[0005] The purpose of the present application is to provide a PCB layout optimization method, system, device and medium based on an evolutionary algorithm, which realizes automatic layout and optimization of a PCB, thereby achieving a more ideal layout effect.

[0006] The present application is implemented by the following technical solutions: In a first aspect, the present application provides a PCB layout optimization method based on an evolutionary algorithm, comprising: S1: obtaining an initial layout generated by a PCB according to a signal flow method; S2: determining whether the number of iterations is greater than or equal to a preset maximum number of iterations; S3: if yes, ending; S4: if no, generating a new layout according to a random disturbance of the current layout; S5: comparing the new layout with the current layout using an objective function to determine whether the new layout is better than the current layout; S6: if no, determining whether an acceptance probability function is greater than a set value; S7: if less than or equal to, returning to step S2; S8: if the acceptance probability function is greater than a set value or the new layout is better than the current layout, then accept the new layout, and take the new layout as the current layout; S9: determine whether the current layout is better than the best layout; S10: if not, return to step S2; S11: if yes, update the best layout using the current layout, and return to step S2.

[0007] Further, the target function includes a comparison model that judges input first and second PCB layout images, the first and second PCB layout images being the same PCB layout module but different layout schemes, and outputs that the layout scheme of the first PCB layout image is better or the layout scheme of the second PCB layout image is better.

[0008] Further, the comparison model uses a visual Transformer model to extract features in the PCB layout image.

[0009] Further, the target function further includes line length, flying wire intersection point, flying wire length, half-circumferential line length, and layout area.

[0010] Further, different types of PCB layout modules use different target functions, specifically, a BGA module containing a chip and a layout module not containing a chip use a target function with dynamic weight adjustment, and a non-BGA module containing a chip uses a comparison model.

[0011] Further, the target function with dynamic weight adjustment Reward is: ; wherein, is the weight corresponding to the normalized parameter, is the normalized parameter.

[0012] In a second aspect, another embodiment of the present application provides a PCB layout optimization system based on an evolutionary algorithm, which is used to implement the PCB layout optimization method based on the evolutionary algorithm described in the first embodiment. The system includes an information acquisition module, a random disturbance module, and a layout scheme analysis module, The information acquisition module is used to acquire an initial layout of a PCB generated in a signal flow manner; The random disturbance module is used to generate a new layout by randomly disturbing a current layout; The layout scheme analysis module compares the new layout with the current layout using a target function, and determines whether the new layout is better than the current layout; If not, determine whether an acceptance probability function is greater than a set value; If it is less than or equal to, then determine whether the number of iterations is greater than or equal to the preset maximum number of iterations; If the acceptance probability function is greater than the set value or the new layout is better than the current layout, the new layout is accepted and used as the current layout; Determine whether the current layout is better than the optimal layout; If not, determine whether the number of iterations is greater than or equal to the preset maximum number of iterations; If so, the current layout is used to update the optimal layout, and whether the number of iterations is greater than or equal to the preset maximum number of iterations is determined. If the number of iterations is greater than or equal to the preset maximum number of iterations, the process ends.

[0013] Furthermore, the objective function includes a comparison model, which judges the first PCB board layout image and the second PCB board layout image as input, where the first PCB board layout image and the second PCB board layout image are the same PCB layout module but have different layout schemes, and outputs a better layout scheme of the first PCB board layout image or a better layout scheme of the second PCB board layout image.

[0014] In a third aspect, another embodiment of the present invention provides an electronic device, comprising: a processor, an input device, an output device and a memory, wherein the processor, input device, output device and memory are interconnected, the memory is used to store a computer program, and the computer program includes program instructions, and is characterized in that the processor is configured to call the program instructions to execute the method described in the first embodiment above.

[0015] In a fourth aspect, another embodiment of the present invention provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, wherein the computer program includes program instructions, and when the program instructions are executed by a processor, the processor executes the method described in the first embodiment.

[0016] Compared with the prior art, the present invention has the following advantages and beneficial effects: Embodiments of the present invention provide a PCB layout optimization method, system, device, and medium based on an evolutionary algorithm. The method generates a layout solution through an evolutionary algorithm, compares the new layout with the current layout using an objective function, determines a more optimal layout solution, uses the more optimal layout solution as the current layout solution, and compares the current layout solution with the optimal layout solution. If the current layout solution is better than the optimal layout solution, the optimal layout solution is updated with the current layout solution. This implements automatic layout and optimization of the PCB board, thereby achieving a more ideal layout effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical scheme of the exemplary embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments, and it should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope, and for those skilled in the art, other related drawings can also be obtained without paying creative labor on the basis of the drawings. In the drawings: Figure 1 A flow chart of a PCB layout optimization method based on an evolutionary algorithm provided by the first embodiment of the present application; Figure 2 An evolutionary algorithm framework diagram; Figure 3 A network structure diagram of a comparative model; Figure 4 A schematic diagram of the layout module initializing the layout; Figure 5 A schematic diagram of the new layout after the layout module optimization; Figure 6 A structure block diagram of a PCB layout optimization system based on an evolutionary algorithm provided by another embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the present application more clear and obvious, the following will further describe the present application in combination with the embodiments and drawings, and the exemplary embodiments of the present application and the description thereof are only used to explain the present application, and should not be regarded as a limitation on the present application.

[0019] As shown in Figure 1 , the PCB layout optimization method based on the evolutionary algorithm provided by the first embodiment of the present application includes the following steps: S1: obtaining the initial layout of the PCB generated in accordance with the signal flow mode; S2: judging whether the iteration number is greater than or equal to the preset maximum iteration number; S3: if yes, ending; S4: if no, generating a new layout according to the random disturbance of the current layout; S5: comparing the new layout with the current layout by using the objective function, and judging whether the new layout is better than the current layout; S6: if no, judging whether the acceptance probability function is greater than the set value; S7: if less than or equal to, returning to step S2; S8: if the acceptance probability function is greater than the set value or the new layout is better than the current layout, accepting the new layout, and taking the new layout as the current layout; S9: judging whether the current layout is better than the best layout; S10: if no, returning to step S2; S11: If yes, use the current layout to update the optimal layout and return to step S2.

[0020] In this embodiment, an evolutionary algorithm is used to continuously optimize the layout scheme. Figure 2 As shown, the PCB board first generates an initial layout based on the signal flow. This initial layout can be considered the optimal layout. Next, the number of iterations is determined to be greater than or equal to a preset maximum number of iterations. If so, a new layout is generated based on random perturbations of the current layout. These perturbations include translation, rotation, swapping, and flipping. An objective function is then used to compare the new layout with the current layout to determine whether it is superior to the current one. If not, the new layout is accepted with a certain probability and becomes the current layout. If so, the new layout is selected as the current layout. Finally, the current layout is determined to be superior to the optimal layout. If so, the optimal layout is updated with the current layout, and a return is returned to determine whether the number of iterations is greater than or equal to the preset maximum number of iterations. If the optimal layout is superior to the current layout, a return is returned to determine whether the number of iterations is greater than or equal to the preset maximum number of iterations. The process ends when the number of iterations is greater than or equal to the preset maximum number of iterations. The maximum number of iterations is designed based on the number of components, typically set to 100 times the number of components, with a maximum of 3000. An evolutionary algorithm is used to automatically generate layout solutions for the layout module.

[0021] Among them, the objective function includes the comparison model, including line length, flying line intersection point, flying line length, half-circle line length and layout area, such as Figure 3 As shown in the figure, the comparison model is used to compare two different layout schemes of the same PCB layout module and select the better one. Figure 4 、 5The shown. The contrast model structure: first use the visual Transformer model (ViT, VisionTransformer) for feature extraction, the extracted features are processed through linear layer 1, dropout layer and linear layer 2, and the 768-dimensional features output by ViT are mapped to the score of 1-dimensional data. Use end-to-end way, only ViT will load a pre-training file. Forward propagation logic: score the two input images simultaneously to get score scalars s1 and s2. Loss function: use nn.MarginRankingLoss, compare the difference between two scores s1 and s2, and compare with the label (1 or -1) to calculate the loss. 1 indicates that the first layout scheme is better, and -1 indicates that the second layout scheme is better. Input the first PCB layout image and the second PCB layout image into the trained contrast model, and the contrast model judges the first PCB layout image and the second PCB layout image, the first PCB layout image and the second PCB layout image are the same PCB layout module but different layout schemes, and outputs that the layout scheme of the first PCB layout image is better or the layout scheme of the second PCB layout image is better. By using the contrast model, the problem of difficult target function design in the traditional layout algorithm is solved.

[0022] Although the contrast model has ideal effect, the time-consuming of generating pictures is longer, therefore, the PCB layout module is classified, different types of PCB layout module use different target functions, the BGA module containing key devices and the layout module not containing key devices adopt the target function of dynamic weight adjustment, and the non-BGA module containing key devices adopts the contrast model. The key device refers to the core device in a layout module, which usually refers to a chip. The target function Reward of dynamic weight adjustment is as follows: ; Among them, is the weight corresponding to the normalized parameter, is the normalized parameter. Different layout modules select different parameters and weights. Through the weight dynamic adjustment algorithm, the weight of the parameter with large change amplitude is reduced, and the weight of the parameter with small change amplitude is increased, so that the uniformity of each parameter is realized.

[0023] The PCB layout optimization method based on the evolutionary algorithm provided by the embodiment of the application generates a layout scheme through an evolutionary algorithm, compares a new layout with a current layout by using a target function, judges a better layout scheme, takes the better layout scheme as the current layout scheme, compares the current layout scheme with the best layout scheme, and if the current layout scheme is better than the best layout scheme, updates the best layout scheme with the current layout scheme, realizes automatic layout and optimization of the PCB, and thus a more ideal layout effect is achieved.

[0024] As Figure 6 shown, another embodiment of the application provides an evolutionary algorithm-based PCB layout optimization system for implementing the evolutionary algorithm-based PCB layout optimization method described in the first embodiment, which comprises an information acquisition module, a random disturbance module and a layout scheme analysis module, the information acquisition module is used to acquire the initial layout of the PCB generated in accordance with the signal flow mode, the random disturbance module is used to generate a new layout by random disturbance according to the current layout, the layout scheme analysis module compares the new layout with the current layout by using the objective function to determine whether the new layout is better than the current layout, if not, it is determined whether the acceptance probability function is greater than a set value, if less than or equal to, it is determined whether the iteration number is greater than or equal to the preset maximum iteration number, if the acceptance probability function is greater than the set value or the new layout is better than the current layout, the new layout is accepted and used as the current layout, it is determined whether the current layout is better than the best layout, if not, it is determined whether the iteration number is greater than or equal to the preset maximum iteration number, if yes, the current layout is used to update the best layout, and it is determined whether the iteration number is greater than or equal to the preset maximum iteration number, and if the iteration number is greater than or equal to the preset maximum iteration number, the process is ended.

[0025] The objective function comprises a comparison model for judging the input first PCB layout image and second PCB layout image, the first PCB layout image and second PCB layout image are the same PCB layout module but different layout schemes, and the output is that the layout scheme of the first PCB layout image is better or the layout scheme of the second PCB layout image is better.

[0026] The evolutionary algorithm-based PCB layout optimization system provided by the embodiment of the application generates a layout scheme by an evolutionary algorithm, compares a new layout with a current layout by using an objective function, determines a better layout scheme, uses the better layout scheme as the current layout scheme, compares the current layout scheme with the best layout scheme, updates the best layout scheme with the current layout scheme if the current layout scheme is better than the best layout scheme, realizes automatic layout and optimization of the PCB, and thus achieves a more ideal layout effect.

[0027] Another embodiment of the application provides an electronic device, which comprises a processor, an input device, an output device and a memory, the processor, the input device, the output device and the memory are connected to each other, the memory is used to store a computer program, the computer program comprises program instructions, the processor is configured to call the program instructions and execute the method described in the first embodiment.

[0028] It should be understood that, in the embodiments of the present application, the processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor.

[0029] The input device can include a touchpad, a microphone, etc., and the output device can include a display (LCD, etc.), a speaker, etc.

[0030] The memory can include read-only memory and random access memory, and provide the processor with instructions and data. Part of the memory can also include non-volatile random access memory. For example, the memory can also store device type information.

[0031] In specific implementations, the processor, the input device, and the output device described in the embodiments of the present application can implement the implementation manners of the method embodiments and the system embodiments described in the embodiments of the present application, and details are not repeated here.

[0032] The present application also provides an embodiment of a computer readable storage medium, which stores a computer program. The computer program includes program instructions, and the program instructions, when executed by a processor, cause the processor to perform the method described in the first embodiment.

[0033] The computer readable storage medium can be an internal storage unit of the device, such as a hard disk or a memory of the device. The computer readable storage medium can also be an external storage device of the device, such as a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card, etc. Further, the computer readable storage medium can include both the internal storage unit and the external storage device of the device. The computer readable storage medium is used to store the computer program and other programs and data required by the device. The computer readable storage medium can also be used to temporarily store data that has been output or will be output.

[0034] Those skilled in the art can clearly understand that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been described in the foregoing description in a general manner. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0035] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the devices and units described above can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0036] In several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic, for example, the division of the units is only a logical functional division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, and can also be electrical, mechanical or other form of connection.

[0037] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should all be covered in the scope of the claims and the description of the present application.

Claims

1. A PCB board layout optimization method based on evolutionary algorithm, characterized in that: include: S1: Obtain the initial layout of the PCB board generated according to the signal flow method; S2: Determine whether the number of iterations is greater than or equal to the preset maximum number of iterations; S3: If yes, then end; S4: If not, generate random perturbations based on the current layout to generate a new layout; S5: Using the objective function to compare the new layout with the current layout to determine whether the new layout is better than the current layout; S6: If not, determine whether the acceptance probability function is greater than the set value; S7: If it is less than or equal to, return to step S2; S8: If the acceptance probability function is greater than the set value or the new layout is better than the current layout, the new layout is accepted and used as the current layout; S9: Determine whether the current layout is better than the optimal layout; S10: If not, return to step S2; S11: If yes, use the current layout to update the optimal layout and return to step S2.

2. The PCB layout optimization method based on evolutionary algorithm according to claim 1, characterized in that: The objective function includes a comparison model, which judges the first PCB layout image and the second PCB layout image as input, wherein the first PCB layout image and the second PCB layout image are the same PCB layout module but have different layout schemes, and outputs a better layout scheme for the first PCB layout image or a better layout scheme for the second PCB layout image.

3. The PCB layout optimization method based on evolutionary algorithm according to claim 2, characterized in that: The comparison model uses a visual Transformer model to extract features from PCB board layout images.

4. The PCB layout optimization method based on evolutionary algorithm according to claim 2, characterized in that: The objective function also includes line length, flying line intersection point, flying line length, half-circle line length and layout area.

5. The PCB layout optimization method based on evolutionary algorithm according to claim 4, characterized in that: Different types of PCB layout modules use different objective functions. Specifically, BGA modules containing chips and layout modules without chips use an objective function with dynamic weight adjustment, while non-BGA modules containing chips use a comparison model.

6. The PCB layout optimization method based on evolutionary algorithm according to claim 5, characterized in that: The objective function Reward using dynamic weight adjustment is: ； in, is the weight corresponding to the normalized parameter, is the normalized parameter.

7. A PCB board layout optimization system based on evolutionary algorithm, characterized in that: The system is used to implement the PCB board layout optimization method based on the evolutionary algorithm according to any one of claims 1 to 6, comprising: an information acquisition module, a random perturbation module and a layout scheme analysis module. The information acquisition module is used to obtain the initial layout of the PCB board generated in a signal flow manner; The random perturbation module is used to generate random perturbations according to the current layout to obtain a new layout; The layout solution analysis module uses an objective function to compare the new layout with the current layout to determine whether the new layout is better than the current layout; If not, determine whether the acceptance probability function is greater than the set value; If it is less than or equal to, then determine whether the number of iterations is greater than or equal to the preset maximum number of iterations; If the acceptance probability function is greater than the set value or the new layout is better than the current layout, the new layout is accepted and used as the current layout; Determine whether the current layout is better than the optimal layout; If not, determine whether the number of iterations is greater than or equal to the preset maximum number of iterations; If so, the current layout is used to update the optimal layout, and whether the number of iterations is greater than or equal to the preset maximum number of iterations is determined. If the number of iterations is greater than or equal to the preset maximum number of iterations, the process ends.

8. The PCB layout optimization system based on evolutionary algorithm according to claim 7, characterized in that: The objective function includes a comparison model, which judges the first PCB layout image and the second PCB layout image as input, wherein the first PCB layout image and the second PCB layout image are the same PCB layout module but have different layout schemes, and outputs a better layout scheme for the first PCB layout image or a better layout scheme for the second PCB layout image.

9. An electronic device comprising: The method comprises a processor, an input device, an output device and a memory, wherein the processor, the input device, the output device and the memory are interconnected, the memory is used to store a computer program, and the computer program includes program instructions. The method is characterized in that the processor is configured to call the program instructions and execute the method according to any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program includes program instructions. When the program instructions are executed by a processor, the processor is caused to perform the method according to any one of claims 1 to 6.

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