Overlay alignment mark and formation method thereof, and overlay error measurement method and device

Abstract

The embodiment of the invention provides an overlay alignment mark and a forming method thereof, and an overlay error measuring method and device.The overlay alignment mark comprises a zero-layer mark located on the back face of a substrate; the current layer mark is located on the front face side of the substrate, and the front face and the back face of the substrate are oppositely arranged; wherein, from the back surface to the front surface, the current layer mark is located right above the zero layer mark. By adopting the technical scheme, the flatness of the front surface of the substrate can be improved.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of semiconductor technology, and particularly relate to an overlay alignment mark, a forming method thereof, an overlay error measurement method and device. BACKGROUND

[0002] In semiconductor manufacturing, it is usually necessary to perform at least one photolithography process to obtain a device with logic processing capability.

[0003] With the rapid development of integrated circuits, the feature size of semiconductor devices is continuously reduced. When performing a photolithography process, how to control the relative position of a current layer pattern formed on a substrate so that the relative position of the current layer pattern and the substrate meets the overlay accuracy requirement is a crucial step in the photolithography process.

[0004] At present, a zero layer mark is formed on the substrate in advance, and a current layer mark is formed on the substrate when the current layer pattern is formed, so as to obtain an overlay mark containing the zero layer mark and the current layer mark, and the relative position of the overlay mark is measured to make the relative position of the current layer pattern and the substrate meet the overlay accuracy requirement.

[0005] However, the current overlay mark forming scheme still needs to be improved. SUMMARY

[0006] Therefore, embodiments of the present application provide an overlay alignment mark, a forming method thereof, an overlay error measurement method and device, which can improve the flatness of the front surface of the substrate.

[0007] Firstly, an embodiment of the present application provides an overlay alignment mark, comprising:

[0008] a zero layer mark located on the back surface of a substrate;

[0009] a current layer mark located on the front surface side of the substrate, the front surface and the back surface of the substrate being oppositely arranged;

[0010] Wherein, from the back surface to the front surface, the current layer mark is located directly above the zero layer mark.

[0011] An embodiment of the present application provides a forming method of an overlay alignment mark, comprising:

[0012] providing a substrate, the substrate comprising oppositely arranged back surface and front surface;

[0013] forming a zero layer mark on the back surface of the substrate;

[0014] forming a current layer mark on the front surface side of the substrate;

[0015] Wherein, from the back surface to the front surface, the current layer mark is located directly above the zero layer mark.

[0016] In contrast, the embodiment of the present application also provides a measurement method of overlay error, which is suitable for measuring the overlay alignment mark in any of the foregoing examples, and the measurement method of overlay error comprises:

[0017] acquiring first position information of the zero layer mark;

[0018] acquiring second position information of the on layer mark;

[0019] determining overlay error between the zero layer mark and the on layer mark according to the first position information and the second position information.

[0020] The embodiment of the present application also provides a measurement device of overlay error, which is suitable for measuring the overlay alignment mark in any of the foregoing examples, and the measurement device of overlay error comprises:

[0021] a bearing module configured to fix the substrate;

[0022] an overlay error measurement module configured to acquire first position information of the zero layer mark and acquire second position information of the on layer mark, and determine overlay error between the zero layer mark and the on layer mark according to the first position information and the second position information.

[0023] Compared with the prior art, the technical scheme of the embodiment of the present application has the following advantages:

[0024] In the overlay alignment mark provided by the embodiment of the present application, the overlay alignment mark comprises the zero layer mark located on the back surface of the substrate and the on layer mark located on the front surface side of the substrate. Compared with the prior art in which the zero layer mark is formed on the front surface of the substrate, in the overlay alignment mark provided by the embodiment of the present application, the zero layer mark is located on the back surface of the substrate, which can reduce or lower the damage to the front surface of the substrate, improve the flatness of the front surface of the substrate, and point from the back surface to the front surface, and by locating the on layer mark directly above the zero layer mark, the overlay error can be determined through the position deviation between the two, so as to improve the lithography precision. BRIEF DESCRIPTION OF DRAWINGS

[0025] In order to more clearly illustrate the technical scheme of the embodiment of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiment of the present application or the prior art. Obviously, the drawings described below are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0026] Figure 1 FIG. 1 shows a structure schematic diagram of an overlay alignment mark in an example of the present application;

[0027] Figure 2 FIG. 2 shows a structure schematic diagram of an overlay alignment mark in an example of the present application;Figure 1 An image structure diagram of the overlay alignment mark shown;

[0028] Figures 3 to 8 An image structure diagram corresponding to each step in an embodiment of a method for forming an overlay alignment mark in an example of the present application is shown;

[0029] Figure 9 A flowchart of an overlay error measurement method in an example of the present application is shown;

[0030] Figure 10 A flowchart of a method for obtaining a first offset in an example of the present application is shown;

[0031] Figure 11 A structure diagram of an overlay error measurement device in an example of the present application is shown;

[0032] Figure 12 A structure diagram of an overlay error measurement unit in an example of the present application is shown;

[0033] Figures 13 to 15 A scenario diagram of overlay error measurement in an example of the present application is shown. DETAILED DESCRIPTION

[0034] As can be known from the background, the current scheme for forming an overlay mark still needs to be improved. Specifically, the zero-layer mark is usually formed on the front side of the substrate, and the size of the zero-layer mark is large, which will reduce the flatness of the front side of the substrate.

[0035] To solve the above technical problems, an embodiment of the present application provides an overlay alignment mark, which includes a zero-layer mark located on the back side of a substrate and a when-layer mark located on the front side of the substrate. Compared with the prior art scheme of forming a zero-layer mark on the front side of the substrate, in the overlay alignment mark provided by the embodiment of the present application, the zero-layer mark is located on the back side of the substrate, which can reduce or lower the damage to the front side of the substrate, improve the flatness of the front side of the substrate, and point from the back side to the front side, by locating the when-layer mark directly above the zero-layer mark, the overlay error can be determined through the positional deviation between the two, so as to improve the lithography precision.

[0036] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present application more obvious and easy to understand, the present application will be described below with reference to the accompanying drawings.

[0037] Figure 1 And Figure 2 is a structure diagram corresponding to an embodiment of the overlay alignment mark of the present application, wherein, Figure 2 is Figure 1 is an image structure diagram corresponding to the overlay alignment mark in

[0038] As Figure 1As shown, the overlay alignment marks include a zero layer mark 110 and a when layer mark 112, wherein the zero layer mark 110 is located on the back surface SF2 of the substrate 100, and the when layer mark 112 is located on the front surface SF1 side of the substrate 100, wherein the front surface SF1 and the back surface SF2 of the substrate 100 are oppositely arranged.

[0039] In the embodiment, the zero layer mark 110 serves as a reference mark and plays an alignment role to improve the accurate positioning of each layer pattern; and the when layer mark 112 can be used to identify different process layers and ensure that the pattern on the mask plate corresponds to the image on the wafer, so as to improve the accuracy of the etching process.

[0040] In some embodiments, the zero layer mark 110 is usually formed before the well region because the ion implantation is not patterned. By arranging the zero layer mark 110 on the back surface SF2 of the substrate 100, compared with the prior art of arranging the zero layer mark on the front surface side of the substrate, the damage to the front surface SF1 of the substrate 100 can be reduced or lowered, and the flatness of the front surface SF1 of the substrate 100 can be improved.

[0041] In the embodiment, the substrate 100 can be used to provide a process platform for device manufacturing.

[0042] In some embodiments, the material of the substrate 100 can be silicon. In other embodiments, the material of the substrate 100 can also be one or more of germanium, silicon germanium, silicon carbide, gallium arsenide, and indium gallium.

[0043] In the embodiment, the front surface SF1 of the substrate 100 is usually used to manufacture various devices (such as transistors, etc.).

[0044] In the embodiment, the when layer mark 112 can be located directly above the zero layer mark 110 in the direction from the back surface SF2 to the front surface SF1, so as to measure the overlay error between the zero layer mark 110 and the when layer mark 112.

[0045] In some embodiments, the zero layer mark 110 and the when layer mark 112 can be arranged in mirror symmetry along the substrate 100, wherein the "mirror symmetry" means that the center point of the zero layer mark 110 and the center point of the when layer mark 112 coincide in the vertical direction of the substrate 100, so that the overlay error can be determined by the coordinate position deviation between the center point of the zero layer mark 110 and the center point of the when layer mark 112, so as to improve the lithography accuracy.

[0046] In the embodiment, the distance between the layer where the zero layer mark 110 is located and the layer where the when layer mark 112 is located can be arranged according to the process requirement, so as to realize the overlay error measurement between any two alignment marks.

[0047] In some embodiments, the distance between the layer where the zero-layer mark 110 is located and the layer where the layer mark 112 is located can be 100 nm to 5000 nm.

[0048] In this embodiment, as shown in Figure 1 , along the direction parallel to the substrate 100, the cross-sectional area of the layer mark 112 can be smaller than the cross-sectional area of the zero-layer mark 110 to form a nested overlay alignment mark.

[0049] In some embodiments, the pattern of the overlay alignment mark can include one or a combination of Box in Box, Bar in Bar, and Frame in Frame, wherein: Box in Box, i.e., a frame-in-frame overlay mark, includes an inner frame and an outer frame, the inner frame can include a pattern corresponding to the photoresist layer of the layer mark, and the outer frame can include a pattern corresponding to the zero-layer mark; Bar in Bar, i.e., a bar-in-bar overlay mark, includes an inner bar and an outer bar, wherein the outer bar represents the pattern of the zero-layer mark, and the inner bar represents the pattern of the layer mark, and the rectangle formed by the outer bar encloses the rectangle formed by the inner bar; Frame in Frame, i.e., a nested frame mark, includes an inner frame and an outer frame, wherein the inner frame can be located at the zero-layer mark, and the outer frame can be located at the layer mark.

[0050] In this embodiment, referring to Figure 2 , the image structure diagram of the overlay alignment mark in the example of the present application is shown in Figure 2 , the overlay alignment mark formed by the zero-layer mark 110 and the layer mark 112 can be Box in Box, and the overlay accuracy can be determined according to the image of the overlay alignment mark, so as to determine the alignment accuracy in the photoetching process.

[0051] Next, referring to Figure 1 , in this embodiment, the zero-layer mark 110 can include a groove located in the back surface SF2 of the substrate 100.

[0052] In this embodiment, the depth of the groove should not be too small or too large. If the depth of the groove is too small, it is not easy to identify the groove structure in the subsequent alignment process; if the opening of the groove structure is too large, it occupies a large area of the back surface, which is not conducive to the subsequent process.

[0053] In some embodiments, the depth of the groove can be 5 to 10 μm.

[0054] It should be noted that Figure 1 the shape of the groove is only for illustrative purposes, and is used to illustrate that the zero-layer mark serving as a reference datum can be formed on the back surface SF2 of the substrate 100, and should not be construed as a limitation on the present application. For example, in some other embodiments, the groove can be a groove structure with an inclined surface.

[0055] Accordingly, the embodiment of the present application also provides a method for forming an overlay alignment mark. Figures 3 to 8 is a structural schematic diagram corresponding to each step in an embodiment of the method for forming an overlay alignment mark of the present application.

[0056] Referring to Figure 3 , a substrate 200 is provided, which can be used to provide a process platform for device manufacturing.

[0057] In some embodiments, the material of the substrate 200 can be silicon. In other embodiments, the material of the substrate 200 can also be one or more of germanium, silicon germanium, silicon carbide, gallium arsenide, and indium gallium.

[0058] In the embodiment, the substrate 200 can include a front surface SF1 and a back surface SF2 arranged oppositely.

[0059] It should be noted that Figure 3 the front surface SF1 and the back surface SF2 identified in the above are only examples for illustration, which are used to illustrate that the substrate 200 has two opposite surfaces, when one of the surfaces is used as the front surface SF1, the other surface is used as the back surface SF2.

[0060] In some embodiments, the front surface SF1 of the substrate 200 is usually used to manufacture various devices (such as transistors, etc.).

[0061] Referring to Figures 4 to 6 , a zero-layer mark is formed on the back surface SF2 of the substrate 200.

[0062] In the embodiment, a mask material layer with a mask opening can be formed on the back surface SF2 of the substrate 200, and through the mask opening, a portion of the thickness of the substrate 200 is removed to form a zero-layer mark on the back surface SF2 of the substrate 200.

[0063] The zero-layer mark can be used as a reference mark and play an alignment role to improve the accurate positioning of each layer pattern.

[0064] In the embodiment, the step of forming the zero-layer mark can include:

[0065] Referring to Figure 4 , a mask material layer 202 is formed on the back surface SF2 of the substrate 200, which can be used to form a mask layer.

[0066] In some embodiments, at least one of a chemical vapor deposition process and a physical vapor deposition process can be used to form the mask material layer 202 on the substrate 200.

[0067] In the step of forming the mask material layer 202, the material of the mask material layer 202 can include one or more of silicon nitride, silicon carbide, silicon carbon nitride, silicon carbon nitrogen oxide, silicon nitrogen oxide, boron nitride, boron carbon nitride, and silicon oxide.

[0068] In the embodiment, the material of the mask material layer 202 can be silicon oxide.

[0069] Referring to Figure 5 and Figure 6 , the mask material layer 202 is patterned to form a mask layer 208 having a mask opening K1.

[0070] In the embodiment, the substrate 200 is removed by a partial thickness through the mask opening K1 of the mask layer 208 to obtain a zero layer mark.

[0071] Specifically, referring to Figure 5 , a photoresist 206 is formed on the mask material layer 202, and the photoresist 206 has a patterned opening that exposes part of the surface of the mask material layer 202.

[0072] Referring to Figure 6 , the mask material layer 202 is removed along the patterned opening to form a mask layer 208 having a mask opening K1 that exposes the surface of the substrate 200.

[0073] Referring to Figure 7 , the substrate 200 is removed by a partial thickness along the mask opening K1 to form a groove 210 in the substrate 200.

[0074] In the embodiment, a dry etching process can be used to improve the profile quality of the groove 210 formed, which is conducive to accurately controlling the profile of the sidewall of the groove 210.

[0075] In the embodiment, the groove 210 can serve as a zero layer mark, and subsequent overlay error measurement can be performed with the groove 210 as a reference datum.

[0076] In some embodiments, the depth of the groove 210 can be 5 to 10 μm.

[0077] Referring to Figure 7 , after the groove 210 is formed, the mask layer 206 can also be removed to expose the back surface SF2 of the substrate 200.

[0078] By removing the mask layer 208 from the back surface SF2 of the substrate 200, it is convenient to form other devices or film layers on the back surface SF2 of the substrate 200 in subsequent steps.

[0079] Referring to Figure 8 , a zero layer mark 212 is formed on the front surface SF1 side of the substrate 200.

[0080] When the layer mark 212 can be used to identify different process layers, it is used to ensure that the pattern on the mask plate corresponds to the image on the wafer, so as to improve the accuracy of the etching process.

[0081] In the embodiment, the step of forming the layer mark 212 can include: forming a photoresist layer (not shown in the figure) on the front surface SF1 of the substrate 200, and patterning the photoresist layer to form a photoresist mark, which can be used as the layer mark 212, so as to obtain a set of overlay alignment marks including the groove 210 and the photoresist mark.

[0082] In the embodiment, the distance between the layer where the zero layer mark is located and the layer where the layer mark 212 is located can be set according to the process requirements, so as to measure the overlay error between any two layers of alignment marks.

[0083] In some embodiments, the distance between the layer where the zero layer mark is located and the layer where the layer mark 212 is located can be 100nm-5000nm

[0084] In the embodiment, as shown in Figure 8 the cross-sectional area of the layer mark 212 can be smaller than the cross-sectional area of the groove 210 along the direction parallel to the substrate 200, so as to form a set of overlay alignment marks with a nested structure.

[0085] In some embodiments, the pattern of the overlay alignment mark can include one or a combination of Box in Box, Bar in Bar and Frame in Frame.

[0086] In the embodiment, the overlay alignment mark formed by the zero layer mark and the layer mark 212 can be Box in Box, and the overlay accuracy can be determined according to the image of the overlay alignment mark, so as to determine the alignment accuracy in the photolithography process.

[0087] In the embodiment, the layer mark 212 can be located directly above the zero layer mark from the back surface SF2 to the front surface SF1.

[0088] In some embodiments, the zero layer mark and the layer mark 212 can be arranged in mirror symmetry along the substrate 200, wherein "mirror symmetry" means that the center point of the zero layer mark and the center point of the layer mark 212 coincide along the direction perpendicular to the substrate 200, so that the overlay error can be determined by the positional deviation between the center point of the zero layer mark and the center point of the layer mark 212, so as to improve the photolithography accuracy.

[0089] In the embodiment, the zero layer mark and the layer mark 212 can be located in the scribe lane, so as to avoid occupying the area of the effective area of the substrate, and improve the utilization rate of the area of the effective area of the substrate.

[0090] In the embodiment, the zero-layer mark 110 is generally used as a reference mark. In order to improve the accuracy of subsequent photolithography, the zero-layer mark 110 is generally formed first, and then the in-layer mark 212 is formed.

[0091] In the embodiment, in order to improve the flatness of the front surface SF1 of the substrate 200 and reduce or avoid damage to the front surface SF1 in the process of forming the groove 210, the method for forming the overlay alignment mark can further include forming a protective layer 204 on the front surface SF1 of the substrate 200 before forming the zero-layer mark on the back surface SF2 of the substrate 200.

[0092] In some embodiments, the protective layer 204 can be formed before, during or after the formation of the mask material layer 202.

[0093] In the embodiment, the zero-layer mark 110 is generally used as a reference mark. In order to improve the accuracy of subsequent photolithography, the zero-layer mark 110 is generally formed first, and then the in-layer mark 212 is formed. Figure 3 and Figure 4 The protective layer 204 can be formed before the formation of the mask material layer 202, so as to improve the flatness of the front surface SF1.

[0094] In the example of the present application, at least one of a chemical vapor deposition process, a physical vapor deposition process and an atomic layer deposition process can be used to form the protective layer 204.

[0095] In the embodiment, the material of the protective layer 204 can include one or more of silicon nitride, silicon carbide, silicon carbon nitride, silicon carbon nitrogen oxide, silicon nitrogen oxide, boron nitride, boron carbon nitride and silicon oxide in the step of forming the protective layer 204.

[0096] In one specific embodiment, the material of the protective layer 204 includes silicon nitride.

[0097] In the embodiment, the zero-layer mark 110 is generally used as a reference mark. In order to improve the accuracy of subsequent photolithography, the zero-layer mark 110 is generally formed first, and then the in-layer mark 212 is formed. Figure 7 and Figure 8 The method for forming the overlay alignment mark can further include removing the protective layer 204 before forming the in-layer mark 212 on the front surface SF1 of the substrate 200.

[0098] By removing the protective layer 204, it is convenient to form other structures on the front surface SF1 of the substrate 200 in subsequent process steps.

[0099] In the embodiment, the process of removing the protective layer 204 can include an etching process.

[0100] In some examples, when the overlay alignment marks are formed on the front surface and the back surface of the wafer, in order to improve the accuracy of the photolithography process, it is necessary to measure the overlay error between the overlay alignment marks.

[0101] To this end, the embodiment of the present application further provides a method for measuring overlay error, which can be used to measure the overlay alignment mark according to any of the above examples.

[0102] In the embodiment, the reference Figure 9 The flow chart of the method for measuring overlay error in the example of the present application is shown in FIG. 2, and the measurement steps can be performed as follows: Figure 9

[0103] S11, obtaining the first position information of the zero layer mark.

[0104] In the embodiment, the first position information of the zero layer mark can be obtained in various ways.

[0105] For example, an image containing the zero layer mark can be obtained, and the first position information can be obtained by analyzing and processing the image.

[0106] For another example, the first position information can be obtained by emitting probe light to the back surface of the substrate, based on the light intensity information of the probe signal obtained by reflection or transmission of the probe light, and based on the light intensity information of each region of the back surface of the substrate.

[0107] S12, obtaining the second position information of the target layer mark.

[0108] In the embodiment, the second position information of the target layer mark can be obtained in various ways.

[0109] For example, an image containing the target layer mark can be obtained, and the second position information can be obtained by analyzing and processing the image.

[0110] For another example, the second position information can be obtained by emitting probe light to the front surface of the substrate, based on the light intensity information of the probe signal obtained by reflection or transmission of the probe light, and based on the light intensity information of each region of the front surface of the substrate.

[0111] ​It can be understood that, first, the above-mentioned ways of acquiring the first position information and the second position information are only illustrative examples, and in other examples, the first position information and the second position information can also be acquired by other ways, for example, an image containing the when-layer mark or the zero-layer mark can be acquired first, and the position information of the when-layer mark or the zero-layer mark can be determined through the light intensity information corresponding to each region of the image; second, the present example does not make any limitation on the timing of acquiring the first position information and the second position information, for example, the first position information of the zero-layer mark and the second position information of the when-layer mark can be acquired simultaneously; for another example, one of the first position information and the second position information can be acquired before the substrate is rotated, and more specifically, the first position information of the zero-layer mark can be acquired first, and then the substrate is rotated to acquire the second position information of the when-layer mark; or the second position information of the when-layer mark can be acquired first, and then the substrate is rotated to acquire the first position information of the zero-layer mark.

[0112] S13, determining the overlay error between the zero-layer mark and the when-layer mark according to the first position information and the second position information.

[0113] Specifically, the first position information can represent the current position of the zero-layer mark, and the second position information can represent the current position of the when-layer mark, so that the overlay error between the zero-layer mark and the when-layer mark in the current state can be determined based on the first position information and the second position information.

[0114] In the present embodiment, the position difference between the first position information and the second position information can be taken as the overlay error.

[0115] By using the overlay error measurement method in the above-mentioned example, the overlay error between the zero-layer mark and the when-layer mark can be determined according to the acquired first position information of the zero-layer mark and the second position information of the when-layer mark, and then the alignment accuracy in the photolithography process can be judged, which is beneficial to improving the photolithography quality.

[0116] In the present embodiment, to further improve the photolithography quality, the first position information of the zero-layer mark can be acquired in the following way:

[0117] The first offset of the position of the zero-layer mark relative to a preset position is acquired and taken as the first position information, wherein the preset position is related to the position of the photomask in the photolithography process.

[0118] In this case, the position of the when-layer mark has a second offset relative to the preset position, and then the overlay error between the zero-layer mark and the when-layer mark can be determined according to the first offset and the second offset.

[0119] Correspondingly, the second position information of the when-layer mark can be acquired in the following way:

[0120] obtaining a second offset of the position of the layer mark relative to a preset position, and taking the second offset as the second position information, wherein the preset position is related to a pattern opening of the photoresist.

[0121] In this case, when the position of the zero layer mark has a first offset relative to the preset position, the overlay error between the zero layer mark and the layer mark can be determined according to the first offset and the second offset.

[0122] In this embodiment, the center position of the pattern opening can be taken as the preset position, and then the first offset and the second offset relative to the center position of the pattern opening can be obtained.

[0123] In this embodiment, reference is made to Figure 10 The flowchart for obtaining the first offset in the example of the present application shown in FIG. 2 is as shown in FIG. 3, and the first offset of the position of the zero layer mark relative to the preset position can be obtained in the following manner: Figure 10

[0124] S21, obtaining a first image containing at least a first detection signal from the zero layer mark.

[0125] In some embodiments, the first detection signal can be generated according to signal light formed after the probe light is irradiated to the back surface of the substrate.

[0126] Specifically, after the probe light is irradiated to the back surface of the substrate, the signal light can be reflected or transmitted, and the reflected or transmitted signal light can be taken as the first detection signal. When the probe light is irradiated to the back surface of the substrate, a first image containing at least the zero layer mark can be obtained, and then the coordinate values of each region in the first image can be determined according to a predetermined coordinate system.

[0127] S22, determining the center position coordinate of the zero layer mark in the first image based on the light intensity information corresponding to the first detection signal.

[0128] Specifically, when the position where the probe light is irradiated to the back surface of the substrate changes, the absorption rates of the probe light by the zero layer mark and other regions of the back surface of the substrate are different, and the light intensity corresponding to the first detection signal formed by reflection or transmission changes greatly, it indicates that the probe light is irradiated to one of the boundary regions of the zero layer mark. When the light intensity corresponding to the first detection signal formed by reflection or transmission changes again, and the subsequent light intensity no longer changes or changes slightly, it indicates that the probe light is irradiated to another boundary region of the zero layer mark. Then, the correspondence between the light intensity information and the coordinates can be established according to the light intensity information corresponding to the zero layer mark in the two boundary regions, and then the center position coordinate of the zero layer mark in the first image can be determined according to the light intensity information.

[0129] ​S23, taking the difference between the center position coordinate of the zero layer mark and the coordinate of the preset position as the first offset.

[0130] In this embodiment, the second offset of the layer mark relative to the preset position can be obtained in the following manner: obtaining a second image containing at least the second detection signal from the layer mark; determining the center position coordinate of the layer mark in the second image based on the light intensity information corresponding to the second detection signal; and taking the difference between the center position coordinate of the layer mark and the coordinate of the preset position as the second offset.

[0131] The second detection signal can be generated according to the signal light formed after the detection light is irradiated to the front surface of the substrate. Specifically, the signal light reflected or transmitted after the detection light is irradiated to the front surface of the substrate can be used as the second detection signal, and at least a second image containing the layer mark can be obtained when the detection light is irradiated to the front surface of the substrate, and then the coordinate values of each region in the second image can be determined according to the predetermined coordinate system.

[0132] In addition, when the position of the detection light irradiated to the front surface of the substrate changes, the absorption rates of the zero layer mark and other regions of the front surface of the substrate to the detection light are different, and the light intensity of the second detection signal formed by reflection or transmission changes greatly, it indicates that the detection light is irradiated to one of the boundary regions of the layer mark; when the light intensity of the second detection signal formed by reflection or transmission changes again, and the subsequent light intensity no longer changes or changes slightly, it indicates that the detection light is irradiated to another boundary region of the layer mark, and then the corresponding relationship between the light intensity information and the coordinates can be established according to the light intensity information corresponding to the zero layer mark in the two boundary regions, and the center position coordinate of the layer mark in the second image can be determined according to the light intensity information.

[0133] That is, the overlay error measurement method in the above example can be used to obtain the overlay error between the zero layer mark and the layer mark.

[0134] To further improve the quality of the photolithography process, continuing to refer to Figure 9 The overlay error measurement method can further include:

[0135] S14, adjusting the exposure parameter of the current photolithography process according to the overlay error between the zero layer mark and the layer mark.

[0136] Specifically, the overlay error can represent the positional deviation of the layer mark relative to the zero layer mark, and when the overlay error between the zero layer mark and the layer mark is greater than a set value, it indicates that there is a deviation between them, and at this time, the exposure parameter of the photolithography process can be adjusted to reduce the deviation of the photolithography process caused by the overlay error and improve the photolithography quality.

[0137] For example, the coordinate information of the photoresist formed on the front side of the substrate can be adjusted according to the overlay error between the zero-layer mark and the in-layer mark.

[0138] It should be noted that the set value in the examples of the present application can refer to an absolute difference or a percentage difference.

[0139] The embodiment of the present application also provides a kind of overlay error measurement device, overlay error measurement device can be measured to the overlay alignment mark described in any of the foregoing examples, the following with reference to the drawings, example introduction.

[0140] Reference Figure 11 The structure diagram of the overlay error measurement device in the examples of the present application is shown as Figure 11 As shown in the figure, the overlay error measurement device 300 can include a bearing module 310 and an overlay error measurement module 320, wherein:

[0141] The bearing module 310 is configured to fix the substrate (not shown in the figure);

[0142] The overlay error measurement module 320 is configured to obtain the first position information of the zero-layer mark and the second position information of the in-layer mark, and determine the overlay error between the zero-layer mark and the in-layer mark according to the first position information and the second position information.

[0143] Specifically, when the bearing module 310 fixes the substrate, the overlay error measurement module 320 can obtain the first position information of the zero-layer mark and the second position information of the in-layer mark. Since the first position information can represent the current position of the zero-layer mark, and the second position information can represent the current position of the in-layer mark, based on the first position information and the second position information, the overlay error measurement module 320 can determine the overlay error between the zero-layer mark and the in-layer mark in the current state.

[0144] In some embodiments, to further improve the quality of photolithography, the overlay error measurement module 320 can obtain the first position information of the zero-layer mark in the following manner:

[0145] The overlay error measurement module 320 can obtain the first offset of the position of the zero-layer mark relative to a preset position as the first position information, wherein the preset position is related to the pattern opening of the photoresist.

[0146] In this case, the position of the in-layer mark has a second offset relative to the preset position, and then the overlay error measurement module 320 can determine the overlay error between the zero-layer mark and the in-layer mark according to the first offset and the second offset.

[0147] Correspondingly, the overlay error measurement module 320 can acquire the second position information of the on-layer mark in the following way:

[0148] The overlay error measurement module 320 can acquire a second offset of the position of the on-layer mark relative to a preset position, and take the second offset as the second position information, wherein the preset position is related to the pattern opening of the photoresist.

[0149] In this case, when the position of the zero-layer mark has a first offset relative to the preset position, the overlay error measurement module 320 can determine the overlay error between the zero-layer mark and the on-layer mark according to the first offset and the second offset.

[0150] In this embodiment, the center position of the pattern opening can be taken as the preset position, and the overlay error measurement module 320 can obtain the first offset and the second offset relative to the center position of the pattern opening.

[0151] In this embodiment, referring to Figure 12 As shown in the structure diagram of an overlay error measurement unit in an example of the present application shown in Figure 12 The overlay error measurement module 320 can include a processing unit 322 and an image acquisition unit 321, wherein:

[0152] The image acquisition unit 321 is configured to emit probe light to the back surface of the substrate, acquire a first image containing a first probe signal from the zero-layer mark, and output the first image to the processing module; and is configured to emit probe light to the front surface of the substrate, acquire a second image containing a second probe signal from the on-layer mark, and output the second image to the processing unit 322;

[0153] The processing unit 322 is configured to determine the center position coordinates of the zero-layer mark in the first image based on the light intensity information corresponding to the first probe signal, take the difference between the center position coordinates of the zero-layer mark and the coordinates of the preset position as the first offset; and determine the center position coordinates of the on-layer mark in the second image based on the light intensity information corresponding to the second probe signal, take the coordinate difference between the center position coordinates of the on-layer mark and the preset position as the second offset, and determine the overlay error between the zero-layer mark and the on-layer mark according to the first offset and the second offset.

[0154] Specifically, on the one hand, the position where the probe light emitted by the image acquisition unit 321 is irradiated on the back side of the substrate changes, and the zero layer mark and other areas on the back side of the substrate have different absorption rates of the probe light. When the light intensity corresponding to the first detection signal formed by reflection or transmission changes significantly, it means that the probe light is irradiated on one of the boundary areas of the zero layer mark; when the light intensity corresponding to the first detection signal formed by reflection or transmission changes again, and the subsequent light intensity does not change or changes slightly, it means that the probe light is irradiated on another boundary area of ​​the zero layer mark, and then the processing unit 322 can obtain the light intensity information corresponding to the zero layer mark in these two boundary areas; on the other hand, when the probe light irradiates the back side of the substrate, the image acquisition unit 321 can obtain a first image including at least the zero layer mark and upload it to the processing module 322. Then, the processing unit 322 can determine the coordinate values ​​of each area in the first image according to the pre-used coordinate system, so as to establish a correspondence between the light intensity information and the coordinates. Since the light intensity at different positions can be different, the processing unit 322 determines the center position coordinates of the zero layer mark according to the light intensity information.

[0155] The processing unit 322 may use the difference between the center position coordinates of the zero layer mark and the preset position as the first offset.

[0156] On the one hand, the position of the detection light emitted by the image acquisition unit 321 irradiating the front side of the substrate changes. When the absorption rate of the layer mark and other areas of the front side of the substrate to the detection light is different, when the light intensity corresponding to the second detection signal formed by reflection or transmission changes significantly, it means that the detection light irradiates one of the boundary areas of the layer mark; when the light intensity corresponding to the second detection signal formed by reflection or transmission changes again, and the subsequent light intensity no longer changes or changes slightly, it means that the detection light irradiates another boundary area of ​​the layer mark, and then the processing unit 322 can obtain the light intensity information corresponding to the layer mark in these two boundary areas; on the other hand, when the detection light irradiates the back side of the substrate, the image acquisition unit 321 can obtain a second image including at least the layer mark, and upload it to the processing unit 322. Then the processing unit 322 can determine the coordinate values ​​of each area in the second image according to the pre-used coordinate system, so as to establish a correspondence between the light intensity information and the coordinates. Since the light intensity at different positions can be different, the processing unit 322 determines the coordinates of the center position of the layer mark according to the light intensity information.

[0157] The processing unit 322 may use the difference between the center position coordinates of the current layer mark and the preset position as the second offset, and further determine the overlay error between the zero layer mark and the current layer mark according to the first offset and the second offset.

[0158] In some examples, the overlay error can represent a deviation of the position of the layer mark relative to the zero layer mark. When the overlay error between the zero layer mark and the layer mark is greater than a set difference, it indicates that there is a deviation between the two. At this time, the processing unit 322 can also be configured to adjust the exposure parameter of the current photolithography process according to the overlay error between the zero layer mark and the layer mark.

[0159] It should be noted that the present application examples do not make any limitation on the timing of obtaining the first position information and the second position information. For example, the overlay error measurement module can obtain the first position information of the zero layer mark and the second position information of the layer mark at the same time. For another example, the overlay error measurement module can first obtain the first position information and then obtain the second position information. For yet another example, the overlay error measurement module can first obtain the second position information and then obtain the first position information.

[0160] In the overlay error measurement process, the first image and the second image need to be obtained to obtain the overlay error.

[0161] In the present embodiment, there are various ways to obtain the first image and the second image.

[0162] For example, the position of the substrate can be kept unchanged, and the first image and the second image can be obtained by adjusting the position of the image acquisition module.

[0163] Specifically, referring to the overlay error measurement scene diagram in the present application example shown in Figure 13 , as shown in Figure 13 , A, at a certain moment, the image acquisition unit 321 is located on the side of the front surface SF1 of the substrate 100. Figure 13 The image acquisition unit 321 can emit detection light to the front surface SF1 of the substrate 100 and obtain the first image containing the layer mark 112.

[0164] After obtaining the second image containing the layer mark 112, as shown in

[0165] , B, by adjusting the position of the image acquisition unit 321, the image acquisition unit 321 can be located on the side of the back surface SF2 of the substrate 100. The image acquisition unit 321 can emit detection light to the back surface SF2 of the substrate 100 and obtain the first image containing the zero layer mark 110. Figure 13 Figure 13 It can be understood that the timing of obtaining the first image and the second image described above is only an example. In some other examples, the first image can be obtained first and then the second image can be obtained.

[0166] Figure 13

[0167] ​​For example, the substrate can be kept in place, and the first position information and the second position information can be acquired by disposing the image acquisition units on the two surfaces of the substrate respectively.

[0168] Specifically, referring to FIG. 1, which shows another schematic diagram of a lithography error measurement scenario in an example of the present application, as shown in FIG. 1, the image acquisition units 321 are disposed on the side where the front surface SF1 of the substrate 100 is located and the back surface SF2 of the substrate 100 respectively. Figure 14 Figure 14 Specifically, referring to FIG. 1, which shows another schematic diagram of a lithography error measurement scenario in an example of the present application, as shown in FIG. 1, the image acquisition units 321 are disposed on the side where the front surface SF1 of the substrate 100 is located and the back surface SF2 of the substrate 100 respectively.

[0169] For example, the position of the substrate can be adjusted, and the first position information and the second position information can be acquired by the at least one image acquisition unit.

[0170] Specifically, referring to FIG. 1, which shows another schematic diagram of a lithography error measurement scenario in an example of the present application, as shown in FIG. 1, the image acquisition units 321 are disposed on the side where the front surface SF1 of the substrate 100 is located and the back surface SF2 of the substrate 100 respectively. Figure 15 Figure 15 Specifically, referring to FIG. 1, which shows another schematic diagram of a lithography error measurement scenario in an example of the present application, as shown in FIG. 1, the image acquisition units 321 are disposed on the side where the front surface SF1 of the substrate 100 is located and the back surface SF2 of the substrate 100 respectively. Figure 15 A shown in FIG. 1, the second image containing the layer mark 112 can be acquired within the collection field of view of the image acquisition units 321.

[0171] After the second image is acquired, as shown in FIG. 1B, the position of the substrate 100 can be flipped so as to display the zero layer mark 110 within the collection field of view of the image acquisition units 321, and then the first image containing the zero layer mark 110 can be acquired by the image acquisition units 321. Figure 15 Figure 15 It can be understood that, It can be understood that,

[0172] It can be understood that, Figure 15 It can be understood that,

[0173] In this case, the carrying module can include a carrying plane for carrying the substrate, and a rotating shaft for driving the carrying plane to rotate, that is, the carrying module can also be configured to perform a rotating operation on the substrate.

[0174] Correspondingly, the lithography error measurement unit can be configured to acquire one of the first position information and the second position information before the rotating operation is performed on the substrate.

[0175] Specifically, the lithography error measurement unit can acquire the first position information before the rotating operation is performed on the substrate, or the lithography error measurement unit can acquire the second position information before the rotating operation is performed on the substrate.

[0176] It should be noted that, first,​​Figures 13 to 15 The relative position between the image acquisition unit 321 and the substrate 100 shown in the figure is only illustrative. In a specific implementation, the probe light emitted by the image acquisition unit 321 can be obliquely incident on the substrate 100. In addition, Figures 12 to 14 The shape and the distribution position of the zero-layer mark 110 and the layer mark 112 on the substrate shown in the figure are only illustrative. For different application scenarios, the zero-layer mark 110 and the layer mark 112 can have different shapes and distribution positions, and the embodiments of the present application do not limit this.

[0177] In some examples, the image acquisition module can include any device having an image acquisition function. For example, the image acquisition module can include a CCD sensor.

[0178] The processing module can be implemented by a processing chip such as a central processing unit (CPU), a field programmable gate array (FPGA), a programmable logic controller (PLC), or an application specific integrated circuit (ASIC).

[0179] It should be noted that, as an example, the alignment method can be performed by using the alignment system in the foregoing example, and the specific description of the alignment method can be combined with the related description of the alignment system.

[0180] Although the embodiments of the present application are disclosed as above, the present application is not limited thereto. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various modifications and changes, and therefore the protection scope of the present application should be subject to the scope defined by the claims.

Claims

1. A lithography overlay mark, characterized by, The application relates to a lithography overlay mark, comprising: a zero-layer mark located on the back surface of a substrate; a current-layer mark located on the front surface of the substrate, the front surface and the back surface of the substrate being oppositely arranged; wherein, from the back surface to the front surface, the current-layer mark is located directly above the zero-layer mark.

2. The overlay alignment mark of claim 1, wherein, The distance between the layer where the zero-layer mark is located and the layer where the current-layer mark is located is 100-5000 nm.

3. The overlay alignment mark of claim 1, wherein, The pattern of the overlay mark comprises at least one of Box in Box, Frame in Frame and Bar in Bar.

4. The overlay alignment mark of claim 1, wherein, The zero-layer mark comprises a groove located in the back surface of the substrate.

5. A method of forming overlay marks, characterized by, The application relates to a lithography overlay mark, comprising: providing a substrate, the substrate comprising oppositely arranged back and front surfaces; forming a zero-layer mark on the back surface of the substrate; forming a current-layer mark on the front surface of the substrate; wherein, from the back surface to the front surface, the current-layer mark is located directly above the zero-layer mark.

6. The method of forming overlay alignment marks according to claim 5, wherein, The zero-layer mark is formed on the back surface of the substrate by: forming a mask material layer on the back surface of the substrate; performing a patterning process on the mask material layer to form a mask layer with a mask opening; removing part of the thickness of the substrate along the mask opening to form a groove in the substrate, the groove serving as the zero-layer mark.

7. The method of forming overlay alignment marks according to claim 6, wherein, The depth of the groove is 5-10 mu m.

8. The formation method of overlay alignment marks according to claim 5, wherein, Before the zero-layer mark is formed on the back surface of the substrate, the method further comprises: forming a protective layer on the front surface of the substrate; before the current-layer mark is formed on the front surface of the substrate, the method further comprises: removing the protective layer.

9. The formation method of overlay alignment marks according to claim 8, wherein, The material of the protective layer comprises one or more of silicon nitride, silicon carbide, silicon carbon nitride, silicon carbon nitrogen oxide, silicon nitrogen oxide, boron nitride, boron carbon nitride and silicon oxide.

10. A method of overlay error measurement, the method comprising: The overlay error measurement method is suitable for measuring the overlay mark of any one of claims 1-4, and the overlay error measurement method comprises: obtaining first position information of the zero-layer mark; obtaining second position information of the current-layer mark; determining the overlay error between the zero-layer mark and the current-layer mark according to the first position information and the second position information.

11. The overlay error measurement method according to claim 10, characterized in that: The first position information of the zero-layer mark comprises: obtaining a first offset of the position of the zero-layer mark relative to a preset position, and taking the first offset as the first position information, the position of the current-layer mark having a second offset relative to the preset position; determining the overlay error between the zero-layer mark and the current-layer mark according to the first position information and the second position information, comprising: determining the overlay error between the zero-layer mark and the current-layer mark according to the first offset and the second offset.

12. The method of pitch and roll estimation according to claim 11, wherein, The first offset of the position of the zero-layer mark relative to a preset position comprises: obtaining a first image containing at least a first detection signal from the zero-layer mark, the first detection signal being generated according to signal light formed after probe light is irradiated to the back surface of the substrate; determining the central position coordinates of the zero-layer mark in the first image based on light intensity information corresponding to the first detection signal; taking the difference between the central position coordinates of the zero-layer mark and the coordinates of the preset position as the first offset.

13. The method of pitch and roll estimation according to claim 10, wherein, The second position information of the current-layer mark comprises: obtaining a second offset of the position of the layer mark relative to the preset position as the second position information, the position of the zero layer mark relative to the preset position having a first offset; determining the overlay error between the zero layer mark and the layer mark according to the first position information and the second position information, including: determining the overlay error between the zero layer mark and the layer mark according to the first offset and the second offset.

14. The method of pitch and roll estimation according to claim 13, wherein, The method further includes: obtaining a second image containing at least a second detection signal from the layer mark, the second detection signal being generated according to a signal light formed after the detection light is irradiated to the front surface of the substrate; determining the center position coordinates of the layer mark in the second image based on the light intensity information corresponding to the second detection signal; taking the difference between the center position coordinates of the layer mark and the coordinates of the preset position as the second offset.

15. The overlay error measurement method of any one of claims 10-14, wherein, The first position information and the second position information are obtained in at least one of the following ways: simultaneously obtaining the first position information of the zero layer mark and the second position information of the layer mark; after obtaining the first position information of the zero layer mark, performing a flipping operation on the substrate to obtain the second position information of the layer mark; after obtaining the second position information of the layer mark, performing a flipping operation on the substrate to obtain the first position information of the zero layer mark.

16. The overlay error measurement method of any one of claims 10-14, wherein, The method further includes: adjusting the exposure parameters of the current photolithography process according to the overlay error between the zero layer mark and the layer mark.

17. An overlay error measurement device, comprising: The overlay error measurement device is suitable for measuring the overlay alignment mark of any one of claims 1 to 4, and the overlay error measurement device includes: a bearing module configured to fix the substrate; an overlay error measurement module configured to obtain the first position information of the zero layer mark and the second position information of the layer mark, and determine the overlay error between the zero layer mark and the layer mark according to the first position information and the second position information.

18. The overlay error measurement device of claim 17, wherein, The overlay error measurement module is configured to obtain a first offset of the position of the zero layer mark relative to a preset position as the first position information, and obtain a second offset of the position of the layer mark relative to the preset position as the second position information, and determine the overlay error between the zero layer mark and the layer mark according to the first offset and the second offset.

19. The overlay measurement device of claim 18, wherein, The overlay error measurement module includes a processing unit and an image acquisition unit, wherein: the image acquisition unit is configured to emit detection light to the back surface of the substrate, obtain a first image containing at least a first detection signal from the zero layer mark, and output the first image to the processing module; and configured to emit detection light to the front surface of the substrate, obtain a second image containing at least a second detection signal from the layer mark, and output the second image to the processing unit. The processing unit is configured to determine the center position coordinate of the zero-layer mark in the first image based on the light intensity information corresponding to the first detection signal, and take the coordinate difference between the center position coordinate of the zero-layer mark and the coordinate of the preset position as the first offset; determine the center position coordinate of the in-layer mark in the second image based on the light intensity information corresponding to the second detection signal, and take the coordinate difference between the center position coordinate of the in-layer mark and the preset position as the second offset; and determine the overlay error between the zero-layer mark and the in-layer mark according to the first offset and the second offset.

20. The overlay error measurement device of any one of claims 17-19, wherein, The carrying module is further configured to perform a flipping operation on the substrate. The overlay error measurement module is configured to acquire one of the first position information and the second position information before performing the flipping operation on the substrate.

Images