Control method of three-phase rectifier and power conversion module

Abstract

The invention provides a control method of a three-phase rectifier and a power conversion module, and relates to the technical field of rectifiers. The control method comprises the following steps: determining a three-phase sinusoidal current reference signal according to the input voltage of a three-phase rectifier, the voltage of a first capacitor of a direct current bus and the voltage of a second capacitor of the direct current bus; determining a common-mode signal according to the voltage of the first capacitor and the voltage of the second capacitor; according to the sinusoidal current reference signal, the carrier signal and the common-mode signal of any phase in the three-phase sinusoidal current reference signals and the input current of the corresponding phase, a gate signal of the corresponding phase is determined, and the gate signal of the corresponding phase is used for controlling the switch-on or switch-off of the switch unit of the corresponding phase. According to the invention, when the voltage of the power grid is distorted or unbalanced, the operand required for control and the control difficulty of the rectifier can be reduced.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of rectifiers, and particularly relates to a control method of a three-phase rectifier and a power conversion module. BACKGROUND

[0002] When the Vienna rectifier works, the AC input current needs to be a sine wave by controlling the switching device to meet the requirement of low harmonics of the grid side, and the voltage of the two capacitors in series on the DC side needs to be controlled to balance the two capacitor voltages to ensure that the voltage stress of the switching device and the capacitor is within the safe range. However, when the grid voltage is distorted or unbalanced, the input current will generate harmonics or distortion. At this time, if the input current is adjusted to keep it as a sine wave, the harmonic current needs to be controlled, which greatly increases the operation amount and improves the control difficulty of the rectifier.

[0003] It should be noted that the information disclosed in the above background section is only used to strengthen the understanding of the background of the present disclosure, and therefore can include information that does not constitute prior art known to those of ordinary skill in the art. SUMMARY

[0004] The present disclosure provides a control method of a three-phase rectifier and a power conversion module, which at least partially solves the problem that in the related art, when the grid voltage is distorted or unbalanced, adjusting the input current to keep it as a sine wave greatly increases the operation amount required for control and improves the control difficulty of the rectifier.

[0005] Other characteristics and advantages of the present disclosure will become apparent from the following detailed description, or will be learned by practice of the present disclosure.

[0006] According to a first aspect of the present disclosure, a control method of a three-phase rectifier is provided, the three-phase rectifier comprising a DC bus and a three-phase switching unit, wherein the DC bus is electrically connected with the three-phase switching unit, and the control method comprises the following steps:

[0007] Step S1: determining a three-phase sinusoidal current reference signal according to an input voltage of the three-phase rectifier, a voltage of a first capacitor of the DC bus, and a voltage of a second capacitor of the DC bus;

[0008] Step S2: determining a common-mode signal according to the voltage of the first capacitor and the voltage of the second capacitor;

[0009] Step S3: determining a gate signal of a corresponding phase according to the sinusoidal current reference signal of any phase of the three-phase sinusoidal current reference signal, a carrier signal, the common-mode signal, and an input current of the corresponding phase, wherein the gate signal of the corresponding phase is used to control the turn-on or turn-off of the switching unit of the corresponding phase.

[0010] In some embodiments of the present disclosure, the step S1 specifically comprises:

[0011] Step S11: determining an angle θ by using a phase-locked loop according to an input voltage of the three-phase rectifier;

[0012] Step S12: determining a three-phase sinusoidal signal according to the angle θ;

[0013] Step S13: determining the sinusoidal current reference signal of any phase according to the voltage of the first capacitor, the voltage of the second capacitor and the sinusoidal signal of any phase of the three-phase sinusoidal signal.

[0014] In some embodiments of the present disclosure, the step S3 specifically comprises:

[0015] Step S31: superimposing the sinusoidal current reference signal of any phase on the carrier signal and the common-mode signal to determine a current reference value of the corresponding phase;

[0016] Step S32: generating a first pulse signal by a first comparator and a second pulse signal by a second comparator through the input current of the corresponding phase and the current reference value of the corresponding phase;

[0017] Step S33: generating a first sign signal by a third comparator and a second sign signal by a fourth comparator through the sinusoidal current reference signal of the corresponding phase;

[0018] Step S34: multiplying the first pulse signal of the corresponding phase with the first sign signal to obtain a gate signal of a positive half cycle, multiplying the second pulse signal of the corresponding phase with the second sign signal to obtain a gate signal of a negative half cycle, and adding the gate signal of the positive half cycle and the gate signal of the negative half cycle to obtain a gate signal of the corresponding phase.

[0019] In some embodiments of the present disclosure, when the sinusoidal current reference signal of the corresponding phase is a positive half wave, the value of the first sign signal is 1 and the value of the second sign signal is 0; when the sinusoidal current reference signal of the corresponding phase is a negative half wave, the value of the first sign signal is 0 and the value of the second sign signal is 1.

[0020] In some embodiments of the present disclosure, the step S2 specifically comprises:

[0021] Step S21: subtracting the voltage of the first capacitor from the voltage of the second capacitor to obtain a voltage difference;

[0022] Step S22: performing PI regulation on the voltage difference to obtain the common-mode signal.

[0023] In some embodiments of the present disclosure, the three-phase rectifier comprises a Vienna rectifier.

[0024] In some embodiments of the present disclosure, the step S11 specifically comprises:

[0025] Step S111: performing abc / dq coordinate transformation on the input voltage of the three-phase rectifier to obtain a q-axis component of the input voltage;

[0026] Step S112: subtracting a 0 voltage reference from the q-axis component of the input voltage and then performing proportional integral (PI) regulation to generate a frequency signal, and integrating the frequency signal to obtain the angle θ.

[0027] In some embodiments of the present disclosure, the step S13 specifically comprises:

[0028] Step S131: adding the voltage of the first capacitor and the voltage of the second capacitor to obtain a voltage sum signal;

[0029] Step S132: subtracting a voltage reference of the DC bus from the voltage sum signal to obtain an error signal, and multiplying the error signal by the sinusoidal signal of any phase of the three-phase sinusoidal signal after PI regulation to obtain the sinusoidal current reference signal of the corresponding phase.

[0030] In some embodiments of the present disclosure, the three-phase sinusoidal signal comprises a first-phase sinusoidal signal, a second-phase sinusoidal signal, and a third-phase sinusoidal signal;

[0031] wherein the first-phase sinusoidal signal is sinθ;

[0032] the second-phase sinusoidal signal is sin(θ-120°); and

[0033] the third-phase sinusoidal signal is sin(θ+120°).

[0034] In some embodiments of the present disclosure, the step S111 specifically comprises:

[0035] performing the abc / dq coordinate transformation using the angle θ.

[0036] According to a second aspect of the present disclosure, a power conversion module is also provided, comprising:

[0037] a three-phase rectifier, the three-phase rectifier comprising a DC bus and a three-phase switching unit, wherein the DC bus is electrically connected to the three-phase switching unit;

[0038] and a controller configured to:

[0039] determine a three-phase sinusoidal current reference signal according to the input voltage of the three-phase rectifier, the voltage of the first capacitor of the DC bus and the voltage of the second capacitor of the DC bus;

[0040] determine a common-mode signal according to the voltage of the first capacitor and the voltage of the second capacitor;

[0041] determine a gate signal of a corresponding phase according to the sinusoidal current reference signal of any phase of the three-phase sinusoidal current reference signal, a carrier signal, the common-mode signal and an input current of the corresponding phase, wherein the gate signal of the corresponding phase is used to control the on or off of the switching unit of the corresponding phase.

[0042] In some embodiments of the present disclosure, the controller comprises a reference signal determination module,

[0043] the reference signal determination module is configured to:

[0044] determine an angle θ according to the input voltage of the three-phase rectifier by using a phase-locked loop;

[0045] determine a three-phase sinusoidal signal according to the angle θ;

[0046] determine the sinusoidal current reference signal of a corresponding phase according to the voltage of the first capacitor, the voltage of the second capacitor and the sinusoidal signal of any phase of the three-phase sinusoidal signal.

[0047] In some embodiments of the present disclosure, the controller comprises a gate signal determination module,

[0048] the gate signal determination module is configured to:

[0049] superimpose the sinusoidal current reference signal of any phase on the carrier signal and the common-mode signal to determine a current reference value of a corresponding phase;

[0050] generate a first pulse signal by a first comparator and a second pulse signal by a second comparator through a comparison between the input current of a corresponding phase and the current reference value of the corresponding phase;

[0051] generate a first sign signal by a third comparator and a second sign signal by a fourth comparator through a comparison between the sinusoidal current reference signal of a corresponding phase and a carrier signal;

[0052] multiply the first pulse signal of a corresponding phase by the first sign signal to obtain a gate signal of a positive half cycle, multiply the second pulse signal of the corresponding phase by the second sign signal to obtain a gate signal of a negative half cycle, and add the gate signal of the positive half cycle and the gate signal of the negative half cycle to obtain a gate signal of the corresponding phase.

[0053] In some embodiments of the present disclosure, when the sine current reference signal of the corresponding phase is a positive half wave, the value of the first symbol signal is 1 and the value of the second symbol signal is 0; when the sine current reference signal of the corresponding phase is a negative half wave, the value of the first symbol signal is 0 and the value of the second symbol signal is 1.

[0054] In some embodiments of the present disclosure, the controller comprises a common-mode signal determination module,

[0055] The common-mode signal determination module is configured to:

[0056] Subtracting the voltage of the first capacitor from the voltage of the second capacitor obtains a voltage difference;

[0057] PI adjusting the voltage difference obtains the common-mode signal.

[0058] In some embodiments of the present disclosure, the three-phase rectifier comprises a Vienna rectifier.

[0059] In some embodiments of the present disclosure, the reference signal determination module is specifically configured to:

[0060] The reference signal determination module is specifically configured to:

[0061] Performing abc / dq coordinate transformation on the input voltage of the three-phase rectifier obtains the q-axis component of the input voltage;

[0062] Subtracting a 0 voltage reference from the q-axis component of the input voltage and then PI adjusting generates a frequency signal, and integrating the frequency signal obtains the angle θ.

[0063] In some embodiments of the present disclosure, the reference signal determination module is specifically configured to:

[0064] Adding the voltage of the first capacitor and the voltage of the second capacitor obtains a voltage sum signal;

[0065] Subtracting the voltage reference of the DC bus from the voltage sum signal obtains an error signal, and PI adjusting the error signal and then multiplying the error signal by the sine signal of any phase in the three-phase sine signal obtains the sine current reference signal of the corresponding phase.

[0066] In some embodiments of the present disclosure, the three-phase sine signal comprises a first-phase sine signal, a second-phase sine signal and a third-phase sine signal;

[0067] Wherein, the first-phase sine signal is sinθ;

[0068] The second phase sinusoidal signal is sin(θ-120°);

[0069] The third phase sinusoidal signal is sin(θ+120°).

[0070] In some embodiments of the present disclosure, the reference signal determination module is specifically configured to:

[0071] The abc / dq coordinate transformation is performed using the angle θ.

[0072] The control method of the three-phase rectifier provided in the embodiments of the present disclosure determines a three-phase sinusoidal current reference signal by using the input voltage of the three-phase rectifier, the voltage of the first capacitor of the DC bus, and the voltage of the second capacitor of the DC bus, and determines a gate signal of a corresponding phase by using a sinusoidal current reference signal of any phase of the three-phase sinusoidal current reference signal, a carrier signal, a common-mode signal, and an input current of the corresponding phase, so as to control the turn-on or turn-off of a switching unit of the corresponding phase, so as to adjust the AC input current to keep a sinusoidal wave. By determining the three-phase sinusoidal current reference signal and taking the three-phase sinusoidal current reference signal as a reference when controlling, the AC input current to be adjusted is the current reference signal rather than the voltage signal, so that when the grid voltage is distorted or unbalanced, the control of the AC input current is not affected, and the input current with harmonics or distortion does not occur, thereby reducing the required operation amount of control and the control difficulty of the rectifier.

[0073] It should be understood that the foregoing general description and the following detailed description are only exemplary and explanatory, and cannot limit the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0074] The drawings incorporated into the specification and forming a part of the specification, show embodiments consistent with the present disclosure, and together with the specification, serve to explain the principles of the present disclosure. Obviously, the drawings in the following description are only some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art without creative labor on the basis of these drawings.

[0075] Figure 1 A simple structure schematic diagram of a three-phase rectifier in an embodiment of the present disclosure is shown;

[0076] Figure 2 A control method schematic diagram of a three-phase rectifier in an embodiment of the present disclosure is shown;

[0077] Figure 3 A method implementation process schematic diagram of step S1 in some embodiments of the present disclosure is shown;

[0078] Figure 4 A method implementation process schematic diagram of step S11 in some embodiments of the present disclosure is shown;

[0079] Figure 5 A control block diagram for determining the angle θ in some specific embodiments of the present disclosure is shown;

[0080] Figure 6 A schematic diagram showing the method implementation process of step S13 in some embodiments of the present disclosure is shown;

[0081] Figure 7 A schematic diagram showing the method implementation process of step S2 in some embodiments of the present disclosure is shown;

[0082] Figure 8 A schematic diagram showing the method implementation process of step S3 in some embodiments of the present disclosure is shown;

[0083] Figure 9 A block diagram of the instantaneous current inner loop control of a three-phase Vienna rectifier according to a specific example of the present disclosure is shown;

[0084] Figure 10 A three-phase sinusoidal signal control block diagram of a specific example in the present disclosure is shown;

[0085] Figure 11 A three-phase sinusoidal current reference signal control block diagram of a specific example in the present disclosure is shown;

[0086] Figure 12 A control block diagram showing a specific example of the present disclosure in which a common-mode signal is generated by a grading ring;

[0087] Figure 13 A schematic diagram showing control waveforms of a specific example of the present disclosure; and

[0088] Figure 14 A simplified structural diagram of a power conversion module in some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0089] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

[0090] In addition, the accompanying drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. Identical reference numerals in the figures denote identical or similar parts, and thus repetitive descriptions thereof will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities that do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0091] The specific implementation of the embodiment of the present disclosure is described in detail below with reference to the accompanying drawings.

[0092] like Figure 1 As shown, a three-phase rectifier provided by an embodiment of the present disclosure includes: a DC bus 101 and a three-phase switch unit 102, wherein the DC bus 101 is electrically connected to the three-phase switch unit 102. Specifically, the three-phase switch unit 102 includes a first-phase switch unit 121, a second-phase switch unit 122, and a third-phase switch unit 123. It should be noted that the three-phase switch unit 102 is electrically connected to the three-phase AC power on the grid side, that is, the first-phase switch unit 121, the second-phase switch unit 122, and the third-phase switch unit 123 are electrically connected to the a-phase AC power, the b-phase AC power, and the c-phase AC power, respectively. It can be understood by those skilled in the art that the connection relationship is not fixed, and one-phase switch unit can be connected to one-phase AC power. That is, the first-phase switch unit 121 can be electrically connected to the a-phase AC power, or to the b-phase AC power, or to the c-phase AC power. The embodiment of the present disclosure does not limit this.

[0093] When implementing it specifically, Figure 1 As shown, the DC bus 101 includes a first capacitor 111 and a second capacitor 112, and the first capacitor 111 and the second capacitor 112 are connected in series on the DC side. In some embodiments of the present disclosure, the three-phase rectifier includes a Vienna rectifier, that is, the three-phase rectifier can be a Vienna rectifier of various connection forms, which is a pulse width modulated rectifier that can receive a three-phase AC power supply and is also a power factor correction circuit. Specifically, as Figure 1As shown, the Vienna rectifier further includes: a first inductor L1, a second inductor L2, a third inductor L3, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6. Taking the a-phase alternating current input as an example, after the a-phase alternating current is input via the first inductor L1, when the first-phase switching unit 121 is in a conducting state, when the a-phase alternating current is in a positive half cycle, the current flows through the loop composed of the first diode D1 and the first capacitor 111; when the a-phase alternating current is in a negative half cycle, the current flows through the loop composed of the second diode D2 and the second capacitor 112. Those skilled in the art can understand that, Figure 1 The Vienna rectifier shown is only an example of one connection mode in the specific embodiments of the present disclosure, and Vienna rectifiers with different connection modes can be used according to actual needs, which are not limited in the present disclosure.

[0094] For the three-phase rectifier described above, the present embodiment provides a control method, as shown in Figure 2 As shown, the method comprises the following steps:

[0095] S1, determining a three-phase sinusoidal current reference signal according to the input voltage of the three-phase rectifier, the voltage of the first capacitor 111 of the DC bus 101, and the voltage of the second capacitor 112 of the DC bus 101;

[0096] It should be noted that the three-phase sinusoidal current reference signal is a reference value of the determined three-phase alternating current input, so that the three-phase alternating current input is adjusted based on the three-phase sinusoidal current reference signal, thereby avoiding the interference caused by the harmonic or distortion of the alternating current voltage on the adjustment.

[0097] S2, determining a common-mode signal according to the voltage of the first capacitor 111 and the voltage of the second capacitor 112;

[0098] S3, determining a gate signal of a corresponding phase according to the sinusoidal current reference signal of any phase in the three-phase sinusoidal current reference signal, a carrier signal, a common-mode signal, and an input current of the corresponding phase.

[0099] It should be noted that the gate signal of the corresponding phase is used to control the conduction or turn-off of the switching unit of the corresponding phase, and the alternating current input of the corresponding phase is adjusted by changing the state of the switching unit, so that the alternating current input of the corresponding phase maintains a sinusoidal waveform.

[0100] As can be seen from the above steps, the control method of the three-phase rectifier provided in the embodiments of the present disclosure determines the three-phase sinusoidal current reference signals by using the input voltage of the three-phase rectifier, the voltage of the first capacitor of the DC bus, and the voltage of the second capacitor of the DC bus, and determines the gate signal of the corresponding phase by using the sinusoidal current reference signal of any phase of the three-phase sinusoidal current reference signals, the carrier signal, the common-mode signal, and the input current of the corresponding phase, so as to control the conduction or turn-off of the switching unit of the corresponding phase, thereby adjusting the AC input current to keep sinusoidal. By determining the three-phase sinusoidal current reference signals and taking the three-phase sinusoidal current reference signals as the reference in the control, the AC input current is adjusted according to the current reference signal rather than the voltage signal, so that the control of the AC input current is not affected when the grid voltage is distorted or unbalanced, and the harmonic or distorted input current does not occur, thereby reducing the operation amount and the control difficulty of the rectifier.

[0101] In some embodiments of the present disclosure, the specific implementation process of S1 is as shown in Figure 3 , and includes the following steps:

[0102] S11, determining an angle θ by using a phase-locked loop according to the input voltage of the three-phase rectifier;

[0103] It should be noted that the phase-locked loop is realized by software, and is a three-phase phase-locked loop based on dq synchronous rotating coordinate transformation. The rotating coordinate transformation plays a phase detection role to obtain the q-axis component of the three-phase voltage to obtain the phase information. The output of the PI controller is used as the angular frequency, and the voltage phase of the phase-locked loop is output after the integrator.

[0104] S12, determining a three-phase sinusoidal signal according to the angle θ;

[0105] It should be noted that the three-phase sinusoidal signal includes a first-phase sinusoidal signal, a second-phase sinusoidal signal, and a third-phase sinusoidal signal. The first-phase sinusoidal signal is sinθ, the second-phase sinusoidal signal is sin(θ-120°), and the third-phase sinusoidal signal is sin(θ+120°). It can be understood by those skilled in the art that the first-phase sinusoidal signal can also be sin(θ-120°) or sin(θ+120°), and the phase difference between the remaining two-phase sinusoidal signals and the first-phase sinusoidal signal is only 120 degrees, which is not described herein in detail.

[0106] S13, determining the sinusoidal current reference signal of the corresponding phase according to the voltage of the first capacitor 111, the voltage of the second capacitor 112, and the sinusoidal signal of any phase of the three-phase sinusoidal signal.

[0107] In some embodiments of the present disclosure, the specific implementation process of S11 is as shown in Figure 4 , and includes the following steps:

[0108] S111, performing abc / dq coordinate transformation on the input voltage of the three-phase rectifier to obtain a q-axis component of the input voltage;

[0109] It should be noted that the input voltage of the three-phase rectifier is coordinate-transformed from the three-phase stationary abc coordinate system to the dq rotating coordinate system, and a park transformation is performed to obtain the q-axis component of the transformed input voltage. In S11, the abc / dq coordinate transformation is performed by using the angle θ.

[0110] S112, subtracting the 0 voltage reference from the q-axis component of the input voltage and performing PI regulation to generate a frequency signal, and integrating the frequency signal to obtain the angle θ.

[0111] It should be noted that the q-axis component of the transformed input voltage is the reactive component of the transformed input voltage, and the most ideal state is that the reactive component of the input voltage is 0. Therefore, the q-axis component of the input voltage is subtracted from the 0 voltage reference as an error quantity for PI regulation, and a frequency signal is obtained by regulation.

[0112] In order to better illustrate the implementation process of S11, as shown in Figure 5 The control block diagram for determining the angle θ by using the phase-locked loop in some embodiments of the present disclosure is shown. The input is the instantaneous value Va, Vb, Vc of the three-phase alternating current input voltage in the three-phase stationary abc coordinate system. After abc / dq transformation (park transformation), the d-axis component Vd of the input voltage and the q-axis component Vq of the input voltage are output. The transformed Vd is: Vd=k×V×cos(ωt-θ), and the transformed Vq is: Vq=k×V×sin(ωt-θ).

[0113] Wherein, k represents the coefficient; V represents the voltage amplitude; ω represents the angular frequency; t represents the time; and θ represents the angle.

[0114] When the phase-locked loop is working, the control target is to make the difference between Vq and 0 as 0, that is, to make Vq close to the 0 voltage reference. At this time, sin(ωt-θ)=0, that is, the final control target of ωt is equal to θ. Based on this control target, a PI controller is used for control to obtain the angular frequency ω of the input voltage. Then the angular frequency ω of the input voltage is input into the integrator Integrator for integration to obtain a periodic angle θ in the range of 0 degrees to 360 degrees. The angle θ obtained by integration is also fed back to the park transformation.

[0115] In some embodiments of the present disclosure, the implementation process of S13 is as shown in Figure 6

[0116] S131, adding the voltage of the first capacitor 111 and the voltage of the second capacitor 112 to obtain a voltage sum signal; ​

[0117] S132, subtracting the voltage and signal from the voltage reference of the DC bus 101 to obtain an error signal, multiplying the error signal by the sine signal of any phase of the three-phase sine signal after PI adjustment to obtain the sine current reference signal of the corresponding phase.

[0118] It should be noted that the first capacitor 111 and the second capacitor 112 in the DC bus 101 are connected in series, and the real-time value of the voltage of the first capacitor 111 and the real-time value of the voltage of the second capacitor 112 are added to obtain the real-time value of the voltage of the DC bus 101. When the three-phase rectifier is working, the voltage of the DC bus 101 will have a reference value. After subtracting the voltage and signal from the voltage reference of the DC bus 101, an error signal is obtained, which is a control amount required for the voltage of the DC bus 101. After inputting it into the PI controller, the calibration amount of the voltage of the DC bus 101 can be obtained. Multiplying the calibration amount of the voltage of the DC bus 101 by the sine signal of any phase of the three-phase sine signal can obtain the calibration amount of the sine current of the corresponding phase, that is, the voltage error is fed back to the current signal, so as to obtain the sine current reference signal of the corresponding phase as the reference when input current is controlled.

[0119] In some embodiments of the present disclosure, the specific implementation process of S2 is as shown in Figure 7 , including the following steps:

[0120] S21, subtracting the voltage of the first capacitor 111 from the voltage of the second capacitor 112 to obtain a voltage difference;

[0121] S22, performing PI adjustment on the voltage difference to obtain a common-mode signal.

[0122] It should be noted that when the three-phase rectifier is working, it is also necessary to ensure that the voltages of the first capacitor 111 and the second capacitor 112 are balanced, that is, the ideal state of the voltage difference between the two is 0. The voltage difference is used as the control amount of PI adjustment, and the voltage difference tends to 0 as the control target. The voltage feedback amount obtained by PI adjustment is used as the common-mode signal, which is superimposed on each phase input to realize the voltage balance on the DC bus 101 side.

[0123] In some embodiments of the present disclosure, the specific implementation process of S3 is as shown in Figure 8 , including the following steps:

[0124] S31, superimposing the sine current reference signal of any phase on the carrier signal and the common-mode signal to determine the current reference value of the corresponding phase;

[0125] It should be noted that the current reference value of the corresponding phase is based on the control target that the input current of the corresponding phase maintains a sine waveform, the voltage on the DC bus 101 side is a reference value, and the voltages of the two capacitors contained in the DC bus 101 are consistent. The ideal state of the current of the corresponding phase, that is, the current reference value of the corresponding phase.

[0126] It should be noted that the frequency of the carrier signal is fixed, which can be a triangular wave or a sawtooth wave.

[0127] S32, the input current of the corresponding phase and the current reference value of the corresponding phase are generated through the first comparator to generate the first pulse signal, and through the second comparator to generate the second pulse signal;

[0128] It should be noted that the first comparator for generating the first pulse signal has a positive input end connected to the current reference value of the corresponding phase (such as ia_cmd in Figure 9 ), and a negative input end connected to the input current of the corresponding phase (such as Ia in Figure 9 ). The second comparator for generating the second pulse signal has a different connection method from the first comparator, and the positive input end of the second comparator is connected to the input current of the corresponding phase, and the negative input end is connected to the current reference value of the corresponding phase.

[0129] S33, the sine current reference signal of the corresponding phase is generated through the third comparator to generate the first sign signal, and through the fourth comparator to generate the second sign signal;

[0130] S34, the first pulse signal of the corresponding phase is multiplied by the first sign signal to obtain the gate signal of the positive half cycle, the second pulse signal of the corresponding phase is multiplied by the second sign signal to obtain the gate signal of the negative half cycle, and the gate signal of the positive half cycle is added to the gate signal of the negative half cycle to obtain the gate signal of the corresponding phase.

[0131] It should be noted that when the sine current reference signal of the corresponding phase is a positive half wave, the value of the first sign signal is 1, and the value of the second sign signal is 0; when the sine current reference signal of the corresponding phase is a negative half wave, the value of the first sign signal is 0, and the value of the second sign signal is 1. That is, the first pulse signal and the second pulse signal are multiplied by the positive and negative half wave sign to obtain the positive and negative half wave gate signal.

[0132] It should be noted that since the carrier signal is of fixed frequency, the obtained gate signal is also of fixed frequency, and the switching frequency of the switching unit controlled by the above gate signal is also fixed, which is convenient for filtering, so that the harmonic filter signal in the output of the three-phase rectifier is better.

[0133] It should be noted that the voltage and current mentioned in the embodiments of the present disclosure refer to their instantaneous values, which are controlled by acquiring the voltage instantaneous value and the current instantaneous value to obtain the control strategy, so that the current instantaneous value at the next moment can be close to the reference value of the control.

[0134] In order to better illustrate the control method of the three-phase rectifier provided by the embodiments of the present disclosure, a specific example is given to further explain and describe, which adoptsFigure 9 The control block diagram shown is used to control the rectification of the three-phase Vienna rectifier. Specifically, three-phase control sub-blocks including a-phase, b-phase and c-phase are used to illustrate the control process of each phase control sub-block, taking the a-phase control sub-block as an example:

[0135] After the a-phase sinusoidal current reference signal Ia_sin is input, it is divided into two paths, one of which is input into the third comparator IC3 to generate the a-phase first sign signal, and the other of which is input into the fourth comparator IC4 to generate the a-phase second sign signal. When the a-phase sinusoidal current reference signal is a positive half wave, the value of the a-phase first sign signal is 1, and the value of the a-phase second sign signal is 0; when the a-phase sinusoidal current reference signal is a negative half wave, the value of the a-phase first sign signal is 0, and the value of the a-phase second sign signal is 1.

[0136] After the a-phase sinusoidal current reference signal is input, it is superimposed with a carrier signal in the form of a triangular wave and a common-mode signal to obtain the a-phase current reference ia_cmd, which is also divided into two paths, one of which is input into the positive input terminal of the first comparator IC1, and the other of which is input into the negative input terminal of the second comparator IC2. The a-phase input current Ia is also divided into two paths, one of which is input into the negative input terminal of the first comparator IC1, and the other of which is input into the positive input terminal of the second comparator IC2. The output terminal of the first comparator IC1 outputs the a-phase first pulse signal, and the output terminal of the second comparator IC2 outputs the a-phase second pulse signal.

[0137] The a-phase first sign signal and the a-phase first pulse signal are jointly input into the first multiplier multiplier, and the positive half-period a-phase gate signal is output. The a-phase second sign signal and the a-phase second pulse signal are jointly input into the second multiplier, and the negative half-period a-phase gate signal is output.

[0138] The positive half-period a-phase gate signal and the negative half-period a-phase gate signal are added to obtain the a-phase gate signal Ug_a.

[0139] The determination process of the a-phase sinusoidal current reference signal Ia_sin is as shown in Figure 10 and Figure 11 .

[0140] As Figure 10As shown, the a-phase input voltage is V*sinωt, the b-phase input voltage is V*sin(ωt-120°), and the c-phase input voltage is V*sin(ωt+120°), which are input into the abc / dq coordinate converter together, and the output is Vq. The difference between Vq and the 0 voltage reference is input into the PI controller to obtain the adjustment result of ω, and then ω is input into the integrator to obtain the angle θ, which is also used in the coordinate conversion of the abc / dq coordinate converter. After obtaining θ, the output sinθ is the a-phase sine signal, the output sin(θ-120°) is the b-phase sine signal, and the output sin(θ+120°) is the c-phase sine signal.

[0141] After obtaining the a-phase sine signal sinθ, it is input into the multiplier as shown. Figure 11 The sum of the first capacitor voltage VC1 and the second capacitor voltage VC2, that is, the voltage sum signal, is input into the inverting input terminal of the fifth comparator IC5 through the first impedance Z1, and the voltage reference Vdc of the DC bus is input into the non-inverting input terminal of the fifth comparator IC5. ref The output signal of the fifth comparator IC5 is output as the a-phase sine current reference signal Ia_sin. Those skilled in the art can understand that the a-phase sine signal sinθ is replaced by the b-phase sine signal sin(θ-120°) to output the b-phase sine current reference signal Ib_sin. The a-phase sine signal sinθ is replaced by the c-phase sine signal sin(θ+120°) to output the c-phase sine current reference signal Ic_sin. In the specific implementation, two paths can be additionally arranged, each of which is similar to the above. Figure 11 The other input of the multiplier is shown in the figure, so that Figure 11 The multiplier outputs the a-phase sine current reference signal Ia_sin. Those skilled in the art can understand that the a-phase sine signal sinθ is replaced by the b-phase sine signal sin(θ-120°) to output the b-phase sine current reference signal Ib_sin. The a-phase sine signal sinθ is replaced by the c-phase sine signal sin(θ+120°) to output the c-phase sine current reference signal Ic_sin. In the specific implementation, two paths can be additionally arranged, each of which is similar to the above. Figure 11 The circuit connection is shown in the figure, and the difference is that one input of the multiplier is adaptively changed to the b-phase sine signal sin(θ-120°) or the c-phase sine signal sin(θ+120°). Two multipliers can also be additionally arranged on the basis of the circuit shown in the figure. Figure 11 The circuit connection is shown in the figure, and the difference is that one input of the multiplier is adaptively changed to the b-phase sine signal sin(θ-120°) or the c-phase sine signal sin(θ+120°). Two multipliers can also be additionally arranged on the basis of the circuit shown in the figure.

[0142] The above process of generating the common-mode signal by the voltage equalizing ring is shown in the figure. Figure 12As shown, the difference between the first capacitor voltage VC1 and the second capacitor voltage VC2, that is, the voltage difference signal, is input as an input through the third impedance Z3 and then input into the inverting input terminal of the sixth comparator IC6. The ideal value of the voltage difference 0 is input into the non-inverting input terminal of the sixth comparator IC6, and the fourth impedance Z4 is connected in series between the inverting input terminal and the output terminal of the sixth comparator IC6. The output terminal of the sixth comparator IC6 outputs a common-mode signal.

[0143] Specifically, the carrier signal adopts a triangular wave form, which can make the triangular wave serve as a window, and the a-phase sinusoidal current reference signal and the common mode signal are superimposed and intersect with the triangular wave, thereby generating a gate signal.

[0144] like Figure 13 As shown, the three-phase Vienna rectifier in this specific example uses Figures 9 to 12 The waveforms of the three-phase input voltages Va, Vb, Vc, the three-phase input currents Ia, Ib, Ic, the DC bus voltage Vdc, the voltage VC1 of the first capacitor 111, and the voltage VC2 of the second capacitor 112 after regulation are shown in the control block diagram. Figure 13 It can be seen that the waveform of the three-phase input voltage is not smooth. When the three-phase input voltage is distorted (the top and bottom of the waveform in the figure are sharp), the three-phase input current still maintains a sine wave without distortion. In addition, the waveforms of the first capacitor 111 voltage VC1 and the second capacitor 112 voltage VC2 coincide with each other, and the DC bus voltage Vdc is also smooth. It can be seen that the DC bus side voltage meets the requirements and the DC bus side capacitor voltages are balanced.

[0145] It can be seen from the above specific examples that when regulating the three-phase input current, this specific example adopts input current instantaneous value tracking, adds the three-phase sinusoidal current reference signal, the triangular carrier signal and the common-mode signal output by the voltage equalization control of the DC bus side capacitor voltage, and obtains the sinusoidal reference value of the input current of each phase in the three phases, which is then compared with the input current of each phase to generate a modulation signal to control the switching unit of each phase.

[0146] This allows the Vienna rectifier's input current to be directly controlled during each switching cycle. When the input current is less than the corresponding reference value, the gate signal controls the switch unit to turn on, increasing the input current. When the current reaches the corresponding reference value, the gate signal controls the switch unit to turn off, decreasing the input current. Finally, when the input current is less than the corresponding reference value, the gate signal controls the switch unit to turn on. Consequently, when the grid voltage is distorted, the instantaneous input current tracks the current sinusoidal reference, preventing distortion in the regulated input current.

[0147] Based on the same inventive concept, the embodiments of the present disclosure also provide a power conversion module, as described in the following embodiments. Since the principle of solving problems of the power conversion module embodiments is similar to that of the above-mentioned method embodiments, the implementation of the power conversion module embodiments can be referred to the implementation of the above-mentioned method embodiments, and the repeated parts will not be described here.

[0148] Figure 14 A simple structure schematic diagram of a power conversion module in the embodiments of the present disclosure is shown as follows, Figure 14 including:

[0149] a three-phase rectifier 1401, the three-phase rectifier including a DC bus 1411 and a three-phase switching unit 1412, wherein the DC bus 1411 is electrically connected with the three-phase switching unit 1412;

[0150] and a controller 1402, the controller 1402 being configured to:

[0151] determine a three-phase sinusoidal current reference signal according to an input voltage of the three-phase rectifier 1401, a voltage of a first capacitor 1413 of the DC bus 1411, and a voltage of a second capacitor 1414 of the DC bus 1411;

[0152] determine a common-mode signal according to the voltage of the first capacitor 1413 and the voltage of the second capacitor 1414;

[0153] determine a gate signal of a corresponding phase according to a sinusoidal current reference signal of any phase of the three-phase sinusoidal current reference signal, a carrier signal, the common-mode signal, and an input current of the corresponding phase, wherein the gate signal of the corresponding phase is used to control the corresponding phase switching unit to turn on or turn off the sinusoidal current reference signal.

[0154] It should be noted that the three-phase rectifier 1401 includes a Vienna rectifier.

[0155] In some embodiments of the present disclosure, the controller 1402 includes a reference signal determination module 1421, the reference signal determination module 1421 being configured to:

[0156] determine an angle θ by using a phase-locked loop according to an input voltage of the three-phase rectifier 1401;

[0157] determine a three-phase sinusoidal signal according to the angle θ;

[0158] determine a sinusoidal current reference signal of a corresponding phase according to a voltage of the first capacitor 1413, a voltage of the second capacitor 1414, and a sinusoidal signal of any phase of the three-phase sinusoidal signal.

[0159] In some embodiments of the present disclosure, the reference signal determination module 1421 is specifically configured to:

[0160] The input voltage of the three-phase rectifier 1401 is subjected to abc / dq coordinate transformation to obtain a q-axis component of the input voltage;

[0161] The q-axis component of the input voltage is subtracted from the 0 voltage reference and subjected to PI regulation to generate a frequency signal, and the frequency signal is integrated to obtain an angle θ.

[0162] In some embodiments of the present disclosure, the reference signal determination module 1421 is specifically configured to:

[0163] The abc / dq coordinate transformation is performed using the angle θ.

[0164] In some embodiments of the present disclosure, the reference signal determination module 1421 is specifically configured to:

[0165] The voltage of the first capacitor 1413 and the voltage of the second capacitor 1414 are added to obtain a voltage sum signal;

[0166] The voltage sum signal is subtracted from the voltage reference of the DC bus 1411 to obtain an error signal, and the error signal is subjected to PI regulation and multiplied by the sine signal of any phase of the three-phase sine signal to obtain a sine current reference signal of the corresponding phase.

[0167] In some embodiments of the present disclosure, the three-phase sine signal includes a first-phase sine signal, a second-phase sine signal, and a third-phase sine signal; wherein the first-phase sine signal is sinθ; the second-phase sine signal is sin(θ-120°); and the third-phase sine signal is sin(θ+120°).

[0168] In some embodiments of the present disclosure, the controller 1402 includes a common-mode signal determination module 1422, which is configured to:

[0169] The voltage of the first capacitor 1413 and the voltage of the second capacitor 1414 are subtracted to obtain a voltage difference;

[0170] The voltage difference is subjected to proportional integral (PI) regulation to obtain a common-mode signal.

[0171] In some embodiments of the present disclosure, the controller 1402 includes a gate signal determination module 1423, which is configured to:

[0172] The sine current reference signal of any phase is superimposed with the carrier signal and the common-mode signal to determine a current reference value of the corresponding phase;

[0173] The input current of the corresponding phase and the current reference value of the corresponding phase are passed through a first comparator to generate a first pulse signal, and passed through a second comparator to generate a second pulse signal;

[0174] The sine current reference signal of the corresponding phase is input into a third comparator to generate a first sign signal, and input into a fourth comparator to generate a second sign signal;

[0175] The first pulse signal of the corresponding phase is multiplied by the first sign signal to obtain a gate signal of a positive half cycle, the second pulse signal of the corresponding phase is multiplied by the second sign signal to obtain a gate signal of a negative half cycle, and the gate signal of the positive half cycle is added to the gate signal of the negative half cycle to obtain a gate signal of the corresponding phase.

[0176] In some embodiments of the present disclosure, when the sine current reference signal of the corresponding phase is a positive half wave, the first sign signal has a value of 1 and the second sign signal has a value of 0; when the sine current reference signal of the corresponding phase is a negative half wave, the first sign signal has a value of 0 and the second sign signal has a value of 1.

[0177] Those skilled in the art can understand that each aspect of the present disclosure can be implemented as a system, a method or a program product. Therefore, each aspect of the present disclosure can be specifically implemented as follows: a complete hardware implementation, a complete software implementation (including firmware, microcode, etc.), or an implementation combining hardware and software aspects, which can be collectively referred to as "circuitry", "module" or "system" here. It should be noted that, although several modules or units of the device for action execution are mentioned in the above detailed description, such division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided into multiple modules or units for embodiment.

[0178] In addition, although the steps of the method in the present disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in this specific order, or that all the shown steps must be performed to achieve the desired results. In addition or alternatively, some steps can be omitted, multiple steps can be combined into one step, and / or one step can be divided into multiple steps, etc.

[0179] Through the above description of the embodiments, those skilled in the art can easily understand that the example embodiments described herein can be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a U disk, a mobile hard disk, etc.) or a network, and includes a number of instructions to make a computing device (which can be a personal computer, a server, a mobile terminal, or a network device, etc.) execute the method according to the embodiments of the present disclosure.

[0180] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the features disclosed herein. It is intended that the disclosure be construed as including any variations, uses, or adaptations of the specific embodiments following, including equivalents thereof, which are within the scope of the disclosure and including such as come within the general scope of the following claims. The specification and examples are to be regarded as exemplary only, and the true scope and spirit of the disclosure being indicated by the following claims.

Claims

1. A control method of a three-phase rectifier including a DC bus and a three-phase switching unit, wherein the DC bus is electrically connected with the three-phase switching unit, characterized by, The control method comprises the following steps: Step S1: determining a three-phase sinusoidal current reference signal according to an input voltage of the three-phase rectifier, a voltage of a first capacitor of the DC bus and a voltage of a second capacitor of the DC bus; Step S2: determining a common-mode signal according to the voltage of the first capacitor and the voltage of the second capacitor; Step S3: determining a gate signal of a corresponding phase according to the sinusoidal current reference signal of any phase of the three-phase sinusoidal current reference signal, a carrier signal, the common-mode signal and an input current of the corresponding phase, wherein the gate signal of the corresponding phase is used to control conduction or turn-off of the switching unit of the corresponding phase.

2. The control method according to claim 1, characterized by, The step S1 specifically comprises: Step S11: determining an angle θ by using a phase-locked loop according to the input voltage of the three-phase rectifier; Step S12: determining a three-phase sinusoidal signal according to the angle θ; Step S13: determining the sinusoidal current reference signal of the corresponding phase according to the voltage of the first capacitor, the voltage of the second capacitor and the sinusoidal signal of any phase of the three-phase sinusoidal signal.

3. The control method according to claim 1, characterized by, The step S3 specifically comprises: Step S31: superimposing the sinusoidal current reference signal of any phase with the carrier signal and the common-mode signal to determine a current reference value of the corresponding phase; Step S32: generating a first pulse signal by a first comparator and a second pulse signal by a second comparator through the input current of the corresponding phase and the current reference value of the corresponding phase; Step S33: generating a first sign signal by a third comparator and a second sign signal by a fourth comparator through the sinusoidal current reference signal of the corresponding phase; Step S34: multiplying the first pulse signal of the corresponding phase with the first sign signal to obtain a gate signal of a positive half cycle, multiplying the second pulse signal of the corresponding phase with the second sign signal to obtain a gate signal of a negative half cycle, and adding the gate signal of the positive half cycle with the gate signal of the negative half cycle to obtain the gate signal of the corresponding phase.

4. The control method according to claim 3, characterized by When the sinusoidal current reference signal of the corresponding phase is a positive half wave, the value of the first sign signal is 1 and the value of the second sign signal is 0; when the sinusoidal current reference signal of the corresponding phase is a negative half wave, the value of the first sign signal is 0 and the value of the second sign signal is 1.

5. The control method according to claim 1, characterized by, The step S2 specifically comprises: Step S21: subtracting the voltage of the first capacitor from the voltage of the second capacitor to obtain a voltage difference; Step S22: obtaining the common-mode signal by PI regulation of the voltage difference.

6. The control method according to claim 1, characterized by, The three-phase rectifier comprises a Vienna rectifier.

7. The control method according to claim 2, characterized by, The step S11 specifically comprises: Step S111: obtaining a q-axis component of the input voltage by abc / dq coordinate transformation of the input voltage of the three-phase rectifier; Step S112: generating a frequency signal by PI regulation after subtracting a 0 voltage reference from the q-axis component of the input voltage, and integrating the frequency signal to obtain the angle θ.

8. The control method according to claim 2, characterized by, The step S13 specifically comprises: Step S131: adding the voltage of the first capacitor and the voltage of the second capacitor to obtain a voltage sum signal; Step S132: subtracting the voltage and signal from the voltage reference of the DC bus to obtain an error signal, and multiplying the error signal by the sine signal of any phase of the three-phase sine signal after PI regulation to obtain the sine current reference signal of the corresponding phase.

9. The control method according to claim 2, characterized by, The three-phase sine signal includes a first-phase sine signal, a second-phase sine signal, and a third-phase sine signal. The first-phase sine signal is sinθ. The second-phase sine signal is sin(θ-120°). The third-phase sine signal is sin(θ+120°).

10. The control method according to claim 7, characterized by, Step S111 specifically includes: Using the angle θ to perform the abc / dq coordinate transformation.

11. A power conversion module, characterized by It includes: A three-phase rectifier, the three-phase rectifier includes a DC bus and a three-phase switching unit, wherein the DC bus is electrically connected with the three-phase switching unit; And a controller, the controller is configured to: determine a three-phase sine current reference signal according to the input voltage of the three-phase rectifier, the voltage of the first capacitor of the DC bus, and the voltage of the second capacitor of the DC bus; determine a common-mode signal according to the voltage of the first capacitor and the voltage of the second capacitor; determine a gate signal of the corresponding phase according to the sine current reference signal of any phase of the three-phase sine current reference signal, a carrier signal, the common-mode signal, and the input current of the corresponding phase, wherein the gate signal of the corresponding phase is used to control the conduction or turn-off of the switching unit of the corresponding phase.

12. The power conversion module of claim 11, wherein, The controller includes a reference signal determination module; The reference signal determination module is configured to: determine an angle θ using a phase-locked loop according to the input voltage of the three-phase rectifier; determine a three-phase sine signal according to the angle θ; determine the sine current reference signal of the corresponding phase according to the voltage of the first capacitor, the voltage of the second capacitor, and the sine signal of any phase of the three-phase sine signal.

13. The power conversion module of claim 11, wherein, The controller includes a gate signal determination module; The gate signal determination module is configured to: superimpose the sine current reference signal of any phase on the carrier signal and the common-mode signal to determine the current reference value of the corresponding phase; generate a first pulse signal through a first comparator and a second pulse signal through a second comparator by comparing the input current of the corresponding phase with the current reference value of the corresponding phase; generate a first sign signal through a third comparator and a second sign signal through a fourth comparator by comparing the sine current reference signal of the corresponding phase; multiply the first pulse signal of the corresponding phase by the first sign signal to obtain the gate signal of the positive half cycle, multiply the second pulse signal of the corresponding phase by the second sign signal to obtain the gate signal of the negative half cycle, and add the gate signal of the positive half cycle and the gate signal of the negative half cycle to obtain the gate signal of the corresponding phase.

14. The power conversion module of claim 13, wherein, When the sine current reference signal of the corresponding phase is a positive half wave, the value of the first sign signal is 1, and the value of the second sign signal is 0; when the sine current reference signal of the corresponding phase is a negative half wave, the value of the first sign signal is 0, and the value of the second sign signal is 1.

15. The power conversion module of claim 11, wherein, The controller includes a common-mode signal determination module; The common-mode signal determination module is configured to: subtract the voltage of the first capacitor from the voltage of the second capacitor to obtain a voltage difference; perform proportional-integral (PI) adjustment on the voltage difference to obtain the common-mode signal.

16. The power conversion module of claim 11, wherein, The three-phase rectifier comprises a Vienna rectifier.

17. The power conversion module of claim 12, wherein, The reference signal determination module is specifically configured to: perform abc / dq coordinate transformation on an input voltage of the three-phase rectifier to obtain a q-axis component of the input voltage; subtract a 0 voltage reference from the q-axis component of the input voltage and then perform PI adjustment to generate a frequency signal, and integrate the frequency signal to obtain the angle θ.

18. The power conversion module of claim 12, wherein, The reference signal determination module is specifically configured to: add the voltage of the first capacitor and the voltage of the second capacitor to obtain a voltage sum signal; subtract a voltage reference of the DC bus from the voltage sum signal to obtain an error signal, and multiply the error signal by any one of the sinusoidal signals in the three-phase sinusoidal signals after PI adjustment to obtain the sinusoidal current reference signal of the corresponding phase.

19. The power conversion module of claim 12, wherein, The three-phase sinusoidal signals comprise a first-phase sinusoidal signal, a second-phase sinusoidal signal, and a third-phase sinusoidal signal; wherein the first-phase sinusoidal signal is sinθ; the second-phase sinusoidal signal is sin(θ-120°); the third-phase sinusoidal signal is sin(θ+120°).

20. The power conversion module of claim 17, wherein, The reference signal determination module is specifically configured to: perform the abc / dq coordinate transformation by using the angle θ.

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