Short-range radar and method of operating radar

Abstract

The embodiment of the invention relates to a short-range radar and a method for operating the radar. The present specification relates to a radar device including an electromagnetic wave receiver including an antenna for receiving electromagnetic waves, the antenna coupled to an integrated circuit including a low-noise differential amplifier and an attenuation circuit interposed between the receiving antenna and the low-noise differential amplifier, the attenuation circuit at least comprises a first transistor, a second transistor, a third transistor and a fourth transistor.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to French patent application No. FR2404470, filed on April 29, 2024, entitled “Radar à courte portée etprocédé de fonctionnement d'un radar”, which is hereby incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] This disclosure generally relates to short-range radar, particularly ultra-wideband radar, and methods for operating short-range radar. Background Technology

[0004] Radar (Radio Detection and Ranging) is a remote sensing device that uses electromagnetic waves to detect the presence of objects (also known as targets) and determine their position and velocity. Waves transmitted by the transmitter are reflected by the target, and the returned signal (called the radar echo) is captured and analyzed by the receiver. The distance is obtained based on the round-trip time of the signal.

[0005] A pulse radar is a type of radar that transmits pulses of electromagnetic waves and is then configured to listen for the echoes returned by a target. When the transmitted signal includes a very wide spectrum (e.g., according to the IEEE 802.15.4 standard), the pulse radar can be an ultra-wideband radar or a UWB radar.

[0006] When a radar can detect a target close to its receiver, it is called short-range radar. This means that the radar receiver should be able to detect the echo received shortly after the pulse transmission ends. However, coupling phenomena between the transmitter and receiver can make this detection difficult. Summary of the Invention

[0007] One embodiment overcomes all or some of the shortcomings of known short-range radars.

[0008] One embodiment provides a radar including an electromagnetic wave receiver, the electromagnetic wave receiver including an electromagnetic wave receiving antenna coupled to an integrated circuit, the integrated circuit including a low-noise differential amplifier and an attenuation circuit disposed between the receiving antenna and the low-noise differential amplifier, the attenuation circuit including at least a first transistor, a second transistor, a third transistor and a fourth transistor.

[0009] According to one embodiment, the first transistor, the second transistor, the third transistor, and the fourth transistor are insulated-gate field-effect transistors.

[0010] According to one embodiment, the radar includes a first line of symmetry between the receiving antenna and the attenuation circuit, and a second line of symmetry between the attenuation circuit and the low-noise differential amplifier.

[0011] According to one embodiment, the attenuation circuit includes:

[0012] - First node, which is connected to the first conductive track of the first symmetry line;

[0013] - A second node, which is connected to the second conductive rail of the first symmetry line; and

[0014] - The third node is connected to the first conductive rail of the second symmetry line;

[0015] - The fourth node is connected to the second conductive rail of the second symmetry line;

[0016] - One of the drain and source of the first transistor is coupled to the first node, and the other of the drain and source of the first transistor is coupled to the third node, and the gate of the first transistor receives the first binary signal.

[0017] - One of the drain and source of the second transistor is coupled to the first node, and the other of the drain and source of the second transistor is coupled to the fourth node, and the gate of the second transistor receives the second binary signal.

[0018] One of the drain and source of the third transistor is coupled to the second node, and the other of the drain and source of the third transistor is coupled to the third node; and the gate of the third transistor receives the second binary signal; and

[0019] One of the drain and source of the fourth transistor is coupled to the second node, and the other of the drain and source of the fourth transistor is coupled to the third node, and the gate of the fourth transistor receives the first binary signal.

[0020] According to one embodiment, the radar also includes a balun, which is positioned between the receiving antenna and the attenuation circuit and is connected to a first line of symmetry.

[0021] According to one embodiment, the radar further includes an electromagnetic wave transmitter comprising an electromagnetic wave transmitting antenna that is either coincident with or separate from a receiving antenna, and the electromagnetic wave transmitting antenna is coupled to a control circuit configured to control the transmitting antenna and also configured to control an attenuation circuit.

[0022] According to one embodiment, in a first operating mode, the control circuit is configured to control the first transistor and the fourth transistor to be turned on and the second transistor and the third transistor to be turned off, and in a second operating mode, the control circuit is configured to control the first transistor, the second transistor, the third transistor and the fourth transistor to be turned on.

[0023] According to one embodiment, each of the first transistor, the second transistor, the third transistor, and the fourth transistor includes N MOS transistors connected in parallel, where N is an integer greater than or equal to 2.

[0024] One embodiment also provides a method of operating a radar as defined above, the method comprising: in a first operating mode, setting a first transistor and a fourth transistor to an on state and setting a second transistor and a third transistor to an off state; and in a second operating mode, setting the first transistor, the second transistor, the third transistor, and the fourth transistor to an on state.

[0025] According to one embodiment, the method includes: switching from a first operating mode to a second operating mode under the control of the transmission of electromagnetic wave pulses by a control circuit, and maintaining the second operating mode for a predetermined time period; and switching from the second operating mode to the first operating mode at the end of the predetermined time period.

[0026] According to one embodiment, the method includes: in a first operating mode, setting N MOS transistors of a first transistor and a fourth transistor to an on state and setting N MOS transistors of a second transistor and a third transistor to an off state; in a second operating mode, setting N MOS transistors of the first transistor, the second transistor, the third transistor, and the fourth transistor to an on state; and further includes: in a third operating mode, setting N MOS transistors of the first transistor and the fourth transistor to an on state, setting a portion of the MOS transistors of the N MOS transistors of the second transistor and the third transistor to an on state, and setting the remaining MOS transistors of the N MOS transistors of the second transistor and the third transistor to an off state. Attached Figure Description

[0027] The foregoing features and advantages, as well as other features and advantages, will be described in detail in the remainder of this disclosure in conjunction with the accompanying drawings, which are given by way of illustration and not limitation, of specific embodiments, in which:

[0028] Figure 1 An electrical diagram for an example of radar;

[0029] Figure 2 For the reason Figure 1 The timing diagram of the signals used by the radar;

[0030] Figure 3 Electrical diagram of an example radar implementing the coupling reduction method;

[0031] Figure 4 Electrical diagram of another example of a radar implementing the coupling reduction method;

[0032] Figure 5 Electrical diagram for an embodiment of the radar;

[0033] Figure 6 For use Figure 5 Electrical diagram of an embodiment of the radar attenuation circuit;

[0034] Figure 7 for Figure 6 The electrical diagram of the attenuation circuit shows the current flow path in the first operating mode;

[0035] Figure 8 for Figure 6 The electrical diagram of the attenuation circuit shows the current flow path in the second operating mode;

[0036] Figure 9 It shows the result of Figure 5 The timing diagram of the signals used by the radar;

[0037] Figure 10 It shows Figure 6 The maximum transmission gain of the attenuation circuit varies depending on the frequency of the signal received in the first operating mode and the second operating mode.

[0038] Figure 11 It shows Figure 6 The curve showing the difference between the maximum transmission gain of the attenuation circuit in the first operating mode and the maximum transmission gain in the second operating mode, according to the change in the frequency of the received signal.

[0039] Figure 12 for Figure 10 Enlarged image;

[0040] Figure 13 for Figure 11 Enlarged image;

[0041] Figure 14 for Figure 6 A timing diagram of an example of the input signal of the attenuation circuit;

[0042] Figure 15 The curve showing the change in the obtained output signal is illustrated.

[0043] Figure 16 It shows Figure 6The curve showing the change in gain of the attenuation circuit according to the power of the received signal;

[0044] Figure 17 for Figure 5 Electrical diagram of another embodiment of the radar attenuation circuit;

[0045] Figure 18 It shows the use of Figure 17 The timing diagram of the control signals for the attenuation circuit. Detailed Implementation

[0046] In the various figures, the same features are indicated by the same reference numerals. Specifically, common structural and / or functional features in various embodiments may have the same reference numerals and may be configured with the same structure, dimensions, and material properties.

[0047] For clarity, only those steps and elements that aid in understanding the embodiments have been shown and described in detail. Specifically, the method of transmitting electromagnetic waves by pulse radar is well known to those skilled in the art and therefore will not be described in detail.

[0048] Unless otherwise stated, when referring to two elements connected together, it means a direct connection without any intermediate elements other than conductors, and when referring to two elements coupled together, it means that the two elements can be connected or they can be coupled via one or more other elements.

[0049] In the following description, when referring to absolute positional qualifiers (such as “front,” “back,” “top,” “bottom,” “left,” “right,” etc.), or relative positional qualifiers (such as “top,” “bottom,” “upper,” “lower,” etc.), or orientational qualifiers (such as “horizontal,” “vertical,” etc.), unless otherwise stated, they refer to the orientation of the accompanying drawings or the orientation in the normal use position.

[0050] Unless otherwise stated, the expressions "about," "approximately," "basically," and "around" all indicate plus or minus 10% or 10°, preferably plus or minus 5% or 5°. Furthermore, a signal that alternates between a first constant state (e.g., a low state, denoted as "0") and a second constant state (e.g., a high state, denoted as "1") is called a "binary signal." The high and low states of different binary signals in the same electronic circuit can be different. In practice, binary signals can correspond to voltages or currents, which may not be perfectly constant in the high or low states.

[0051] An insulated-gate field-effect transistor, or MOSFET (an abbreviation for metal-oxide-semiconductor field-effect transistor), is called a MOS transistor. Pulse radar is called UWB radar. For pulse radar, the transmitted pulse spectrum has a center frequency ranging from 6.5 GHz to 9.5 GHz and a bandwidth ranging from 500 MHz to 1.35 GHz. For example, UWB systems conform to the IEEE 802.15.4 standard.

[0052] Figure 1 An example of a pulse radar (device) 10 (e.g., a UWB radar) is shown schematically in part.

[0053] Radar 10 includes an electromagnetic wave transmitter 20 and an electromagnetic wave receiver 30. The transmitter 20 includes an electronic transmitter circuit 21 having a symmetrical output coupled to an electromagnetic wave transmitting antenna 22 via a balun 23. The balun 23 is a circuit used to perform coupling between the symmetrical transmission line originating from the transmitter circuit 21 and the asymmetrical transmission line coupled to the transmitting antenna 22. The receiver 30 includes an electronic receiver circuit 31 having a symmetrical input coupled to a receiving antenna 32 via a balun 33. The balun 33 is a circuit used to perform coupling between the asymmetrical transmission line coupled to the receiving antenna 32 and the symmetrical transmission line originating from the receiver circuit 31. Each balun 23 and balun 34 may include a two-winding transformer. Figure 1 In the example shown, the transmitting antenna 22 and the receiving antenna 32 are separate. As a variant, the transmitting antenna 22 and the receiving antenna 32 may overlap.

[0054] Electronic transmitter circuit 21 includes a pulse generator 24 that transmits the signal IN to a power amplifier 25, which amplifies the signal IN and transmits the analog signal TX to a balun 23. The balun 23 converts the differential analog signal TX into an asymmetric signal, which is transmitted as electromagnetic waves by the transmitting antenna 22. Electronic receiver circuit 31 includes circuitry 34 for processing the signal transmitted by the low-noise amplifier 35. The receiving antenna 32 is sized to capture electromagnetic waves and transmits the analog signal to the balun 33, which converts the analog signal into an analog differential signal RX, which is then transmitted to the low-noise amplifier 35.

[0055] For a pulse radar, electronic transmitter circuit 21 shapes the signal transmitted to transmitting antenna 22 for transmission of an electromagnetic pulse of a given duration (e.g., less than 1 ns, preferably less than 0.5 ns). The electromagnetic pulse is reflected by an object present in the transmission field, and the reflected electromagnetic wave (also known as the echo) is captured by receiving antenna 32. Processing circuit 34 is then adapted to determine the distance at which the radar 10 is separated from the object based on the time between the transmission of the electromagnetic pulse and the reception of the echo.

[0056] Radar 10 is typically designed to detect objects located between a minimum and a maximum range. For short-range radars, the minimum range is small, for example, less than 50 cm, so that the first echo can reach the receiving antenna 32 shortly after the radar pulse is transmitted by the transmitting antenna 22. This first echo may generate a high-amplitude signal RX that the receiver circuitry 31 should be able to process.

[0057] Coupling may occur between transmitter 20 and receiver 30, and this coupling is caused by… Figure 1 Arrow C is shown schematically in the diagram.

[0058] Figure 2 The graphs show the average electrical power P of signal TX (curve P_TX) and the average electrical power P of signals RX (curves P1_RX, P2_RX, P3_RX, and P4_RX) as a function of time, illustrating the coupling phenomenon. Each curve P_TX, P1_RX, P2_RX, P3_RX, and P4_RX includes a pulse, which... Figure 2 The middle part is schematically represented by a square wave. Figure 2 In this context, signals P1_RX, P2_RX, P3_RX, and P4_RX are essentially constant in the absence of echo receptions with different non-zero (albeit very low) levels, and represent signals unintentionally transmitted by the radar in the absence of a pulse to be transmitted.

[0059] The pulses of curves P1_RX and P2_RX correspond to echoes received by radar 10 from objects located at different distances from radar 10, or echoes originating from the same object but following different propagation paths. The pulse of signal P1_RX is obtained for objects close to radar 10 because the 1ns duration between the start of the pulse of curve P_TX and the start of the reception of the pulse of curve P1_RX corresponds to an object at a straight-line distance of 15cm from radar 10.

[0060] Curve P4_RX illustrates the first type of coupling in radar 10, corresponding to the coupling between transmitter circuit 21 and receiver circuit 31 when transmitter circuit 21 and receiver circuit 31 are formed on the same integrated circuit, where the transmission of signal TX pulses causes quasi-simultaneous formation of signal RX pulses. Curve P3_RX illustrates the second type of coupling in radar 10, corresponding to the coupling between transmitting antenna 22 and receiving antenna 32, which are typically close to or even overlap each other, where the transmission of signal TX pulses also causes quasi-simultaneous formation of signal RX pulses. Figure 2 As shown, the electrical power of the coupling pulse can be high, especially above 16 dBm, and particularly higher than the electrical power of the pulse corresponding to the echo on an object near the radar.

[0061] The low-noise amplifier 35 should be able to receive pulses caused by coupling without being damaged, which could result in the low-noise amplifier 35 receiving an excessively high power level relative to its actual echo. It is desirable to protect the low-noise amplifier 35 from pulses caused by coupling.

[0062] Figure 3 This is an electrical diagram of an example radar (device) 40 that implements a method to reduce coupling phenomena. Figure 3 The radar 40 shown includes Figure 1 All components of the radar 10 shown, including the pulse generator 24, are adapted to control the temporary disabling of the low-noise amplifier 35, particularly by temporarily stopping the power supply to the low-noise amplifier 35. Specifically, the pulse generator 24 controls the low-noise amplifier 35 to be disabled for a defined period of time from the start of pulse transmission, so that the low-noise amplifier 35 does not send amplified pulses of the signal RX due to coupling phenomena to the processing circuit 34. The low-noise amplifier 35 should be re-enabled before the receiving antenna 32 receives the first echo. An attenuation of approximately 10 dB is typically achievable by the low-noise amplifier 35 within 1 ns. The disadvantage is that such attenuation may not be sufficient to block pulses caused by coupling phenomena.

[0063] Figure 4 Electrical diagram of an example radar (device) 45, which is another method to reduce coupling phenomena. Figure 4 The radar 45 shown includes Figure 1The radar 10 shown includes all its components, and also includes a switch SW located between the receiving antenna 32 and the balun 33. A pulse generator 24 is configured to control the switching off and on of the switch SW. Specifically, the pulse generator 24 controls the switch SW to be off for a defined period of time from the start of the transmission of the pulse of signal IN, such that the low-noise amplifier 35 does not receive pulses of signal RX due to coupling phenomena. The switch SW must be turned on before the first echo is received by the receiving antenna 32. A disadvantage is that the switch corresponds to additional electronic components or circuitry besides the receiver circuitry 31. Proper synchronization between the pulses supplied by the pulse generator 24 and the off and on phases of the switch SW may be difficult to achieve.

[0064] Figure 5 This is an electrical diagram of an embodiment of a radar (device) 50 that implements a method for reducing coupling phenomena.

[0065] Figure 5 The radar device 50 shown includes Figure 1 All components of the radar 10 shown, including the receiver circuit 31, also include an attenuation circuit ATT that couples a balun 33 to a low-noise amplifier 35. The balun 33 transmits a signal RXin to the attenuation circuit ATT, and the attenuation circuit ATT transmits a signal RXout to the receiver circuit 31. According to one embodiment, the attenuation circuit ATT and the low-noise amplifier 35 correspond to an integrated circuit.

[0066] According to one embodiment, receiver circuit 31 is a differential circuit. In other words, receiver circuit 31 has a symmetrical structure. This means that signals RXin and RXout are transmitted through a line of symmetry. A line of symmetry is a pair of two conductive rails that have exactly the same relationship with respect to ground, transmitting electrical signals from the source to the load. This signal is the potential difference between the two conductive rails, and it is called a differential signal. Signal RXin corresponds to the voltage between the two conductive rails of line LI of symmetry between the balun 33 and the attenuation circuit ATT, and signal RXout corresponds to the voltage between the two conductive rails of line LO of symmetry between the attenuation circuit ATT and the low-noise amplifier 35.

[0067] Figure 6 The electrical diagram of the attenuation circuit ATT is shown.

[0068] The attenuation circuit ATT includes:

[0069] - First input node I1, having a potential RXin+, and intended to be connected to the first conductive rail (not shown) of the symmetrical line LI that couples the attenuation circuit ATT to the balun 33.

[0070] - Second input node I2, having a potential RXin-, and intended to be connected to a second conductive rail (not shown) of the symmetrical line LI that couples the attenuation circuit ATT to the balun 33;

[0071] - First output node O1, having a potential RXout+, and intended to be connected to the first conductive rail (not shown) of the symmetrical line LO that couples the attenuation circuit ATT to the low noise amplifier 35.

[0072] - Second output node O2, having a potential RXout-, and intended to be connected to a second conductive rail (not shown) of the symmetrical line LO that couples the attenuation circuit ATT to the low-noise amplifier 35;

[0073] - A first MOS transistor T1, for example having an N-channel, has its drain coupled (preferably connected) to node O1, its source coupled (preferably connected) to node I1, and its gate receiving a binary signal S1.

[0074] - A second MOS transistor T2, for example having an N-channel, has its drain coupled (preferably connected) to node O2, its source coupled (preferably connected) to node I1, and its gate receiving a binary signal S2.

[0075] - A third MOS transistor T3, for example having an N-channel, has its drain coupled (preferably connected) to node O1, its source coupled (preferably connected) to node I2, and its gate receiving a binary signal S2; and

[0076] - A fourth MOS transistor T4, for example having an N-channel, has its drain coupled (preferably connected) to node O2, its source coupled (preferably connected) to node I2, and its gate receiving a binary signal S1.

[0077] The signal RXin corresponds to the voltage between nodes I1 and I2, and the signal RXout corresponds to the voltage between nodes O1 and O2.

[0078] According to one embodiment, MOS transistors T1, T2, T3, and T4 are identical.

[0079] In the first operating mode, the attenuation circuit ATT is controlled such that the signal RXout is substantially equal to the signal RXin. In the second operating mode, the attenuation circuit ATT is controlled such that the signal RXout is substantially zero, independent of the signal RXin.

[0080] Figure 7 The attenuation circuit ATT in the first operating mode is shown, and the current flow path is illustrated. Signals S1 and S2 are transmitted to turn on transistors T1 and T4 and turn off transistors T2 and T3. When transistors T1, T2, T3, and T4 are N-channel MOS transistors, in the first operating mode, signal S1 is high and signal S2 is low. Current can flow from node I1 to node O1 (path CH1) and from node I2 to node O2 (path CH2). Due to the parasitic capacitances of transistors T2 and T3, very low current can flow from node I1 to node O2 (path CH3) and from node I2 to node O1 (path CH4). Due to the parasitic resistances of transistors T1 and T4, potential RXout+ is substantially equal to potential RXin+ and potential RXout- is substantially equal to potential RXin-, resulting in low attenuation. Voltage RXout is thus substantially equal to voltage RXin, also resulting in low attenuation. The attenuation circuit ATT thus behaves as a switching circuit with low attenuation.

[0081] Figure 8 The attenuation circuit ATT in the second operating mode is shown, and the current flow path is illustrated. Signals S1 and S2 are transmitted to turn on transistors T1, T2, T3, and T4. When transistors T1, T2, T3, and T4 are N-channel MOS transistors, signals S1 and S2 are high in the second operating mode. Current can flow from node I1 to node O1 (path CH1), from node I2 to node O2 (path CH3), from node I1 to node O2 (path CH3), and from node I2 to node O1 (path CH4).

[0082] The potential RXin+ at node I1 is substantially out of phase with the signal RXin- at node I2. Everything occurs as if the summation of potentials RXin+ and RXin- is performed at node O1, making potential RXout+ substantially zero, and the summation of potentials RXin+ and RXin- is performed at node O2, making potential RXout- substantially zero. Voltage RXout is therefore substantially zero. The attenuation circuit then acts as a shut-off switch. Thus, high attenuation of signal RXin is achieved in the second operating mode. Preferably, an attenuation of signal RXin greater than 30 dB is achieved in the second operating mode. This is beneficial for blocking pulses caused by coupling phenomena and protecting the low-noise amplifier 35 from these pulses.

[0083] Therefore, transistors T1 and T4 are both in the ON state in both the first and second operating modes. Signal S1 can thus remain constant. Transistors T2 and T3 are in the OFF state in the first operating mode and in the ON state in the second operating mode.

[0084] According to one embodiment, the attenuation circuit ATT can also be controlled to a third operating mode in which transistors T1, T2, T3 and T4 are all in the off state.

[0085] The time period for switching the attenuation circuit ATT from the first operating mode to the second operating mode is less than 1 ns, preferably less than 200 ps, ​​for example, in the range of 10 ps to 200 ps. Advantageously, the switching of the attenuation circuit ATT between the first and second operating modes can be performed quickly.

[0086] Figure 9A timing diagram of signals IN and S2 for transistors T2 and T3 used to control the attenuation circuit ATT is presented. Signal IN comprises a pulse P_IN for each transmission of an electromagnetic wave pulse, and signal S2 comprises a pulse P_S2 for each pulse of signal P_IN. According to one embodiment, pulse P_IN has a duration D, and pulse P_S2 has a duration D'. Pulse P_S2 is characterized by two parameters Δ and δ. Parameter Δ corresponds to the time interval between the rising edge of pulse P_IN and the rising edge of the corresponding pulse P_S2. Parameter δ corresponds to the difference between time interval D' and D, where time interval D' is longer than time interval D. Time intervals D, D', Δ, and δ depend on the intended application, particularly the RF band used. According to one embodiment, time interval D is in the range of 200 ps to 1 μs. According to one embodiment, time interval D' is in the range of D to 10 times D. According to one embodiment, time interval Δ is in the range of 0 to D. According to one embodiment, time interval δ is in the range of 0 to 9 times D.

[0087] The simulation has been performed. The simulation incorporates the inevitable variations that occur in integrated circuit design.

[0088] Figure 10 The curves showing the maximum transmission gain of the attenuation circuit ATT as a function of the frequency F of the signal Rxin in the first operating mode (MG_On) and the maximum transmission gain of the attenuation circuit ATT as a function of the frequency F of the signal Rxin in the second operating mode (MG_Off) are illustrated. Figure 11 The curve showing the change in MG_diff, representing the difference between the curves MG_On and MG_Off. Figure 12 yes Figure 10 A magnified view of frequencies ranging from 3 GHz to 11 GHz, and Figure 13 yes Figure 11 The magnified graph shows frequencies ranging from 3 GHz to 11 GHz, which corresponds to most ultra-wideband applications. A greater than 40 dB attenuation of the RXin signal is achieved in the second operating mode.

[0089] Figure 14 It is a teleport to Figure 6 The timing diagram of the signal RXin of the attenuation circuit, and Figure 15The diagram shows the variation of signal RXout when signal RXin is a sinusoidal signal with a frequency of 8 GHz injected at time t equal to 1 ns. Signal RXin is transmitted with low attenuation (amplitude decreases from 25 mV for RXin to approximately 15 mV for RXout), although no impedance matching was performed in this simulation, and a default impedance of 50 ohms was used. At time t equal to 2 ns, the attenuation circuit is activated for a period much shorter than 1 ns. Very rapid and very significant attenuation can be observed for signal RXout.

[0090] Figure 16 The diagram shows the transmission gain G of the attenuation circuit ATT as a function of the power P of the signal RXin when the frequency of the signal RXin is equal to 83.3 GHz. The decrease in gain G is visible when the power P is above 0 dBm.

[0091] Figure 17 This is an electrical diagram of another embodiment of the attenuation circuit ATT. Figure 17 The attenuation circuit shown in the diagram, ATT, has the same characteristics as... Figure 6The attenuation circuit ATT shown has the same structure, except that: transistor T1 is formed by, for example, N N-channel MOS transistors T1_1 to T1_N assembled in parallel; transistor T2 is formed by, for example, N N-channel MOS transistors T2_1 to T2_N assembled in parallel; transistor T3 is formed by, for example, N N-channel MOS transistors T3_1 to T3_N assembled in parallel; and transistor T4 is formed by, for example, N N-channel MOS transistors T4_1 to T4_N assembled in parallel. More specifically, for each MOS transistor T1_i (i varies from 1 to N), the drain of transistor T1_i is coupled (preferably connected) to node O1, and the source of transistor T1_i is coupled (preferably connected) to node I1. For each MOS transistor T2_i (i varies from 1 to N), the drain of transistor T2_i is coupled (preferably connected) to node O2, and the source of transistor T2_i is coupled (preferably connected) to node I1. For each MOS transistor T3_i (i varies from 1 to N), the drain of transistor T3_i is coupled (preferably connected) to node O1, and the source of transistor T3_i is coupled (preferably connected) to node I2. For each MOS transistor T4_i (i varies from 1 to N), the drain of transistor T4_i is coupled (preferably connected) to node O2, and the source of transistor T4_i is coupled (preferably connected) to node I2. The gate of each transistor T1_i (i varies from 1 to N) receives the gate control signal S1_i. The gate of each transistor T2_i (i varies from 1 to N) receives the gate control signal S2_i. The gate of each transistor T3_i (i varies from 1 to N) receives the gate control signal S2_i. The gate of each transistor T4_i (i varies from 1 to N) receives the gate control signal S1_i.

[0092] According to one embodiment, control Figure 17 The attenuation circuit ATT method shown can be used in conjunction with the control described above. Figure 6 The attenuation circuit shown uses the same method as ATT. In this case, signals S1_1 to S1_N are the same, and signals S2_1 to S2_N are the same.

[0093] Figure 18 It shows Figure 17 The curve illustrating the change in transmission gain G of the attenuation circuit ATT is shown in another embodiment, in which signals S2_1 to S2_N are not always the same in the third operating mode.

[0094] exist Figure 18The diagram already illustrates stages P1, P2, P3_1, P3_2, and P3_3. Stage P1 corresponds to the first operating mode described above, in which transistors T1_1 to T1_N and T4_1 to T4_N are in the on state, while transistors T2_1 to T2_N and T3_1 to T3_N are in the off state. The gain G is at its maximum value, Gmax. Figure 18 In stage P2, corresponding to the second operating mode described above, transistors T1_1 to T1_N, T2_1 to T2_N, T3_1 to T3_N, and T4_1 to T4_N are in the on state. The gain G is at its minimum value, Gmin. In stages P3_1, P3_2, and P3_3, the gain G is between Gmin and Gmax. In these stages P3_1, P3_2, and P3_3, transistors T1_1 to T1_N and T4_1 to T4_N are in the on state. Furthermore, K transistors from T2_1 to T2_N are in the on state, where K varies from 1 to N-1; the remaining transistors from T2_1 to T2_N are in the off state; and K transistors from T3_1 to T3_N are in the on state, while the remaining transistors from T3_1 to T3_N are in the off state. The gain G varies depending on the number K. The larger the number K, the closer G is to Gmin. The smaller the number K, the closer G is to Gmax. The number K may vary depending on stages P3_1, P3_2, and P3_3.

[0095] This embodiment allows for moderate attenuation of the signal RXin without completely blocking it. This is particularly advantageous for protecting the low-noise amplifier 35 when the signal RXin corresponds to the echo of a target close to radar 50 and may have high power. This enables the use of a high-sensitivity low-noise amplifier 35, suitable for detecting targets at a distance as well as those at close range.

[0096] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations can be combined, and other variations will occur to those skilled in the art. Specifically, in the above embodiments, the attenuation circuit ATT includes MOS transistors T1, T2, T3, and T4. However, each MOS transistor can be replaced by other types of transistors, particularly bipolar transistors or modulation-doped field-effect transistors (also known as MODFETs) or HEMTs (high electron mobility transistors).

[0097] Finally, based on the functional indications given above, the actual implementation of the described embodiments and variations is within the capabilities of those skilled in the art.

Claims

1. A radar device, comprising: An electromagnetic wave receiver, the electromagnetic wave receiver comprising: Electromagnetic wave receiving antenna; and An integrated circuit, coupled to the electromagnetic wave receiving antenna, and comprising: Low-noise differential amplifier; and An attenuation circuit is placed between the receiving antenna and the low-noise differential amplifier, and the attenuation circuit includes at least a first transistor, a second transistor, a third transistor, and a fourth transistor.

2. The radar device according to claim 1, wherein the first transistor, the second transistor, the third transistor, and the fourth transistor are insulated-gate field-effect transistors.

3. The radar device according to claim 1, further comprising: A first line of symmetry, the first line of symmetry being between the receiving antenna and the attenuation circuit; as well as The second line of symmetry is located between the attenuation circuit and the low-noise differential amplifier.

4. The radar device according to claim 3, wherein the attenuation circuit further comprises: The first node is connected to the first conductive rail of the first symmetry line; The second node is connected to the second conductive rail of the first symmetry line; The third node is connected to the first conductive rail of the second symmetry line; as well as The fourth node is connected to the second conductive rail of the second symmetry line.

5. The radar device according to claim 4, wherein: One of the drain and source of the first transistor is coupled to the first node, the other of the drain and source of the first transistor is coupled to the third node, and the gate of the first transistor is configured to receive a first binary signal. One of the drain and source of the second transistor is coupled to the first node, the other of the drain and source of the second transistor is coupled to the fourth node, and the gate of the second transistor is configured to receive a second binary signal. One of the drain and source of the third transistor is coupled to the second node, the other of the drain and source of the third transistor is coupled to the third node, and the gate of the third transistor is configured to receive the second binary signal. and One of the drain and source of the fourth transistor is coupled to the second node, the other of the drain and source of the fourth transistor is coupled to the third node, and the gate of the fourth transistor is configured to receive the first binary signal.

6. The radar device of claim 3 further includes a balun, the balun being positioned between the receiving antenna and the attenuation circuit and being connected to the first line of symmetry.

7. The radar device according to claim 1, further comprising: An electromagnetic wave transmitter, the electromagnetic wave transmitter including an electromagnetic wave transmitting antenna, the electromagnetic wave transmitting antenna being either coincident with or separate from the receiving antenna; as well as A control circuit is coupled to the transmitting antenna and the attenuation circuit, and is configured to control the transmitting antenna and the attenuation circuit.

8. The radar device according to claim 7, wherein: In the first operating mode, the control circuit is configured to control the setting of putting the first transistor and the fourth transistor into the on state, and the setting of putting the second transistor and the third transistor into the off state; and In the second operating mode, the control circuit is configured to control the setting of placing the first transistor, the second transistor, the third transistor, and the fourth transistor in the on state.

9. The radar device of claim 1, wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises N metal-oxide-semiconductor (MOS) transistors connected in parallel, wherein N is an integer greater than or equal to 2.

10. A method comprising: In the first operating mode of the radar device, the first transistor and the fourth transistor are set to the on state, and the second transistor and the third transistor are set to the off state. The radar device includes an electromagnetic wave receiver, which includes an electromagnetic wave receiving antenna and an integrated circuit. The integrated circuit is coupled to the electromagnetic wave receiving antenna. The integrated circuit includes a low-noise differential amplifier and an attenuation circuit. The attenuation circuit is placed between the receiving antenna and the low-noise differential amplifier. The attenuation circuit includes at least the first transistor, the second transistor, the third transistor, and the fourth transistor. as well as In the second operating mode of the radar device, the first transistor, the second transistor, the third transistor, and the fourth transistor are set to the on state.

11. The method of claim 10, further comprising: A balun couples the asymmetric transmission line of the receiving antenna to the symmetric transmission line of the attenuation circuit.

12. The method of claim 10, wherein the radar device further comprises an electromagnetic wave transmitter and a control circuit, the electromagnetic wave transmitter comprising an electromagnetic wave transmitting antenna, the electromagnetic wave transmitting antenna being coincident with or separate from the receiving antenna, the control circuit being coupled to the transmitting antenna and the attenuation circuit and configured to control the transmitting antenna and the attenuation circuit, and the method further comprising: Switch from the first operating mode to the second operating mode; The transmission of electromagnetic wave pulses is controlled by the control circuit. According to the control, the second operating mode is maintained for a predetermined time period; as well as At the end of the predetermined time period, switch from the second operation mode to the first operation mode.

13. The method of claim 12, further comprising: A balun couples the symmetrical transmission line of the transmitter circuit with the asymmetrical transmission line of the transmitting antenna.

14. The method of claim 10, wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises N metal-oxide-semiconductor (MOS) transistors connected in parallel, where N is an integer greater than or equal to 2, and the method comprises: In the first operating mode, the N MOS transistors in the first transistor and the fourth transistor are set to the on state, and the N MOS transistors in the second transistor and the third transistor are set to the off state; In the second operating mode, the N MOS transistors among the first transistor, the second transistor, the third transistor, and the fourth transistor are set to the on state; as well as In the third operating mode, N MOS transistors in the first transistor and the fourth transistor are set to the on state, some MOS transistors in the second transistor and the third transistor are set to the on state, and the remaining MOS transistors in the second transistor and the third transistor are set to the off state.

15. The method of claim 10, further comprising: The first transistor and the fourth transistor are controlled by a first binary signal, and the second transistor and the third transistor are controlled by a second binary signal.

16. A radar device, comprising: An electromagnetic wave receiver, the electromagnetic wave receiver comprising: Electromagnetic wave receiving antenna; and An integrated circuit, coupled to the electromagnetic wave receiving antenna, and comprising: Low-noise differential amplifier; and An attenuation circuit is placed between the receiving antenna and the low-noise differential amplifier, and the attenuation circuit includes at least a first transistor, a second transistor, a third transistor, and a fourth transistor. An electromagnetic wave transmitter, the electromagnetic wave transmitter comprising: An electromagnetic wave transmitting antenna, wherein the electromagnetic wave transmitting antenna may be coincident with or separate from the receiving antenna; A power amplifier, which is coupled to the transmitting antenna; and Transmitter circuitry, said transmitter circuitry being coupled to said power amplifier; and A control circuit is coupled to the transmitting antenna and the attenuation circuit, and is configured to control the transmitting antenna and the attenuation circuit.

17. The radar device according to claim 16, further comprising: A first line of symmetry, the first line of symmetry being between the receiving antenna and the attenuation circuit; A second line of symmetry is provided between the attenuation circuit and the low-noise differential amplifier. A third line of symmetry, the third line of symmetry being between the transmitter circuit and the power amplifier; as well as The fourth line of symmetry is located between the power amplifier and the transmitting antenna.

18. The radar device according to claim 17, further comprising: A first balanced-to-unbalanced converter is placed between the receiving antenna and the attenuation circuit; as well as A second balun is placed between the power amplifier and the transmitting antenna.

19. The radar device according to claim 16, wherein: In the first operating mode, the control circuit is configured to control the setting of putting the first transistor and the fourth transistor into the on state, and the setting of putting the second transistor and the third transistor into the off state; and In the second operating mode, the control circuit is configured to control the setting of placing the first transistor, the second transistor, the third transistor, and the fourth transistor in the on state.

20. The radar apparatus of claim 16, wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor comprises N metal-oxide-semiconductor (MOS) transistors connected in parallel, wherein N is an integer greater than or equal to 2.

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