Passive wireless temperature sensor circuit
By constructing the key CTAT generation circuit using MOSFETs and building a temperature-frequency conversion chain using a ring oscillator, the problem of high power consumption of passive wireless temperature sensors in harsh environments is solved, achieving low-power, high-precision temperature information transmission.
Patent Information
- Application Number
- CN202510924626.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-04
- Publication Date
- 2025-11-07
AI Technical Summary
In harsh environments, existing active wired temperature sensors suffer from problems such as power supply replacement, high maintenance costs, significant safety hazards, limited temperature measurement, and excessive size. Passive wireless temperature sensors have broad application prospects in terms of miniaturization and cost reduction, but they consume more power.
A key CTAT generation circuit built using MOSFETs generates CTAT voltage. The CTAT voltage is then used to construct a temperature-frequency conversion chain with a ring oscillator to convert temperature information into oscillator frequency information. The voltage coefficient of the CTAT voltage is increased by combining the temperature characteristics of the MOSFETs, thereby reducing the power consumption of the temperature sensing circuit.
It effectively reduces the power consumption of the temperature sensing circuit, increases the output voltage, enhances the protection mechanism of the power management system, and achieves high-precision temperature information transmission through high-precision capacitor adjustment circuit and impedance modulation technology.
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Figure CN120907675A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of temperature sensor, in particular to a passive wireless temperature sensor circuit. BACKGROUND
[0002] Temperature sensors are widely used in agricultural production, microelectronic process research and production, aerospace and other fields. However, in harsh environments, such as high temperature, airtight, high-speed rotation and the like, accurate temperature measurement is still a very challenging problem. Active wired temperature sensing technology has problems such as power replacement, maintenance cost, safety hazard, temperature measurement limitation, large size, and inconvenient layout.
[0003] Passive wireless sensors do not require a physically connected signal transmission system and do not require a power supply, and have a very wide application prospect in complex industrial environment monitoring. With the development of technology, temperature sensors are developing towards miniaturization, integration and low cost. Therefore, it is of wide application prospect to reduce the power consumption of passive wireless sensors as much as possible. SUMMARY
[0004] The present application provides a passive wireless temperature sensor circuit, which generates a CTAT voltage by a CTAT key generation circuit built with a MOS tube, and converts temperature information into frequency information of an oscillator by building a temperature-frequency conversion chain with the CTAT voltage and a ring oscillator, which can effectively reduce the power consumption of the temperature sensing circuit, and increase the voltage coefficient of the CTAT voltage by combining the temperature characteristics of the MOS tube.
[0005] According to a first aspect of the present application, a passive wireless temperature sensor circuit is provided, comprising: a transceiving antenna, an RF-DC rectifier circuit, a temperature sensing circuit and a backscatter circuit; The RF-DC rectifier circuit outputs direct current power supply based on the reception of external radio frequency energy by the transceiving antenna; The temperature sensing circuit comprises a complementary absolute temperature voltage generator and a ring oscillator; The complementary absolute temperature voltage generator comprises a MOS tube, and generates a CTAT voltage based on the temperature characteristics of the MOS tube; The ring oscillator converts the CTAT voltage into oscillation frequency information of the ring oscillator and outputs a square wave frequency signal with a negative temperature coefficient; The backscatter circuit backscatters the square wave frequency signal representing temperature information through the transceiving antenna.
[0006] On the basis of the above technical solution, the present application can also be improved as follows.
[0007] Optionally, the RF-DC rectifier circuit is a six-stage cascade structure composed of five NMOS transistor units and one PMOS transistor unit; The NMOS transistor unit includes a pair of NMOS transistors, and the PMOS transistor unit includes a pair of PMOS transistors; The RF differential input ports RFP and RFN of the antenna are respectively cross-coupled to synchronously input the NMOS transistor unit and the PMOS transistor unit; When the RF-DC rectifier circuit is in operation, the voltage between the source and the drain of each of the NMOS transistors and the PMOS transistors is periodically inverted.
[0008] Optionally, a matching network circuit is connected between the antenna and the RF-DC rectifier circuit; The matching network circuit includes an inductor and a capacitor ; the two ends of the inductor are respectively connected to the two ends of the antenna through a capacitor ; and the two ends of the inductor are also directly connected to the two ends of the input end of the RF-DC rectifier circuit.
[0009] Optionally, the temperature sensor circuit further includes an energy storage capacitor and an under-voltage lockout circuit connected to the output end of the RF-DC rectifier circuit; the energy storage capacitor stores the direct current power output by the RF-DC rectifier circuit; The under-voltage lockout circuit monitors the transient response characteristics of the voltage output by the RF-DC rectifier circuit in real time, and cuts off the connection between the RF-DC rectifier circuit and the temperature sensing circuit when detecting that the supply voltage is lower than a preset threshold voltage.
[0010] Optionally, the under-voltage lockout circuit includes a current inverter; The current inverter includes a transistor; when the input voltage is higher than the threshold voltage , the gate of the transistor is controlled to be at a high level, so that the transistor enters an off state; and when the input voltage is lower than the threshold voltage , the gate of the transistor is controlled to be at a low level, so that the transistor enters an on state.
[0011] Optionally, the temperature sensor circuit includes a pre-stabilization circuit arranged between the under-voltage lockout circuit and the temperature sensing circuit; the pre-stabilization circuit is used to stabilize the voltage output by the under-voltage lockout circuit and then output to the temperature sensing circuit.
[0012] Optionally, the complementary absolute temperature voltage generator comprises: a first circuit branch, a second circuit branch, a third circuit branch, a fourth circuit branch and a fifth circuit branch; The first circuit branch comprises NMOS tubes M4, M5, M6 and M11; The second circuit branch comprises NMOS tubes M3 and M10; The third circuit branch comprises NMOS tubes M1 and M9; The fourth circuit branch comprises NMOS tubes M2 and M8; The fifth circuit branch comprises NMOS tube M7; The NMOS tubes M7, M8, M9, M10 and M11 are of the same size, and the source is connected to the power supply VDD; The drain of the NMOS tube M10 is connected to the drain of the NMOS tube M3, and the drain of the NMOS tube M9 is connected to the drain of the NMOS tube M1. The size of the NMOS tube M3 is times of the size of the NMOS tube M1; The NMOS tubes M3 and M1 work in the sub-threshold region, and the NMOS tubes M5 and M6 work in the deep linear region. The gate voltage of the NMOS tube M5 is biased by the drain voltage of the diode-connected NMOS tube M4. The gate-source voltage of the NMOS tube M4 has a negative temperature coefficient, and the drain voltage of the NMOS tube M5 has a positive temperature coefficient. Through the adjustment of parameters, the current output by the drain of the NMOS tube M7 is a CTAT current.
[0013] Optionally, the ring oscillator comprises at least three odd-numbered inverter units forming a ring chain loop.
[0014] Optionally, the input node of the ring oscillator introduces a trimming network. The trimming network inputs a high level or a low level to control the access or disconnection of the capacitance in the inverter unit, so as to accurately trim the oscillation frequency of the ring oscillator.
[0015] Optionally, the backscatter circuit comprises a backscatter switch connected between the transceiving antenna and the RF-DC rectifier circuit; The backscattering switch comprises a first PMOS tube, a second PMOS tube, a first capacitor and a second capacitor, the sources of the first PMOS tube and the second PMOS tube are connected to each other, the drain of the first PMOS tube is connected to one end of the first capacitor, the drain of the second PMOS tube is connected to one end of the second capacitor, and the other ends of the first capacitor and the second capacitor are connected to the transceiving antenna and the RF-DC rectifier circuit respectively; The frequency signal output by the ring oscillator drives the first PMOS tube and the second PMOS tube to switch between the on and off states, the input impedance of the radio frequency port of the temperature sensor circuit is switched by using the principle of impedance modulation, the reflection coefficient of the radio frequency port of the temperature sensor circuit is changed, and thus the square wave frequency signal representing the temperature information is read by the external reader.
[0016] The passive wireless temperature sensor circuit provided by the application has the following beneficial effects: The CTAT key generation circuit built by the MOS tube generates a CTAT voltage (0.98 V~1.39 V), the temperature information is converted into the frequency information of the oscillator by building a temperature-frequency conversion chain with the CTAT voltage and the ring oscillator, the power consumption of the temperature sensing circuit can be effectively reduced, and the voltage coefficient of the CTAT voltage is increased in combination with the temperature characteristics of the MOS tube; the RF-DC rectifier converts the alternating radio frequency energy into a direct current signal to supply power for the subsequent system, the two MOS tubes required by the charging path are optimized to one MOS tube, the series loss in the path is reduced, and the output voltage is improved; the matching network configured in front of the rectifier ensures the complex conjugate matching of the input impedance of the rectifier and the antenna impedance, and the input signal amplitude is amplified through the resonance mechanism to meet the on driving conditions of the subsequent MOS device; the undervoltage lockout circuit monitors the power transient response characteristics in real time, protects the power management system chip, and automatically triggers the protection mechanism when detecting that the supply voltage is lower than the preset threshold, and implements the hierarchical locking of the sensitive functional modules; in order to reduce the oscillator frequency error caused by process deviation, the high-precision 8 bit capacitor trimming circuit is innovatively proposed, and the frequency of the oscillator can be effectively trimmed to a reference value; the backscattering circuit of the communication module adopts the impedance modulation technology, dynamically adjusts the input impedance of the chip by connecting the MOS switch array and the capacitor in parallel at the input end of the rectifier, and realizes the transmission of temperature information based on the backscattering modulation. BRIEF DESCRIPTION OF DRAWINGS
[0017] Figure 1 The circuit diagram of the passive wireless temperature sensor circuit provided by the embodiment of the application is provided; Figure 2 The circuit diagram of the novel 6-stage RF-DC rectifier provided by the embodiment of the application is provided; Figure 3 A circuit diagram of a matching network is provided for an embodiment of the present application; Figure 4 An output characteristic curve diagram of an under-voltage lockout is provided for an embodiment of the present application; Figure 5 A circuit diagram of a UVLO (Under-Voltage Lockout) of a selected Schmitt trigger is provided for an embodiment of the present application; Figure 6 A circuit structure diagram of a UVLO based on a bandgap comparator is provided for an embodiment of the present application; Figure 7 A circuit structure diagram of a low-dropout linear regulator is provided for an embodiment of the present application; Figure 8 A circuit diagram of a CTAT (Complementary to Absolute Temperature) key branch is provided for an embodiment of the present application; Figure 9 A circuit diagram of a CTAT voltage generator is provided for an embodiment of the present application; Figure 10 A circuit diagram of a 5-stage ring oscillator composed of inverters is provided for an embodiment of the present application; Figure 11 A circuit diagram of a backscatter circuit is provided for an embodiment of the present application. DETAILED DESCRIPTION
[0018] The principles and features of the present application are described below in conjunction with the accompanying drawings, which are presented only for illustrative purposes and are not intended to limit the scope of the present application.
[0019] Figure 1 A circuit diagram of a passive wireless temperature sensor circuit is provided for an embodiment of the present application, as shown in the figure. Figure 1 The embodiment of the temperature sensor circuit includes a transceiver antenna, an RF-DC rectifier circuit, a temperature sensing circuit, and a backscatter circuit.
[0020] The RF-DC rectifier circuit outputs direct current power based on the reception of external radio frequency energy by the transceiver antenna.
[0021] The temperature sensing circuit includes a complementary absolute temperature voltage generator and a ring oscillator.
[0022] The complementary absolute temperature voltage generator includes a MOS transistor and generates a CTAT voltage based on the temperature characteristics of the MOS transistor.
[0023] The CTAT (Complementary to Absolute Temperature) voltage is a voltage with a negative temperature coefficient, whose value decreases as the temperature rises.
[0024] The ring oscillator converts the CTAT voltage into an oscillation frequency signal of the ring oscillator and then outputs a square wave frequency signal with a negative temperature coefficient.
[0025] The backscatter circuit sends out the square wave frequency signal representing the temperature information through the transceiving antenna.
[0026] The application provides a passive wireless temperature sensor circuit.
[0027] Embodiment 1 The embodiment 1 provided by the application is an embodiment of the passive wireless temperature sensor circuit provided by the application. Figure 1 It can be known that the embodiment of the temperature sensor circuit comprises a transceiving antenna, an RF-DC rectifier circuit, a temperature sensing circuit and a backscatter circuit.
[0028] The RF-DC rectifier circuit outputs a direct current voltage signal based on the received external radio frequency energy.
[0029] The temperature sensing circuit comprises a complementary absolute temperature voltage generator and a ring oscillator.
[0030] The complementary absolute temperature voltage generator comprises a MOS transistor and generates a CTAT voltage based on the temperature characteristic of the MOS transistor.
[0031] The ring oscillator converts the CTAT voltage into an oscillation frequency signal of the ring oscillator and then outputs a square wave frequency signal with a negative temperature coefficient.
[0032] The backscatter circuit sends out the square wave frequency signal representing the temperature information through the transceiving antenna.
[0033] In a possible embodiment, the RF-DC rectifier circuit is a six-stage cascade structure composed of five NMOS transistor units and one PMOS transistor unit.
[0034] The NMOS transistor unit comprises a pair of NMOS transistors, and the PMOS transistor unit comprises a pair of PMOS transistors.
[0035] The radio frequency differential input ports RFP and RFN of the antenna are respectively connected to the cross-coupled synchronous input NMOS transistor unit and PMOS transistor unit.
[0036] When the RF-DC rectifier circuit is in working state, the voltage between the source and the drain of each NMOS and PMOS is periodically changed.
[0037] The RF-DC rectifier plays a role of converting alternating radio frequency energy into a direct current signal and powering a subsequent system, and since the traditional cross-coupled rectifier can introduce additional switching loss, causing the output voltage and conversion efficiency to be deteriorated, the embodiment of the present application provides a novel 6-stage RF-DC rectifier as shown in the figure. Figure 2 The two MOS tubes required by the charging path are optimized into one MOS tube, the series loss in the path is reduced, and the output voltage is improved.
[0038] The core structure of the 6-stage RF-DC rectifier provided by the embodiment of the present application is composed of 5 pairs of NMOS tubes and the last pair of PMOS tubes, and all NMOS, PMOS devices and energy storage capacitors are realized based on the parameter consistency design specification. The radio frequency differential input port RFP and RFN are connected to the output end interface of the impedance matching network. By adopting the cross-coupled synchronous input topology, the source-drain voltage drop of the MOS tube is significantly reduced, thereby the output voltage amplitude is systematically improved.
[0039] All MOS devices adopt the configuration scheme of shorting the body and the drain. When the rectifier is in working state, the voltage between the source and the drain of the MOS presents a periodic change characteristic. Specifically, the source potential of the NMOS device is usually higher than the drain potential in the off state; and the drain potential of the PMOS device is generally higher than the source potential when it is off. For the traditional structure of directly connecting the substrate and the source, when the MOS is in the off state, the PN junction formed between the substrate and the source / drain will enter the forward bias conduction state, causing the device to generate a significant reverse leakage current, thereby causing a serious power loss problem. In contrast, when the substrate-drain short circuit structure is adopted, the PN junction between the drain and the substrate always maintains the reverse bias state, so that the reverse leakage current amplitude through the conductive channel is significantly reduced, the power loss is effectively controlled, and the overall conversion efficiency of the system is ultimately improved.
[0040] Suppose that the input signal of the RF-DC rectifier circuit is a sine wave signal with an amplitude of , , is the frequency of this signal, the differential voltage can be defined as: In order to ensure energy-efficient storage and suppress the ripple noise component of the output voltage, the load capacitor needs to follow the large-capacitance design criterion. When , M1 and M8 meet the forward bias condition and are activated and turned on, and M7 and M2 are forced to be turned off. In this stage, the ground end injects electric charge into the capacitor C1 through M1, and after multi-cycle accumulation, the voltage difference across C1 is stabilized at , wherein Characterizes the source-drain voltage difference of the NMOS transistor M1 in the on-state. When At this time, the gate potential of transistor M1 decreases due to negative excitation, causing transistors M1 and M8 to turn off, while transistors M7 and M2 are activated and turned on. Due to the capacitor voltage continuity constraint, the plate voltage of C1 is pumped up to And charge is transferred to C2 through M2. After multiple cycles of iteration, the voltage difference of C2 stabilizes at The capacitors in subsequent circuit stages operate on a similar principle, therefore the final output voltage of the rectifier is: (1) Among them, the source-drain voltage drop of PMOS transistor M6 in the on-state Based on the above principle, it can be seen that within one working cycle, compared with the traditional cross-coupled rectifier, the charge transmission path only needs to pass through a single-stage MOS transistor, thus reducing the loss and increasing the output voltage. Since the output voltage amplitude of the single-stage energy conversion unit cannot meet the minimum drive threshold of the subsequent circuit, a multi-stage cascaded architecture must be adopted to achieve the potential increase. Considering the 1.56V turn-on voltage of the subsequent undervoltage lockout circuit at room temperature in the tt process corner, and the influence of process and temperature changes, a margin of 100 mV is reserved. The output of the rectifier is set to be above 1.66V. The voltage amplitude after the matching network is above 450mV. The source-drain voltage drop of PMOS and NMOS is a few mV. According to formula (1), a six-stage cascaded architecture is determined to meet the requirements.
[0041] In one possible embodiment, a matching network circuit is connected between the antenna and the RF-DC rectifier circuit.
[0042] Matching network circuits include inductors and capacitor ;inductance Each end is connected to a capacitor The two ends of the inductor are connected to the antenna; the two ends of the inductor are also directly connected to the two ends of the input terminal of the RF-DC rectifier circuit.
[0043] If the voltage on the antenna is directly connected to the input of the rectifier, its amplitude is too low to enable the driving threshold of the MOS transistor. Therefore, the matching network configured at the front end of the rectifier needs to achieve two functions: (1) impedance conjugate matching: ensure complex conjugate matching between the rectifier input impedance and the antenna impedance; (2) voltage gain enhancement: amplify the input signal amplitude through a resonance mechanism to meet the conduction driving conditions of the subsequent MOS device. The circuit diagram of the matching network is as follows. Figure 3 As shown, It is the input voltage of the rectifier. The antenna's output voltage and resistance are given. The typical value is 50Ω.
[0044] In the optimal case and The relation is: (2) in, and The resonant frequency must be satisfied: (3) The corresponding efficiency formula at this time is: (4) in, Represents load impedance. This represents the rectified voltage corresponding to the rectifier circuit. This represents the input resistance value of the rectifier circuit.
[0045] In integrated circuit design, there are various selectable parameter values for the geometry of MOS transistors. However, there are fundamental selection principles for different circuit topologies. Some high-precision circuit designs require parameter optimization using the Monte Carlo method. Although the rectifier circuit involved in this invention does not need to achieve high precision, the selection of MOS dimensions still needs to follow specific design criteria. When the MOS channel length is fixed at the minimum process value, as the channel width W gradually increases from the process limit, the output voltage exhibits a characteristic of first rising and then stabilizing. Experimental data shows that this phenomenon originates from the fact that the increased width-to-length ratio of the NMOS transistor leads to a decrease in the on-state voltage drop, thereby increasing the output voltage. However, when W exceeds a critical value, the voltage drop decrease tends to saturate, while the additional losses introduced by device parasitic effects increase exponentially, eventually causing the output voltage to reach a stable state. Similarly, when L is increased, the rectification efficiency shows an upward trend; however, W must be considered more carefully at this time. Once W increases beyond the critical value, parasitic parameters will also increase significantly, thereby causing power loss and leading to a gradual deterioration of rectification efficiency. Based on the above analysis, boost capability and efficiency are mutually exclusive and a compromise must be made to determine the physical size parameters of the MOSFET.
[0046] Most of the time, the length L of the MOS transistor is chosen to be 2-5 times the minimum size. Then the width is determined according to the simulation results. For circuits with high speed requirements, the length of the MOS transistor is usually chosen to be about twice the minimum size. If it is a circuit with high precision requirements, the length of the MOS transistor is usually chosen to be about 10 times the minimum size, but the speed of the circuit may slow down in this case. The width-length ratio is determined by simulation after the length is roughly determined according to the specific circuit. The rectifier circuit does not have specific precision requirements, so the length of the MOS transistor does not need to be chosen to be about 10 times the minimum size. A normal length of 2-5 times the minimum size is sufficient. However, the size of the MOS transistor will affect the impedance of the entire circuit and is related to matching. Therefore, instead of choosing a width that is twice as fast, the length of five times the width is determined according to the simulation results of the impedance. Then, while changing the width of the MOS transistor, the impedance of the circuit is determined by simulation, and the equivalent model of the antenna is adjusted to determine the size.
[0047] The capacitance is determined according to the formula: (5) wherein , = 0.4 V, the current amplitude flowing through the capacitor According to the simulation results, it can reach 300 , for 915 MHz: (6) For the output voltage, when the pump capacitor is small, as the pump capacitor increases, the output voltage will first increase and then remain unchanged. As the pump capacitor increases, the drain current of the main rectifier transistor also increases, and the power consumption increases. This will lead to a decrease in the load capacity and efficiency of the circuit. That is, for circuits with loads, as the pump capacitor increases, the output voltage will first increase and then remain unchanged or even decrease, which will affect the selection of the energy storage capacitor. In addition, in the rectifier circuit without cross-coupling, a larger capacitor is often selected. The size of the capacitor in the cross-coupled rectifier circuit is smaller than that in the non-cross-coupled rectifier circuit in most cases, but the trend of the output of the circuit changing with the pump capacitor is basically the same.
[0048] In one possible embodiment, the temperature sensor circuit further comprises: an energy storage capacitor and an under-voltage lockout circuit connected to the output end of the RF-DC rectifier circuit, respectively; the energy storage capacitor stores the direct current power output by the RF-DC rectifier circuit.
[0049] The under-voltage lockout circuit monitors the transient response characteristic of the voltage output by the RF-DC rectifier circuit in real time, and cuts off the connection between the RF-DC rectifier circuit and the temperature sensing circuit when it is detected that the supply voltage is lower than a preset threshold level.
[0050] The UVLO (under-voltage lockout) circuit monitors the transient response characteristic of the power supply in real time, and plays a protection mechanism for the power supply of the power management system chip. When it is detected that the supply voltage is lower than a preset threshold level, the protection mechanism is automatically triggered, and the sensitive functional modules are implemented in a hierarchical lockout. The output characteristic curve of the under-voltage lockout is as shown in Figure 4 , and the functions are as follows: Forward opening: the rectifier stores the energy collected by the antenna on a large capacitor, that is, charges the capacitor, and when the voltage rises to the designed opening voltage, the circuit starts to work normally. When the supply voltage is greater than V + , the UVLO connects the power supply to the load. That is, it switches from the off state to the on state.
[0051] Reverse shutdown: when the reader is away from the temperature sensing chip, the antenna cannot receive energy, and the supply voltage gradually decreases. When the supply voltage is less than V , the UVLO cuts off the connection between the power supply and the load, and the rectifier stops running.
[0052] Hysteresis range: the UVLO needs to have a sufficient hysteresis range to avoid repeated opening and closing of the UVLO due to fluctuations in the supply voltage. The hysteresis range is .
[0053] The UVLO circuit is crucial to the start, shutdown and running process of the temperature sensor circuit. Without the UVLO, during the process of voltage rising from zero, the modules in the chip except the rectifier have already started to consume energy. This will cause the start time of the chip to be prolonged or even unable to start. At the same time, during the process of the supply voltage deviating from the normal working range, the remaining modules may enter an abnormal working state, causing internal logic errors, and eventually leading to measurement failure. This negative feedback control strategy can effectively eliminate the risk of logic disorder caused by power supply transient drop, and provide reliable safety margin for the system.
[0054] In one possible implementation manner, the under-voltage lockout circuit comprises: a current inverter.
[0055] The current inverter comprises a transistor; when the input voltage is higher than a threshold voltage , the gate of the control transistor is at a high level, so that the transistor enters an off state; when the input voltage is lower than the threshold voltage , the gate of the control transistor is at a low level, so that the transistor enters an on state.
[0056] The classic under-voltage lockout circuit structure often needs to configure a reference voltage source and a voltage comparison module. Such architecture not only needs a higher layout area requirement, but also produces significant energy consumption, and the signal processing delay problem is also more prominent. For example Figure 5 Figure 1 is a circuit diagram of a UVLO provided by an embodiment of the present application, and Figure 2 is a schematic diagram of a UVLO based on a Schmitt trigger provided by an embodiment of the present application. Figure 6 The UVLO based on a bandgap comparator generally has good temperature stability, but generally needs a larger resistance and occupies a larger area. The UVLO based on a Schmitt trigger can work in a lower voltage condition, but the power consumption and area need to be compromised.
[0057] Figure 3 is a schematic diagram of a UVLO circuit structure provided by an embodiment of the present application. Figure 5 Figure 4 is a schematic diagram of a UVLO circuit structure provided by an embodiment of the present application. , M1 connected with a resistor and a diode generates a control voltage ; M1 and M2 adopt the same width-length ratio, and constitute a current mirror structure. Subsequently, M2 and M3 constitute an inverter with an active load; M4-M9 form a Schmitt trigger, and M10-M12 constitute a delay circuit. In order to suppress the power supply voltage ripple caused by the UVLO circuit, BUFI and BUF2 realize waveform shaping; M13 changes the resistance load as a switch, so that the control voltage changes, thereby realizing hysteresis.
[0058] The realization of the hysteresis threshold is through changing the load resistance of the reference generator. When the power supply voltage is higher than the threshold voltage , the gate of the control transistor M13 is at a high level, and M13 enters an off state. Then there is: (7) When the power supply voltage is lower than the threshold voltage , the gate of M13 is at a low level, and M13 is turned on (the influence of its on-resistance RDS(ON) is ignored). Then there is: (8) Hysteresis range: (9) The main function of the UVLO module is to detect the voltage fluctuation on the energy storage capacitor, and realize the function of low-voltage locking. One of the main tasks under lower power consumption is to improve the response speed, and the output ripple is not concerned (because there is a LDO circuit behind, the task of reducing the ripple can be handed over to the LDO circuit), so the delay circuit is selected to be deleted. The following improvements are made on the basis of the schematic diagram: a depletion-mode NMOS is used to replace the resistor and ; delete the delay circuit composed of M10-M12; use 4-layer current mirror to reduce static current.
[0059] In a possible implementation mode, the temperature sensor circuit comprises: a pre-stabilization circuit arranged between the under-voltage lockout circuit and the temperature sensing circuit; the pre-stabilization circuit is used for stabilizing the voltage output by the under-voltage lockout circuit and then outputting the voltage to the temperature sensing circuit.
[0060] LDO (low dropout linear regulator) needs to integrate a voltage reference source inside to ensure that the chip can generate , without additional external input port, and the Temperature dependence is not much, so consider using Bandgap Reference structure, such as Figure 6 As shown in the Bandgap Reference circuit structure provided by the embodiment of the application. In the Bandgap Reference source circuit, M1, M6 and M11 are start-up circuits; M2, M3, M7 and M8 constitute a 1:1 common-source and common-gate current mirror; a PTAT current is generated by the difference between M12 and M13 : : (10) The After being mirrored by M4 and M9, the current flows into NPN tubes Q0 and Q0 Has a negative temperature coefficient, and reasonable adjustment Temperature coefficient makes it offset the temperature coefficient of , thus generating a reference voltage with a smaller temperature coefficient : (11) Since the output voltage of the RF-DC rectifier varies with the received RF energy, a regulator is needed to generate a stable output voltage. The LDO circuit structure provided by the embodiment of the application is shown in Figure 7 The error amplifier adopts a differential amplifier with active current mirror load. The differential input stage M3 and M4, the active load M1 and M2, and the current bias M11. The power tube adopts PMOS tube M5, the feedback network adopts diode-connected M6, M7, M8, M9 and M10, and the sizes of the five MOS tubes are equal. According to the previous principle analysis, we can get: (12) By selecting appropriate device parameters, the operating point can be adjusted to meet design requirements, primarily satisfying power consumption (using diodes to connect MOSFETs instead of resistors) and output voltage limitations (using Miller capacitors to compensate for poles and ensure a sufficiently high phase margin). Miller capacitor compensation technology is based on the Miller effect. In an amplifier, when a capacitor (Miller capacitor) is connected between the input and output terminals, its equivalent capacitance at the input is amplified due to the amplifier's gain. Introducing a Miller capacitor creates an additional feedback path between the input and output of the error amplifier. In the low-frequency range, the capacitive reactance of the Miller capacitor is relatively large, having little impact on the circuit, which mainly operates according to the normal feedback mechanism. However, in the high-frequency range, the capacitive reactance of the Miller capacitor decreases, and its equivalent capacitance increases, causing a decrease in the amplifier's high-frequency gain and thus altering the amplifier's frequency response characteristics. By appropriately selecting the value of the Miller capacitor, the phase margin of the amplifier can be made to meet requirements, effectively suppressing self-oscillation and ensuring stable operation of the LDO circuit under different load and input voltage conditions.
[0061] In the aforementioned reference circuit, M2, M3, M7, and M8 form a 1:1 common-source, common-gate current mirror, ensuring that the currents of M12 and M13 are almost equal. The aspect ratio of M13 is twice that of M12, ensuring... Greater than ;Will After being mirrored by M4 and M9, the current flows into the NPN transistor. Adjust the resistor. The value of makes It is approximately 610 mV, resulting in an LDO output voltage of around 1.5 V.
[0062] Temperature sensing circuits primarily convert temperature information into the frequency information of oscillating signals. Firstly, the internal components of the temperature sensing circuit... The circuit generates a negative temperature coefficient (CTAT) voltage, which, after being buffered by a voltage buffer, powers a temperature-sensitive ring oscillator (TSRO). The oscillator then outputs a frequency signal whose frequency decreases as temperature increases. The TSRO contains internal tuning circuitry to adjust for frequency errors caused by process variations.
[0063] In one possible embodiment, the complementary absolute temperature voltage generator includes: a first circuit branch, a second circuit branch, a third circuit branch, a fourth circuit branch, and a fifth circuit branch.
[0064] The first circuit branch includes NMOS transistors M4, M5, M6, and M11.
[0065] The second circuit branch includes NMOS transistors M3 and M10.
[0066] The third circuit branch comprises NMOS M1 and NMOS M9.
[0067] The fourth circuit branch comprises NMOS M2 and NMOS M8.
[0068] The fifth circuit branch comprises NMOS M7.
[0069] NMOS M7, NMOS M8, NMOS M9, NMOS M10 and NMOS M11 are of the same size, ensuring that the currents of the four branches are approximately equal, and the sources are connected to the power supply VDD.
[0070] The drain of NMOS M10 is connected to the drain of NMOS M3, the drain of NMOS M9 is connected to the drain of NMOS M1, and NMOS M3 is times the size of NMOS M1.
[0071] NMOS M3 and NMOS M1 work in the sub-threshold region, and NMOS M5 and NMOS M6 work in the deep linear region, for controlling the current size and reducing the power consumption of the circuit. The gate voltage of NMOS M5 is biased by the drain voltage of diode-connected NMOS M4; the gate-source voltage of NMOS M4 has a negative temperature coefficient, and the drain voltage of NMOS M5 has a positive temperature coefficient, and through the adjustment of parameters, the current output by the drain of NMOS M7 is a CTAT current.
[0072] Figure 8 A CTAT key branch circuit diagram is provided for the embodiment of the application, where the current is in the nA level, M3 and M1 work in the sub-threshold region, and the current is: (13) wherein, is the hot spot voltage, is the sub-threshold slope factor. When >0.1 V, the influence on the current can be ignored. Thus: (14) For M3 and M1, M3 is times the size of M1, and PM11, PM10 and PM9 are of the same size, so the currents of the two are equal, .
[0073] Using the above formula, we can get: (15) (16) is the drain-source resistance of MOS M5 working in the deep linear region, and is: (17) It can be seen that has a positive temperature coefficient, while has a negative temperature coefficient, so that increases with temperature. By adjusting the device parameters, the positive temperature coefficient of can be made dominant, so that decreases with temperature, thereby generating a CTAT current.
[0074] The is mirrored out through M7, and a CTAT voltage can be obtained through a PMOS transistor M21 and two PNP transistors Q1 and Q2: Figure 9 (18) In one possible embodiment, the ring oscillator includes at least three odd-numbered inverter units forming a ring chain circuit.
[0075] Oscillator circuit can generate periodic waveform with nominal frequency, amplitude stability and duty cycle accuracy called clock signal. The signal is converted into a standard square wave signal through the processing of the waveform shaping circuit and the power amplification module. In the selection of the oscillator architecture, the RC oscillator has a higher power supply voltage sensitivity than other architectures due to the use of resistance-capacitance networks. In addition, based on the demand for passive devices, the silicon area occupancy rate increases. In contrast, although the relaxation oscillator can improve some performance, its working mechanism based on capacitor charging and discharging will significantly increase the power consumption level. As an alternative, the ring oscillator, which is completely implemented using standard CMOS technology and does not require external inductance elements, has shown significant advantages in integrated circuit design: its simple ring inverter chain structure not only reduces manufacturing costs, but also simplifies the layout design process. Based on the above technical characteristic comparison, the embodiment of the present application finally selects the ring oscillator as the core frequency generation module.
[0076] The unit with delay function can be combined in multiple, then a feedback loop is formed, and frequency modulation can be performed. The traditional ring oscillator can realize this function. Its transfer function satisfies the Barkhausen criterion at a certain frequency: (19) (20) According to the requirement, in order to start the system, when the amplitude is not less than 1, the loop gain phase shift must be at 360°; more than or equal to 3 odd-numbered unit cascades can start in single-ended mode.
[0077] In one possible embodiment, a tuning network is introduced into the input node of the ring oscillator. The tuning network inputs a high or low level to control the connection or disconnection of the capacitor in the inverter unit, thereby precisely tuning the oscillation frequency of the ring oscillator.
[0078] TSRO is a 5-stage ring oscillator composed of inverters, such as Figure 10 As shown. For a single inverter, its delay is: (twenty one) in, The parasitic capacitance of the inverter output node. This is the power supply voltage.
[0079] Therefore, the oscillation frequency of TSRO is: (twenty two) Since the CTAT voltage is used as TSRO after passing through the unity-gain buffer... When the operational amplifier has a large open-loop gain and the input offset voltage is negligible, it can be approximated as... .thereby: (twenty three) As you can see, and This results in a large negative temperature coefficient, meaning the TSRO output frequency signal has a negative temperature coefficient. Therefore, the current temperature value can be determined based on the corresponding frequency value.
[0080] The changes in the process mainly affected , , as well as This causes the oscillation frequency of the TSRO output to shift. According to equation (23), changing the load capacitor CL at the oscillator output node can change the oscillation frequency. To reduce the impact of process frequency variations, this design introduces an 8-bit tuning network at the input node. By selecting appropriate codes (S0-S7), where the tuning pins S0-S7 are connected to a high level or GND, the connection or disconnection of the capacitor is indirectly controlled. Using the frequency of the tt process angle at 15℃ as a reference, the oscillation frequency is brought back to the reference value, thus achieving tuning. Therefore, it is possible to adjust the frequency of the TSRO output. Precise adjustments are made to compensate for the defects of the ring oscillator that are greatly affected by the process, thereby improving the accuracy of the oscillator.
[0081] In one possible embodiment, the backscattering circuit includes a backscattering switch connected between the transceiver antenna and the RF-DC rectifier circuit.
[0082] The backscatter switch comprises a first PMOS tube, a second PMOS tube, a first capacitor and a second capacitor, the sources of the first PMOS tube and the second PMOS tube are connected to each other, the drain of the first PMOS tube is connected to one end of the first capacitor, the drain of the second PMOS tube is connected to one end of the second capacitor, and the other ends of the first capacitor and the second capacitor are connected to the two ends of the transceiving antenna and the RF-DC rectifier circuit respectively.
[0083] The frequency signal output by the ring oscillator drives the first PMOS tube and the second PMOS tube to switch between the on and off states, the input impedance of the radio frequency port of the temperature sensor circuit is switched by using the principle of impedance modulation, the reflection coefficient phase of the radio frequency port of the temperature sensor circuit is changed, and thus the external reader reads the square wave frequency signal representing the temperature information.
[0084] In the temperature sensing circuit system, the temperature information transmission of the passive wireless temperature sensing chip is realized by a backscatter modulation mode. The establishment of the passive wireless communication link is realized by dynamically adjusting the antenna load impedance, so as to modulate the amplitude and phase of the backscatter wave. This technology has significant advantages in energy consumption economy, cost effectiveness and deployment flexibility: first, it does not need to configure a high-power carrier generator, and is particularly suitable for low-power application scenarios; second, the simplified circuit structure eliminates the dependence on the battery, and can greatly reduce the terminal node manufacturing cost; finally, based on the passive wireless communication characteristics, large-scale sensor network deployment has engineering feasibility. These characteristics make the backscatter technology show important application value in the deployment of the perception layer of the Internet of Things.
[0085] As Figure 11 shown is a circuit diagram of a backscatter circuit provided by an embodiment of the application, two MOS tubes and a capacitor form a switch connected in parallel to the input ends of the rectifier, the output voltage of the ring oscillator is used to control the on and off of the switch to switch between the two states. By using the principle of PSK impedance modulation, the backscatter circuit is connected to the input end of the chip in the reflection state through the output of the oscillator, the input impedance of the chip is adjusted, the reflection coefficient phase of the antenna and the chip is changed, and the reader reads the temperature information through the switching of the reflection phase. Compared with the ASK impedance modulation mode, the PSK modulation can make the energy obtained by the chip in the matching and reflection states close, and the chip can also obtain sufficient energy to drive the internal circuit to work in the reflection state, so that the full-duplex working state is better realized.
[0086] The equivalent model of the antenna in series with the voltage source and the RL is used to represent the different input powers by adjusting the open circuit voltage amplitude. Considering that the PSK modulation has certain requirements for the initial phase of the reflection coefficient in the matching state, the impedance of the antenna is designed to have the same real part as the chip and a slightly lower imaginary part than the chip. The equivalent impedance of the antenna is selected as .
[0087] The design of the impedance modulation part is based on the phase requirement of the reflection coefficient between the chip and the reader. The imaginary part of the impedance is changed by connecting the reflection impedance modulation circuit to form a phase difference greater than 90° (-17dBm), and the amplitude range of the reflection coefficient is ensured to be in In the simulation, the equivalent model of the antenna is connected to the input end of the rectifier, and the oscillator controls the turn-off and turn-on of the MOS tube through the signals of '0' and '1'. The MOS tube is in the matching state when it is turned off, and in the reflection state when it is turned on. The capacitor is connected in parallel to the input end of the chip.
[0088] The passive wireless temperature sensor circuit provided by the embodiment of the application generates a CTAT voltage (0.98 V~1.39 V) by using a MOS tube to build a CTAT key generation circuit, converts temperature information into frequency information of an oscillator by using a temperature-to-frequency conversion chain formed by the CTAT voltage and the ring oscillator, can effectively reduce the power consumption of the temperature sensing circuit, and can increase the voltage coefficient of the CTAT voltage by combining the temperature characteristics of the MOS tube; the RF-DC rectifier is used to convert alternating radio frequency energy into a direct current signal to supply power to a subsequent system, optimizes two MOS tubes required by a charging path into one MOS tube, reduces series loss in the path, and improves the output voltage; the matching network configured at the front end of the rectifier ensures that the input impedance of the rectifier and the antenna impedance are complex conjugate matched, and the input signal amplitude is amplified through a resonance mechanism to meet the turn-on driving conditions of subsequent MOS devices; the undervoltage lockout circuit is configured to monitor the power transient response characteristics in real time, plays a protection mechanism for power management system chip power supply, and automatically triggers the protection mechanism when detecting that the power supply voltage is lower than the preset threshold, and implements hierarchical locking for sensitive functional modules; in order to reduce the frequency error of the oscillator caused by process deviation, the high-precision 8 bit capacitor trimming circuit is innovatively proposed, which can effectively trim the frequency of the oscillator to a reference value. The communication module uses the impedance modulation technology, dynamically adjusts the input impedance of the chip by connecting a MOS switch array and a capacitor in parallel at the input end of the rectifier, and realizes temperature information transmission based on the backscattering modulation.
[0089] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and the parts not described in detail in an embodiment can be referred to the related description of other embodiments.
[0090] Those skilled in the art will appreciate that embodiments of the present application can be devised for a variety of applications. It is intended that the present application be limited only by the scope of the appended claims, and it is intended that various modifications and alterations made by those skilled in the art be considered as within the scope of the present application. The embodiments of the present application will be described with reference to the attached drawings identified below.
[0091] The present application is described in reference to the drawings using a flowchart and / or a block diagram of the method, apparatus (system) and computer program product according to embodiments of the application. It will be understood that each block of the flowchart and / or block diagram, and combinations of blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in the flowchart and / or block diagram block or blocks.
[0092] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in the flowchart and / or block diagram block or blocks.
[0093] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in the flowchart and / or block diagram block or blocks. Figure 1 one or more functions specified in the flowchart and / or block diagram block or blocks.
[0094] While the preferred embodiments of the application have been described, additional variations and modifications can be made to the embodiments by those skilled in the art once they learn of the basic inventive concepts. Therefore, the appended claims are intended to cover all such modifications and variations as fall within the scope of the present application.
[0095] Obviously, many modifications and variations of the present application are possible in light of the above teachings. It is, therefore, to be understood that within the scope of the appended claims and their equivalents, the application can be practiced otherwise than as specifically described.
Claims
1. A passive wireless temperature sensor circuit, characterized by The temperature sensor circuit comprises a transceiving antenna, an RF-DC rectifier circuit, a temperature sensing circuit and a backscatter circuit; The RF-DC rectifier circuit outputs direct current power supply based on the external radio frequency energy received by the transceiving antenna; The temperature sensing circuit comprises a complementary absolute temperature voltage generator and a ring oscillator; The complementary absolute temperature voltage generator comprises MOS transistors, and generates a CTAT voltage based on the temperature characteristics of the MOS transistors; The ring oscillator converts the CTAT voltage into an oscillation frequency signal of the ring oscillator, and then outputs a square wave frequency signal with a negative temperature coefficient; The backscatter circuit backscatters the square wave frequency signal representing temperature information through the transceiving antenna.
2. The temperature sensor circuit of claim 1, wherein, The RF-DC rectifier circuit is a six-stage cascade structure composed of five NMOS transistor units and one PMOS transistor unit; The NMOS transistor unit comprises a pair of NMOS transistors, and the PMOS transistor unit comprises a pair of PMOS transistors; The radio frequency differential input ports RFP and RFN of the antenna are cross-coupled to synchronously input the NMOS transistor unit and the PMOS transistor unit, respectively; When the RF-DC rectifier circuit is in operation, the voltage between the source and the drain of each NMOS transistor and PMOS transistor periodically changes.
3. The temperature sensor circuit of claim 2, wherein, A matching network circuit is connected between the antenna and the RF-DC rectifier circuit; The matching network circuit includes an inductor. and capacitor The inductor Each end is connected to a capacitor The two ends of the inductor are connected to the two ends of the antenna; the two ends of the inductor are also directly connected to the two ends of the input terminal of the RF-DC rectifier circuit.
4. The temperature sensor circuit of claim 1, wherein, The temperature sensor circuit further comprises an energy storage capacitor and an under-voltage lockout circuit connected to the output of the RF-DC rectifier circuit, respectively; the energy storage capacitor stores the direct current power supply output by the RF-DC rectifier circuit; The under-voltage lockout circuit monitors the transient response characteristics of the voltage output by the RF-DC rectifier circuit in real time, and cuts off the connection between the RF-DC rectifier circuit and the temperature sensing circuit when detecting that the supply voltage is lower than a preset threshold.
5. The temperature sensor circuit of claim 4, wherein, The under-voltage lockout circuit comprises a current inverter; The current inverter comprises a transistor; when the input voltage is higher than the threshold voltage , the gate of the transistor is controlled to be at high level, so that the transistor is in off state; when the input voltage is lower than the threshold voltage , the gate of the transistor is controlled to be at low level, so that the transistor is in on state.
6. The temperature sensor circuit of claim 1, wherein, The temperature sensor circuit comprises a pre-stabilization circuit arranged between the under-voltage lockout circuit and the temperature sensing circuit; the pre-stabilization circuit is used to stabilize the voltage output by the under-voltage lockout circuit and then output to the temperature sensing circuit.
7. The temperature sensor circuit of claim 1, wherein, The complementary absolute temperature voltage generator comprises a first circuit branch, a second circuit branch, a third circuit branch, a fourth circuit branch and a fifth circuit branch; The first circuit branch comprises NMOS transistors M4, M5, M6 and M11; The second circuit branch comprises NMOS transistors M3 and M10; The third circuit branch comprises NMOS transistors M1 and M9; The fourth circuit branch comprises NMOS transistors M2 and M8; The fifth circuit branch comprises NMOS transistor M7; The NMOS transistors M7, M8, M9, M10 and M11 are of the same size, and their sources are connected to the power supply VDD. The drain of the NMOS transistor M10 is connected to the drain of the NMOS transistor M3, the drain of the NMOS transistor M9 is connected to the drain of the NMOS transistor Ml, the size of the NMOS transistor M3 is twice the size of the NMOS transistor Ml . The NMOS transistor M3 and the NMOS transistor M1 work in a sub-threshold region, and the NMOS transistor M5 and the NMOS transistor M6 work in a deep linear region; the gate voltage of the NMOS transistor M5 is biased by the drain voltage of the diode-connected NMOS transistor M4; the gate-source voltage of the NMOS transistor M4 has a negative temperature coefficient, and the drain voltage of the NMOS transistor M5 has a positive temperature coefficient, so that the current output from the drain of the NMOS transistor M7 is a CTAT current through adjustment of parameters.
8. The temperature sensor circuit of claim 1, wherein, The ring oscillator comprises at least three odd-numbered inverter units forming a ring chain loop.
9. The temperature sensor circuit of claim 8, wherein, An input node of the ring oscillator is introduced with a trimming network, and the trimming network inputs a high level or a low level to control the connection or disconnection of a capacitor in the inverter unit, so as to precisely trim the oscillation frequency of the ring oscillator.
10. The temperature sensor circuit of claim 1, wherein, The backscatter circuit comprises a backscatter switch connected between the transceiving antenna and the RF-DC rectifier circuit. The backscatter switch comprises a first PMOS transistor, a second PMOS transistor, a first capacitor and a second capacitor, the sources of the first PMOS transistor and the second PMOS transistor are connected to each other, the drain of the first PMOS transistor is connected to one end of the first capacitor, the drain of the second PMOS transistor is connected to one end of the second capacitor, and the other ends of the first capacitor and the second capacitor are connected to the transceiving antenna and the RF-DC rectifier circuit respectively. The frequency signal output from the ring oscillator drives the first PMOS transistor and the second PMOS transistor to switch between the on and off states, the input impedance of the radio frequency port of the temperature sensor circuit is switched by using the principle of impedance modulation, the reflection coefficient of the radio frequency port of the temperature sensor circuit is changed, and thus the external reader reads the square wave frequency signal representing the temperature information.
Citation Information
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CMOS temperature sensor based on RC phase delay detection
CN121720601A