Packaging structure and packaging method for improving heat dissipation performance of IGBT (Insulated Gate Bipolar Translator) power module

Abstract

The invention provides a packaging structure and a packaging method for improving the heat dissipation performance of an IGBT power module. The packaging structure comprises a copper substrate, a first epoxy glue layer, an epoxy resin-based composite material layer, a second epoxy glue layer, an upper bridge copper layer, a lower bridge copper layer, a chip solder layer and a power chip which are sequentially arranged from bottom to top, wherein the upper bridge copper layer and the lower bridge copper layer are integrally arranged; the power chip comprises an upper bridge chip and a lower bridge chip; the chip solder layer comprises an upper bridge chip solder layer and a lower bridge chip solder layer; the upper bridge chip solder layer is arranged on the upper bridge copper layer, and the upper bridge chip is arranged on the upper bridge chip solder layer; the lower bridge chip solder layer is arranged on the lower bridge copper layer, and the lower bridge chip is arranged on the lower bridge chip solder layer. According to the packaging structure, the epoxy resin-based composite material layer is adopted as the insulating layer, copper and a welding layer are reduced in heat flow transmission, the heat resistance from the chip to the shell is reduced, and the heat dissipation performance is improved; the copper layers of the upper and lower bridge arms are integrated, leads between the upper and lower bridges are reduced, the power loss of the IGBT is reduced, and the heat is reduced.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of IGBT power module packaging, and particularly relates to a packaging structure and method for improving the heat dissipation performance of an IGBT power module. BACKGROUND

[0002] As a core component in power electronic systems, the heat dissipation of an IGBT (Insulated Gate Bipolar Transistor) power module directly affects the stability, reliability and efficiency of the system. The heat transfer thermal resistance of the IGBT power module mainly includes the thermal resistance of the heat sink itself, the thermal resistance of each welding layer, the thermal resistance of the ceramic layer, the thermal resistance of the upper and lower copper layers, and the contact thermal resistance between each layer. The current typical power module packaging form is as follows: the upper copper layer is arranged with electrical parts such as power semiconductor / diode chips / bonding wires, the DBC provides functions such as circuit layout, insulation, heat transfer and mechanical support, and the heat dissipation substrate supports the backing plate upward and contacts the heat dissipation medium downward. The main components in the heat transfer path are in turn the power chip, the chip solder, the upper copper layer, the ceramic, the lower copper layer, the DBC solder and the substrate. The upper and lower bridge DBCs are connected through bonding. For example, the Chinese patent document with the publication number CN221529931U discloses an IGBT module packaging structure, which comprises: an outer shell, a lower copper layer fixedly installed in the outer shell, a ceramic layer sealed to the lower copper layer, ceramic protrusions integrally formed on the upper and lower sides of the ceramic layer, a second through hole formed in the ceramic protrusion and penetrating through the ceramic layer, the lower copper layer and the outer shell, and an upper copper layer sealed to the ceramic layer, a freewheeling diode, an insulated gate bipolar transistor chip and a terminal fixedly installed on the upper copper layer. The Chinese patent document with the publication number CN213816137U discloses a packaging structure for improving the heat uniformity of SiC power devices, which comprises SiC chip one, SiC chip two, DBC upper copper layer one, DBC upper copper layer two, DBC upper copper layer three, DBC ceramic layer, DBC lower copper layer and substrate; the surfaces of the DBC upper copper layer one, the DBC upper copper layer two, the DBC upper copper layer three and the DBC lower copper layer are etched with a hollow structure solder layer; the upper surface of the SiC chip one is connected to the hollow structure solder layer on the DBC upper copper layer two through a bonding aluminum-coated copper band; and the upper surface of the SiC chip two is connected to the hollow structure solder layer on the DBC upper copper layer three through a bonding aluminum-coated copper band.

[0003] The current typical power module packaging form has the following problems in terms of heat dissipation function: the substrate and the lower copper layer are connected through solder, the solder has poor heat conduction performance, which is not conducive to heat dissipation; the upper and lower bridge DBCs are connected through bonding, the line resistance value is large, the IGBT power loss is high, and a large amount of heat is generated. SUMMARY

[0004] The technical problem solved by the present application is to provide a packaging structure and a packaging method for improving the heat dissipation performance of an IGBT power module, which uses an epoxy resin-based composite layer as an insulating layer, reduces two channels of copper and welding layer on a heat flow transmission channel, reduces the thermal resistance from the chip to the shell, and improves the heat dissipation performance; the upper and lower bridge arms are connected by a copper layer to realize integration, the lead wires between the upper and lower bridges are reduced, the power loss of the IGBT is reduced, and the heat generation is reduced.

[0005] To solve the above problems, one aspect of the present application provides a packaging structure for improving the heat dissipation performance of an IGBT power module: The packaging structure comprises, from bottom to top, a copper substrate, a first epoxy adhesive layer, an epoxy resin-based composite layer, a second epoxy adhesive layer, an integrally arranged upper bridge copper layer and a lower bridge copper layer, a chip solder layer, and a power chip; the power chip comprises an upper bridge chip and a lower bridge chip; the chip solder layer comprises an upper bridge chip solder layer and a lower bridge chip solder layer; the upper bridge chip solder layer is arranged on the upper bridge copper layer, and the upper bridge chip is arranged on the upper bridge chip solder layer; the lower bridge chip solder layer is arranged on the lower bridge copper layer, and the lower bridge chip is arranged on the lower bridge chip solder layer.

[0006] Preferably, the first epoxy adhesive layer and the second epoxy adhesive layer comprise epoxy adhesive, coupling agent, aluminum oxide, and silver; the mass of the coupling agent is 1%-3% of the mass of the epoxy adhesive; the mass of the aluminum oxide is 20%-25% of the mass of the epoxy adhesive; and the mass of the silver is 3%-5% of the mass of the epoxy adhesive.

[0007] Preferably, the epoxy resin-based composite layer comprises epoxy resin, reinforcing fiber, silicon dioxide, and boron nitride; the mass ratio of the epoxy resin to the reinforcing material is 2-4:5; the mass of the silicon dioxide is 55wt%-65wt% of the mass of the epoxy resin; and the mass of the boron nitride is 5wt%-15wt% of the mass of the epoxy resin.

[0008] Preferably, the thickness of the epoxy resin-based composite layer is 0.2-0.4mm.

[0009] Preferably, the thickness of the integrally arranged upper bridge copper layer and lower bridge copper layer is 0.25-0.35mm.

[0010] Another aspect of the present application provides a packaging method for improving the heat dissipation performance of an IGBT power module, comprising the following steps: S1. Surface pretreatment of the copper substrate; S2. Preparation of a prepreg of an epoxy resin-based composite layer; S3. Arrangement of a first epoxy adhesive layer on the upper surface of the copper substrate and a second epoxy adhesive layer on the upper surface of the prepreg of the epoxy resin-based composite layer; S4. The pre-impregnated layer of the epoxy resin-based composite material is arranged on the first epoxy adhesive layer, and the integrally arranged upper bridge copper layer and lower bridge copper layer are arranged on the second epoxy adhesive layer, and then hot pressing, vacuum layering and curing are sequentially performed; S5. After the curing is completed, the chip solder layer is arranged on the integrally arranged upper bridge copper layer and lower bridge copper layer, and then the power chip is arranged on the chip solder layer, and the packaging of the IGBT power module is completed.

[0011] Preferably, the surface pretreatment of the copper substrate comprises the following steps in sequence: S101. The surface of the copper substrate is roughened by chemical etching or mechanical polishing; S102. The surface of the copper substrate is cleaned by pickling or plasma cleaning; S103. A nickel or silver metal layer is plated on the surface of the copper substrate.

[0012] Preferably, the temperature during the hot pressing is 100-200 DEG C, and the pressure is 1-10 MPa.

[0013] Preferably, the first epoxy adhesive layer and the second epoxy adhesive layer comprise epoxy adhesive, coupling agent, aluminum oxide and silver; the mass of the coupling agent is 1%-3% of the mass of the epoxy adhesive; the mass of the aluminum oxide is 20%-25% of the mass of the epoxy adhesive; and the mass of the silver is 3%-5% of the mass of the epoxy adhesive. The epoxy resin-based composite material layer comprises epoxy resin, reinforcing fiber, silicon dioxide and boron nitride; the mass ratio of the epoxy resin to the reinforcing material is 2-4:5; the mass of the silicon dioxide is 55wt%-65wt% of the mass of the epoxy resin; and the mass of the boron nitride is 5wt%-15wt% of the mass of the epoxy resin.

[0014] Preferably, the thickness of the epoxy resin-based composite material layer is 0.2-0.4 mm. The thickness of the integrally arranged upper bridge copper layer and lower bridge copper layer is 0.25-0.35 mm.

[0015] Compared with the prior art, the packaging structure for improving the heat dissipation performance of the IGBT power module has the following beneficial effects: The packaging structure for improving the heat dissipation performance of the IGBT power module of the embodiment of the application adopts an epoxy resin-based composite material layer as an insulating layer. Since the epoxy resin has a relatively low Young's modulus, it can easily cope with the stress caused by the deformation of the substrate during the installation of the module. At this time, the binding relationship between the solder layer and the lower metal to the substrate can be released. That is, after the aluminum oxide ceramic layer is replaced by the epoxy resin-based composite material layer as the insulating layer, the lower copper layer and the solder layer can be omitted, and the epoxy resin insulating layer is directly attached to the copper substrate. The structure is simple, and the two channels of the lower copper layer and the solder layer in the heat flow transmission channel are reduced. Since the thermal conductivity of the solder layer is poor, reducing this channel can reduce the thermal resistance from the chip to the shell and increase the heat dissipation performance.

[0016] In the original packaging structure, if the upper bridge copper layer and the lower bridge copper layer are directly connected, ceramic cracks will be caused, and the epoxy resin composite insulating layer is replaced in the application, so that the upper bridge copper layer and the lower bridge copper layer can be connected in an integrated manner. Compared with the traditional packaging structure, the upper bridge copper layer and the lower bridge copper layer are connected by Al or AlCu alloy wires, and the integrated connection design reduces the line resistance value of the connection from the direct current positive electrode to the load through the IGBT, thereby reducing the power loss of the IGBT and reducing the heat generation. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is a longitudinal sectional view of the packaging structure for improving the heat dissipation performance of the IGBT power module according to the embodiment of the application; Figure 2 is a schematic view of the packaging structure for improving the heat dissipation performance of the IGBT power module according to the embodiment of the application; Figure 3 is the simulation result of the electrical performance and thermal performance of the HS IGBT when turned on (direct current = 400A; bottom heat dissipation heat exchange coefficient = 2000 W / (m2*K, main terminal temperature = 90℃, ambient temperature = 20℃); wherein a is a bulk potential distribution graph, b is a bulk current density distribution graph, and c is a bulk heat distribution graph; Figure 4 is a thermal distribution detail enlargement graph of the HS IGBT when turned on (direct current = 400A; bottom heat dissipation heat exchange coefficient = 2000 W / (m2*K, main terminal temperature = 90℃, ambient temperature = 20℃); wherein a is a chip wire thermal distribution detail enlargement graph, and b is a main terminal wire thermal distribution detail enlargement graph; Figure 5 is the simulation result of the electrical performance and thermal performance of the LS IGBT when turned on (direct current = 400A; bottom heat dissipation heat exchange coefficient = 2000 W / (m2*K, main terminal temperature = 90℃, ambient temperature = 20℃); wherein a is a bulk potential distribution graph, b is a bulk current density distribution graph, and c is a bulk heat distribution graph; Figure 6 is a thermal distribution detail enlargement graph of the LS IGBT when turned on (direct current = 400A; bottom heat dissipation heat exchange coefficient = 2000 W / (m2*K, main terminal temperature = 90℃, ambient temperature = 20℃); wherein a is a chip wire thermal distribution detail enlargement graph, and b is a main terminal wire thermal distribution detail enlargement graph; Figure 7are simulation results of electrical performance and thermal performance of the HS diode when turned on (DC current = 400 A; heat exchange coefficient of the bottom heat dissipation = 2000 W / (m2*K, main terminal temperature = 90℃, ambient temperature = 20℃); wherein a is a bulk potential distribution diagram, b is a bulk current density distribution diagram, c is a bulk thermal distribution diagram, and d is a thermal distribution detail enlargement diagram of the chip lead; Figure 8 are simulation results of electrical performance and thermal performance of the LS diode when turned on (DC current = 400 A; heat exchange coefficient of the bottom heat dissipation = 2000 W / (m2*K, main terminal temperature = 90℃, ambient temperature = 20℃); wherein a is a bulk potential distribution diagram, b is a bulk current density distribution diagram, and c is a bulk thermal distribution diagram; Figure 9 is a thermal distribution detail enlargement diagram of the LS diode when turned on; Figure 10 a is a diagram showing the change of the junction shell thermal resistance with respect to the thickness of the insulating layer; and b is a diagram showing the change of the maximum stress of the bonding surface between the insulating layer and the upper copper layer with respect to the thickness of the insulating layer.

[0018] Wherein: 1-copper substrate; 2-epoxy resin-based composite material layer; 3-integrally arranged upper bridge copper layer and lower bridge copper layer; 31-upper bridge copper layer; 32-lower bridge copper layer; 4-chip solder layer; 5-power chip; 51-upper bridge chip; 52-lower bridge chip. DETAILED DESCRIPTION

[0019] The technical solutions of the present application will be clearly and completely described below in combination with the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0020] As shown in Figure 1 , Figure 2 , one aspect of the embodiment of the present application provides a packaging structure for improving the heat dissipation performance of an IGBT power module: The packaging structure comprises, from bottom to top, a copper substrate 1, a first epoxy adhesive layer, an epoxy resin-based composite material layer 2, a second epoxy adhesive layer, an integrally arranged upper bridge copper layer and lower bridge copper layer 3, a chip solder layer 4, and a power chip 5. The power chip 5 comprises an upper bridge chip 51 and a lower bridge chip 52. The chip solder layer comprises an upper bridge chip solder layer and a lower bridge chip solder layer. The upper bridge chip solder layer is arranged on the upper bridge copper layer, and the upper bridge chip is arranged on the upper bridge chip solder layer. The lower bridge chip solder layer is arranged on the lower bridge copper layer, and the lower bridge chip is arranged on the lower bridge chip solder layer.

[0021] In the original packaging structure, the structure between the substrate and the upper copper layer is solder, lower copper layer, ceramic, and the design of the lower copper-solder layer between the ceramic insulating layer and the substrate is due to the fact that the IGBT module copper substrate has a certain curvature, and the substrate deforms when the module is installed. If the aluminum oxide ceramic is directly attached to the metal substrate, the high Young's modulus of the aluminum oxide ceramic will cause it to break easily. The lower copper layer-solder layer is used to connect the aluminum oxide ceramic insulating layer and the copper substrate for stress dispersion during installation. On the other hand, heat is dispersed in all directions within the metal substrate. According to the definition of heat capacity, the heat can be evenly distributed in the copper substrate within a certain time. A high heat capacity (thick) substrate can dissipate heat more quickly and effectively, so it is necessary to select a certain thickness of metal substrate for heat dissipation.

[0022] However, in the original packaging structure, the structure between the substrate and the upper copper layer is solder, lower copper layer, ceramic, and the thermal conductivity of the solder layer is poor, which reduces the overall heat dissipation performance of the module. On the other hand, as shown in Table 2, the thermal expansion coefficient represents the macroscopic expansion ratio of the material in the spatial direction per 1℃ rise. In view of the vertical heat dissipation structure from the chip to the heat sink, the temperature of the upper copper layer will be higher than that of the insulating layer. Therefore, in order to weaken the thermal stress caused by the mismatch of thermal expansion, the insulating layer should be made of a material with a higher thermal expansion coefficient than the upper copper layer. In the original packaging structure, the design of the aluminum oxide ceramic and the upper copper layer will obviously suffer more severe thermal stress due to the mismatch of the thermal expansion coefficient.

[0023] The packaging structure for improving the heat dissipation performance of the IGBT power module of the embodiment of the application uses an epoxy resin-based composite layer as the insulating layer. Since the epoxy resin has a low Young's modulus (as shown in Table 1), it can easily cope with the stress caused by the deformation of the substrate during module installation. At this time, the binding relationship between the solder layer and the lower metal to the substrate can be released, i.e. after replacing the aluminum oxide ceramic layer with an epoxy resin-based composite layer as the insulating layer, the lower copper layer and the solder layer can be omitted, and the epoxy resin insulating layer can be directly attached to the copper substrate. The structure is simple, and the lower copper layer and the solder layer reduce the heat flow transmission path. Since the thermal conductivity of the solder layer is poor, reducing this path can reduce the thermal resistance from the chip to the shell and increase the heat dissipation performance. Moreover, in the original packaging structure, a ceramic insulating layer is used, and if the upper bridge copper layer and the lower bridge copper layer are directly connected, it will cause cracks in the ceramic. After replacing the epoxy resin composite insulating layer in the present application, the upper bridge copper layer and the lower bridge copper layer can be connected in an integrated manner. Compared with the traditional packaging structure in which the upper bridge copper layer and the lower bridge copper layer are connected using Al or AlCu alloy wires, the integrated connection design reduces the line resistance value of the direct current positive electrode to the load connection through the IGBT, thereby reducing the power loss of the IGBT and reducing the heat generation.

[0024] Table 1

[0025] Table 2

[0026] Table 1: Young's modulus represents the ratio of normal stress (force per unit area) and corresponding normal strain (relative change in length) of a solid material, which can reflect the material's resistance to deformation to some extent.

[0027] Table 2: Thermal expansion coefficient represents the relative change in length or volume caused by unit temperature change, with units of 1 / ℃ or 1 / K. The close matching of thermal expansion coefficients between layers is the primary consideration to ensure that thermal peeling does not occur.

[0028] The thermal and electrical performance of the IGBT power module packaging structure of the present application was simulated and analyzed using COMSOL 6.2 simulation software.

[0029] IGBT boundary conditions: current: DC 400 A. Bottom heat dissipation heat exchange coefficient: 2000 W / (m2*K). Material properties: from built-in material library. Heat sink external environment temperature: 20℃. Main terminal temperature: 90℃.

[0030] IGBT upper bridge (HS): Average data of three IGBT chips Avg_Tj=152.50℃, Avg_Tc=129.58℃, Avg_Th=108.24℃ Chip self-heating power P_chip_total=706.73W, wire self-heating power P_wires_total=23.421W Upper bridge thermal resistance: Rth(j-c)=32.43K / kW, Rth(c-h)=30.2K / kW (only with chip as heat source, ignoring Top Cu, Solder, wires).

[0031] When a single chip is used as a reference (the chips are named 1, 2, and 3 from left to right): Table 3

[0032] IGBT HS 1 IGBT HS 2 IGBT HS 3 Avg_Tj (°C) 147.3 158.37 151.83 Max_Tj (°C) 180.87 187.48 181.34 Avg_Tc (°C) 123.76 135.53 129.46 Avg_Th (°C) 103.22 112.31 109.2 P_chip (W) 245.33 232.40 229.01 Rth(j-c) (K / kW) 95.95239066 98.2788296 97.68132396 Rth(c-h) (K / kW) 83.72396364 99.91394148 88.4677525 Max_T_wires (°C) 183.27 190.14 183.37 P_wires (W) 8.138 7.7806 7.5027

[0033] Table 4 T_case 25℃ 125℃ 175℃ Rcc‘+ee‘ (mΩ) 0.5725 0.7625 0.8575 The following explanations apply to Tables 3-10: IGBT HS: (upper bridge IGBT chip, 1 / 2 / 3 for distinguishing labels, diode for freewheeling diode, same principle for distinguishing labels) Avg. Tj (average junction temperature): average temperature of the active area of the chip (3-dimensional spatial domain average); Max.Tj (Max. Junction Temperature): The maximum temperature of the active area of the chip (3D spatial domain maximum); Avg.Tc (Average Case Temperature): The average temperature of the chip projected on the case surface (2D spatial surface average); Avg.Th (Average Heat Sink Temperature): The average temperature of the chip projected on the heat sink surface (2D spatial surface average); P_chip: The thermal dissipation power of the chip under the current electrical and thermal conditions; Rth(j-c): The junction-to-case thermal resistance corresponding to the chip, Rth(j-c) = (Avg.Tj - Avg.Tc) / P_chip; Rth(c-h): The case-to-heat sink thermal resistance corresponding to the chip, Rth(c-h) = (Avg.Tc - Avg.Th) / P_chip; P_wires: The thermal dissipation power of all the wires connected to the emitter (E) of the chip due to the current thermal effect; Rcc' + ee': The lead resistance, which is the resistance value caused by the wires, copper layers, connecting components, etc. in the through-flow circuit. In high-current power devices, in order to exclude energy loss, the smaller the lead resistance, the better. Due to the response of the material conductivity to temperature, the lead resistance will change at different case temperatures.

[0034] Lower Bridge (LS) of IGBT: The average data of the three IGBT chips: Avg_Tj = 155.51 °C, Avg_Tc = 132.52 °C, Avg_Th = 111.16 °C The self-heating power of the IGBT chip: P_chip_total = 715.74 W, the self-heating power of the wire: P_wires_total = 23.438 W The thermal resistance of the lower bridge: Rth(j-c) = 32.12 K / kW, Rth(c-h) = 29.84 K / kW (only taking the chip as the heat source, ignoring Top Cu, Solder, and wires).

[0035] When taking a single chip as the standard (the chips are named 1, 2, and 3 from left to right): Table 5 IGBT LS 1 IGBT LS 2 IGBT LS 3 Avg_Tj (°C) 154.11 161.59 150.84 Max_Tj (°C) 184.81 192.91 185.4 Avg_Tc (°C) 131.69 138.6 127.31 Avg_Th (°C) 111.52 115.2 106.77 P_chip (W) 233.55 235.56 246.63 Rth(j-c) (K / kW) 95.99657461 97.59721515 95.40607388 Rth(c-h) (K / kW) 86.36266324 99.33774834 83.28265012 Max_T_wires (°C) 187.04 195.26 188.07 P_wires (W) 7.6 7.7774 8.0601

[0036] Table 6 T_case 25℃ 125℃ 175℃ Rcc‘+ee‘ (mΩ) 0.855 1.155 1.3025

[0037] From the data of Table 3-Table 6, the average overall junction-to-case thermal resistance Rth(j-c) = 32.27 K / kW, the average Rcc' + ee' = 0.9588 mΩ at 125℃, the electrical thermal loss in heat dissipation performance and Layout is good.

[0038] Diode boundary conditions: Current: DC 280 A. Bottom heat dissipation heat exchange coefficient: 2000 W / (m 2 *K). Material properties: from built-in material library. Heat sink external environment temperature: 20℃. Main terminal temperature: 90℃.

[0039] Diode upper bridge (HS): Average data of three Diode chips: Avg_Tj = 149.27℃, Avg_Tc = 117.73℃, Avg_Th = 96.441℃ Diode chip self-heating power: P_chip_total = 610.43W, wire self-heating power: P_wires_total = 26.664W Diode chip thermal resistance: Rth(j-c) = 51.67 K / kW, Rth(c-h) = 34.88 K / kW, (only chip as heat source, ignore Top Cu, Solder, wires).

[0040] When taking a single chip as a standard (the chips are named 1, 2, and 3 from left to right): Table 7 Diode HS 1 Diode HS 2 Diode HS 3 Avg_Tj (°C) 142.98 155.24 149.59 Max_Tj (°C) 199.59 207.31 201.92 Avg_Tc (°C) 111.17 123.74 118.28 Avg_Th (°C) 91.189 100.36 97.774 P_chip (W) 207.79 202.37 200.28 Rth(j-c) (K / kW) 153.0872516 155.6554825 156.3311364 Rth(c-h) (K / kW) 96.1595842 115.5309581 102.3866587 Max_T_wires (°C) 199.27 206.96 201.57 P_wires (W) 8.9766 8.9295 8.7575

[0041] Table 8 T_case 25℃ 125℃ 175℃ Rcc‘+ee‘ (mΩ) 0.8 1.0875 1.231

[0042] Diode lower bridge (LS): Average data of three Diode chips: Avg_Tj = 152.01℃, Avg_Tc = 120.93℃, Avg_Th = 99.484℃ Diode chip self-heating power: P_chip_total = 623.41W, wire self-heating power: P_wires_total = 26.566W Diode chip thermal resistance: Rth(j-c) = 49.85 K / kW, Rth(c-h) = 34.4 K / kW (only chip as heat source, ignore Top Cu, Solder, wires) When taking a single chip as a standard (the chips are named 1, 2, and 3 from left to right): Diode LS 1 Diode LS 2 Diode LS 3 Avg_Tj (°C) 151.76 158.3 145.97 Max_Tj (°C) 205.93 211.97 204.39 Avg_Tc (°C) 121.32 127.06 114.42 Avg_Th (°C) 100.77 103.45 94.227 P_chip (W) 204.75 206.7 211.96 Rth(j-c) (K / kW) 148.6691087 151.1369134 148.8488394 Rth(c-h) (K / kW) 100.3663004 114.2235123 95.26797509 Max_T_wires (°C) 205.57 211.58 203.97 P_wires (W) 8.6993 8.9119 8.9551

[0043] Table 10

[0044] From the data of Tables 7-10, it can be seen that the average overall junction-to-case thermal resistance Rth(j-c)=50.76 K / kW, the average Rcc’+ee’=1.25875 mΩ at 125℃, and the electrical heat loss in terms of heat dissipation performance and layout is good.

[0045] Preferably, the first epoxy adhesive layer and the second epoxy adhesive layer comprise epoxy adhesive, coupling agent, aluminum oxide, and silver; the mass of the coupling agent is 1%-3% of the mass of the epoxy adhesive; the mass of the aluminum oxide is 20%-25% of the mass of the epoxy adhesive; and the mass of the silver is 3%-5% of the mass of the epoxy adhesive. The epoxy adhesive filled with fillers such as silver and aluminum oxide can achieve high thermal conductivity bonding after curing, while maintaining electrical insulation (to avoid short circuit caused by conductive fillers). Through the compounding of aluminum oxide and a small amount of silver, the thermal conductivity and insulation can be balanced through the synergistic effect. The silane coupling agent can form a chemical bond (such as Si-O-Metal bond) between the epoxy resin and copper, enhancing the interfacial bonding force and reducing thermal stress.

[0046] Preferably, the epoxy resin-based composite layer comprises epoxy resin, reinforcing fiber, silicon dioxide, and boron nitride; the mass ratio of the epoxy resin to the reinforcing material is 2-4:5; the mass of the silicon dioxide is 55wt%-65wt% of the mass of the epoxy resin; and the mass of the boron nitride is 5wt%-15wt% of the mass of the epoxy resin. The addition of thermal conductive fillers such as silicon dioxide and boron nitride in the epoxy resin can adjust the CTE to match the copper substrate and reduce the delamination risk under thermal cycling. Preferably, the mass ratio of the epoxy resin to the reinforcing material is 3:5, the mass of the silicon dioxide is 60wt% of the mass of the epoxy resin, and the mass of the boron nitride is 10wt% of the mass of the epoxy resin. In this way, CTE≈18 ppm / °C, which better matches the copper substrate and reduces the delamination risk under thermal cycling. The reinforcing material can be glass fiber cloth.

[0047] Regarding the thickness of the epoxy resin-based composite layer (insulation layer), there are two general reference indicators: 1. Thermal resistance in the vertical direction. 2. Stress on the bonding surface. (von Mises stress scalar, zz direction normal stress σzz, xz, yz direction shear stress σxz, σyz). As an example, the junction-to-case thermal resistance and the maximum stress on the bonding surface between the insulation layer and the upper copper layer with respect to the thickness of the insulation layer when the IGBT is turned on are obtained through simulation (as shown in Figure 10 The results are shown in Table 7 below. According to the results, when the insulation layer is a special epoxy resin, the thickness of the insulation layer should be within 0.2mm-0.4mm to ensure a small stress impact and an appropriate thermal resistance value. The thicker the thickness, the larger the thermal resistance and the worse the heat dissipation performance; the thinner the thickness, the worse the stress dispersion and release capacity of the insulation layer, which is prone to failure (peeling, cracking, notching, etc.).

[0048] Table 11

[0049] Rth(j-c): junction-to-case thermal resistance calculated with single bridge arm as a whole; VM: Von Mises stress, a scalar value calculated based on stress tensor, used to evaluate the strength and failure of an object under complex stress environment; zz: σzz, normal stress in Z direction acting on the stress analysis infinitesimal on the plane with Z axis as the normal, which can be obtained through the stress tensor matrix; xz: σxz, shear stress in Z direction acting on the stress analysis infinitesimal on the plane with X axis as the normal, which can be obtained through the stress tensor matrix; yz: σyz, shear stress in Z direction acting on the stress analysis infinitesimal on the plane with Y axis as the normal, which can be obtained through the stress tensor matrix.

[0050] The thermal conductivity of ceramic insulation layer (such as Al2O3: 24-30 W / mK) is much higher than that of epoxy resin (0.1-0.5 W / mK). The use of epoxy resin will cause a significant decrease in overall heat dissipation capacity. Therefore, the thickness of the copper layer needs to be adjusted to improve the lateral heat dissipation. For the thickness of the upper bridge copper layer and the lower bridge copper layer arranged integrally, the following needs to be considered: 1. uniformity of lateral temperature distribution at the interface between the upper copper layer and the insulation layer; 2. maximum stress at the interface between the upper copper layer and the solder of the chip.

[0051] For the uniformity of lateral temperature distribution at the interface between the upper copper layer and the insulation layer: the more uniform the lateral temperature distribution, the more the heat dissipation area of each component can be increased as much as possible, which can protect the connection reliability of components and components and prolong the service life of the module. The uniformity of lateral temperature distribution can be quantified by the size of the variance, and the average temperature of the connecting surface between the upper copper layer and the insulation layer can be calculated by the following formula:

[0052] Where S is the contact surface area, and T(x, y) is the temperature value of the contact surface with respect to the coordinates.

[0053] The variance can be calculated by the following formula:

[0054] The corresponding variance with the change of the thickness of the upper copper layer is shown in Table 12 below, and it can be seen that the thicker the thickness, the smaller the variance, that is, the more uniform the lateral temperature distribution.

[0055] Table 12 Thickness (mm) 0.15 0.2 0.25 0.3 0.35 0.4 0.45 Variance (K^2) 282.83 259.30 243.11 230.49 221.84 215.31 209.11 Table 12: Temperature data variance of the interface between the upper copper layer and the insulating layer (2D space plane) under different thicknesses of the upper copper layer. As the thickness increases, the variance becomes smaller, and the temperature distribution becomes more uniform.

[0056] For the maximum stress of the interface between the upper copper layer and the chip solder: the upper copper layer plays a role in dispersing the heat of the chip, so it is crucial to analyze the stress of the interface between the upper copper layer and the chip. Table 13 below is the simulation result of the maximum stress of the interface between the upper copper layer and the chip solder (Von Mises stress).

[0057] Table 13

[0058] Table 13: Maximum Von Mises stress of all stress analysis elements of the interface between the upper copper layer and the solder (2D space plane) under different thicknesses of the upper copper layer.

[0059] From the above results, considering the uniformity of the transverse temperature distribution and the interface stress, the thickness of the upper copper layer is preferably in the range of 0.25-0.35 mm. Further preferably, the thickness of the upper copper layer has a local optimal solution of 0.3 mm in terms of interface stress.

[0060] Another aspect of the embodiment of the present application provides a packaging method for improving the heat dissipation performance of an IGBT power module, comprising the following steps: S1. Surface pretreatment of the copper substrate; S2. Preparation of a prepreg of an epoxy resin-based composite layer; S3. Setting a first epoxy adhesive layer on the upper surface of the copper substrate and a second epoxy adhesive layer on the upper surface of the prepreg of the epoxy resin-based composite layer; S4. Setting the prepreg of the epoxy resin-based composite layer on the first epoxy adhesive layer and setting the integrally arranged upper bridge copper layer and lower bridge copper layer on the second epoxy adhesive layer, and then sequentially performing hot pressing, vacuum lamination and curing; S5. After curing, setting a chip solder layer on the integrally arranged upper bridge copper layer and lower bridge copper layer, and then setting a power chip on the chip solder layer to complete the packaging of the IGBT power module.

[0061] Preferably, the surface pretreatment of the copper substrate comprises the following steps in sequence: S101. Roughening the surface of the copper substrate by chemical etching or mechanical polishing to increase the surface area, form a micro-rough structure, and improve the mechanical interlocking force of the epoxy resin; S102. Acid washing or plasma cleaning the surface of the copper substrate to remove oxides and contaminants on the surface of the copper and ensure close contact between the epoxy resin and the metal; S103. Plating a nickel or silver metal layer on the surface of the copper substrate to improve wettability and enhance the interface bonding strength, while preventing copper oxidation.

[0062] Preferably, the temperature during hot-pressing is 100-200℃, and the pressure is 1-10 MPa.

[0063] Embodiment 1 The packaging structure for improving the heat dissipation performance of the IGBT power module of the embodiment includes, from bottom to top, a copper substrate 1, a first epoxy adhesive layer, an epoxy resin-based composite material layer 2, a second epoxy adhesive layer, an integrally arranged upper bridge copper layer and lower bridge copper layer 3, a chip solder layer 4, and a power chip 5; the power chip 5 includes an upper bridge chip 51 and a lower bridge chip 52; the chip solder layer includes an upper bridge chip solder layer and a lower bridge chip solder layer; the upper bridge chip solder layer is arranged on the upper bridge copper layer, and the upper bridge chip is arranged on the upper bridge chip solder layer; the lower bridge chip solder layer is arranged on the lower bridge copper layer, and the lower bridge chip is arranged on the lower bridge chip solder layer.

[0064] The first epoxy adhesive layer and the second epoxy adhesive layer include epoxy adhesive, coupling agent, aluminum oxide, and silver; the mass of the coupling agent (silane coupling agent KH-560) is 3% of the mass of the epoxy adhesive; the mass of the aluminum oxide is 20% of the mass of the epoxy adhesive; and the mass of the silver is 5% of the mass of the epoxy adhesive.

[0065] The epoxy resin-based composite material layer includes epoxy resin, glass fiber cloth, silicon dioxide, and boron nitride; the mass ratio of the epoxy resin to the glass fiber cloth is 3:5; the mass of the silicon dioxide is 60wt% of the mass of the epoxy resin; and the mass of the boron nitride is 10wt% of the mass of the epoxy resin. The thickness of the epoxy resin-based composite material layer is 0.3mm. The thickness of the integrally arranged upper bridge copper layer and lower bridge copper layer is 0.3mm.

[0066] The packaging method for improving the heat dissipation performance of the IGBT power module of the embodiment includes the following steps: S1. Surface pretreatment of the copper substrate; including: S101. Roughening the surface of the copper substrate by chemical etching or mechanical polishing to increase the surface area, form a micro-rough structure, and improve the mechanical interlocking force of the epoxy resin; S102. Cleaning the surface of the copper substrate by acid washing or plasma cleaning to remove oxides and contaminants on the surface of the copper, and ensure close contact between the epoxy resin and the metal; S103. Plating a nickel or silver metal layer on the surface of the copper substrate to improve wettability and enhance the interface bonding strength, while preventing copper oxidation; S2. Preparing a prepreg of the epoxy resin-based composite material layer; mixing the epoxy resin with silicon dioxide and boron nitride, and pre-impregnating the obtained mixture in glass fiber cloth to form a prepreg of the epoxy resin-based composite material layer; S3. The epoxy glue, coupling agent, aluminum oxide and silver are mixed to obtain an epoxy glue mixture, the epoxy glue mixture is coated on the upper surface of the copper substrate to form a first epoxy glue layer, and the epoxy glue mixture is coated on the upper surface of the prepreg of the epoxy resin-based composite layer to form a second epoxy glue layer; S4. The prepreg of the epoxy resin-based composite layer is arranged on the first epoxy glue layer, the integrally arranged upper bridge copper layer and lower bridge copper layer are arranged on the second epoxy glue layer, when the epoxy resin is not cured, heating is performed to 150 DEG C, and pressurization is performed to 5 MPa, so that the copper substrate is tightly combined, resin flow is promoted, and micro voids are filled; in a vacuum environment, pressurization curing is performed, air bubbles are avoided to be left, and interface uniformity and reliability are improved; S5. After curing is completed, the chip solder layer is arranged on the integrally arranged upper bridge copper layer and lower bridge copper layer, and then the power chip is arranged on the chip solder layer, and the packaging of the IGBT power module is completed.

[0067] Obviously, the above embodiments are only examples for clearly illustrating, and are not limitation to the embodiments. For ordinary skilled in the art, other different forms of changes or variations can be made on the basis of the above description. Here, all the embodiments need not and cannot be exhausted. The changes or variations derived therefrom are still within the protection scope of the present application.

Claims

1. An encapsulation structure for improving heat dissipation performance of an IGBT power module, characterized in that: a copper substrate, a first epoxy adhesive layer, an epoxy resin-based composite material layer, a second epoxy adhesive layer, an integrally arranged upper bridge copper layer and a lower bridge copper layer, a chip solder layer, and a power chip are sequentially arranged from bottom to top; the power chip comprises an upper bridge chip and a lower bridge chip; the chip solder layer comprises an upper bridge chip solder layer and a lower bridge chip solder layer; the upper bridge chip solder layer is arranged on the upper bridge copper layer, and the upper bridge chip is arranged on the upper bridge chip solder layer; the lower bridge chip solder layer is arranged on the lower bridge copper layer, and the lower bridge chip is arranged on the lower bridge chip solder layer.

2. The encapsulation structure for improving heat dissipation performance of an IGBT power module according to claim 1, characterized in that: the first epoxy adhesive layer and the second epoxy adhesive layer comprise epoxy adhesive, coupling agent, aluminum oxide, and silver; the mass of the coupling agent is 1%-3% of the mass of the epoxy adhesive; the mass of the aluminum oxide is 20%-25% of the mass of the epoxy adhesive; and the mass of the silver is 3%-5% of the mass of the epoxy adhesive.

3. The encapsulation structure for improving heat dissipation performance of an IGBT power module according to claim 1, characterized in that: the epoxy resin-based composite material layer comprises epoxy resin, reinforcing fiber, silicon dioxide, and boron nitride; the mass ratio of the epoxy resin to the reinforcing material is 2-4:5; the mass of the silicon dioxide is 55wt%-65wt% of the mass of the epoxy resin; and the mass of the boron nitride is 5wt%-15wt% of the mass of the epoxy resin.

4. The encapsulation structure for improving heat dissipation performance of an IGBT power module according to claim 1, characterized in that: the thickness of the epoxy resin-based composite material layer is 0.2-0.4mm.

5. The encapsulation structure for improving heat dissipation performance of an IGBT power module according to claim 1, characterized in that: the thickness of the integrally arranged upper bridge copper layer and lower bridge copper layer is 0.25-0.35mm. comprising the following steps: S1. Surface pretreatment of the copper substrate; S2. Preparation of a prepreg of the epoxy resin-based composite material layer; S3. Arrangement of a first epoxy adhesive layer on the upper surface of the copper substrate and a second epoxy adhesive layer on the upper surface of the prepreg of the epoxy resin-based composite material layer; S4. Arrangement of the prepreg of the epoxy resin-based composite material layer on the first epoxy adhesive layer and the integrally arranged upper bridge copper layer and lower bridge copper layer on the second epoxy adhesive layer, followed by sequential hot pressing, vacuum lamination, and curing; 6. A packaging method for improving heat dissipation performance of an IGBT power module, characterized by, S5. After completion of the curing, arrangement of a chip solder layer on the integrally arranged upper bridge copper layer and lower bridge copper layer, and then arrangement of a power chip on the chip solder layer to complete the encapsulation of the IGBT power module.

7. The encapsulation method for improving heat dissipation performance of an IGBT power module according to claim 6, characterized in that: the surface pretreatment of the copper substrate comprises the following steps in sequence: S101. Roughening of the surface of the copper substrate by chemical etching or mechanical polishing; S102. Acid washing or plasma cleaning of the surface of the copper substrate; S103. Nickel or silver metal layer plating on the surface of the copper substrate. ​ ​ ​ ​ ​ ​ 8. The packaging method for improving the heat dissipation performance of an IGBT power module according to claim 6, characterized in that: the temperature during the hot pressing is 100-200℃, and the pressure is 1-10MPa.

9. The packaging method for improving the heat dissipation performance of an IGBT power module according to claim 6, characterized in that: the first epoxy adhesive layer and the second epoxy adhesive layer each comprise epoxy adhesive, coupling agent, alumina and silver; the mass of the coupling agent is 1%-3% of the mass of the epoxy adhesive; the mass of the alumina is 20%-25% of the mass of the epoxy adhesive; and the mass of the silver is 3%-5% of the mass of the epoxy adhesive; the epoxy resin-based composite layer comprises epoxy resin, reinforcing fiber, silicon dioxide and boron nitride; the mass ratio of the epoxy resin to the reinforcing material is 2-4:5; the mass of the silicon dioxide is 55wt%-65wt% of the mass of the epoxy resin; and the mass of the boron nitride is 5wt%-15wt% of the mass of the epoxy resin.

10. The packaging method for improving the heat dissipation performance of an IGBT power module according to claim 6, characterized in that: the thickness of the epoxy resin-based composite layer is 0.2-0.4mm; the thickness of the upper bridge copper layer and the lower bridge copper layer is 0.25-0.35mm.

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