Radio frequency test pad and radio frequency test structure

Abstract

The invention relates to the technical field of semiconductor testing, in particular to a radio frequency testing bonding pad and a radio frequency testing structure. The radio frequency test pad comprises a substrate; the connection supporting layer is located on the substrate, and the connection supporting layer comprises a metal layer; the connection ports are located on the connection supporting layer, and the connection ports comprise a grounding port and a signal port; the grounding port is conductively connected through the metal layer; the signal port and the metal layer are not conductive. The signal port and the metal layer are arranged to be non-conductive, so that potential difference between the signal port and a structure below is avoided, parasitic capacitance is inhibited, and the accuracy of radio frequency testing is further improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor testing technology, and in particular to an RF test pad and an RF test structure. Background Technology

[0002] In the process of integrated circuit manufacturing, in order to ensure the quality of integrated circuits, it is often necessary to perform radio frequency (RF) testing on the electronic devices in the integrated circuits in order to obtain the RF parameters of the device under test (DUT).

[0003] When performing RF testing on a device under test (DUT), the DUT is electrically connected to the RF test pads via wires. RF test probes are then used to contact the test ports on the RF test pads to perform the test. However, due to the structural design limitations of the RF test pads, a large parasitic capacitance is generated during RF testing, which reduces the accuracy of the RF test results. Summary of the Invention

[0004] To address the aforementioned technical problems, this application provides an RF test pad and an RF test structure.

[0005] On one hand, embodiments of this application disclose an RF test pad, including:

[0006] Base;

[0007] The connection support layer is located on the substrate, and the connection support layer includes a metal layer;

[0008] The connection port is located on the connection support layer and includes a ground port and a signal port; the ground port is electrically connected through the metal layer; the signal port is not electrically connected to the metal layer.

[0009] In some alternative embodiments, the connection port includes at least two ground ports and at least two signal ports.

[0010] In some optional embodiments, the connection support layer further includes a support layer, the signal port is disposed on the support layer, and the support layer is non-conductive to the metal layer;

[0011] The substrate, metal layer, and support layer are disposed on the substrate.

[0012] In some alternative embodiments, the support layer is made of an insulating material.

[0013] In some alternative embodiments, the support layer is made of metal, and an insulating gap is provided between the metal layer and the support layer.

[0014] In some alternative embodiments, at least two signal ports are at least partially not in contact with the support layer.

[0015] In some alternative embodiments, the insulation gap is an air gap.

[0016] In some alternative embodiments, the insulating space is filled with insulating material.

[0017] In some alternative embodiments, the metal layer and the support layer have the same thickness.

[0018] In some alternative embodiments, the substrate is made of a semiconductor material or an insulating material.

[0019] In some optional embodiments, at least two signal ports include a first signal port and a second signal port, and at least two ground ports include two first ground ports and two second ground ports;

[0020] The first signal port is located between the two first ground ports;

[0021] The second signal port is located between the two second ground ports.

[0022] In some alternative embodiments, the substrate is made of an insulating material, and the metal layer and signal ports are disposed on the substrate.

[0023] On the other hand, embodiments of this application disclose an RF test structure, including: a device under test and an RF test pad; wherein, the RF test pad is the RF test pad as described above.

[0024] In some alternative embodiments, the device under test includes signal terminals, the number of which is the same as the number of signal ports.

[0025] In some alternative embodiments, the device under test includes one or more of a field-effect transistor, a capacitor, a resistor, a diode, and a varactor diode.

[0026] The technical solution has the following technical effects:

[0027] The RF test pads and RF test structure described in this application embodiment achieve conductive connection between ground ports by placing the ground ports on the metal layer, ensuring the consistency of potential of all ground ports and avoiding test errors caused by inconsistent ground port potentials. At the same time, the signal ports are set to be non-conductive with the metal layer, thereby avoiding potential differences between the signal ports and the underlying structure, suppressing the generation of parasitic capacitance, and thus improving the accuracy of RF testing. Attached Figure Description

[0028] To more clearly illustrate the technical solutions and advantages in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the structure of an RF test pad provided in an embodiment of this application;

[0030] Figure 2 This is a schematic diagram of a parasitic capacitance simulation test of an RF test pad provided in an embodiment of this application;

[0031] Figure 3 This is a schematic diagram of a connection port distribution provided in an embodiment of this application;

[0032] Figure 4 This is a schematic diagram of another RF test pad structure provided in an embodiment of this application;

[0033] Figure 5 This is a schematic diagram of a radio frequency test structure provided in an embodiment of this application.

[0034] The following is supplementary explanation of the attached figures:

[0035] 10 - Substrate; 20 - Connection support layer; 21 - Grounding port area; 211 - Metal layer; 22 - Signal port area; 221 - Support layer; 30 - Connection port; 31 - Grounding port; 32 - Signal port. Detailed Implementation

[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0037] It should be noted that the term "an embodiment" or "embodiment" in the specification of the embodiments of this application refers to a specific feature, structure, or characteristic that can be included in at least one implementation of this application. It should be understood that in the specification, claims, and accompanying drawings of the embodiments of this application, the terms "upper," "lower," "top," "bottom," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, in the description of this embodiment, unless otherwise stated, "a plurality of" means two or more. Additionally, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, or product that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices.

[0038] To make the objectives, technical solutions, and advantages disclosed in the embodiments of this application clearer, the embodiments of this application will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the embodiments of this application and are not intended to limit the embodiments of this application.

[0039] In integrated circuits, the capacitance of electronic devices is often small; for example, the capacitance of an inductor is typically only around 20 fF. However, during radio frequency (RF) testing, the parasitic capacitance generated by the RF test pads is often around 40 fF. Related technologies often employ de-embedding methods during RF testing to eliminate the influence of parasitic capacitance and achieve accurate measurement of the RF parameters of the device under test. However, these de-embedding methods usually require multiple measurements, making the testing process cumbersome and resulting in low testing efficiency.

[0040] In view of this, the present application proposes an RF test pad and RF test structure. By setting the ground port on the metal layer to achieve conductive connection between the ground ports, the potential of all ground ports is ensured to be consistent, avoiding test errors caused by inconsistent ground port potentials. At the same time, the signal port is set to be non-conductive with the metal layer, thereby avoiding potential differences between the signal port and the structure below it, suppressing the generation of parasitic capacitance, and thus improving the accuracy of RF testing, achieving accurate measurement of the RF performance of the device under test.

[0041] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an RF test pad provided in an embodiment of this application. Figure 1 As shown, the RF test pad includes a substrate 10, a connection support layer 20 disposed on the substrate 10, and a connection port 30 disposed on the connection support layer 20.

[0042] In this embodiment, the substrate 10 serves as a support structure for the bonding pads, providing support for the connection support layer 20 and the connection port 30. The substrate 10 can be made of a semiconductor material or an insulating material. Optionally, the substrate 10 can be any of commonly used substrates such as silicon substrate, sapphire substrate, silicon carbide substrate, silicon nitride substrate, glass substrate, and polyimide substrate.

[0043] In this embodiment, a connection support layer 20 is disposed on a substrate 10 for connecting and supporting the connection port 30. Specifically, the connection port 30 includes two or more ground ports 31 and two or more signal ports 32. The connection support layer 20 includes a ground port region 21 corresponding to the ground ports 31 and a signal port region 22 corresponding to the signal ports 32. The ground port region 21 includes a metal layer 211 disposed on the substrate 10. Optionally, the metal layer 211 can be made of one or more metals such as aluminum, nickel, copper, tungsten, titanium, silver, and gold. Two or more ground ports 31 are disposed on the metal layer 211, and at least two ground ports 31 are electrically connected through the metal layer 211. That is, each ground port 31 in the connection port 30 is electrically connected to each other through the metal layer 211. This ensures that the potential of all ground ports 31 is consistent during RF testing, thereby avoiding test errors caused by inconsistent ground port 31 potentials.

[0044] It should be noted that the number of metal layers 211 in the grounding port area 21 can be one or multiple layers, which can be selected according to the wiring requirements.

[0045] In this embodiment, the signal port region 22 includes a support layer 221 disposed on the substrate 10. Two or more signal ports 32 are disposed on the support layer 221. During radio frequency testing, the signal ports 32 are connected to the signal input and output terminals of the device under test (DUT) to input radio frequency signals to the DUT and receive signals output by the DUT. If a potential difference exists between the support layer 221 below the signal port 32 and the signal port 32, parasitic capacitance is generated. To avoid this, the support layer 221 and the metal layer 211 can be made non-conductive, thereby preventing a potential difference between the support layer 221 and the signal port 32 and suppressing the generation of parasitic capacitance.

[0046] As an optional implementation, the support layer 221 can be made of an insulating material, thereby achieving non-conductivity between the support layer 221 and the metal layer 211. Optionally, the material of the support layer 221 can be any one of silicon dioxide, silicon nitride, polyimide, photoresist, epoxy molding compound, etc. Optionally, the thickness of the support layer 221 can be the same as or different from the thickness of the metal layer 211. That is, the height of the support layer 221 can be the same as or different from the height of the metal layer 211, depending on the structure of the RF test probe. Generally, the height of the support layer 221 is the same as the height of the metal layer 211, which ensures that the height of the ground port 31 and the signal port 32 are the same, thereby ensuring the uniformity of force on different probes during testing and improving testing efficiency. In addition, the support layer 221 can be in contact with the metal layer 211 or not; this implementation does not impose any restrictions on this.

[0047] As another optional implementation, the support layer 221 can also be made of a conductive material such as metal. To ensure that the support layer 221 and the metal layer 211 are non-conductive, an insulating gap can be provided between the metal layer 211 and the support layer 221. In one optional implementation, the insulating gap is an air gap, that is, the support layer 221 and the metal layer 211 are separated by an air gap. In another optional implementation, the insulating gap is filled with an insulating material, and the support layer 221 and the metal layer 211 are separated by the insulating material. Optionally, the insulating material can be any one of silicon dioxide, silicon nitride, polyimide, photoresist, epoxy molding compound, etc. Optionally, the thickness of the support layer 221 and the thickness of the metal layer 211 can be the same or different. When the thickness of the support layer 221 and the thickness of the metal layer 211 are the same, the height of the support layer 221 and the height of the metal layer 211 are consistent, which can make the height of the ground port 31 and the signal port 32 consistent, thereby ensuring the uniformity of force on different probes during the test and improving the test efficiency. Furthermore, at least two signal ports 32 can be configured to be at least partially non-contacting with the support layer 221. That is, for any given signal port 32, a portion below it is suspended to reduce the contact area between the signal port 32 and the support layer 221, thereby reducing potential parasitic capacitance. In this embodiment, the material of the support layer 221 can be the same as that of the metal layer 211. When fabricating the RF test pads, the support layer 221 can be fabricated together with the metal layer 211. Then, an isolation trench is etched between the ground port area 21 and the signal port area 22, and the isolation trench is filled with insulating material, or the isolation trench can be directly used as an insulating spacer, thus obtaining the metal layer 211 and the support layer 221. Through the above methods, the fabrication complexity and cost of the RF test pads can be reduced.

[0048] In the embodiments of this application, Figure 2 This is a schematic diagram of a parasitic capacitance simulation test of an RF test pad provided in an embodiment of this application, wherein... Figure 2 a represents the parasitic capacitance (C) of the entire RF test pad. Figure 2 b represents the parasitic capacitance (Csub) between signal port 32 and substrate 10 in the RF test pad. Figure 2 a and Figure 2 In curve b, curve A corresponds to the parasitic capacitance curve obtained when the RF test pad is made of metal for the support layer 221 and no insulating gap is set between the metal layer 211 and the support layer 221. Curve B corresponds to the parasitic capacitance curve obtained when the RF test pad is made of metal for the support layer 221 and an air gap is used as the insulating gap between the metal layer 211 and the support layer 221. From Figure 2As can be seen, after using an air gap as the insulation interval between the metal layer 211 and the support layer 221, the overall parasitic capacitance (C) of the RF test pad and the parasitic capacitance (Csub) between the signal port 32 and the substrate 10 are significantly reduced. When the RF test signal is 20 GHz, compared to the RF test pad without an insulation interval, the overall parasitic capacitance (C) of the RF test pad using an air gap as the insulation interval between the metal layer 211 and the support layer 221 is reduced by approximately 49.6%. This demonstrates that the above design can significantly reduce the parasitic capacitance of the RF test pad, thereby improving the accuracy of the RF test results.

[0049] In this embodiment, the connection port 30 typically includes one input port group and one output port group. Radio frequency signals are input from the input port group, pass through the device under test, and are output from the output port group. The input port group includes at least one ground port 31 and at least one signal port 32; similarly, the output port group also includes at least one ground port 31 and at least one signal port 32. Generally, the number of ground ports 31 and the number of signal ports 32 in the input port group and the output port group are the same.

[0050] In this embodiment, ground port 31 is used to connect to the ground connection terminal of the device under test (DUT), and signal port 32 is used to connect to the signal connection terminal of the DUT. Depending on the structure of the RF test probe, signal port 32 and ground port 31 need to be arranged in a preset manner to achieve matching with the RF test probe. As an example, Figure 3 This is a schematic diagram of the distribution of connection ports 30 provided in an embodiment of this application, as shown below. Figure 3 As shown, at least two signal ports 32 include a first signal port 32 and a second signal port 32, and at least two ground ports 31 include two first ground ports 31 and two second ground ports 31. The first signal port 32 is disposed between the two first ground ports 31, and the second signal port 32 is disposed between the two second ground ports 31.

[0051] In other words, for input port groups or output port groups, signal port 32 and ground port 31 are arranged in a preset manner. For example, taking an input port group as an example, if the input port group includes one ground port 31 and one signal port 32, the port arrangement can be ground port 31-signal port 32 (GS). If the input port group includes two ground ports 31 and one signal port 32, the port arrangement can be ground port 31-signal port 32-ground port 31 (GSG). If the input port group includes two ground ports 31 and two signal ports 32, the port arrangement can be ground port 31-signal port 32-signal port 32-ground port 31 (GSSG). If the input port group includes three ground ports 31 and two signal ports 32, the port arrangement can be ground port 31-signal port 32-ground port 31-signal port 32-ground port 31 (GSGSG).

[0052] This application also provides another type of RF test pad. Figure 4 This is a schematic diagram of another RF test pad structure provided in an embodiment of this application, as shown below. Figure 4 As shown, the RF test pad includes a substrate 10, a connection support layer 20 disposed on the substrate 10, and connection ports 30 disposed on the connection support layer 20. The connection ports 30 include at least two ground ports 31 and at least two signal ports 32. The connection support layer 20 includes a ground port region 21, which includes a metal layer 211. At least two ground ports 31 are disposed on the metal layer 211 and are electrically connected through the metal layer 211. The substrate 10 is made of an insulating material, and the metal layer 211 and signal ports 32 are disposed on the substrate 10, and neither the metal layer 211 nor the signal ports 32 are conductive.

[0053] like Figure 1 and Figure 4 As shown, with Figure 1 The RF test pads shown are different, Figure 4In the RF test pad shown, no support layer 221 is provided below the signal port 32; the signal port 32 is directly disposed on the substrate 10. To avoid signal loss during testing, the substrate 10 can be made of an insulating material, such as sapphire, silicon nitride, glass, or polyimide. Simultaneously, the metal layer 211 is non-conductive with the signal port 32, thus ensuring the stability of the test signal. Optionally, an insulating gap is provided between the metal layer 211 and the signal port 32. In one optional embodiment, the insulating gap is an air gap, meaning the metal layer 211 and the signal port 32 are separated by an air gap. In another optional embodiment, the insulating gap is filled with insulating material, and the metal layer 211 and the signal port 32 are separated by the insulating material. Optionally, the insulating material can be any of silicon dioxide, silicon nitride, polyimide, photoresist, or epoxy molding compound. Through the above method, the ground port 31 can be connected using only a single metal layer 211, thereby reducing the processing difficulty of the RF test pad. Meanwhile, since the signal port 32 is directly mounted on the substrate 10, the overall size of the RF test pad can be reduced without shrinking the signal port 32.

[0054] This application also provides an RF test structure, which includes a device under test (DUT) and RF test pads. The RF test pads are those described above. For details on the specific implementation of the RF test pads, please refer to all the embodiments described above; further details will not be repeated here.

[0055] In this embodiment, the device under test can be an active or passive device formed on a semiconductor substrate, such as a field-effect transistor, inductor, capacitor, resistor, diode, varactor diode, amplifier, and other electronic devices. The device under test includes signal connection terminals, the number of which is the same as the number of signal ports 32. As an example, Figure 5 This is a schematic diagram of a radio frequency test structure provided in an embodiment of this application, as shown below. Figure 5 As shown, in this RF test structure, the device under test includes a first signal connection terminal and a second signal connection terminal. The RF test pad includes a port group consisting of two ground ports 31(G), a signal port 32(S), and a ground port 31(G). The first and second signal connection terminals are respectively connected to the two signal ports 32 in the RF test pad via metal wires. The four ground ports 31 in the RF test pad are electrically connected through the underlying metal layer 211 and connected to ground via wires. The RF test probes include two sets of probes that match the RF test pad. The tips of the two sets of probes respectively abut against the corresponding port groups in the RF test pad, thereby realizing the RF test of the device under test.

[0056] The RF test structure described in this application includes the aforementioned RF test pad. Since the ground port 31 in the RF test pad is disposed on the metal layer 211, conductive connection between the ground ports 31 can be achieved, ensuring the consistency of the potential of all ground ports 31 and avoiding test errors caused by inconsistent potential of the ground ports 31. At the same time, the signal port 32 in the RF test pad is disposed on the support layer 221, and the support layer 221 and the metal layer 211 are not conductive, thereby avoiding potential difference between the support layer 221 and the signal port 32, suppressing the generation of parasitic capacitance, and thus improving the accuracy of RF testing.

[0057] It should be noted that the order of the embodiments described above is merely for descriptive purposes and does not represent the superiority or inferiority of the embodiments. Furthermore, specific embodiments have been described above. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps described in the claims can be performed in a different order than that shown in the embodiments and still achieve the desired result. Additionally, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0058] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the device embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0059] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk.

[0060] The above description is only a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. An RF test pad, characterized in that, include: Base; A connection support layer is located on the substrate, and the connection support layer includes a metal layer; The connection port is located on the connection support layer, and the connection port includes a ground port and a signal port; the ground port is electrically connected through the metal layer. The signal port is not conductive to the metal layer.

2. The RF test pad according to claim 1, characterized in that, The connection ports include at least two grounding ports and at least two signal ports.

3. The RF test pad according to claim 1 or 2, characterized in that, The connection support layer further includes a support layer, the signal port is disposed on the support layer, and the support layer and the metal layer are non-conductive.

4. The RF test pad according to claim 3, characterized in that, The support layer is made of insulating material.

5. The RF test pad according to claim 3, characterized in that, The support layer is made of metal, and an insulating gap is provided between the metal layer and the support layer.

6. The RF test pad according to claim 5, characterized in that, The signal port is at least partially not in contact with the support layer.

7. The RF test pad according to claim 5 or 6, characterized in that, The insulation gap is an air gap.

8. The RF test pad according to claim 5, characterized in that, The insulating space is filled with insulating material.

9. The RF test pad according to claim 3, characterized in that, The metal layer has the same thickness as the support layer.

10. The RF test pad according to claim 1, characterized in that, The substrate is made of semiconductor material or insulating material.

11. The RF test pad according to claim 3, characterized in that, At least two of the signal ports include a first signal port and a second signal port, and at least two ground ports include two first ground ports and two second ground ports; The first signal port is located between the two first ground ports; The second signal port is located between the two second ground ports.

12. The RF test pad according to claim 1 or 2, characterized in that, The substrate is made of insulating material, and the metal layer and the signal port are disposed on the substrate.

13. A radio frequency test structure, characterized in that, include: The device under test and the RF test pad; wherein the RF test pad is the RF test pad as described in any one of claims 1 to 12.

14. The radio frequency test structure according to claim 13, characterized in that, The device under test includes signal connection terminals, and the number of signal connection terminals is the same as the number of signal ports.

15. The radio frequency test structure according to claim 13 or 14, characterized in that, The device under test includes one or more of the following: field-effect transistor, capacitor, resistor, diode, and varactor diode.

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