Antenna packaging structure, preparation method thereof and terminal
By using a fan-out packaging method and conductive post connection, the miniaturization and simplified manufacturing of the antenna packaging structure are achieved, solving the problems of large size and complexity in existing technologies.
Patent Information
- Application Number
- CN202410570321.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-09
- Publication Date
- 2025-11-11
AI Technical Summary
Existing antenna packaging structures are large in size and complex to manufacture.
The fan-out packaging method integrates the coplanar waveguide, chip, and antenna together, achieving electrical connection through conductive pillars and maintaining distance through two layers of package support, resulting in a compact structure and small package size.
This has enabled the miniaturization of the antenna packaging structure and simplified the manufacturing process, reducing manufacturing complexity.
Smart Images
Figure CN120933634A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of packaging, and more particularly to an antenna packaging structure, its manufacturing method, and a terminal thereof. Background Technology
[0002] Encapsulated antennas are a technology that integrates antennas and chips within a package to achieve system-level wireless functionality, based on packaging materials and processes. However, existing antenna packaging structures are large in size and complex to manufacture. Summary of the Invention
[0003] This invention provides an antenna packaging structure, comprising:
[0004] A redistributed circuit layer, wherein a reflector is provided in the redistributed circuit layer;
[0005] The first package is located on the redistributed circuit layer;
[0006] At least two conductive pillars are located within the first package, and each of the conductive pillars penetrates two opposite surfaces of the first package.
[0007] A coplanar waveguide is located on the surface of the first package away from the redistribution layer, and the coplanar waveguide is electrically connected to the reflector through one of the at least two conductive pillars;
[0008] The chip is located on the side of the first package away from the redistribution layer. The chip is spaced apart from the coplanar waveguide and is electrically connected to the redistribution layer through another of the at least two conductive pillars.
[0009] A second package is located on the side of the first package away from the redistributed circuit layer, and the second package encapsulates the coplanar waveguide and the chip; and
[0010] An antenna is located on the surface of the second package that is away from the first package, and the antenna is aligned with the coplanar waveguide.
[0011] This antenna packaging structure adopts a fan-out packaging method, which packages the coplanar waveguide, chip and antenna together. The coplanar waveguide and reflector are electrically connected through conductive pillars. The first package supports the coplanar waveguide and maintains the distance between the coplanar waveguide and the reflector. The second package maintains the distance between the coplanar waveguide and the antenna. The structure is compact and the package size is small.
[0012] This invention also provides a method for fabricating an antenna packaging structure, comprising:
[0013] A redistribution layer is provided, wherein a reflector is provided in the redistribution layer;
[0014] A first package is formed on the redistributed circuit layer, and at least two conductive pillars are formed in the first package, wherein each of the conductive pillars penetrates two opposite surfaces of the first package.
[0015] A coplanar waveguide is formed on the surface of the first package away from the redistribution layer, and the coplanar waveguide is electrically connected to the reflector through one of the at least two conductive pillars;
[0016] A chip is formed on the side of the first package away from the redistribution layer. The chip is spaced apart from the coplanar waveguide and is electrically connected to the redistribution layer through another of the at least two conductive pillars.
[0017] A second package is formed on the side of the first package away from the redistribution layer, and the second package encapsulates the coplanar waveguide and the chip; and
[0018] An antenna is formed on the surface of the second package that is away from the first package, and the antenna is aligned with the coplanar waveguide.
[0019] The fabrication method of this antenna packaging structure reduces the manufacturing complexity by using a two-layer fan-out packaging process combined with the processing of conductive pillars inside the package.
[0020] This invention also provides a terminal, which includes a circuit board and an antenna packaging structure electrically connected to the circuit board, wherein the antenna packaging structure is the antenna packaging structure described above.
[0021] Because the terminal includes the aforementioned antenna packaging structure, it is advantageous for miniaturization and also has the benefit of simplifying the manufacturing process. Attached Figure Description
[0022] Figure 1 This is a cross-sectional schematic diagram of the antenna packaging structure according to an embodiment of the present invention.
[0023] Figure 2 This is a schematic flowchart illustrating the fabrication method of the antenna packaging structure provided in an embodiment of the present invention.
[0024] Figure 3 for Figure 2 A schematic diagram of the redistribution layer provided in step S1.
[0025] Figure 4 In order to be in Figure 3 The diagram shows a first package formed on the redistribution layer.
[0026] Figure 5 In order to be in Figure 4 The diagram shows a conductive pillar formed within the first package.
[0027] Figure 6 In order to be in Figure 3 The diagram shows a schematic of conductive pillars formed on the redistributed circuit layer.
[0028] Figure 7 In order to be in Figure 6 The diagram shows the encapsulation formed on the redistribution layer.
[0029] Figure 8 To be Figure 7 The encapsulation portion shown is removed to obtain a schematic diagram of the first encapsulation.
[0030] Figure 9 In order to be in Figure 5 The diagram shows a metal pad and a coplanar waveguide formed on the first package.
[0031] Figure 10 In order to be in Figure 9 The diagram shows a chip formed on a metal pad.
[0032] Figure 11 In order to be in Figure 10 The diagram shows the second package formed on the first package.
[0033] Figure 12 In order to be in Figure 11 The diagram shows an antenna formed on the second package.
[0034] Figure 13 To be Figure 12 The diagram shown is a schematic of the substrate after removal.
[0035] Figure 14 In order to be in Figure 13 The diagram shows the antenna packaging structure obtained after forming a conductor on the redistribution layer.
[0036] Figure 15 This is a cross-sectional schematic diagram of the terminal according to an embodiment of the present invention.
[0037] Explanation of main component symbols
[0038] Antenna packaging structure 100
[0039] Relay line layer 10
[0040] First wiring layer 11
[0041] First dielectric layer 111
[0042] First metal layer 112
[0043] Second wiring layer 12
[0044] Second dielectric layer 121
[0045] Second metal layer 122
[0046] Carrier plate 13
[0047] Peel layer 14
[0048] Reflector 20
[0049] First package 32
[0050] Package 33
[0051] Second package 34
[0052] Conductive post 40
[0053] Coplanar waveguide 50
[0054] Metal pad 60
[0055] Chip 70
[0056] Antenna 80
[0057] Conductor 90
[0058] Circuit board 200
[0059] Terminal 300
[0060] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation
[0061] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0062] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
[0063] To further illustrate the technical means and effects adopted by the present invention to achieve its intended purpose, the present invention will be described in detail below with reference to the accompanying drawings and preferred embodiments.
[0064] Figure 1 This is a cross-sectional schematic diagram of the antenna packaging structure 100 according to an embodiment of the present invention. Figure 1As shown, the antenna package structure 100 includes a redistributed circuit layer 10, a first package 32, a conductive pillar 40, a coplanar waveguide 50 (CPW), a chip 70, a second package 34, and an antenna 80.
[0065] A reflector 20 is disposed in the redistribution layer 10. A first package 32 is located on the redistribution layer 10. At least two conductive posts 40 are provided. The conductive posts 40 are located within the first package 32. Each conductive post 40 penetrates two opposite surfaces of the first package 32. A coplanar waveguide 50 is located on the surface of the first package 32 away from the redistribution layer 10. The coplanar waveguide 50 is electrically connected to the reflector 20 through one of the at least two conductive posts 40. A chip 70 is located on the side of the first package 32 away from the redistribution layer 10. The chip 70 is spaced apart from the coplanar waveguide 50 and is electrically connected to the redistribution layer 10 through the other of the at least two conductive posts 40. A second package 34 is located on the side of the first package 32 away from the redistribution layer 10. The second package 34 encloses the coplanar waveguide 50 and the chip 70. An antenna 80 is located on the surface of the second package 34 away from the first package 32. The antenna 80 is aligned with the coplanar waveguide 50.
[0066] The antenna packaging structure 100 adopts a fan-out packaging method to package the coplanar waveguide 50, chip 70 and antenna 80 together. The coplanar waveguide 50 and reflector 20 are electrically connected through conductive pillars 40. The first package 32 supports the coplanar waveguide 50 and maintains the distance between the coplanar waveguide 50 and reflector 20. The second package 34 maintains the distance between the coplanar waveguide 50 and antenna 80. The structure is compact and the package size is small.
[0067] In some embodiments, the antenna package structure 100 further includes a metal pad 60. The metal pad 60 is located on the surface of the first package 32 away from the redistribution layer 10 and spaced apart from the coplanar waveguide 50. The metal pad 60 is electrically connected to the redistribution layer 10 via another of the at least two conductive posts 40. The metal pad 60 serves as a ground plane for the antenna 80.
[0068] In some embodiments, the redistribution layer 10 includes a first redistribution layer 11 and a second redistribution layer 12 disposed on the first redistribution layer 11. The second redistribution layer 12 is electrically connected to the first redistribution layer 11. The reflector 20 is located in the second redistribution layer 12 and is electrically connected to the first redistribution layer 11. The first package 32 is located on the second redistribution layer 12. One conductive post 40 is located on the reflector 20, and another conductive post 40 is located on the second redistribution layer 12.
[0069] In some embodiments, the antenna packaging structure 100 further includes a conductor 90 located on the surface of the redistribution layer 10 away from the first package 32 and electrically connected to the redistribution layer 10.
[0070] In some embodiments, the first package 32 and the second package 34 are made of the same material to improve the warping problem caused by different materials.
[0071] Figure 2 This is a schematic flowchart illustrating the fabrication method of the antenna packaging structure 100 provided in an embodiment of the present invention. Figure 2 As shown, the method for fabricating the antenna packaging structure 100 includes the following steps.
[0072] Step S1: Provide a redistribution layer 10. A reflector 20 is provided in the redistribution layer 10.
[0073] like Figure 3 As shown, a carrier board 13 is provided, on which a redistribution layer 10 is formed.
[0074] In some embodiments, the carrier 13 is any carrier suitable for semiconductor packaging, such as glass, silicon wafer, sapphire, etc.
[0075] In some embodiments, a release layer 14 is formed on the carrier plate 13. The material of the release layer 14 may be any material suitable for bonding the carrier plate 13 to an upper layer disposed on the carrier plate 13 and for peeling the carrier plate 13 from the upper layer.
[0076] In some embodiments, the release layer 14 may include a dielectric material layer made of a dielectric material, including any suitable polymer-based dielectric material. For example, benzocyclobutene (BCB) or polybenzoxazole (PBO).
[0077] In some embodiments, the release layer 14 may include a dielectric material layer made of an epoxy resin-based heat-releasing material that loses its adhesiveness when heated, such as a light-to-heat-conversion (LTHC) release coating.
[0078] In some embodiments, the release layer 14 may comprise a dielectric material layer made of UV adhesive that loses its adhesiveness when exposed to ultraviolet (UV) light. In some embodiments, the release layer 14 may be, for example, an LTHC layer with good chemical resistance, and such a layer can be peeled off from the carrier 13 at room temperature by applying laser radiation, but is not limited thereto.
[0079] In some embodiments, a redistribution layer 10 is formed on the stripping layer 14. Forming the redistribution layer 10 includes forming a first redistribution layer 11 and forming a second redistribution layer 12 on the first redistribution layer 11. The second redistribution layer 12 is electrically connected to the first redistribution layer 11, and the reflector 20 is located in the second redistribution layer 12 and electrically connected to the first redistribution layer 11. The surfaces of the reflector 20, the second dielectric layer 121, and the second metal layer 122 that are furthest from the first dielectric layer 111 are flush with each other.
[0080] Figure 3 In this configuration, the first redistribution layer 11 includes a first dielectric layer 111 and a first metal layer 112. The second redistribution layer 12 includes a second dielectric layer 121 and a second metal layer 122. The first dielectric layer 111 and the second dielectric layer 121 are stacked, and the first metal layer 112 and the second metal layer 122 are stacked. A reflector 20 is formed in the second redistribution layer 12 and exposed in an opening in the second dielectric layer 121. The top surface of the second metal layer 122 is also exposed in an opening in the second dielectric layer 121.
[0081] Figure 3 In this embodiment, the redistribution layer 10 includes two dielectric layers and two metal layers. In other embodiments, the number of dielectric layers and metal layers is not limited to this, and there may be one or more.
[0082] In some embodiments, the materials of the first dielectric layer 111 and the second dielectric layer 121 may be polyimide, BCB, PBO, nitrides such as silicon nitride, oxides such as silicon oxide, phosphosilicate glass (PSG), borosilicate glass (BSG), boron-doped phosphosilicate glass (BPSG), etc.
[0083] In some embodiments, the materials of the first dielectric layer 111 and the second dielectric layer 121 are formed using suitable fabrication techniques, such as spin-on coating, chemical vapor deposition (CVD), and plasma-enhanced chemical vapor deposition (PECVD), but are not limited thereto. The first dielectric layer 111 and the second dielectric layer 121 may be patterned using photolithography and etching processes.
[0084] In some embodiments, the first metal layer 112 and the second metal layer 122 may be made of a conductive material (e.g., aluminum, titanium, copper, nickel, tungsten, or alloys thereof) formed by electroplating or deposition. The first metal layer 112 and the second metal layer 122 may be patterned using photolithography and etching processes. In some embodiments, the first metal layer 112 and the second metal layer 122 may be patterned copper layers or other suitable patterned metal layers.
[0085] In some embodiments, the reflector 20 is made of metal or metal alloy and other materials suitable for reflecting signals, such as aluminum, copper, tungsten, nickel, or combinations thereof. In some embodiments, the reflector 20, the first metal layer 112, and the second metal layer 122 may be made of the same material.
[0086] In some embodiments, the reflector 20 may be rectangular, circular, or other geometric shapes. The reflector 20 is used to reflect signals from an active circuit.
[0087] Step S2: A first package 32 is formed on the redistribution layer 10, and at least two conductive pillars 40 are formed within the first package 32. The order in which the first package 32 and the at least two conductive pillars 40 are formed is not limited.
[0088] In one embodiment, such as Figure 4 and Figure 5 As shown, a first package 32 can be formed first, followed by at least two conductive pillars 40. Figure 4 As shown, the first package 32 is located on the second redistribution layer 12.
[0089] In some embodiments, the first package 32 can be injection molded. In other embodiments, the first package 32 can be molded.
[0090] In some embodiments, the first package 32 is a dielectric material or other suitable material having low dielectric constant (Dk) and low dielectric loss (Df) properties. The lower the dielectric constant of the first package 32, the higher the signal transmission rate; the lower the dielectric loss, the less signal loss caused by the first package 32. The material of the first package 32 may be, for example, epoxy molding compound (EMC), acrylonitrile butadiene styrene (ABS), polycarbonate (PC), polyethylene terephthalate (PET), polyimide, etc.
[0091] like Figure 5 As shown, at least two conductive pillars 40 are formed within the first package 32. Each conductive pillar 40 extends through two opposite surfaces of the first package 32. One of the at least two conductive pillars 40 is located on the reflector 20. The other of the at least two conductive pillars 40 is located on the second redistribution layer 12 and connected to the second metal layer 122. The end faces of the two conductive pillars 40 away from the redistribution layer 10 are exposed from the first package 32 and are flush with the end faces of the first package 32. In other words, the top surfaces of the conductive pillars 40 and the top surfaces of the first package 32 are substantially coplanar.
[0092] In some embodiments, the conductive pillar 40 may be formed by photolithography, plating, or any other suitable method. Plating may include electroplating, electroless plating, etc.
[0093] In one embodiment, the material of the conductive post 40 may include a metallic material, such as copper or a copper alloy, but is not limited thereto.
[0094] In another embodiment, at least two conductive pillars 40 are first formed (e.g., Figure 6 As shown), a package 33 is then formed to cover the conductive pillar 40 (as shown). Figure 7 (as shown), and then by removing a portion of the package 33 away from the second redistribution layer 12, a first package 32 exposing the conductive pillars 40 is obtained (as shown). Figure 8 (As shown). Figure 6 In this process, the conductive pillar 40 can be formed by photolithography, plating or any other suitable method. Figure 7 In the middle, the package 33 can be injection molded or molded. Figure 8 In this process, the portion of the package 33 that is far from the redistribution layer 10 can be removed by grinding to expose the end face of the conductive post 40.
[0095] Step S3: A coplanar waveguide 50 is formed on the surface of the first package 32 away from the redistribution layer 10.
[0096] like Figure 9 As shown, the coplanar waveguide 50 is electrically connected to the reflector 20 via one of the at least two conductive posts 40. The coplanar waveguide 50 is aligned with the reflector 20, and along the thickness direction of the first package 32, the projection of the coplanar waveguide 50 onto the redistribution layer 10 falls within the reflector 20. The first package 32 supports the coplanar waveguide 50 and maintains a certain distance between the coplanar waveguide 50 and the reflector 20.
[0097] In some embodiments, step S3 further includes forming a metal pad 60.
[0098] like Figure 9 As shown, the metal pad 60 is located on the surface of the first package 32 away from the redistribution layer 10. The metal pad 60 is spaced apart from the coplanar waveguide 50. The metal pad 60 is electrically connected to the redistribution layer 10 via another of the at least two conductive posts 40.
[0099] In some embodiments, the coplanar waveguide 50 is made of a metal or metal alloy, such as copper or a copper alloy. The metal pad 60 is made of a metal or metal alloy, such as copper or a copper alloy. In some embodiments, the coplanar waveguide 50 and the metal pad 60 are made of the same material and can be formed in the same patterning step to simplify the fabrication process.
[0100] Step S4: A chip 70 is formed on the side of the first package 32 away from the redistribution layer 10.
[0101] like Figure 10 As shown, the chip 70 is located on the metal pad 60 and is spaced apart from the coplanar waveguide 50. The chip 70 is electrically connected to the redistributed circuit layer 10 through the metal pad 60 and the conductive post 40.
[0102] Figure 10 In this diagram, only one chip 70 is schematically shown. Furthermore, since resonance is required between the coplanar waveguide 50 and the reflector 20, the chip 70 is spaced apart from the coplanar waveguide 50 to avoid affecting their resonance. In other words, along the thickness direction of the first package 32, the projection of the chip 70 onto the first package 32 does not overlap with either the coplanar waveguide 50 or the reflector 20.
[0103] In some embodiments, chip 70 may be a wireless radio frequency (RF) chip.
[0104] In some embodiments, there may be multiple chips 70, and the multiple chips 70 may be chips of the same type or different types. For example, in addition to including at least one wireless radio frequency chip, it may also include chips of the same or different types as the following chips: digital chips, analog chips or mixed-signal chips, application-specific integrated circuit (ASIC) chips, sensor chips, memory chips, logic chips or voltage regulator chips.
[0105] Step S5: A second package 34 is formed on the side of the first package 32 away from the redistribution layer 10.
[0106] like Figure 11 As shown, the second package 34 encapsulates the coplanar waveguide 50, the metal pad 60, and the chip 70. In some embodiments, the material of the second package 34 can be a dielectric material with low dielectric constant (Dk) and low dielectric loss (Df) properties, or other suitable materials. The lower the dielectric constant of the second package 34, the higher the signal transmission rate; the lower the dielectric loss, the less signal loss caused by the second package 34. The material of the second package 34 may be, for example, EMC, ABS, PC, PET, polyimide, etc.
[0107] In some embodiments, the first package 32 and the second package 34 are made of the same material to avoid warping problems between different materials.
[0108] Step S6: An antenna 80 is formed on the surface of the second package 34 away from the first package 32.
[0109] like Figure 12 As shown, the antenna 80 is aligned with the coplanar waveguide 50. The second package 34 is located between the antenna 80 and the coplanar waveguide 50 to maintain the spacing between them. Along the thickness direction of the first package 32, the projection of the antenna 80 onto the first package 32 falls within the area of the coplanar waveguide 50 and the reflector 20. Furthermore, along the thickness direction of the first package 32, the projection of the chip 70 onto the first package 32 does not overlap with the antenna 80, the coplanar waveguide 50, or the transmitter, to avoid the chip 70 affecting the resonance of the coplanar waveguide 50 and the reflector 20.
[0110] In some embodiments, the number of antennas 80 may be one or more. The material of the antennas 80 may be selected from aluminum, titanium, copper, nickel, tungsten, or alloys thereof.
[0111] In some embodiments, the antenna 80 is formed by the following steps: forming a metallization layer (not shown) by electroplating or deposition on the second package 34 and then patterning the metallization layer by photolithography and etching processes. In an alternative embodiment, the antenna 80 is formed by forming a metallization layer (not shown) by a plating process.
[0112] In some embodiments, the method further includes forming a conductor 90 on the surface of the redistribution layer 10 away from the first package 32. The conductor 90 is electrically connected to the redistribution layer 10 to achieve an electrical connection between the redistribution layer 10 and an external circuit.
[0113] Specifically, such as Figure 13 As shown, the carrier board 13 is separated from the redistribution layer 10 by a stripping process, and the carrier board 13 and the stripping layer 14 are removed. After the carrier board 13 is removed, the first redistribution layer 11 is exposed.
[0114] In some embodiments, the stripping process uses ultraviolet light irradiation. In other embodiments, the stripping process is a laser stripping process.
[0115] like Figure 14 As shown, multiple conductors 90 are formed on the redistribution layer 10 to obtain the antenna packaging structure 100. Figure 14 The diagram only schematically shows two conductors 90. One conductor 90 is electrically connected to the chip 70 through the first metal layer 112, the second metal layer 122, the conductive pillar 40, and the metal pad 60. The other conductor 90 is electrically connected to the coplanar waveguide 50 through the first metal layer 112, the reflector 20, and the conductive pillar 40. It can be understood that the number of conductors 90 is not limited to this.
[0116] In some embodiments, the conductor 90 is, for example, a solder ball, a ball grid array (BGA) ball, a stud, a conductive post, etc.
[0117] The method for fabricating this antenna package structure 100 utilizes a two-layer fan-out packaging process, combined with the fabrication of conductive pillars 40 within the package, to encapsulate the antenna 80, coplanar waveguide 50, reflector 20, and chip 70 together, simplifying manufacturing complexity and reducing manufacturing costs. Furthermore, if the first package 32 and the second package 34 are made of the same material, warping problems caused by different materials can be reduced.
[0118] Figure 15 This is a cross-sectional schematic diagram of the terminal 300 according to an embodiment of the present invention. Figure 15 As shown, the terminal 300 includes an antenna package structure 100 and a circuit board 200. The conductors 90 of the circuit board 200 and the antenna package structure 100 are electrically connected. The antenna package structure 100 is used to receive and transmit electromagnetic waves to realize the communication function of the terminal 300.
[0119] In some embodiments, the circuit board 200 is, for example, a motherboard. The terminal 300 can be a mobile phone, tablet computer, etc.
[0120] Since the terminal 300 includes an antenna packaging structure 100, it is conducive to its miniaturization design and also has the advantage of simplifying the manufacturing process.
[0121] The above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention.
Claims
1. An antenna packaging structure, characterized in that, include: A redistributed circuit layer, wherein a reflector is provided in the redistributed circuit layer; The first package is located on the redistributed circuit layer; At least two conductive pillars are located within the first package, and each of the conductive pillars penetrates two opposite surfaces of the first package. A coplanar waveguide is located on the surface of the first package away from the redistribution layer, and the coplanar waveguide is electrically connected to the reflector through one of the at least two conductive pillars; The chip is located on the side of the first package away from the redistribution layer. The chip is spaced apart from the coplanar waveguide and is electrically connected to the redistribution layer through another of the at least two conductive pillars. The second package is located on the side of the first package away from the redistribution layer, and the second package encapsulates the coplanar waveguide and the chip. as well as An antenna is located on the surface of the second package that is away from the first package, and the antenna is aligned with the coplanar waveguide.
2. The antenna packaging structure according to claim 1, characterized in that, The antenna packaging structure also includes a metal pad; The metal pad is located on the surface of the first package away from the redistributed circuit layer and is spaced apart from the coplanar waveguide. The metal pad is electrically connected to the redistributed circuit layer via another of the at least two conductive posts; The metal pad serves as the antenna ground plane.
3. The antenna packaging structure according to claim 1, characterized in that, The redistribution layer includes a first redistribution layer and a second redistribution layer disposed on the first redistribution layer; the second redistribution layer is electrically connected to the first redistribution layer; The reflector is located in the second rewiring layer and is electrically connected to the first rewiring layer; The first package is located on the second redistribution layer.
4. The antenna packaging structure according to claim 3, characterized in that, One of the at least two conductive pillars is located on the reflector, and the other of the at least two conductive pillars is located on the second redistribution layer.
5. The antenna packaging structure according to claim 1, characterized in that, The antenna packaging structure further includes a conductor located on the surface of the redistribution layer away from the first package body and electrically connected to the redistribution layer.
6. The antenna packaging structure according to claim 1, characterized in that, The first package and the second package are made of the same material.
7. A method for fabricating an antenna packaging structure, characterized in that, include: A redistribution layer is provided, wherein a reflector is provided in the redistribution layer; A first package is formed on the redistributed circuit layer, and at least two conductive pillars are formed in the first package, wherein each of the conductive pillars penetrates two opposite surfaces of the first package. A coplanar waveguide is formed on the surface of the first package away from the redistribution layer, and the coplanar waveguide is electrically connected to the reflector through one of the at least two conductive pillars; A chip is formed on the side of the first package away from the redistribution layer. The chip is spaced apart from the coplanar waveguide and is electrically connected to the redistribution layer through another of the at least two conductive pillars. A second package is formed on the side of the first package away from the redistribution layer, and the second package encapsulates the coplanar waveguide and the chip; and An antenna is formed on the surface of the second package that is away from the first package, and the antenna is aligned with the coplanar waveguide.
8. The method for fabricating the antenna packaging structure according to claim 7, characterized in that, The step of forming the coplanar waveguide includes forming a metal pad located on the surface of the first package away from the redistribution layer and spaced apart from the coplanar waveguide, the metal pad being electrically connected to the redistribution layer via another of the at least two conductive pillars.
9. The method for fabricating the antenna packaging structure according to claim 7, characterized in that, The step of providing the redistribution layer includes forming a first redistribution layer and forming a second redistribution layer on the first redistribution layer; The second rewiring layer is electrically connected to the first rewiring layer, and the reflector is located in the second rewiring layer and electrically connected to the first rewiring layer. The first package is located on the second redistribution layer; One of the at least two conductive pillars is located on the reflector, and the other of the at least two conductive pillars is located on the second rewiring layer.
10. A terminal comprising a circuit board and an antenna package structure electrically connected to the circuit board, characterized in that, The antenna packaging structure is the antenna packaging structure as described in any one of claims 1 to 6.