Via hole structure of circuit board, circuit board and electronic equipment

By adjusting the center distance between signal vias and ground vias on the circuit board and applying shielded ground via technology, the problems of high bandwidth and soldering reliability under small pin spacing design are solved, realizing high bandwidth transmission under large pin spacing, which is suitable for high-speed backplane systems.

CN120935923APending Publication Date: 2025-11-11ZTE CORP
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Patent Information

Application Number
CN202410580008.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-05-10
Publication Date
2025-11-11

AI Technical Summary

Technical Problem

Existing technologies require small pin spacing to achieve high bandwidth, which leads to high processing difficulty and poor soldering reliability, making it difficult to meet the needs of high-speed signal transmission.

Method used

Multiple ground network pads are set on the circuit board. The center-to-center distance between signal holes and ground vias is smaller than the center-to-center distance between adjacent ground network pads. Combined with shielded ground via technology, the positions of signal holes and ground vias are adjusted to meet high bandwidth requirements, reduce processing difficulty and improve soldering reliability.

Benefits of technology

It achieves high-bandwidth transmission with large pin spacing, reduces processing difficulty and improves welding reliability, and is suitable for high-speed backplane systems with speeds of 112Gbps and above.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention provides a via hole structure of a circuit board, the circuit board and electronic equipment, the via hole structure of the circuit board comprises a bonding pad, a signal hole and a ground via hole, the bonding pad is arranged on the circuit board, the bonding pad comprises a plurality of ground network bonding pads, the plurality of ground network bonding pads are distributed in an array on the circuit board, and the signal hole is arranged in the signal hole. The center distance between two adjacent ground network bonding pads is a first distance; the signal hole is formed in the circuit board; the ground via hole is formed in the ground network bonding pad; wherein the center distance between the signal hole and the ground via hole is smaller than the first distance. According to the technical scheme, the physical structure limitation that high bandwidth can be achieved only under the condition that small pins are arranged at equal intervals is broken through, the machining difficulty is lowered, and the welding reliability is improved.
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Description

Technical Field

[0001] This application relates to, but is not limited to, the field of circuit board structure, and particularly to a via structure for a circuit board, a circuit board, and an electronic device. Background Technology

[0002] With the rapid development of the electronic communications industry, communication equipment is becoming increasingly complex and integrated, and signal rates are rapidly increasing. 112Gbps products have already entered commercial use, and research on 224Gbps products is gradually underway. This increase in speed is accompanied by more stringent requirements for high-speed signal bandwidth and crosstalk. In various system designs, fan-out vias on printed circuit boards (PCBs) are crucial for interconnecting components such as ball grid arrays (BGAs) and high-speed connectors with board-level signals. For devices with uniform pin arrangements, such as chips and high-speed connectors, the current mainstream research approach for achieving high bandwidth is to design all pins with equal spacing and simultaneously reduce their size. While this method can increase bandwidth, it is more difficult to manufacture and has lower soldering reliability. Summary of the Invention

[0003] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.

[0004] This application provides a via structure for a circuit board, a circuit board, and an electronic device, which overcomes the physical structural limitation that high bandwidth can only be achieved with small pin spacing, reduces processing difficulty, and improves soldering reliability.

[0005] In a first aspect, embodiments of this application provide a via structure for a circuit board, including:

[0006] A pad is disposed on the circuit board. The pad includes a plurality of ground network pads. The plurality of ground network pads are arranged in an array on the circuit board. The center-to-center distance between two adjacent ground network pads is a first distance.

[0007] Signal holes are provided on the circuit board;

[0008] Ground via, wherein the ground via is disposed on the ground network pad;

[0009] The center-to-center distance between the signal hole and the ground via is less than the first distance.

[0010] Secondly, embodiments of this application provide a circuit board including the via structure of the circuit board described in the above embodiments.

[0011] Thirdly, embodiments of this application provide an electronic device, including the circuit board described in the above embodiments.

[0012] This application embodiment includes: a via structure comprising pads, signal vias, and ground vias, wherein the pads are disposed on the circuit board, and the pads include multiple ground network pads, which are arranged in an array on the circuit board, and the center-to-center distance between two adjacent ground network pads is a first distance; the signal vias are disposed on the circuit board, and the ground vias are disposed on the ground network pads, such that the center-to-center distance between the signal vias and the ground vias is less than the first distance, which can well meet the requirements of high-speed signal bandwidth, and breaks through the physical structure limitation that high bandwidth can only be achieved with small pin spacing, reducing the processing difficulty and thus improving the reliability of soldering. Attached Figure Description

[0013] The accompanying drawings are used to provide a further understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.

[0014] Figure 1 This is a schematic diagram of the via structure of a circuit board provided in one embodiment of this application;

[0015] Figure 2 This is a schematic diagram of a typical pin arrangement of a conventional BGA provided in one embodiment of this application;

[0016] Figure 3 This is a schematic diagram of a conventional via structure provided in one embodiment of this application;

[0017] Figure 4 This is a schematic diagram of the via structure of a circuit board provided in another embodiment of this application;

[0018] Figure 5 This is a schematic diagram of the via structure of a circuit board provided in another embodiment of this application;

[0019] Figure 6 This is a schematic diagram of the via structure of a circuit board provided in another embodiment of this application;

[0020] Figure 7 This is a schematic diagram of the via structure of a circuit board provided in another embodiment of this application;

[0021] Figure 8 This is a bandwidth comparison diagram before and after the structural change provided in one embodiment of this application;

[0022] Figure 9 This is a comparison diagram of crosstalk before and after the structural change provided in one embodiment of this application.

[0023] Figure label:

[0024] Ground network pad 101, ground via 102, signal pad 103, first differential signal via 104, second differential signal via 105, shielded ground via 106, second signal pad 107. Detailed Implementation

[0025] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0026] In the description of this application, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0027] Furthermore, terms such as “above,” “over,” “below,” and “under,” used in this application to indicate spatial relative position, are for illustrative purposes to describe the relationship of one unit or feature relative to another unit or feature as shown in the accompanying drawings. The terms indicating spatial relative position may be intended to include different orientations of the device in use or operation other than those shown in the figures. For example, if the device in the figures is flipped, a unit described as being “below” or “under” other units or features would be located “above” other units or features. Therefore, the exemplary term “below” can encompass both above and below orientations. The device may be oriented in other ways (rotated 90 degrees or otherwise) and the spatially related descriptive terms used herein shall be interpreted accordingly.

[0028] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0029] This application provides a via structure for a circuit board, a circuit board, and an electronic device. The via structure includes pads, signal vias, and ground vias. The pads are disposed on the circuit board and include multiple ground network pads arranged in an array on the circuit board. The center-to-center distance between two adjacent ground network pads is a first distance. The signal vias are disposed on the circuit board, and the ground vias are disposed on the ground network pads. The center-to-center distance between the signal vias and the ground vias is less than the first distance, which can well meet the requirements of high-speed signal bandwidth. Moreover, it breaks through the physical structure limitation that high bandwidth can only be achieved with small pin spacing, reduces the processing difficulty, and thus improves the reliability of soldering.

[0030] The embodiments of this application will be further described below with reference to the accompanying drawings.

[0031] like Figure 1 As shown, one embodiment of the first aspect of this application provides a via structure for a circuit board. The via structure includes pads, signal vias, and ground vias 102. The pads are disposed on the circuit board and include a plurality of ground network pads 101. The plurality of ground network pads 101 are arranged in an array on the circuit board, and the center distance between two adjacent ground network pads 101 is a first distance L0. The signal vias are disposed on the circuit board, and the ground vias 102 are disposed on the ground network pads 101. The center distance LGS between the signal vias and the ground vias 102 is made smaller than the first distance L0, which can well meet the requirements of high-speed signal bandwidth. Moreover, it breaks through the physical structure limitation that high bandwidth can only be achieved with small pin spacing, reduces the processing difficulty, and thus improves the reliability of soldering.

[0032] In some embodiments of this application, the via structure of this application breaks through the physical structure limitation that high bandwidth can only be achieved with small pin spacing, realizes the high bandwidth requirement with large pin spacing, and greatly reduces the processing and process reliability risks of 224G product deployment.

[0033] It is worth noting that a typical pin arrangement diagram of a traditional BGA is shown below. Figure 2 As shown, PG represents the ground network pad 101, PS represents the signal pad 103, the center-to-center distance between ground network pads 101 is denoted as L0, the center-to-center distance between signal pads 103 and ground network pads 101 is denoted as LGS, and the center-to-center distance between signal pads 103 is denoted as LSS. Furthermore, the center-to-center distance LGS between signal pads 103 and ground network pads 101 is equal to L0, and the center-to-center distance LSS between two adjacent signal pads 103 is also equal to L0, i.e., L0 = LGS = LSS. The center-to-center distance between the pads in the BGA array is designed to be equal. Currently, the industry generally uses methods to reduce the center-to-center distance between pads to further improve performance. Figure 2 The array signal transmission bandwidth shown, even if L0, LGS, and LSS are all reduced simultaneously, although this method can improve bandwidth, has high processing requirements and poses a significant risk to welding reliability, making it difficult to implement in practical applications. Figure 3 As shown, Figure 3 This is a schematic diagram of a traditional BGA via structure. DG represents ground via 102, and DS represents signal via. Ground via 102 is positioned at the center of ground network pad 101, and signal via is positioned at the center of signal pad 103. The center-to-center distance between two adjacent ground vias 102 is L0, the center-to-center distance between adjacent ground vias 102 and signal vias is LGS, and the center-to-center distance between adjacent signal vias is LSS, such that L0 = LGS = LSS. It can be understood that ground network pad 101 can represent a power pin, signal pad 103 can represent a signal pin, ground network pad 101 is used to house ground via 102, and signal pad 103 is used to house signal vias.

[0034] It is worth noting that the I / O terminals of BGA packages are distributed in an array of circular or columnar solder points on the underside of the package. The advantages of BGA technology are that although the number of I / O pins increases, the pin spacing does not decrease but rather increases, thereby improving the assembly yield. Although its power consumption increases, BGA can be soldered using the controlled collapse chip method, which can improve its electrothermal performance. The thickness and weight are reduced compared to previous packaging technologies. Parasitic parameters (output voltage disturbances caused by large changes in current) are reduced, signal transmission delay is small, and the operating frequency is greatly improved. Assembly can be performed using coplanar soldering, resulting in high reliability.

[0035] It is worth noting that the formula for the lowest resonant frequency of a coaxial-like structure is shown below. The center-to-center distance between the two signal vias in a differential signal, as well as the center-to-center distance between the signal via and the ground via, are the main factors affecting the high-frequency cutoff frequency. The smaller the center-to-center distance between the two signal vias in a differential signal, and the smaller the center-to-center distance between the signal via and the ground via, the higher the high-frequency cutoff frequency and the higher the bandwidth.

[0036]

[0037] Where 'a' is positively correlated with the center-to-center distance between the two signal holes of the differential signal, 'b' is positively correlated with the center-to-center distance between the signal hole and the ground via, 'c' represents the speed of light, 'Δ' represents the resonant frequency compensation value of the coaxial structure, 'μ' represents the free-space permeability, and 'ε' represents the free-space dielectric constant. According to the above formula, by simply reducing the center-to-center distance between the two signal holes of the differential signal and the center-to-center distance between the signal hole and the ground via, it is possible to maintain high bandwidth without simultaneously reducing the center-to-center distance between ground vias, the center-to-center distance between signal holes and ground vias, and the center-to-center distance between signal holes, as is the usual method. This overcomes the physical structural limitation that high bandwidth can only be achieved with small pin spacing, reduces processing difficulty, and thus improves welding reliability.

[0038] It is worth noting that the embodiments of this application can be applied to multilayer circuit board structures of products such as Ball Array (BGA) packages and high-speed connectors, especially circuit board structures in high-speed backplane systems with speeds of 112Gbps and above, and are not limited here. In the circuit board of the embodiments of this application, multiple ground network pads 101 and signal pads 103 are arranged in an array. Therefore, it is only necessary to adjust the center spacing between the ground vias 102 and signal vias provided on the pads to meet the high bandwidth requirements, without having to simultaneously shorten the center spacing between the pins as usual.

[0039] In some embodiments of this application, since the circuit board can be used to transmit differential signals, the signal holes at least include a first differential signal hole 104 and a second differential signal hole 105, both of which are disposed on the signal pad 103; for example Figure 1 As shown, PG represents the ground network pad 101, DG represents the ground via 102, and DS can represent the first differential signal via 104 and the second differential signal via 105, respectively. The spacing between two adjacent ground network pads 101 is L0. The high bandwidth requirement can be met as long as the center spacing LGS between the ground via 102 and the first differential signal via 104 is less than L0. The center spacing LSS between the first differential signal via 104 and the second differential signal via 105 can be equal to L0, and it is not necessary for the center spacing LSS between the first differential signal via 104 and the second differential signal via 105 to be less than L0.

[0040] It's important to note that differential transmission is a signal transmission technique, distinct from the traditional approach of using one signal line and one ground line. Differential transmission transmits signals on both lines, with the two signals having the same amplitude but opposite phase. The signals transmitted on these two lines are called differential signals. The receiving end compares the difference between these two voltages to determine the logic state transmitted by the sending end. On a circuit board, differential traces must be of equal length, equal width, closely spaced, and on the same plane. A differential signal uses a single numerical value to represent the difference between two physical quantities; differential signals are also called differential-mode signals, as opposed to common-mode signals.

[0041] In some embodiments of this application, the first differential signal hole 104 and the second differential signal hole 105 form a pair of differential vias. It is only necessary to make the center distance LGS between the first differential signal hole 104 and the ground via 102 smaller than the center distance L0 between two adjacent ground network pads 101 to meet the high bandwidth requirement, without having to reduce the spacing between the pins at the same time, which can facilitate the subsequent soldering of electrical components.

[0042] like Figure 4 As shown, in some embodiments of this application, when the center-to-center distance LGS between the first differential signal via 104 and the ground via 102 is less than the center-to-center distance L0 between two adjacent ground network pads 101, in order to further improve the bandwidth achievable by the circuit board, the center-to-center distance LSS between the first differential signal via 104 and the second differential signal via 105 can also be less than the center-to-center distance L0 between two adjacent ground network pads 101. By setting LGS and LSS to be less than L0, the signal bandwidth of the circuit board can be significantly improved, meeting the requirements for higher bandwidth.

[0043] like Figure 5 As shown, in some embodiments of this application, in order to suppress crosstalk, a shielded ground via 106 can be provided at the middle region of two adjacent ground vias 102 on the same side, and the shielded ground via 106 is also provided on the ground network pad 101. Specifically, under the premise that the center distance LGS between the first differential signal via 104 and the ground via 102 is less than the center distance L0 between two adjacent ground network pads 101, in order to suppress crosstalk, a shielded ground via 106 can be provided at the middle region of two adjacent ground vias 102 on the same side. Based on the shielded ground via 106, signal crosstalk in the circuit board can be effectively suppressed.

[0044] like Figure 1 and Figure 5As shown, in some embodiments of this application, the pads on the circuit board include a first signal pad. The center distance between the first signal pad and the ground network pad 101 with a ground via 102 is a first distance L0. The signal via is located in the central region of the first signal pad. To ensure that the first distance L0 is less than the center distance LGS between the signal via and the ground via 102, the ground via 102 can be offset towards the signal via and positioned on the ground network pad 101. Specifically, to ensure that the center distance between two adjacent ground network pads 101 is L0, and to ensure that the center distance LGS between the ground via 102 and the first differential signal via 104 is less than the center distance L0 between two adjacent ground network pads 101, the corresponding ground via 102 can be offset towards one side of the first differential signal via 104, thus satisfying the requirement that LGS is less than L0. The setting process is simple and quick. It is worth noting that in the embodiments of this application, the first signal pad is the signal pad 103.

[0045] like Figure 6 As shown, in some embodiments of this application, the pads on the circuit board may further include a second signal pad 107, and the center distance between the second signal pad 107 and the ground network pad 101 with a ground via 102 is less than the center distance L0 between two adjacent ground network pads 101, and the signal hole is disposed in the central region of the second signal pad 107, and the ground via 102 is disposed in the central region of the ground network pad 101. Specifically, in order to ensure that the center distance LGS between the ground via 102 and the first differential signal via 104 is less than the center distance L0 between two adjacent ground network pads 101, it is only necessary to set the position of the pads on the circuit board. For example, the center distance between the second signal pad 107 and the ground network pad 101 with the ground via 102 is less than the center distance L0 between two adjacent ground network pads 101. In this case, the first differential signal via 104 can be set in the central area of ​​the second signal pad 107, and the ground via 102 can be set in the central area of ​​the ground network pad 101. It is not necessary to offset the ground via 102 to one side of the first differential signal via 104, and the setting process is more flexible and convenient.

[0046] like Figure 4As shown, in some embodiments of this application, when the center-to-center distance LGS between the first differential signal via 104 and the ground via 102 is less than the center-to-center distance L0 between two adjacent ground network pads 101, in order to further improve the bandwidth achievable by the circuit board, the center-to-center distance LSS between the first differential signal via 104 and the second differential signal via 105 can also be less than the center-to-center distance L0 between two adjacent ground network pads 101. To achieve the above structure, the ground via 102 can be offset to one side of the first differential signal via 104, and the second differential signal via 105 can be offset to one side of the first differential signal via 104. It is understood that the positions of the pads in the circuit board can also be adjusted, so that the center-to-center distance LGS between the first differential signal via 104 and the ground via 102 is less than the center-to-center distance L0 between two adjacent ground network pads 101, and the center-to-center distance LSS between the first differential signal via 104 and the second differential signal via 105 is also less than the center-to-center distance L0 between two adjacent ground network pads 101.

[0047] It is understandable that, during the adjustment of the center distance between the signal via and the ground via 102, it is not necessary for the ground via 102 to shift towards the signal via; the signal via can also shift towards the ground via 102, as long as the center distance between them is less than the distance between two adjacent ground network pads 101. Similarly, when adjusting the center distance between the first differential signal via 104 and the second differential signal via 105, it is not necessary for the second differential signal via 105 to shift towards the first differential signal via 104; the first differential signal via 104 can also shift towards the second differential signal via 105.

[0048] It is worth noting that the first signal pad and the second signal pad in the embodiments of this application are only for distinguishing pads on different via structures, and do not represent that the two are different types of pads; the distinction is only for the purpose of more clearly illustrating the embodiments of this application.

[0049] like Figure 7 As shown, the embodiments of this application are not limited to conventional BGA arrays, but can also be applied to, for example... Figure 7 The Stagger array shown only requires that the center-to-center spacing between the ground via 102 and the signal via be less than the center-to-center spacing between two adjacent ground network pads 101.

[0050] Through the above technical solutions, the via structure of this application embodiment breaks through the physical structure limitation that high bandwidth can only be achieved with small pin spacing compared to conventional structures. By applying the technology of offset plate and shielded ground hole, the crosstalk of the via is reduced by more than 10dB across the entire frequency band after the cutoff frequency is pushed to 84GHz. This achieves high bandwidth and low crosstalk transmission with large pin spacing, which greatly improves the certainty and feasibility of 224G product deployment.

[0051] like Figure 8 As shown, the insertion loss and return loss of the via structure in this application embodiment are compared with those of the traditional via structure. The via structure proposed in this application embodiment improves signal return current by adjusting the spacing between the signal via and the ground via, thereby pushing the cutoff frequency back to 84GHz and beyond. Figure 9 As shown, the via structure of this application embodiment is compared with the via crosstalk of the traditional via structure. The via crosstalk of the via structure proposed in this application embodiment is improved by more than 10dB across the entire frequency band.

[0052] A second aspect of this application provides a circuit board that includes the via structure described in the first aspect embodiment.

[0053] In some embodiments of this application, the circuit board includes a multi-layer structure, and signal vias and ground vias penetrate each layer structure so that soldered components can be made conductive.

[0054] It should be noted that the circuit board in this embodiment and the via structure in the above embodiments are based on the same concept. Therefore, these embodiments have the same implementation principle and technical effect, which will not be described in detail here.

[0055] One embodiment of the third aspect of this application provides an electronic device, which includes the circuit board of the second aspect embodiment described above.

[0056] It should be noted that the electronic device in this embodiment and the circuit board in the above embodiments are based on the same concept. Therefore, these embodiments have the same implementation principle and technical effect, which will not be described in detail here.

[0057] The above is a detailed description of the preferred embodiments of this application. However, this application is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A via structure for a circuit board, characterized in that, include: A pad is disposed on the circuit board. The pad includes a plurality of ground network pads. The plurality of ground network pads are arranged in an array on the circuit board. The center-to-center distance between two adjacent ground network pads is a first distance. Signal holes are provided on the circuit board; Ground via, wherein the ground via is disposed on the ground network pad; The center-to-center distance between the signal hole and the ground via is less than the first distance.

2. The via structure according to claim 1, characterized in that, The signal aperture includes a first differential signal aperture, and the center distance between the first differential signal aperture and the ground via is less than the first distance.

3. The via structure according to claim 2, characterized in that, The signal aperture also includes a second differential signal aperture, and the first differential signal aperture and the second differential signal aperture form a pair of differential vias, wherein the center distance between the first differential signal aperture and the second differential signal aperture is less than the first distance.

4. The via structure according to claim 1, characterized in that, It also includes shielded grounding holes, and there are multiple grounding holes, which are located in the middle area of ​​two adjacent grounding holes on the same side.

5. The via structure according to claim 1, characterized in that, The pad also includes a first signal pad, the center distance between the first signal pad and the ground network pad having the ground via is the first distance, the signal via is located in the central region of the first signal pad, and the ground via is offset toward the signal via and located on the ground network pad.

6. The via structure according to claim 1, characterized in that, The pad also includes a second signal pad, the center distance between the second signal pad and the ground network pad having the ground via is less than the first distance, the signal via is located in the central region of the second signal pad, and the ground via is located in the central region of the ground network pad.

7. The via structure according to claim 3, characterized in that, The pads also include a third signal pad and a fourth signal pad. The center distance between the third signal pad and the ground network pad with the ground via is the first distance. The center distance between the third signal pad and the fourth signal pad is the first distance. The ground via is offset towards the first differential signal hole and disposed on the ground network pad. The first differential signal hole is offset towards the second differential signal hole and disposed on the third signal pad. The second differential signal hole is offset towards the first differential signal hole and disposed on the fourth signal pad.

8. A circuit board, characterized in that, Includes the via structure of the circuit board as described in any one of claims 1 to 7.

9. The circuit board according to claim 8, characterized in that, The circuit board includes multiple layers, and the signal vias and ground vias penetrate each of the layers.

10. An electronic device, characterized in that, The circuit board includes any one of claims 8 to 9.