Method for forming polycrystalline silicon thin film of super junction device

Abstract

The invention discloses a method for forming a polycrystalline silicon thin film of a super junction device, which comprises the following steps: a first polycrystalline silicon layer is formed on an oxide layer, gas introduced in the process of forming the first polycrystalline silicon layer comprises silane and phosphorane, the oxide layer is formed on a wafer, and the wafer is used for forming the super junction device; and forming a second polycrystalline silicon layer on the first polycrystalline silicon layer, wherein the introduced gas in the process of forming the second polycrystalline silicon layer comprises silane, and phosphine is not introduced. In the manufacturing process of the super junction device, after the oxide layer is formed on the wafer, the first polycrystalline silicon layer with relatively high phosphorus doping concentration is formed on the oxide layer, and then the second polycrystalline silicon layer with relatively low phosphorus doping concentration is formed on the first polycrystalline silicon layer, so that the polycrystalline silicon thin film with relatively low surface phosphorus concentration and relatively high lower layer phosphorus concentration is formed; and the square resistance is reduced on the premise of keeping the thickness of the polycrystalline silicon thin film.

Description

Technical Field

[0001] This application relates to the field of semiconductor devices and integrated circuit technology, and in particular to a method for forming a polycrystalline silicon thin film for a superjunction device. Background Technology

[0002] Power semiconductor devices are widely used in industrial, transportation, consumer electronics, and medical fields. As a new type of high-end power switching device, super junction (SJ) devices are increasingly being used in various power supply systems due to their ultra-low on-resistance, low internal resistance, and low power consumption.

[0003] For superjunction devices, the sheet resistance of the polysilicon thin film is a key factor affecting its switching losses. In related technologies, a high concentration of phosphorus is typically added to the polysilicon thin film during the fabrication of superjunction devices to reduce its sheet resistance. However, this method is insufficient to further reduce the sheet resistance of the polysilicon thin film in superjunction devices. Summary of the Invention

[0004] This application provides a method for forming a polycrystalline silicon thin film in a superjunction device, which can reduce the sheet resistance while maintaining the thickness of the polycrystalline silicon thin film. The method includes:

[0005] A first polysilicon layer is formed on an oxide layer, and the gases introduced during the formation of the first polysilicon layer include silane and phosphine. The oxide layer is formed on a wafer, which is used to form a superjunction device.

[0006] A second polysilicon layer is formed on the first polysilicon layer, and the gas introduced during the formation of the second polysilicon layer includes silane but not phosphine.

[0007] In some embodiments, the first polysilicon layer and the second polysilicon layer are formed in the same chamber of the same machine.

[0008] In some embodiments, during the formation of the second polycrystalline silicon layer, the valve for phosphine gas is closed to stop the introduction of phosphine.

[0009] In some embodiments, the total time for forming the first polysilicon layer and the second polysilicon layer is 180 minutes to 360 minutes.

[0010] In some embodiments, the time for forming the second polycrystalline silicon layer is 18 to 36 minutes.

[0011] In some embodiments, during the formation of the first polysilicon layer and the second polysilicon layer, the flow rate of the introduced silane is 0.8 SLM to 1.5 SLM.

[0012] In some embodiments, during the formation of the first polysilicon layer, the flow rate of phosphine introduced is 110 SLM to 130 SLM.

[0013] The technical solution of this application has at least the following advantages:

[0014] By forming an oxide layer on the wafer during the fabrication of a superjunction device, a first polysilicon layer with a high phosphorus doping concentration is first formed on the oxide layer, and then a second polysilicon layer with a low phosphorus doping concentration is formed on the first polysilicon layer, thereby forming a polysilicon thin film with a low phosphorus concentration on the surface and a high phosphorus concentration in the lower layer, thereby reducing the sheet resistance while maintaining the thickness of the polysilicon thin film. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0016] Figure 1 This is a flowchart of a method for forming a polycrystalline silicon thin film in a superjunction device provided in an exemplary embodiment of this application;

[0017] Figures 2 to 3 This is a schematic diagram of the formation process of a polycrystalline silicon thin film in a superjunction device provided in an exemplary embodiment of this application. Detailed Implementation

[0018] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0020] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components; and they can refer to a wireless connection or a wired connection. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0021] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0022] refer to Figure 1 It illustrates a flowchart of a method for forming a polycrystalline silicon thin film in a superjunction device provided in an exemplary embodiment of this application, as shown below. Figure 1 As shown, the method includes:

[0023] Step S1: A first polysilicon layer is formed on the oxide layer. The gas introduced during the formation of the first polysilicon layer includes silane and phosphine. The oxide layer is formed on a wafer used to form a superjunction device.

[0024] refer to Figure 2 This illustrates a schematic cross-sectional view after the formation of a first polycrystalline silicon layer on the oxide layer. For example, such as... Figure 2 As shown, an oxide layer 220 is formed on the wafer 210 (the oxide layer 220 can be formed on the wafer 210 by a thermal oxidation process), and a first polycrystalline silicon layer 221 is formed on the oxide layer 220 by a chemical vapor deposition (CVD) process. During the formation of the first polycrystalline silicon layer 221 by the CVD process, the gases introduced include silane and phosphine. The flow rate of the introduced silane is 0.8 S standard liters per minute (SLM) to 1.5 SLM, and the flow rate of the introduced phosphine is 110 SLM to 130 SLM. The phosphorus doping concentration of the first polycrystalline silicon layer 221 formed in this stage is relatively high.

[0025] Step S2: A second polysilicon layer is formed on the first polysilicon layer. During the formation of the second polysilicon layer, the gas introduced includes silane but not phosphine.

[0026] refer to Figure 3 This illustrates a cross-sectional view after a second polysilicon layer has been formed on a first polysilicon layer. For example, as shown... Figure 3As shown, steps S1 and S2 are performed in the same chamber of the same machine. After the first polysilicon layer 221 is formed, the valve for phosphine gas is closed to stop the introduction of phosphine, and a second polysilicon layer 222 is formed on the first polysilicon layer 221. The second polysilicon layer 222 formed in this process has a lower phosphorus doping concentration. The polysilicon thin film composed of the first polysilicon layer 221 and the second polysilicon layer 222 has a distribution with a lower phosphorus concentration on the surface and a higher phosphorus concentration in the lower layer, resulting in a lower sheet resistance compared to a film layer with a higher phosphorus doping concentration.

[0027] The sum of the thicknesses of the first polysilicon layer 221 and the second polysilicon layer 222 is the target thickness value. The total time for depositing and forming the first polysilicon layer 221 and the second polysilicon layer 222 is 180 minutes to 360 minutes. The gas pressure in the chamber is 0.25 Torr to 1 Torr. The time for forming the second polysilicon layer 222 is 18 minutes to 36 minutes.

[0028] In summary, in the embodiments of this application, after forming an oxide layer on the wafer during the fabrication of the superjunction device, a first polysilicon layer with a high phosphorus doping concentration is first formed on the oxide layer, and then a second polysilicon layer with a low phosphorus doping concentration is formed on the first polysilicon layer, thereby forming a polysilicon thin film with a low surface phosphorus concentration and a high underlying phosphorus concentration, thereby reducing the sheet resistance while maintaining the thickness of the polysilicon thin film.

[0029] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A method for forming a polycrystalline silicon thin film in a superjunction device, characterized in that, include: A first polysilicon layer is formed on an oxide layer, and the gases introduced during the formation of the first polysilicon layer include silane and phosphine. The oxide layer is formed on a wafer, which is used to form a superjunction device. A second polysilicon layer is formed on the first polysilicon layer, and the gas introduced during the formation of the second polysilicon layer includes silane but not phosphine.

2. The method according to claim 1, characterized in that, The first polysilicon layer and the second polysilicon layer are formed in the same chamber of the same machine.

3. The method according to claim 2, characterized in that, During the formation of the second polycrystalline silicon layer, the valve for phosphine gas is closed to stop the introduction of phosphine.

4. The method according to claim 3, characterized in that, The total time for forming the first polysilicon layer and the second polysilicon layer is 180 to 360 minutes.

5. The method according to claim 4, characterized in that, The time for forming the second polycrystalline silicon layer is 18 to 36 minutes.

6. The method according to any one of claims 1 to 5, characterized in that, During the formation of the first polysilicon layer and the second polysilicon layer, the flow rate of the introduced silane is 0.8 SLM to 1.5 SLM.

7. The method according to claim 6, characterized in that, During the formation of the first polycrystalline silicon layer, the flow rate of phosphine introduced is 110 SLM to 130 SLM.

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