Output protection method of source table

Abstract

The invention belongs to the technical field of electronic measuring instruments, and particularly relates to an output protection method of a source meter, which comprises the following steps of: configuring an operation mode of a digital controller; executing closed-loop control of the main regulator; the arbiter continuously monitors the output state, and intelligently arbitrates and switches the main regulator, the clamping regulator and the output channel according to the measurement feedback value, the clamping threshold value and the over-limit threshold value, thereby achieving the precise clamping and over-limit protection of the output. By adopting the technical scheme, the flexibility, refined protection and adaptability of source table output control can be remarkably improved, the hardware cost is reduced, and the system reliability is improved.

Description

Technical Field

[0001] This invention belongs to the field of electronic measuring instrument technology, specifically a source meter output protection method. Background Technology

[0002] In the fields of automated testing, semiconductor device characteristic analysis, and precision instrumentation, source meters, as core devices with four-quadrant operation capabilities, must provide high-precision voltage / current excitation for passive components, discrete semiconductors, and integrated circuits, and simultaneously acquire response signals to characterize the electrical characteristics of the devices. The safety and stability of their output channels directly affect the reliability of testing and the integrity of the devices under test. Current source meters need to adapt to scenarios with "multi-mode, multi-load, and multi-test sequences": for example, testing MOSFETs requires precise voltage control and overcurrent prevention in voltage source mode, while testing capacitors requires current stabilization and overvoltage prevention in current source mode. This requires the output protection mechanism to not only match the logic of different operating modes but also flexibly adapt to the differences in the characteristics of the devices under test. Traditional source meters rely on analog hardware circuits for output control and protection: voltage source mode uses a fixed analog loop for voltage regulation and additional current clamping to prevent overcurrent; current source mode uses an analog loop for current stabilization and voltage clamping to prevent overvoltage. However, this approach has significant drawbacks: First, the response characteristics (bandwidth, response time) of analog circuits are fixed by physical component parameters. Adjusting the response speed or protection threshold requires disassembly and replacement of components, making flexible on-site configuration impossible. Even with multiple preset circuits and switch switching to improve flexibility, it increases cost, occupies board space, and easily introduces contact resistance and signal interference, reducing reliability. Second, analog circuits struggle to achieve intelligent arbitration between "main control" and "protection." Switching delays can lead to untimely protection, and the clamping force cannot be dynamically adjusted based on real-time measurements, making it difficult to balance safety and output accuracy. As testing requirements evolve towards "high dynamism, high programmability, and high integration," the limitations of traditional analog solutions are becoming increasingly apparent. In modern scenarios, the load types of devices under test (capacitive, inductive, resistive) are diverse, and test sequences need to switch response speeds and protection thresholds in stages (e.g., chip aging tests require gradually increasing excitation and adjusting overcurrent thresholds). However, the "fixed parameter" characteristics of analog circuits cannot meet real-time optimization requirements. Furthermore, to achieve independent protection of voltage and current, two complex loops need to be constructed, increasing hardware complexity and power consumption, which contradicts the trend of "miniaturization and low power consumption" in source meters. More importantly, traditional solutions lack digital management capabilities, cannot remotely configure protection parameters, and are difficult to automate testing in collaboration with host computers, thus failing to meet the "remote monitoring and dynamic adaptation" requirements of intelligent testing systems. These contradictions make traditional protection solutions a core bottleneck restricting the evolution of source meters towards intelligence and high adaptability. Therefore, this invention provides an output protection method for source meters. Summary of the Invention

[0003] In order to overcome the shortcomings of the prior art, at least one technical problem raised in the background art is solved.

[0004] The technical solution adopted by this invention to solve its technical problem is: a source meter output protection method according to this invention, the method being applicable to a source meter device with four-quadrant operation capability, the source meter device having at least one output channel, the output channel being used to provide an excitation signal to the device under test and acquire a response signal. The source meter output protection method includes the following steps: S1. Configure the operating mode of the digital controller: According to the preset operating mode of the source meter, configure the digital controller as a voltage source mode or a current source mode. S2. Set the parameters of the main controller and clamp controller: Based on the characteristics of the device under test, the test requirements, and the expected response speed and accuracy, the control parameters of the main controller and clamp controller are dynamically configured through the digital interface. S3. Closed-loop control of the main controller: During normal operation of the source meter, the digital controller activates the main controller, which generates a digital control signal by comparing the error between the output setpoint and the measurement feedback value. This signal is converted from digital to analog and amplified by power to drive the output channel so that the measurement feedback value accurately tracks the output setpoint. S4. Continuous monitoring of output status: The arbiter module in the digital controller continuously monitors the real-time measurement feedback value of the output channel and compares it with the preset clamping threshold and over-limit threshold. S5. Arbitrator switches to clamping regulator: When the real-time measurement feedback value exceeds the preset clamping threshold, the arbitrator starts the clamping regulator and enables the output selector to switch the output of the clamping regulator to the output channel, while stopping the operation of the main regulator. At this time, the clamping regulator generates a digital control signal by comparing the error between the clamping set value and the measurement feedback value, so that the output value of the output channel is actively clamped at the clamping threshold. S6. Arbitrator performs over-limit protection: When the real-time measurement feedback value continues to increase and exceeds the preset over-limit threshold during the operation of the clamping regulator, the arbitrator immediately disables the operation of the output selector, thereby disconnecting the output channel to implement over-limit protection. S7. Arbitrator switches back to main controller: When the real-time measurement feedback value falls back to within the clamping threshold during the operation of the clamping controller, the arbitrator stops the operation of the clamping controller and enables the output selector to switch the output of the main controller back to the output channel.

[0005] In a preferred embodiment of the present invention, the digital controller is integrated within a digital signal processor (DSP) or a field-programmable gate array (FPGA) chip, and includes: a master controller, a clamping controller, an arbiter, a parameter storage and management module, and a digital communication interface module. Both the master controller and the clamping controller are programmable digital closed-loop controllers, and their control algorithm can be a proportional-integral-derivative (PID) algorithm, with an independently configurable set of control parameters. The digital communication interface module is used for data interaction with a host computer to receive instructions, setpoints, control parameters, and send measurement data.

[0006] In a preferred embodiment of the present invention, the source meter device includes: an analog front-end (AFE) module, a power output stage, a digital processing unit (DPU), and a digital interface module. The analog front-end module includes a high-precision analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). The ADC converts the real-time voltage and current signals of the output channel into digital signals and inputs them to the digital processing unit. The DAC converts the digital control signals generated by the digital processing unit into analog signals and inputs them to the power output stage. The power output stage includes a linear power amplifier and a relay or solid-state switch for isolating the output channel. The digital processing unit is the digital controller. The digital interface module is used to realize data communication between the digital processing unit and an external host computer.

[0007] In a preferred embodiment of the present invention, when the digital controller is configured in voltage source mode, the main regulator is set as a voltage closed-loop regulator, with its input being a voltage setpoint and a measured voltage value, and its output being a digital voltage control signal driving the digital-to-analog converter. The clamping regulator is set as a current clamping regulator, with its input being a current clamping threshold and a measured current value, and its output being a digital current control signal driving the digital-to-analog converter. The arbitrator continuously monitors the measured current value and the preset current clamping threshold and overcurrent threshold.

[0008] In a preferred embodiment of the present invention, when the digital controller is operating in voltage source mode: When the measured current value is lower than the current clamping threshold, the arbitrator enables the main regulator and connects its output control signal to the digital-to-analog converter through the output selector, while disabling the clamping regulator.

[0009] When the measured current value exceeds the current clamping threshold, the arbitrator activates the clamping regulator and enables the output selector to connect the output control signal of the clamping regulator to the digital-to-analog converter, while simultaneously disabling the main regulator. At this time, the clamping regulator actively adjusts the output current to approach the current clamping threshold.

[0010] When the measured current value continues to increase and exceeds the overcurrent threshold during the operation of the clamping regulator, the arbitrator disconnects the output channel and stops the operation of all regulators by controlling a relay or solid-state switch in the power output stage. The overcurrent threshold is set to be greater than the current clamping threshold but less than the maximum current that the power output stage can withstand.

[0011] In a preferred embodiment of the present invention, when the digital controller is configured in current source mode, the main regulator is set as a current closed-loop regulator, with its input being a current setpoint and a measured current value, and its output being a digital current control signal driving the digital-to-analog converter. The clamping regulator is set as a voltage clamping regulator, with its input being a voltage clamping threshold and a measured voltage value, and its output being a digital voltage control signal driving the digital-to-analog converter. The arbitrator continuously monitors the measured voltage value and preset voltage clamping threshold and overvoltage threshold.

[0012] In a preferred embodiment of the present invention, when the digital controller is operating in current source mode: When the measured voltage value is lower than the voltage clamping threshold, the arbitrator enables the main regulator and connects its output control signal to the digital-to-analog converter via the output selector, while disabling the clamping regulator.

[0013] When the measured voltage value exceeds the voltage clamping threshold, the arbitrator activates the clamping regulator and enables the output selector to connect the output control signal of the clamping regulator to the digital-to-analog converter, while simultaneously disabling the main regulator. At this time, the clamping regulator actively adjusts the output voltage to approach the voltage clamping threshold.

[0014] When the measured voltage value continues to increase and exceeds the overvoltage threshold during the operation of the clamping regulator, the arbitrator disconnects the output channel and stops the operation of all regulators by controlling a relay or solid-state switch in the power output stage. The overvoltage threshold is set to be greater than the voltage clamping threshold but less than the maximum voltage that the power output stage can withstand.

[0015] In a preferred embodiment of the present invention, the arbitrator module is a state machine or a digital logic circuit implemented based on a logic gate array, which is used for: Receives measured voltage and measured current values ​​from the analog front-end module.

[0016] Receive current clamping threshold, overcurrent threshold, voltage clamping threshold and overvoltage threshold from the parameter storage and management module.

[0017] Based on the operating mode of the source meter (voltage source mode or current source mode) and the comparison result of the measured value with the threshold, a control signal is generated to enable or disable the main regulator and the clamp regulator.

[0018] A control signal is generated to drive the output selector to switch between the main regulator and the clamp regulator.

[0019] When an overlimit condition is detected, an interrupt signal or control signal is generated to drive a relay or solid-state switch in the power output stage, thereby disconnecting the output channel.

[0020] In a preferred embodiment of the present invention, the output selector is a digital multiplexer that routes the digital control output of the main regulator or the clamping regulator to the input of the digital-to-analog converter according to the selection signal generated by the arbitrator.

[0021] In a preferred embodiment of the present invention, the parameter storage and management module includes non-volatile memory (e.g., flash memory or EEPROM) and volatile memory (e.g., SRAM or DRAM) for storing control parameters (such as PID gain, integral time, derivative time), clamping threshold, over-limit threshold, and system configuration parameters of the main controller and the clamping controller. These parameters can be read, written, and updated in real time through the digital communication interface module while the source table is running.

[0022] In a preferred embodiment of the present invention, the control parameters of the main regulator and the clamping regulator are set to match the impedance, capacitance, or inductance characteristics of the device under test, so as to optimize the response speed, overshoot suppression, and steady-state accuracy of the output signal. Adjusting these parameters does not require physical modification of the hardware circuitry.

[0023] The beneficial effects of this invention are as follows: 1. The source meter output protection method described in this invention employs a fully digital control architecture, implementing the main controller, clamping controller, and arbitrator all within a digital chip. This allows the control loop parameters (such as PID gain, integral time, derivative time, etc.) to be adjusted in real-time, dynamically, and continuously through software configuration according to different test requirements, the characteristics of the device under test (such as resistive, capacitive, and inductive loads), or the test stage, thereby optimizing response speed and stability and overcoming the limitations of fixed parameters in traditional analog circuits.

[0024] 2. The source meter output protection method described in this invention implements both clamping protection and over-limit protection logic in the digital domain, and divides them into two modes. Both the clamping threshold and the over-limit threshold can be precisely set and dynamically adjusted via software without requiring hardware modification. The digital clamping function actively stabilizes the output value at the set threshold, rather than simply cutting off the output, which greatly improves the precision of protection and the availability of the system. When the clamping fails or the response speed is insufficient, the over-limit protection can quickly disconnect the output, effectively preventing damage to the device under test and the source meter itself.

[0025] 3. The source table output protection method described in this invention can achieve multi-functionality and high adaptability through software configuration, thereby significantly reducing the circuit board area, the number of components, the wiring complexity and the overall hardware cost. Moreover, since the control and protection functions are mainly implemented by the internal logic of the digital processing unit (DSP or FPGA), the number and connection of external analog components are reduced, thereby reducing the failure rate of the system in manufacturing and long-term operation and improving the overall reliability.

[0026] 4. The source meter output protection method described in this invention enables the source meter to quickly switch its operating mode (voltage source / current source) according to test requirements and automatically adjust control and protection parameters without manual intervention or physical adjustment. The arbitrator can achieve smooth and automatic switching between normal operation mode and clamping operation mode, greatly simplifying the test process and improving test efficiency and user operation convenience. Attached Figure Description

[0027] The invention will now be further described with reference to the accompanying drawings.

[0028] Figure 1 This is a system block diagram of the source meter device in this invention; Figure 2 This is a flowchart illustrating the source table output protection method of the present invention. Detailed Implementation

[0029] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0030] like Figure 1The diagram illustrates a system block diagram of the source meter device of this invention. This device typically includes an analog front-end (AFE) module, a power output stage, a digital processing unit (DPU), and a digital interface module. The analog front-end module integrates a high-precision analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). The ADC converts real-time voltage and current signals from the output channel into digital format and inputs them to the digital processing unit for further processing. The DAC receives digital control signals generated by the digital processing unit and converts them into analog signals to drive the power output stage. The power output stage mainly consists of a linear power amplifier, which converts the analog control signals output from the DAC into high-power voltage or current outputs to the device under test. The power output stage also includes a relay or solid-state switch for isolating the output channel, quickly disconnecting the output connection in case of abnormal conditions, thereby achieving electrical isolation and protection. The digital processing unit essentially constitutes the digital controller of this invention, undertaking the core control and protection logic. The digital interface module is responsible for data communication between the digital processing unit and an external host computer, enabling the configuration, monitoring, and data exchange of the source meter.

[0031] Furthermore, the digital controller, or digital processing unit, is typically integrated within a high-performance digital signal processor (DSP) or a field-programmable gate array (FPGA) chip, granting it exceptional flexibility and parallel processing capabilities. This digital controller ingeniously integrates multiple functional modules, including: a master controller, a clamping controller, an arbiter, a parameter storage and management module, and a digital communication interface module. Both the master controller and the clamping controller are programmable digital closed-loop controllers, and their control algorithms can be configured according to specific application requirements. These algorithms can be the widely used proportional-integral-derivative (PID) algorithm, or other more complex control algorithms, such as adaptive control or fuzzy logic control algorithms. These controllers all have independently configurable sets of control parameters, such as the proportional gain (Kp), integral time (Ti), and derivative time (Td) in a PID controller. The independence of these parameters is crucial for achieving accurate responses to different load characteristics and test requirements. The digital communication interface module is not only used to interact with the host computer to receive operation instructions, output set values ​​and regulator control parameters, but also responsible for sending the real-time measurement data, status information and fault diagnosis data of the source meter to the host computer so that users can monitor, analyze and control it in an advanced manner.

[0032] like Figure 2 The diagram shows a flowchart of the source table output protection method of the present invention, which elaborates on the logic flow and precise operation of the digital controller under different working states.

[0033] Specifically, the method of the present invention includes the following steps: First, when the source meter is started or reconfigured, S1 is executed to configure the operating mode of the digital controller. According to the preset test task of the source meter or the requirements of the device under test, the digital controller is flexibly configured to voltage source mode or current source mode. This configuration process is typically completed by receiving instructions sent by a host computer through a digital communication interface module. For example, when precise control of the bias voltage to a semiconductor device is required, the source meter will be configured in voltage source mode; while when a constant current is required to test a light-emitting diode or sensor, it will be configured in current source mode. This mode switching is implemented entirely in the digital domain without any modification to the physical hardware.

[0034] Next, the parameters of the main controller and clamping controller are set in S2. Based on the specific electrical characteristics of the device under test, such as its impedance, capacitance, or inductance, and the required response speed, output accuracy, and stability, combined with the expected protection effect, the control parameters of the main controller and clamping controller are dynamically configured via the digital interface. These parameters may include the PID gain coefficients (Kp, Ki, Kd), integral saturation limits, and differential filter coefficients of the main controller, as well as the corresponding parameters of the clamping controller. Simultaneously, the clamping threshold and over-limit threshold are also precisely set. For example, in voltage source mode, the clamping threshold for the maximum allowable output current and the overcurrent protection threshold can be set; in current source mode, the clamping threshold for the maximum allowable output voltage and the overvoltage protection threshold are set. These parameters are stored in the non-volatile memory of the parameter storage and management module and loaded into volatile memory during runtime for real-time access and updating by the digital controller. Parameter adjustment is real-time and can be performed without interrupting the source meter operation, greatly enhancing the system's adaptability.

[0035] Once the mode and parameters are configured, the source meter enters normal operation, executing S3 to perform closed-loop control of the main controller. During this period, the digital controller activates the main controller, causing it to continuously compare the output setpoint (e.g., set voltage or set current) with the error between the output setpoint and the real-time measurement feedback value (e.g., actual output voltage or current) from the analog front-end module. Based on this error, the main controller uses its internal control algorithm (such as a PID algorithm) to generate a precise digital control signal. This digital control signal is then sent to a digital-to-analog converter (DAC) to be converted into an analog signal. This analog signal is then amplified by a linear power amplifier in the power output stage, ultimately driving the output channel to provide the required excitation to the device under test. The goal of the entire closed-loop control system is to ensure that the real-time measurement feedback value tracks the output setpoint with extreme accuracy and speed, thereby ensuring the stability, accuracy, and dynamic response performance of the output.

[0036] While the main controller performs closed-loop control, S4 continuously monitors the output status. The arbitrator module in the digital controller remains active, continuously monitoring real-time measurement feedback values ​​from the output channels of the analog front-end module. The arbitrator performs rapid and frequent comparisons of these real-time measurements with preset clamping and over-limit thresholds. For example, in voltage source mode, the arbitrator monitors the output current in real time and compares it with preset current clamping and overcurrent thresholds. In current source mode, the arbitrator monitors the output voltage in real time and compares it with preset voltage clamping and overvoltage thresholds. This continuous monitoring mechanism is the foundation for achieving rapid and effective protection.

[0037] When the characteristics of the device under test (DUT) undergo a sudden change or an abnormal situation occurs, causing the measured feedback value output by the source meter to exceed the normal operating range, a protection mechanism is triggered. Specifically, when the real-time measured feedback value exceeds a preset clamping threshold, the arbitrator immediately enters S5, switching to the clamping regulator. In this stage, the arbitrator first activates the clamping regulator, switching it from a dormant or standby state to an active operating state. Simultaneously, the arbitrator quickly enables the output selector, switching the digital control output of the clamping regulator to the input of the digital-to-analog converter (DAC), thereby taking over control of the power output stage. During this process, the operation of the main regulator is immediately stopped or disabled by the arbitrator to avoid control conflicts between the two regulators. The clamping regulator then generates a new digital control signal by comparing the error between the clamping setpoint (i.e., the clamping threshold) and the current real-time measured feedback value. Unlike the main regulator, which aims to accurately track the setpoint, the core task of the clamping regulator is to actively and smoothly clamp the output value of the output channel to the preset clamping threshold. This means that the clamp regulator will actively adjust the output to be as close as possible to or not exceed the threshold, thereby providing a limited but still continuous output and avoiding immediate disconnection of the excitation to the device under test. This is crucial for certain test scenarios that require maintaining a certain operating state.

[0038] However, if the abnormal condition of the device under test (DUT) fails to improve during the operation of the clamping regulator, or if a sudden event exceeds the control capability of the clamping regulator, causing the real-time measurement feedback value to continue to increase and eventually exceed the preset over-limit threshold, the arbitrator will immediately execute the S6 arbitrator over-limit protection. The over-limit threshold is typically set to a value that is more stringent than the clamping threshold and closer to the hardware limit. Once the over-limit condition is triggered, the arbitrator will quickly generate a control signal to immediately disable the output selector and simultaneously send a disconnect command to the relays or solid-state switches in the power output stage. This action will instantly disconnect the output channel from the DUT, thereby implementing the highest level of over-limit protection. Simultaneously with the output disconnection, the operation of all regulators (including the main regulator and the clamping regulator) will also be stopped to ensure the system is in a safe state and effectively prevent irreversible damage to the source meter itself and the DUT.

[0039] During the operation of the clamping regulator, if the characteristics of the device under test (DUT) return to normal or the abnormal situation is alleviated, causing the real-time measurement feedback value to fall back within the clamping threshold, the arbitrator will smoothly execute S7, switching back to the master regulator. In this step, the arbitrator first stops the operation of the clamping regulator and then enables the output selector, switching its output control signal from the clamping regulator back to the output of the master regulator, allowing the master regulator to regain control of the output channel. This switching is designed to ensure that the source meter can seamlessly return to the high-precision closed-loop control mode after the safety conditions are restored, continuing to perform the original test tasks, thereby maintaining the continuity and efficiency of the test. The entire switching process is designed to be smooth and without transient shocks to avoid any adverse effects on the DUT.

[0040] As a specific embodiment, the digital controller, as the core digital processing unit of the source meter device, integrates the aforementioned main controller, clamping controller, arbitrator, parameter storage and management module, and digital communication interface module. Both the main controller and the clamping controller are designed using programmable digital PID controllers. Taking the main controller as an example, its PID controller's proportional gain (Kp) can be digitally adjusted within the range of 0.1 to 1000, the integral time (Ti) can be configured within the range of 1 microsecond to 10 seconds, and the derivative time (Td) can be configured within the range of 0 to 1 second. The fine-tuning accuracy of these parameters can reach two decimal places, ensuring optimal dynamic response and steady-state accuracy for different load characteristics (such as purely resistive, capacitive, and inductive loads). The clamping controller also has a similar parameter configuration range and accuracy, but its parameter settings focus more on rapid response and the effectiveness of limiting output.

[0041] The arbitrator module, as a key unit for implementing multi-level protection logic, is implemented as a high-performance state machine or a digital logic circuit based on a complex programmable logic device (CPLD) in a specific implementation. This arbitrator module has multiple input ports for receiving real-time measured voltage and current values ​​(digitized by an ADC) from the analog front-end module, and current clamping thresholds, overcurrent thresholds, voltage clamping thresholds, and overvoltage thresholds from the parameter storage and management module. The core logic of the arbitrator generates a series of precise control signals based on the current source meter's operating mode (voltage source mode or current source mode) and the results of real-time comparisons between measured values ​​and thresholds. These control signals include, but are not limited to: logic signals for enabling or disabling the main regulator and clamping regulator; selection signals for driving the output selector to smoothly switch between the main regulator and clamping regulator; and, upon detection of any over-limit conditions, generating interrupt signals or direct control signals to drive relays or solid-state switches in the power output stage, thereby rapidly disconnecting the output channel and achieving hardware-level physical isolation. The arbitrator's response time is designed to be less than 10 microseconds to ensure timely protective measures in case of abnormal situations.

[0042] In practical implementation, the output selector is typically a high-speed digital multiplexer, such as a 2-to-1 data selector, whose control input is connected to the selection signal generated by the arbitrator. When the arbitrator determines that the output needs to be controlled by the main controller, the selection signal routes the main controller's digital control output to the input of the digital-to-analog converter (DAC); conversely, when clamping control is required by the clamping controller, the selection signal switches to the clamping controller's digital control output, connecting it to the DAC. This purely digital switching method ensures smooth, lossless, and extremely low latency switching, avoiding signal distortion and noise that may be introduced by analog switches.

[0043] The parameter storage and management module is the key storage center for the entire system's configuration and runtime parameters. Its design incorporates two types of memory: non-volatile memory (such as EEPROM or flash memory) for permanent storage of system startup configuration, default control parameters, calibration data, and various threshold settings, ensuring that this important data is not lost after power failure; and volatile memory (such as SRAM or DRAM) for storing currently active control parameters, real-time thresholds, and temporary configurations during source table operation, providing high-speed read / write access capabilities and supporting real-time parameter updates and dynamic adjustments. All stored parameters can interact bidirectionally with the host computer via a digital communication interface module, enabling real-time reading, writing, and updating, greatly improving the system's configurability and maintainability. For example, users can remotely modify PID parameters and adjust clamping thresholds in real time via host computer software without interrupting testing or performing any hardware operations.

[0044] In a specific application scenario, when the digital controller is configured in voltage source mode, the method of this invention provides a sophisticated current protection mechanism. In this mode, the main regulator is set as a voltage closed-loop regulator, its input being the error signal between the target voltage value set by the host computer and the real-time measured voltage value from the AFE module. This regulator outputs a digital voltage control signal, which, after being converted to an analog signal by a DAC, drives the power output stage to precisely control the voltage of the output channel. Simultaneously, the clamping regulator is set as a current clamping regulator, its input being the error signal between the user-set current clamping threshold and the real-time measured current value. This regulator outputs a digital current control signal to limit the output current when the current exceeds the limit. In this mode, the arbitrator continuously monitors the real-time measured current value at high frequency and rigorously compares it with preset current clamping thresholds (e.g., 2.0A) and overcurrent thresholds (e.g., 2.2A).

[0045] When the digital controller operates in voltage source mode, its operating logic is as follows: First, when the measured current value is lower than the current clamping threshold (e.g., lower than 2.0A), the arbitrator determines that the system is within its normal operating range. At this time, the arbitrator enables the main regulator and ensures that the output selector accurately connects the digital control output signal of the main regulator to the digital-to-analog converter (DAC), thereby maintaining a stable voltage output. Simultaneously, the arbitrator disables the clamping regulator, placing it in standby mode to avoid interference.

[0046] Secondly, when the measured current value exceeds a preset current clamping threshold (e.g., exceeding 2.0A) but has not yet reached the overcurrent threshold, the arbitrator immediately determines that clamping protection needs to be activated. The arbitrator quickly activates the clamping regulator and enables the output selector, switching the digital control output signal of the clamping regulator to the input of the digital-to-analog converter (DAC). Simultaneously, the arbitrator disables the main regulator. In this state, the clamping regulator actively adjusts the output of the power output stage, ensuring that its output current is actively and smoothly clamped at the current clamping threshold (2.0A), thereby preventing further current increases, protecting the device under test, and maintaining a limited output from the source meter.

[0047] Finally, if the abnormality of the device under test continues to deteriorate, causing the measured current value to continue to increase during the operation of the clamping regulator, and eventually exceeding the preset overcurrent threshold (e.g., exceeding 2.2A), the arbitrator will immediately execute the highest level of protection. The arbitrator instantly disconnects the output channel by controlling a relay or solid-state switch in the power output stage, achieving electrical isolation. Simultaneously, the arbitrator stops the operation of all regulators (main regulator and clamping regulator), ensuring the system is completely safe. This overcurrent threshold is precisely set to be greater than the current clamping threshold (e.g., 2.2A > 2.0A), but strictly less than the maximum transient or continuous current that the power output stage can withstand (e.g., 2.5A), to provide a safe protection margin.

[0048] Conversely, when the digital controller is configured in current source mode, the present invention provides the same fine-grained voltage protection mechanism. In this mode, the main regulator is set as a current closed-loop regulator, and its input is the error signal between the target current value set by the host computer and the real-time measured current value from the AFE module. The regulator outputs a digital current control signal, which is converted into an analog signal by a DAC and drives the power output stage to precisely control the current of the output channel. Simultaneously, the clamping regulator is set as a voltage clamping regulator, and its input is the error signal between the user-set voltage clamping threshold and the real-time measured voltage value. The regulator outputs a digital voltage control signal to limit the output voltage when the voltage exceeds the limit. In this mode, the arbitrator continuously monitors the real-time measured voltage value at high frequency and rigorously compares it with preset voltage clamping thresholds (e.g., 25.0V) and overvoltage thresholds (e.g., 27.0V).

[0049] When the digital controller operates in current source mode, its operating logic is as follows: First, when the measured voltage value is below the voltage clamping threshold (e.g., below 25.0V), the arbitrator determines that the system is within its normal operating range. At this time, the arbitrator enables the main regulator and ensures that the output selector precisely connects the main regulator's digital control output signal to the digital-to-analog converter (DAC), thereby maintaining a stable current output. Simultaneously, the arbitrator disables the clamping regulator, placing it in standby mode. Second, when the measured voltage value exceeds the preset voltage clamping threshold (e.g., above 25.0V) but has not yet reached the overvoltage threshold, the arbitrator immediately determines that clamping protection needs to be activated. The arbitrator quickly activates the clamping regulator and enables the output selector, switching the clamping regulator's digital control output signal to the input of the DAC. Simultaneously, the arbitrator disables the main regulator. In this state, the clamping regulator actively adjusts the output of the power output stage, ensuring that its output voltage is actively and smoothly clamped at the voltage clamping threshold (25.0V), thereby preventing further voltage increases, protecting the device under test, and maintaining a limited output from the source meter.

[0050] Finally, if the abnormality of the device under test continues to deteriorate, causing the measured voltage value to continue to increase during the operation of the clamping regulator, and eventually exceeding the preset overvoltage threshold (e.g., exceeding 27.0V), the arbitrator will immediately execute the highest level of protection. The arbitrator achieves electrical isolation by instantly disconnecting the output channel by controlling a relay or solid-state switch in the power output stage. Simultaneously, the arbitrator stops the operation of all regulators (main regulator and clamping regulator), ensuring the system is completely safe. This overvoltage threshold is precisely set to be greater than the voltage clamping threshold (e.g., 27.0V > 25.0V), but strictly less than the maximum transient or sustained voltage that the power output stage can withstand (e.g., 30.0V), to provide a safe protection margin.

[0051] In a preferred embodiment of the present invention, the control parameters of the main regulator and the clamping regulator are set to match the impedance, capacitance, or inductance characteristics of the device under test. For example, for a purely resistive load, a PID parameter with a higher proportional gain and a shorter integral time can be used to achieve a fast response; for a capacitive load, to suppress overshoot and oscillation, it may be necessary to reduce the proportional gain and appropriately increase the derivative time; for an inductive load, it may be necessary to adjust the integral time to ensure good stability. The parameter storage and management module has preset optimized parameter sets for various typical load types, and users can also upload custom parameter sets through the digital communication interface. This software-based parameter adjustment completely eliminates the limitations of traditional analog schemes that require physical modifications to the hardware circuit, replacement of components, or adjustment of potentiometers to change the control characteristics, significantly improving the system's flexibility and adaptability.

[0052] Example This embodiment aims to verify the current clamping and overcurrent protection effect of the present invention for capacitive loads in voltage source mode.

[0053] Experimental setup: Source equipment: Built using an STM32H7 series microcontroller (as the digital processing unit) and a precision analog front-end module (including a 16-bit ADC and a 16-bit DAC). The power output stage uses a linear power amplifier with a maximum output voltage of 30V and a maximum output current of 2.5A. The output disconnect switch uses a high-speed solid-state relay with a switching time of less than 50 microseconds.

[0054] Device under test (DUT): A 100Ω resistor in series with a 1000μF capacitor.

[0055] Operating mode: Voltage source mode.

[0056] Voltage setting (V_set): 10.0V.

[0057] Current clamping threshold (I_clamp): 0.1A.

[0058] Overcurrent threshold (I_over): 0.12A.

[0059] Main controller PID parameters (voltage loop): Kp=500, Ki=50000, Kd=50.

[0060] Clamping regulator PID parameters (current loop): Kp=200, Ki=20000, Kd=20.

[0061] Sampling frequency: 100kHz.

[0062] Testing process: The source meter starts, the digital controller is configured to voltage source mode, and the above parameters are loaded.

[0063] The output channel is connected to the DUT.

[0064] The host computer issues a command to set the output voltage to 10.0V.

[0065] Experimental Results and Analysis: In the initial stage, because the capacitor is in a discharging state, when the source meter outputs a voltage of 10.0V, the voltage across the capacitor cannot instantly reach 10.0V, resulting in a large charging current flowing through it. The arbitrator monitors the output current in real time.

[0066] 0ms-0.2ms (Master controller operating phase): The source meter initially outputs 10.0V. Due to the capacitive characteristics of the DUT, the initial charging current rises rapidly. At 0.15ms, the monitored output current reaches 0.08A, which is still lower than I_clamp (0.1A). The main regulator (voltage loop) operates, and its output control signal drives the DAC and power amplifier, causing the output voltage to rise rapidly and approach the set value.

[0067] 0.2ms-10ms (Clamping regulator operating phase): At 0.2ms, the real-time measured current value instantaneously reached and exceeded the current clamping threshold I_clamp = 0.1A. The arbitrator detected this state, immediately disabled the main regulator, and enabled the clamping regulator. The output selector switched control to the clamping regulator within 5 microseconds.

[0068] Once activated, the clamping regulator (current loop) quickly intervenes in control. By adjusting the output of the power output stage, it actively clamps the output current to a stable 0.1A. During this period, although the capacitor continues to charge, the current no longer rises indefinitely. The clamping regulator precisely controls the output with its set PID parameters, ensuring that the current fluctuates within the range of 0.100A ± 0.002A over a time window of 0.2ms to 10ms, while the voltage gradually increases according to the capacitor's charging curve. During this phase, the source meter does not disconnect its output but provides a limited and safe stimulus.

[0069] 10ms-10.5ms (overcurrent protection phase): At 10ms, in order to simulate extreme fault conditions, the equivalent impedance of the DUT is drastically reduced by external means (e.g., momentarily short-circuiting the series resistance of the DUT), so that the output current still spikes rapidly even when the clamping regulator is working hard.

[0070] At 10.1ms, the real-time measured current value reached the overcurrent threshold I_over = 0.12A. The arbitrator detected this over-limit condition and immediately triggered overcurrent protection. Within 20 microseconds, the arbitrator sent a disconnect command to the solid-state relay, quickly cutting off the connection between the output channel and the DUT. All regulators stopped operating. The system entered a safe state.

[0071] 10.5ms-20ms (Recovery Phase): After the external fault is removed, the operator issues a reset command through the host computer.

[0072] Upon receiving a reset command and the measured current value falling below the clamping threshold (e.g., the current rapidly drops to zero due to output disconnection), the arbitrator releases the overcurrent protection and re-enables the main regulator. The output selector then switches control back to the main regulator. The source meter resumes supplying a 10.0V voltage output to the DUT and continues the capacitor charging process until the voltage stabilizes.

[0073] This embodiment fully demonstrates that the method proposed in this invention can achieve stable current clamping and rapid overcurrent protection during the initial charging process of a capacitive load through a two-stage protection mechanism, effectively avoiding damage to the DUT and source meter, while maximizing the continuity of testing. The active intervention of the clamping regulator avoids the simple and crude disconnection of the output in traditional protection schemes, providing a higher level of protection and a more flexible testing experience.

[0074] Comparative Example To further highlight the technical advantages of the present invention, this comparative example will describe the performance of a source table output protection scheme based on traditional analog circuits in a similar test scenario.

[0075] Simulated protection scheme settings: Source device: Employing a traditional analog voltage source design, it includes a fixed-gain analog operational amplifier as a voltage regulator, with a fast-blow fuse and a hard current-limiting circuit consisting of a Schottky diode and a power transistor connected in series at its output. Current sensing is achieved by connecting a low-resistance sampling resistor in series and comparing it to a set fixed current threshold via a comparator.

[0076] Device under test (DUT): Same as in the example, a 100Ω resistor in series with a 1000μF capacitor.

[0077] Operating mode: Voltage source mode.

[0078] Voltage setting (V_set): 10.0V.

[0079] Fixed current limiting threshold: 0.1A.

[0080] Overcurrent protection trigger point: When the current reaches 0.11A, the protective shutdown is triggered.

[0081] Analog voltage regulator parameters: fixed gain, bandwidth approximately 100kHz.

[0082] Current limiting circuit characteristics: When the current exceeds 0.1A, the power transistor starts to conduct, limiting the output current to about 0.1A. However, its response speed and accuracy are limited by the inherent characteristics and parasitic parameters of the analog components.

[0083] Overcurrent protection: When the current increases further, the comparator is triggered, and the output is disconnected through a relay.

[0084] Experimental Results and Analysis: 0ms-0.2ms (Analog regulator operating phase): The source meter initially outputs 10.0V. Due to capacitor charging, the current rises rapidly. At 0.15ms, the current reaches 0.08A. The analog voltage regulator then activates, attempting to make the output voltage track the setpoint.

[0085] 0.2ms - approximately 2ms (simulated rate limiting phase): At 0.2ms, the real-time measured current value reaches and exceeds the fixed current limiting threshold of 0.1A. The hard current limiting circuit then intervenes. Due to the non-ideal characteristics of the analog current limiting circuit, there is a brief overshoot when the current reaches 0.1A, with the peak current potentially reaching 0.105A, before being pulled back to around 0.1A. During the current limiting period, the output current fluctuates between 0.095A and 0.105A, exhibiting lower accuracy and stability compared to digital clamping regulators. Furthermore, due to the limitations of analog circuit response speed, significant errors may occur during transient current changes.

[0086] Approximately 2ms-2.1ms (overcurrent protection phase): At 2ms, an external fault is simulated, causing the DUT impedance to drop sharply and the output current to rise rapidly again.

[0087] At 2.05ms, the real-time measured current value exceeded the 0.11A overcurrent protection trigger point. The comparator output went high, driving the relay to disconnect the output. The mechanical switching time of the relay is approximately 5ms, resulting in a significant delay between triggering the protection and actually disconnecting the output. During this delay, the current may rise further, potentially reaching a peak of 0.15A or even higher, thus increasing the risk to the DUT and the source meter itself.

[0088] 2.1ms - approximately 7ms (disconnection and recovery phase): Because the relay requires a 5ms switching time, the output did not fully disconnect until 7.05ms after the protection was triggered at 2.05ms. During this period, the DUT was subjected to a higher-than-expected current surge.

[0089] The recovery process requires manual reset of the relay and cannot achieve a smooth recovery; a test restart is necessary.

[0090] This comparative example reveals the significant limitations of traditional simulation schemes in handling the transient response of capacitive loads. Its main drawback is: Poor current limiting accuracy and stability: Analog current limiting circuits are easily affected by temperature, component aging and parasitic parameters, resulting in low current limiting accuracy and the possibility of overshoot during transients.

[0091] Relatively slow response speed: The response speed of analog circuits is limited by device bandwidth and parasitic capacitance, making it difficult to achieve precise control and switching at the microsecond level.

[0092] High protection delay: The switching time of mechanical relays is much longer than that of solid-state relays, resulting in a longer delay in actually disconnecting the output when an overcurrent occurs, which increases the risk of damage.

[0093] Lack of flexibility: Current limiting thresholds and protection trigger points are usually determined by hardware resistors, making it difficult to make real-time dynamic adjustments and unable to be optimized according to different DUT characteristics.

[0094] Unable to switch and recover smoothly: Once protection is triggered, the output is usually disconnected directly. It lacks the clamping mode in this invention and cannot achieve a smooth and seamless switch from protection mode to normal mode.

[0095] Through the comparison of the above embodiments and comparative examples, the superiority of the present invention is clearly demonstrated. The present invention utilizes a fully digital control architecture to achieve higher accuracy, faster response speed, and more flexible protection mechanisms for current and voltage output. Especially when dealing with transient impacts on capacitive or inductive loads, its two-stage protection strategy (active limiting by clamping regulator and rapid disconnection of over-limit protection) and software-configurable parameter adjustment capabilities significantly surpass the performance of traditional analog solutions.

[0096] Characteristic indicators This invention (digital control and arbitration scheme) Traditional analog solutions (hard current limiting and relay protection) Clamping accuracy ±0.002A (current clamp) / ±0.005V (voltage clamp) ±0.005A (current limiting) / ±0.01V (voltage limiting, affected by temperature) Clamp response time <50 microseconds (switching from normal mode to clamp mode and stabilizing) 100-200 microseconds (simulated current limiting circuit response, prone to overshoot) Over-limit protection response time <20 microseconds (from trigger to output disconnection) 5-10 milliseconds (relay switching time) Parameter configurability Real-time, dynamic, software-configurable (PID, threshold, etc.) Hardware is fixed or requires physical adjustment (potentiometer, resistor). Protection mode Two-stage: Active clamping + quick disconnection Single-stage: Directly disconnected after hard current limiting. Smoothness of mode switching Smooth and seamless, controlled by a digital arbitrator A sudden disconnection usually requires manual reset. Adaptability to capacitive / inductive loads Software parameter optimization to suppress overshoot and oscillation. It is prone to overshoot and oscillation, making adjustment difficult. Hardware complexity Reduced cost (integrated into DSP / FPGA, reducing external analog components) Higher complexity (requires multiple analog control circuits, comparators, relays, etc.) System reliability High (digital logic, reducing the effects of analog drift and component aging) Medium (Susceptible to analog component drift and aging) Diagnosis and traceability It can record all parameters, statuses, and events, facilitating diagnosis and remote maintenance. Limited availability makes it difficult to obtain detailed diagnostic data in real time. This table quantitatively compares the significant improvements of the present invention over traditional simulation schemes in key performance indicators, especially in response speed, control accuracy, flexibility and reliability, where the advantages of the present invention are overwhelming.

[0097] In summary, the source meter output protection method proposed in this invention, through sophisticated fully digital control and intelligent arbitration mechanisms, not only solves the inherent drawbacks of traditional source meter protection schemes at the technical level, but also provides unprecedented flexibility, precision, and efficiency in engineering implementation. This method ensures that the source meter provides stable and accurate excitation to the device under test (DUT) under various complex testing environments and implements rapid and reliable protection, thereby greatly improving testing efficiency and security. Its integrated, programmable, two-level protection architecture undoubtedly represents an important direction in the development of source meter technology.

[0098] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for protecting the output of a source table, characterized in that, The method is applicable to source meter devices with four-quadrant operation capability. The source meter device has at least one output channel, which is used to provide an excitation signal to the device under test and acquire a response signal. The method includes the following steps: S1. Configure the operating mode of the digital controller: According to the preset operating mode of the source meter, configure the digital controller as a voltage source mode or a current source mode. S2. Set the parameters of the main controller and the clamping controller: Based on the characteristics of the device under test, the test requirements, and the expected response speed and accuracy, the control parameters of the main controller and the clamping controller are dynamically configured through the digital interface, and preset clamping threshold and over-limit threshold are set. S3. Closed-loop control of the main controller: During normal operation of the source meter, the digital controller activates the main controller, which generates a digital control signal by comparing the error between the output setpoint and the measurement feedback value. This signal is converted from digital to analog and amplified by power to drive the output channel so that the measurement feedback value accurately tracks the output setpoint. S4. Continuous monitoring of output status: The arbitrator module in the digital controller continuously monitors the real-time measurement feedback value of the output channel and compares it with the preset clamping threshold and the over-limit threshold. S5. Arbitrator switches to clamping regulator: When the real-time measurement feedback value exceeds the preset clamping threshold, the arbitrator starts the clamping regulator and enables the output selector to switch the output of the clamping regulator to the output channel, while stopping the operation of the main regulator. At this time, the clamping regulator generates a digital control signal by comparing the error between the clamping set value and the measurement feedback value, so that the output value of the output channel is actively clamped at the clamping threshold. S6. Arbitrator performs over-limit protection: When the real-time measurement feedback value continues to increase and exceeds the preset over-limit threshold during the operation of the clamping regulator, the arbitrator immediately disables the operation of the output selector, thereby disconnecting the output channel to implement over-limit protection. S7. Arbitrator switches back to master controller: When the real-time measurement feedback value falls back to within the clamping threshold during the operation of the clamping controller, the arbitrator stops the operation of the clamping controller and enables the output selector to switch the output of the master controller back to the output channel.

2. The source table output protection method according to claim 1, characterized in that, The source meter device includes: an analog front-end module, a power output stage, a digital processing unit, and a digital interface module; The analog front-end module includes a high-precision analog-to-digital converter (ADC) and a digital-to-analog converter (DAC). The ADC is used to convert the real-time voltage and current signals of the output channel into digital signals and input them to the digital processing unit. The DAC is used to convert the digital control signals generated by the digital processing unit into analog signals and input them to the power output stage. The power output stage includes a linear power amplifier and a relay or solid-state switch for isolating the output channel; The digital processing unit is the digital controller; The digital interface module is used to enable data communication between the digital processing unit and an external host computer for configuration, monitoring, and data exchange.

3. The source table output protection method according to claim 1, characterized in that, The digital controller is integrated within a digital signal processor or field-programmable gate array chip, and includes: a main controller, a clamp controller, an arbitrator, a parameter storage and management module, and a digital communication interface module. Both the main controller and the clamping controller are programmable digital closed-loop controllers, and their control algorithms can be proportional-integral-derivative algorithms, and they have independently configurable sets of control parameters. The digital communication interface module is used to interact with the host computer to receive instructions, set values, control parameters and send measurement data.

4. The source table output protection method according to claim 3, characterized in that, When the digital controller is configured in voltage source mode: The main regulator is configured as a voltage closed-loop regulator, with its input being a voltage setpoint and a measured voltage value, and its output being a digital voltage control signal that drives the digital-to-analog converter. The clamping regulator is configured as a current clamping regulator, with its input being a current clamping threshold and a measured current value, and its output being a digital current control signal that drives the digital-to-analog converter. The arbitrator continuously monitors the measured current value against preset current clamping thresholds and overcurrent thresholds.

5. The source table output protection method according to claim 4, characterized in that, When the digital controller is operating in voltage source mode: When the measured current value is lower than the current clamping threshold, the arbitrator enables the main regulator and connects its output control signal to the digital-to-analog converter through the output selector, while disabling the clamping regulator. When the measured current value exceeds the current clamping threshold, the arbitrator activates the clamping regulator and enables the output selector to connect the output control signal of the clamping regulator to the digital-to-analog converter, while disabling the main regulator. At this time, the clamping regulator actively adjusts the output current to bring it closer to the current clamping threshold. When the measured current value continues to increase and exceeds the overcurrent threshold during the operation of the clamping regulator, the arbitrator disconnects the output channel and stops the operation of all regulators by controlling the relays or solid-state switches in the power output stage. The overcurrent threshold is set to be greater than the current clamping threshold, but less than the maximum current that the power output stage can withstand.

6. The source table output protection method according to claim 5, characterized in that, When the digital controller is configured in current source mode: The main regulator is configured as a current closed-loop regulator, with its input being the current setpoint and the measured current value, and its output being a digital current control signal that drives the digital-to-analog converter. The clamping regulator is configured as a voltage clamping regulator, with its input being a voltage clamping threshold and a measured voltage value, and its output being a digital voltage control signal that drives the digital-to-analog converter. The arbitrator continuously monitors the measured voltage value against preset voltage clamping thresholds and overvoltage thresholds.

7. The source table output protection method according to claim 6, characterized in that, When the digital controller is operating in current source mode: When the measured voltage value is lower than the voltage clamping threshold, the arbiter enables the main regulator and connects its output control signal to the digital-to-analog converter through the output selector, while disabling the clamping regulator. When the measured voltage value exceeds the voltage clamping threshold, the arbitrator activates the clamping regulator and enables the output selector to connect the output control signal of the clamping regulator to the digital-to-analog converter, while disabling the main regulator. At this time, the clamping regulator actively adjusts the output voltage to bring it closer to the voltage clamping threshold. When the measured voltage value continues to increase and exceeds the overvoltage threshold during the operation of the clamping regulator, the arbitrator disconnects the output channel and stops the operation of all regulators by controlling the relays or solid-state switches in the power output stage. The overvoltage threshold is set to be greater than the voltage clamping threshold, but less than the maximum voltage that the power output stage can withstand.

8. The source table output protection method according to claim 2, characterized in that, The arbitrator module is a state machine or a digital logic circuit implemented based on a logic gate array, which is used for: Receive measured voltage and measured current values ​​from the analog front-end module; Receive current clamping threshold, overcurrent threshold, voltage clamping threshold, and overvoltage threshold from the parameter storage and management module; Based on the operating mode of the source table and the comparison result between the measured value and the threshold, a control signal is generated to enable or disable the main regulator and the clamp regulator. A control signal is generated to drive the output selector to switch between the main regulator and the clamp regulator; When an overlimit condition is detected, an interrupt signal or control signal is generated to drive a relay or solid-state switch in the power output stage, thereby disconnecting the output channel.

9. The source table output protection method according to claim 1, characterized in that, The output selector is a digital multiplexer, which routes the digital control output of the main regulator or the clamping regulator to the input of the digital-to-analog converter according to the selection signal generated by the arbitrator.

10. The source table output protection method according to claim 8, characterized in that, The parameter storage and management module includes a non-volatile memory and a volatile memory. The non-volatile memory is used to permanently store system startup configuration, default control parameters, and calibration data. The volatile memory is used to store currently active control parameters, real-time thresholds, and temporary configurations when the source table is running. The module is used to store the control parameters, clamping threshold, over-limit threshold, and system configuration parameters of the main controller and the clamping controller. The parameters can be read, written, and updated in real time through the digital communication interface module while the source table is running.

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