Bionic visual array system based on two-dimensional negative capacitance phototransistor

Abstract

The invention provides a bionic visual array system based on a two-dimensional negative capacitance phototransistor, and relates to the technical field of photoelectric detection, and the bionic visual array system comprises a MoS2 negative capacitance phototransistor, a voltage conversion circuit, a differential amplification circuit, a sampling hold circuit, a switching circuit and a voltage regulation circuit. The MoS2 negative capacitance photoelectric transistor is used for sensing a light signal to generate a light sensing current signal, the light sensing current signal is processed by the voltage conversion circuit, the differential amplification circuit and the sampling hold circuit and then a sampling hold signal is output, and the switching circuit controls the output of the sampling hold signal; the voltage adjusting circuit is used for adjusting the gate voltage of the gate of the MoS2 negative capacitance photoelectric transistor; the conduction threshold voltage of the MoS2 negative capacitance phototransistor is inversely correlated with the illumination intensity, and when the gate voltage is smaller than the dark state current turn-on voltage, the illumination sensitivity is positively correlated with the gate voltage; and the photosensitive modules sequentially output corresponding sampling holding signals according to a preset sequence. The system can realize data redundancy processing.

Description

Technical Field

[0001] This application relates to the field of photoelectric detection technology, and in particular to a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor. Background Technology

[0002] The development of machine vision can be applied to applications such as intelligent vehicles and real-time video analytics. It requires hardware with high resolution, high image capture speed, good stability, and the ability to detect under a wide range of lighting conditions. Because natural light intensity spans a wide range of 280 dB, accurate image capture under different lighting conditions is particularly important for correctly perceiving the environment.

[0003] However, in machine vision applications, most of the information is redundant, with only a small portion being truly valuable. Traditional photodetectors can only mechanically record all the information, resulting in significant redundancy. This redundancy typically requires further processing by backend hardware and software, leading to substantial hardware and software overhead. Summary of the Invention

[0004] In view of this, this application proposes a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor.

[0005] In a first aspect, this application provides a biomimetic visual array system based on a two-dimensional negative capacitance phototransistor, comprising: multiple photosensitive modules, wherein the photosensitive module includes a MoS2 negative capacitance phototransistor, a voltage conversion circuit, a differential amplifier circuit, a sample and hold circuit, a switching circuit, and a voltage regulation circuit; The MoS2 negative capacitance phototransistor is used to sense light signals and generate a photocurrent signal; the voltage conversion circuit is used to convert the photocurrent signal into a photovoltage signal; the differential amplifier circuit is used to differentially amplify the photovoltage signal and output a differential amplified signal to the sample-and-hold circuit; the sample-and-hold circuit is used to generate a sample-and-hold signal based on the differential amplified signal in response to a sample-and-hold control signal; the switching circuit is used to control the output of the sample-and-hold signal in response to a switch selection signal; the voltage adjustment circuit is used to output a gate voltage adjustment signal based on a gate voltage control signal to adjust the gate voltage applied to the gate of the MoS2 negative capacitance phototransistor. The turn-on threshold voltage of the MoS2 negative capacitance phototransistor is inversely correlated with the light intensity, and the light sensitivity of the MoS2 negative capacitance phototransistor is positively correlated with the gate voltage when the gate voltage is less than the dark state current turn-on voltage. Each photosensitive module receives the switch selection signal in a preset order, so that each photosensitive module outputs the corresponding sample-and-hold signal in a preset order.

[0006] In one embodiment, the MoS2 negative capacitance phototransistor includes: a substrate, a ferroelectric layer, a dielectric layer, a MoS2 semiconductor layer, a source electrode, and a drain electrode; The substrate serves as the gate of the MoS2 negative capacitance phototransistor; The ferroelectric layer is located on the upper surface of the substrate; The dielectric layer includes a surface located away from the substrate of the ferroelectric layer; The MoS2 semiconductor layer is located on the surface of the dielectric layer away from the substrate; The source and drain are located on the surface of the dielectric layer away from the substrate, and on opposite sides of the MoS2 semiconductor layer.

[0007] In one embodiment, the bionic vision array system further includes processing circuitry; The processing circuit is connected to the output terminal of the bionic vision array system. The processing circuit is used to obtain the output voltage of the bionic vision array system, compare the output voltage with the preset maximum allowable voltage, and control the voltage adjustment circuit to adjust the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor according to the comparison result.

[0008] In one embodiment, the cycle of the bionic visual array system includes a photosensitive phase and a photoelectric data output phase; During the photosensitive stage, the MoS2 negative capacitance phototransistor senses a light signal and generates a photosensitive current signal. The voltage conversion circuit converts the photosensitive current signal into a photosensitive voltage signal. The differential amplifier circuit performs differential amplification on the photosensitive voltage signal and outputs a differential amplified signal to the sample-and-hold circuit. The sample-and-hold circuit responds to a sample-and-hold control signal at a first level and generates a sample-and-hold signal that is consistent with the differential amplified signal. During the photoelectric data output stage, the sample-and-hold circuit responds to the sample-and-hold control signal at the second level state to hold the sample-and-hold signal at the last moment of the photosensitive stage; each photosensitive module outputs the corresponding sample-and-hold signal as the output voltage of the bionic vision array system in a preset order, and the processing circuit controls the voltage adjustment circuit to adjust the corresponding gate voltage according to each output voltage.

[0009] In one embodiment, the voltage conversion circuit includes: a first operational amplifier and a first resistor; The positive input terminal of the first operational amplifier is grounded, and the negative input terminal of the first operational amplifier is used to receive the photosensitive current signal; The first end of the first resistor is connected to the negative input terminal of the first operational amplifier, and the second end of the first resistor is connected to the output terminal of the first operational amplifier. The output terminal of the first operational amplifier serves as the output terminal of the voltage conversion circuit.

[0010] In one embodiment, the differential amplifier circuit includes: a second resistor, a third resistor, a fourth resistor, a fifth resistor, and a second operational amplifier; The first end of the second resistor is connected to the output terminal of the voltage conversion circuit, and the second end of the second resistor is connected to the negative input terminal of the second operational amplifier. The first end of the third resistor is used to receive the dark state reference voltage, and the second end of the third resistor is connected to the positive input terminal of the second operational amplifier. The dark state reference voltage is the voltage obtained by the dark current conversion of the MoS2 negative capacitor phototransistor in the dark state. The first end of the fourth resistor is connected to the positive input terminal of the second operational amplifier, and the second end of the fourth resistor is grounded. The first end of the fifth resistor is connected to the negative input terminal of the second operational amplifier, and the second end of the fifth resistor is connected to the output terminal of the second operational amplifier. The output terminal of the second operational amplifier serves as the output terminal of the differential amplifier circuit.

[0011] In one embodiment, the sample-and-hold circuit includes: a sixth resistor, a seventh resistor, a switching unit, a first capacitor, and a third operational amplifier; The first end of the sixth resistor is used to receive the differential amplified signal, and the second end of the sixth resistor is connected to the first end of the switching unit and the first end of the seventh resistor, respectively. The second terminal of the switching unit is connected to the negative input terminal of the third operational amplifier and the first terminal of the first capacitor, respectively. The control terminal of the switching unit is used to receive the sample-and-hold control signal. The positive input terminal of the third operational amplifier is grounded, and the output terminal of the third operational amplifier is connected to the second terminal of the first capacitor and the second terminal of the seventh resistor, respectively, and serves as the output terminal of the sample-and-hold circuit.

[0012] In one embodiment, the voltage regulation circuit includes: an eighth resistor, a second capacitor, and a fourth operational amplifier; The first end of the eighth resistor is used to receive the gate voltage control signal, and the second end of the eighth resistor is connected to the first end of the second capacitor and the negative input terminal of the fourth operational amplifier, respectively. The positive input terminal of the fourth operational amplifier is grounded, and the output terminal of the fourth operational amplifier is connected to the second terminal of the second capacitor and serves as the output terminal of the voltage regulation circuit.

[0013] In one embodiment, the bionic vision array system further includes a pulse generation circuit for periodically generating the sample-and-hold control signal and the switch selection signal.

[0014] Secondly, this application also provides a control method for a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor, the control method being applied to the biomimetic vision array system based on a two-dimensional negative capacitance phototransistor as described in the first aspect; the method includes: Obtain the output voltage of the bionic vision array system; The output voltage is compared with the preset maximum allowable voltage, and the voltage regulation circuit is controlled to adjust the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor based on the comparison result.

[0015] The biomimetic vision array system based on two-dimensional negative capacitance phototransistors proposed in this application has the following advantages over related technologies: 1. The biomimetic vision array system based on two-dimensional negative capacitance phototransistors of this application includes multiple photosensitive modules. Each photosensitive module includes a MoS2 negative capacitance phototransistor, a voltage conversion circuit, a differential amplifier circuit, a sample-and-hold circuit, a switching circuit, and a voltage regulation circuit. The MoS2 negative capacitance phototransistor senses light signals and generates photosensitive current signals. The voltage conversion circuit converts the photosensitive current signals into photosensitive voltage signals. The differential amplifier circuit differentially amplifies the photosensitive voltage signals and outputs the differential amplified signals to the sample-and-hold circuit. The sample-and-hold circuit responds to the sample-and-hold control signal and generates a sample-and-hold signal based on the differential amplified signal. Each photosensitive module can sequentially output the obtained photovoltage sample-and-hold signals in the array to form a recognition image. Based on this, since the turn-on threshold voltage of the MoS2 negative capacitance phototransistor is inversely correlated with light intensity, and the light sensitivity of the MoS2 negative capacitance phototransistor is positively correlated with the gate voltage when the gate voltage is less than the dark-state current turn-on voltage, then a decrease in the gate voltage of the MoS2 negative capacitance phototransistor corresponds to light adaptation in visual adaptation, while an increase in the gate voltage corresponds to dark adaptation in visual adaptation. Therefore, by controlling the gate voltage control signal, the voltage regulation circuit can be controlled to adjust the gate voltage applied to the gate of the MoS2 negative capacitance phototransistor, simulating the light and dark adaptation bio-photosensing methods of the human eye. This can achieve front-end image denoising and contrast enhancement effects at the device level, and realize data redundancy processing. This new photosensing method can significantly reduce back-end software overhead.

[0016] 2. In this application, since the MoS2 negative capacitance phototransistor outputs photocurrent, while the data analyzed in the backend is usually voltage, a voltage conversion circuit is used to convert the current into voltage, which facilitates subsequent processing. Simultaneously, a differential amplifier circuit is used to differentially amplify the photosensitive voltage signal, eliminating drift caused by temperature and background and reducing interference. Finally, a sample-and-hold circuit samples and holds the photodetector data. By controlling the on / off state of the switching circuits in each photosensitive module, each module can output its corresponding sample-and-hold signal sequentially according to a preset order, thus allowing the photodetector data from the same bit line to be output sequentially, ultimately forming a photosensitive array for image recognition.

[0017] 3. The biomimetic vision array system based on MoS2 negative capacitance phototransistors in this application uses MoS2 negative capacitance phototransistors for photosensing. This leverages the negative capacitance effect of the MoS2 negative capacitance phototransistor to improve weak light detection intensity, overcoming the shortcomings of traditional CMOS photosensitive sensors in weak light detection, and further reducing voltage and power consumption. Furthermore, based on the three-terminal structure and fast response time of the MoS2 negative capacitance phototransistor, a fast frame output speed can be guaranteed through timing design. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor in one embodiment of this application; Figure 2 This is a schematic diagram of the equivalent circuit structure of the photosensitive module in one embodiment of this application; Figure 3 This is a graph showing the relationship between the light sensitivity and light intensity of a MoS2 negative capacitance phototransistor in one embodiment of this application. Figure 4 This is a schematic cross-sectional view of a MoS2 negative capacitance phototransistor in one embodiment of this application; Figure 5 This is a timing diagram of some signals involved in the photosensitive module in one embodiment of this application; Figure 6 (a) is a waveform diagram of the input current of the voltage conversion circuit in one embodiment of this application; Figure 6 (b) is a waveform diagram of the output voltage of the voltage conversion circuit in one embodiment of this application; Figure 7 (a) is a schematic diagram of the difference in input voltage of a differential amplifier circuit in one embodiment of this application; Figure 7 (b) is a waveform diagram of the output voltage of the differential amplifier circuit in one embodiment of this application; Figure 8 (a) is a waveform diagram of the input voltage of the sample-and-hold circuit in one embodiment of this application; Figure 8 (b) is a waveform diagram of the control voltage of the sample-and-hold circuit in one embodiment of this application; Figure 8 (c) is a waveform diagram of the output voltage of the sample-and-hold circuit in one embodiment of this application; Figure 9 (a) is a waveform diagram of the input voltage of the voltage regulation circuit in one embodiment of this application; Figure 9 (b) is a waveform diagram of the output voltage of the voltage regulation circuit in one embodiment of this application; Figure 10 This is a schematic diagram of a 5*5 pixel grayscale image of the character "8" in one embodiment of this application; Figure 11 This is a schematic diagram illustrating the change in photovoltage output value after multiple input cycles in one embodiment of this application; Figure 12 (a) is a schematic diagram comparing the power consumption of a MoS2 negative capacitance phototransistor photosensitive array and a MoS2 ordinary phototransistor photosensitive array in one embodiment of this application. Figure 12 (b) is a schematic diagram comparing the bias voltages of a MoS2 negative capacitance phototransistor photosensitive array and a MoS2 ordinary phototransistor photosensitive array in one embodiment of this application. Figure 13 (a) is a schematic diagram of the original images of the MNIST handwritten digit dataset; Figure 13 (b) is a schematic diagram of the MNIST handwritten digit dataset with added noise. Figure 13 (c) is a schematic diagram of the photovoltage image after the MNIST handwritten digit dataset image with added noise is detected by a bionic vision array system; Figure 14 (a) is Figure 13 The graph shows the curves showing how the accuracy of each image in the training and recognition process changes with the number of training rounds, after each image is input into a pre-configured neural network. Figure 14 (b) is Figure 13 A schematic diagram showing the curves of the loss function changing with the number of training rounds when each image is input into a pre-configured neural network for training and recognition. Figure 15 This is a flowchart illustrating the control method of a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor in one embodiment of this application.

[0020] Explanation of reference numerals in the attached figures: 1-A biomimetic visual array system based on a two-dimensional negative capacitance phototransistor; 11-Photosensitive module; 111-MoS2 negative capacitance phototransistor; 1111-Substrate; 1112-Ferroelectric layer; 1113-Dielectric layer; 1114-MoS2 semiconductor layer; 1115-Source; 1116-Drain; 112-Voltage conversion circuit; 113-Differential amplifier circuit; 114-Sample-and-hold circuit; 115-Switching circuit; 116-Voltage regulation circuit. Detailed Implementation

[0021] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0022] As described in the background section, the development of machine vision can be used in applications such as intelligent vehicles and real-time video analytics, requiring hardware with high resolution, high image capture speed, good stability, and the ability to detect under a wide range of lighting conditions. Accurate image capture under varying lighting conditions is particularly important for proper environmental perception, as natural light intensity spans a wide range of 280 dB. This necessitates photodetectors capable of accurately capturing and perceiving details in both shadows and highlights.

[0023] Photodetectors convert information stored in optical signals into electrical signals that can be processed by electronic devices, and they are widely used in imaging and optical interconnects. The first generation of photodetectors were Si-based photodetectors, compatible with traditional complementary metal-oxide-semiconductor (CMOS) processes. Due to their small size and low cost, Si-based photodetectors were widely used. However, as an indirect bandgap semiconductor, Si has low light absorption efficiency. Therefore, although Si-based photodetectors can detect near-infrared and visible light signals, their responsivity is low, and shrinking device size leads to increased power consumption per unit area, as well as increased gate leakage current due to quantum tunneling effects. Furthermore, the most advanced image sensors using silicon CMOS technology typically have a dynamic range of 70 dB, which is much narrower than that of natural scenes.

[0024] The most representative second-generation photodetector is the photodetector made of HgCdTe. As it is a direct bandgap compound, it makes up for the shortcomings of Si-based detectors. At the same time, by controlling the Cd component in the compound, a bandgap covering the entire infrared band can be achieved. However, due to the difficulty in growing compounds such as HgCdTe, its poor stability and low yield limit its practical application.

[0025] The emergence of Type I superlattice materials, represented by InAs / GaSb, has made up for the shortcomings of the previous two generations of detectors and become the third generation of detectors. Its growth methods are mature, the yield rate is high, and it can achieve performance close to that of the second generation of photodetectors. However, its light absorption rate is low. Moreover, as people's demand for photodetectors gradually shifts towards miniaturization, the above three generations of detectors are all bulky materials, which cannot meet the requirements.

[0026] To address these issues, researchers have conducted extensive and in-depth studies in the field of novel materials and device structures. Two-dimensional materials such as graphene and transition metal dichalcogenides have attracted widespread attention due to their unique crystal structures and excellent photoelectric properties, making them promising candidates for future photodetectors. Therefore, field-effect transistors based on two-dimensional materials have been proposed, effectively reducing short-channel effects while maintaining high carrier mobility. In addition, two-dimensional materials possess high carrier mobility, good electrostatic control, and tunable electrical properties. Common two-dimensional materials include MoS2, WS2, MoSe2, and WSe2. Notably, most MoS2-based phototransistors exhibit responsivity several orders of magnitude higher than those based on WS2 and MoSe2. Therefore, MoS2 has been extensively studied, demonstrating high on / off ratios, large optical gain, and high specific detectivity.

[0027] MoS2 is a two-dimensional transition metal dichalcogenide with high quantum efficiency, high carrier mobility, and a thickness-dependent bandgap, which is of great significance for the design and fabrication of high-performance photodetectors in the visible to near-infrared range. In MoS2-channel phototransistors, inserting a ferroelectric thin film into the gate stack is a method to improve responsivity and detectivity. The negative capacitance effect generated by the polarity reversal of the ferroelectric material can amplify the gate voltage, achieving a steep subthreshold swing below 60 mV / dec, effectively enhancing the photocurrent of the MoS2 photodetector while maintaining response speed.

[0028] Based on this, in some embodiments, such as Figure 1 As shown, this application provides a biomimetic visual array system 1 based on a two-dimensional negative capacitance phototransistor, comprising: multiple photosensitive modules 11, each photosensitive module 11 including a MoS2 negative capacitance phototransistor 111, a voltage conversion circuit 112, a differential amplifier circuit 113, a sample-and-hold circuit 114, a switching circuit 115, and a voltage regulation circuit 116. Exemplarily, the equivalent circuit of the photosensitive module 11 can be as follows: Figure 2 As shown, Figure 2 The lower half of the MoS2 negative capacitor phototransistor 111 and voltage conversion circuit 112 work together to provide a dark-state reference voltage to the positive input terminal of the differential amplifier circuit 113. It should be noted that... Figure 2The method of providing the dark-state reference voltage shown is only one example of this application. Other methods can also be used to provide the dark-state reference voltage to the positive input terminal of the differential amplifier circuit 113. The switching circuit 115 may include a MOSFET, with the source and drain of the MOSFET serving as the first and second terminals of the switching circuit 115, respectively, and the gate of the MOSFET serving as the control terminal of the switching circuit 115.

[0029] MoS2 negative capacitor phototransistor 111 is used to sense light signals and generate photocurrent signals; voltage conversion circuit 112 is used to convert photocurrent signals into photovoltage signals; differential amplifier circuit 113 is used to differentially amplify the photovoltage signals and output differential amplified signals to sample-and-hold circuit 114; sample-and-hold circuit 114 is used to generate sample-and-hold signals based on differential amplified signals in response to sample-and-hold control signals; the first terminal of switch circuit 115 is connected to the output terminal of sample-and-hold circuit 114, the second terminal of switch circuit 115 is connected to the output terminal of bionic vision array system 1, the control terminal of switch circuit 115 is used to receive switch selection signals, and switch circuit 115 is used to control the output of sample-and-hold signals in response to switch selection signals; voltage adjustment circuit 116 is used to output gate voltage adjustment signals based on gate voltage control signals to adjust the gate voltage applied to the gate of MoS2 negative capacitor phototransistor 111.

[0030] Among them, the turn-on threshold voltage of the MoS2 negative capacitor phototransistor 111 is inversely correlated with the light intensity, and when the gate voltage of the MoS2 negative capacitor phototransistor 111 is less than the dark state current turn-on voltage, the light sensitivity of the MoS2 negative capacitor phototransistor 111 is positively correlated with the gate voltage; each photosensitive module 11 receives the switch selection signal in a preset order, so that each photosensitive module 11 outputs the corresponding sample and hold signal in a preset order.

[0031] In applications, the visual adaptation function of the human retina relies on various biological cells, including rod and cone cells that act as photoreceptors, and horizontal cells for subsequent accommodation. Rod cells have high photosensitivity and are specifically responsible for detecting dim light, while cone cells can capture visual information in high-intensity light. Both rod and cone cells have limited detection ranges for light intensity. Their combination allows adaptation and perception of a wide range from sunlight to starlight. The working mechanism of this visual adaptation mainly depends on the negative feedback of horizontal cells and the conversion of regenerated / bleached photopigments between rod and cone cells. The perceived change in stimulus is proportional to the initial stimulus; this is Weber's Law. In other words, as background illumination increases, the visual threshold of the retina increases accordingly, and if background illumination decreases, the visual threshold of the retina decreases accordingly. Visual adaptation includes dark adaptation and light adaptation. When exposed to a dim environment, a person can initially see almost nothing, but after dark adaptation, objects can gradually be seen because retinal sensitivity gradually increases over time, and the visual threshold decreases. A person may initially be dazzled by bright objects, but will gradually become able to see them after adaptation, as the sensitivity of the retina gradually decreases over time and the visual threshold increases.

[0032] The MoS2 negative capacitance phototransistor 111 has a sensitivity to light intensity similar to the human eye, allowing for the definition of a fixed gate voltage. The photocurrent of the MoS2 negative capacitance phototransistor 111 under illumination. Rather than in dark state current The difference is the photocurrent. Photocurrent With dark state current The ratio is the light contrast ratio. Then the light contrast This can demonstrate the sensitivity of the MoS2 negative capacitance phototransistor 111 to light intensity, i.e., its light contrast ratio. Light sensitivity.

[0033]

[0034] For the MoS2 negative capacitance phototransistor 111, when the dark-state current is less than the turn-on voltage (e.g., 0.5V), that is, when the dark state of the MoS2 negative capacitance phototransistor 111 is in the off-state condition, its gate voltage varies. Light sensitivity The relationship curve between light intensity and light intensity is as follows: Figure 3 As shown.

[0035] The MoS2 negative capacitance phototransistor 111, when the dark-state current turn-on voltage is less than 0.5V, increases with the gate voltage. The reduction in light sensitivity The curve decreases overall, indicating that with the gate voltage... As the gate voltage decreases, the MoS2 negative capacitance phototransistor 111 exhibits a decreasing sensitivity to light intensity; conversely, as the gate voltage decreases... With the increase of light intensity, the MoS2 negative capacitance phototransistor 111 exhibits an increasing trend in sensitivity to light intensity.

[0036] Meanwhile, since the MoS2 negative capacitance phototransistor 111 is in the off state in the dark state, the dark-state current is very small, resulting in low noise and a tiny current. If the illumination current is set... Greater than dark state current Twice as much, i.e., light sensitivity A value greater than 1 is required to clearly distinguish the photocurrent. With dark state current The difference lies in the gate voltage. The reduction in light sensitivity The portion greater than 1 corresponds to a continuous increase in light intensity, which means that higher light intensity generates photocurrent. Only then can it interact with dark state current Discrimination, i.e., an increase in the visual threshold. Conversely, with the gate voltage... The increase in light intensity leads to a lower light intensity and a lower photocurrent. It can also be associated with dark-state current. Distinguishing, i.e., reducing the visual threshold.

[0037] Therefore, it can be observed that the gate voltage of the MoS2 negative capacitance phototransistor 111... The decrease corresponds to light adaptation in visual adaptation, while the gate voltage of the MoS2 negative capacitance phototransistor 111... The increase in light corresponds to dark adaptation in visual adaptation. Based on this characteristic, combined with the circuit design described above, the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor 111 can be adjusted by controlling the gate voltage control signal through the voltage regulation circuit 116. This simulates the light and dark adaptation bio-photosensing methods of the human eye, achieving front-end image denoising and contrast enhancement at the device level, and enabling data redundancy processing. Furthermore, since the MoS2 negative capacitor phototransistor 111 outputs photocurrent, while back-end processing and analysis data is typically voltage, the voltage conversion circuit 112 converts the current to voltage for easier subsequent processing. Simultaneously, the differential amplifier circuit 113 differentially amplifies the photosensitive voltage signal, eliminating drift caused by temperature and background and reducing interference. Finally, the sample-and-hold circuit 114 samples and holds the photodetector data. By controlling the on / off state of the switching circuit 115 in each photosensitive module 11, each photosensitive module 11 can output the corresponding sample-and-hold signal sequentially according to a preset order, thus allowing the photodetector data of the same bit line to be output sequentially, ultimately forming a photosensitive array for image recognition. Meanwhile, by using the MoS2 negative capacitance phototransistor 111 for photosensing, the low-light detection intensity can be improved based on the negative capacitance effect of the MoS2 negative capacitance phototransistor 111, further reducing voltage and power consumption. In addition, based on the three-terminal structure and fast response time of the MoS2 negative capacitance phototransistor 111, a fast frame output speed can be guaranteed through timing design.

[0038] The biomimetic vision array system 1 based on two-dimensional negative capacitance phototransistors described in this application includes multiple photosensitive modules 11. Each photosensitive module 11 includes a MoS2 negative capacitance phototransistor 111, a voltage conversion circuit 112, a differential amplifier circuit 113, a sample-and-hold circuit 114, a switching circuit 115, and a voltage regulation circuit 116. The MoS2 negative capacitance phototransistor 111 senses light signals and generates photosensitive current signals. The voltage conversion circuit 112 converts the photosensitive current signals into photosensitive voltage signals. The differential amplifier circuit 113 differentially amplifies the photosensitive voltage signals and outputs a differential amplified signal to the sample-and-hold circuit 114. The sample-and-hold circuit 114 responds to a sample-and-hold control signal and generates a sample-and-hold signal based on the differential amplified signal. Each photosensitive module 11 can sequentially output the obtained photovoltage sample-and-hold signals in an array to form a recognition image. Based on this, since the turn-on threshold voltage of the MoS2 negative capacitance phototransistor 111 is inversely correlated with the light intensity, and the light sensitivity of the MoS2 negative capacitance phototransistor 111 is positively correlated with the gate voltage when the gate voltage of the MoS2 negative capacitance phototransistor 111 is less than the dark-state current turn-on voltage, then the decrease in the gate voltage of the MoS2 negative capacitance phototransistor 111 corresponds to light adaptation in visual adaptation, while the increase in the gate voltage of the MoS2 negative capacitance phototransistor 111 corresponds to dark adaptation in visual adaptation. Therefore, by controlling the gate voltage control signal, the voltage regulation circuit 116 can be controlled to adjust the gate voltage applied to the gate of the MoS2 negative capacitance phototransistor 111, simulating the light and dark adaptation bio-photosensing methods of the human eye. This can achieve front-end image denoising and contrast enhancement effects at the device level, and realize data redundancy processing. This new photosensing method can significantly reduce back-end software overhead.

[0039] In some embodiments, such as Figure 4 As shown, the MoS2 negative capacitance phototransistor 111 includes: a substrate 1111, a ferroelectric layer 1112, a dielectric layer 1113, a MoS2 semiconductor layer 1114, a source 1115, and a drain 1116.

[0040] Substrate 1111 serves as the gate of MoS2 negative capacitance phototransistor 111; ferroelectric layer 1112 is located on the upper surface of substrate 1111; dielectric layer 1113 includes a surface of ferroelectric layer 1112 away from substrate 1111; MoS2 semiconductor layer 1114 is located on the surface of dielectric layer 1113 away from substrate 1111; source 1115 and drain 1116 are respectively located on the surface of dielectric layer 1113 away from substrate 1111 and on both sides of MoS2 semiconductor layer 1114.

[0041] The substrate 1111 can be a silicon-based substrate. The ferroelectric layer 1112 can be made of HfO2-based ferroelectric thin film, and its thickness can be 5-20 nm. For example, the ferroelectric layer 1112 can be made of HZO, and its thickness can be 10 nm. The dielectric layer 1113 includes any one of Al2O3, HfO2, and ZrO2, and its thickness can be 1-5 nm. For example, the dielectric layer 1113 can be made of Al2O3, and its thickness can be 2 nm. The semiconductor layer has a thickness of 0.68-6.8 nm. The source electrode 1115 and drain electrode 1116 can be made of Cr or Au, and their thicknesses can be 50-200 nm.

[0042] In this embodiment, the substrate 1111 serves as the back gate electrode, and the polarization direction of the ferroelectric layer 1112 and the switching on or off of the transistor channel can be controlled by applying an electric field. The HfO2-based ferroelectric thin film exhibits excellent ferroelectric properties. The ferroelectric layer 1112 primarily generates a negative capacitance effect during polarity reversal, reducing the subthreshold slope of the transistor and increasing the switching current ratio. The dielectric layer 1113 serves as a capacitance matching layer for the ferroelectric layer 1112, improving its capacitance effect. The semiconductor layer uses MoS2 as the material, possessing excellent photoelectric and semiconductor properties, enabling the photoelectric conversion function of the phototransistor and exhibiting good response to broadband optical signals. The source and drain electrodes serve as the electrodes of the phototransistor, used to extract the charge signal after photoelectric conversion, thereby amplifying and outputting the optical signal.

[0043] It should be noted that the MoS2 negative capacitance phototransistor 111 given in this embodiment is only an example structure of this application. Depending on actual needs, the MoS2 negative capacitance phototransistor 111 of this application can also adopt other structures, as long as the conduction threshold voltage of the MoS2 negative capacitance phototransistor 111 is inversely correlated with the light intensity, and the light sensitivity of the MoS2 negative capacitance phototransistor 111 is positively correlated with the gate voltage when the gate voltage of the MoS2 negative capacitance phototransistor 111 is less than the dark state current turn-on voltage. Exemplarily, based on the above structure, the MoS2 negative capacitance phototransistor 111 can also include a metal nanoparticle layer. The metal nanoparticle layer includes metal nanoparticles that can provide a plasmonic resonance effect. The metal nanoparticle layer is located between the ferroelectric layer 1112 and the dielectric layer 1113, and the thickness of the metal nanoparticle layer can be 4~10 nm.

[0044] In some embodiments, the bionic vision array system 1 further includes a processing circuit (not shown). The processing circuit is connected to the output terminal of the bionic vision array system 1. The processing circuit is used to acquire the output voltage of the bionic vision array system 1, compare the output voltage with a preset maximum allowable voltage, and control the voltage adjustment circuit 116 to adjust the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor 111 according to the comparison result.

[0045] The initial gate voltage of the photosensitive array can be the turn-on voltage (e.g., 0.5V) of the MoS2 negative capacitance phototransistor 111 in the dark state. The output voltage Vout of the photosensitive array is compared with a pre-set maximum allowable voltage Vmax. If Vout is greater than Vmax, a positive gate voltage control signal changeVG (pulse signal) is output, decreasing the gate voltage and thus reducing Vout, achieving light adaptation. Conversely, if Vout is less than Vmax, a negative gate voltage control signal changeVG is output, increasing Vout and thus increasing the gate voltage, achieving dark adaptation. This simulates the light and dark adaptation bio-photosensing mechanisms of the human eye, achieving front-end image denoising and contrast enhancement at the device level, and handling data redundancy.

[0046] In some embodiments, the cycle of the bionic vision array system 1 includes a photosensitive phase and a photoelectric data output phase.

[0047] During the photosensitive stage, the MoS2 negative capacitance phototransistor 111 senses the light signal and generates a photosensitive current signal. The voltage conversion circuit 112 converts the photosensitive current signal into a photosensitive voltage signal. The differential amplifier circuit 113 performs differential amplification processing on the photosensitive voltage signal and outputs a differential amplified signal to the sample-and-hold circuit 114. The sample-and-hold circuit 114 responds to the sample-and-hold control signal of the first level state and generates a sample-and-hold signal that is consistent with the differential amplified signal.

[0048] During the photoelectric data output stage, the sample-and-hold circuit 114 responds to the sample-and-hold control signal at the second level state to hold the sample-and-hold signal at the last moment of the photosensitive stage; each photosensitive module 11 outputs the corresponding sample-and-hold signal as the output voltage of the bionic vision array system 1 in a preset order, and the processing circuit controls the voltage adjustment circuit 116 to adjust the corresponding gate voltage according to each output voltage.

[0049] Since the dynamic response time of the MoS2 negative capacitance phototransistor 111 includes a rise time and a fall time, the photosensing stage and the photoelectric data output stage are set based on the rise time and fall time. For example, if the rise time is 18ms and the fall time is 24ms, the photosensing time of the MoS2 negative capacitance phototransistor 111 can be set to 25ms, and the photoelectric data output time can be set to 25ms, corresponding to a photosensing stage and a photoelectric data output stage of 25ms each.

[0050] like Figure 5 As shown, Figure 5 The process is divided into a photosensitive stage and a photoelectric data output stage. The differential amplified signal VLight is the photoelectric signal after differential amplification but before sampling and holding. The sample-and-hold signal Vkeep is the photoelectric signal after sampling and holding. When the sample-and-hold control signal keepsignal is high, the circuit samples, and Vkeep is consistent with VLight. When the sample-and-hold control signal keepsignal is low, the circuit holds, and Vkeep is the value of the VLight signal at the last moment. changeVG is used to adjust the gate voltage. The gate voltage control signal. For example, during the photosensitive stage (0-25ms), light is input, and the keepsignal signal is high. The MoS2 negative capacitor phototransistor 111 outputs a photosensitive current signal. This photosensitive current signal is converted into a photosensitive voltage signal by the voltage conversion circuit 112 and then output. The differential amplifier circuit 113 differentially amplifies the photosensitive voltage signal and outputs a differential amplified signal VLight to the sample-and-hold circuit 114. Then, during the photoelectric data output stage, the keepsignal signal becomes low, allowing the photovoltage VLight signal to be held for 50ms, i.e., the Vkeep signal. After the photosensitive unit outputs a signal, a 25-30ms selection signal (choosesignal) causes multiple photosensitive modules 11 in the array to sequentially output voltage signals Vout. The processing circuit adjusts the gate voltage according to the output voltage Vout between 40ms and 50ms using the gate voltage control signal changeVG. The value of .

[0051] In this embodiment, during the photosensitive stage, a photosensitive current signal is generated by the MoS2 negative capacitor phototransistor 111 sensing a light signal. The voltage conversion circuit 112 converts this current signal into a photosensitive voltage signal. The differential amplifier circuit 113 differentially amplifies the photosensitive voltage signal and outputs the differential amplified signal to the sample-and-hold circuit 114. The sample-and-hold circuit 114 responds to the sample-and-hold control signal at the first level and generates a sample-and-hold signal consistent with the differential amplified signal, thus realizing the sampling of the differential amplified signal. During the photoelectric data output stage, the sample-and-hold circuit 114 responds to the sample-and-hold control signal at the second level and holds the sample-and-hold signal at the last moment of the photosensitive stage. This ensures that the sample-and-hold signal can still be output after the photocurrent generated by the MoS2 negative capacitor phototransistor 111 disappears. This allows each photosensitive module 11 to output the corresponding sample-and-hold signal as the system's output voltage in a preset order. The processing circuit controls the voltage adjustment circuit 116 to adjust the corresponding gate voltage according to each output voltage, simulating the light and dark adaptation bio-photosensitive mode of the human eye. This achieves image denoising and contrast enhancement effects at the device level and enables data redundancy processing.

[0052] In some embodiments, such as Figure 2 As shown, the voltage conversion circuit 112 includes: a first operational amplifier OP1 and a first resistor R1.

[0053] The positive input terminal of the first operational amplifier OP1 is grounded, and the negative input terminal of the first operational amplifier OP1 is used to receive the photosensitive current signal. The first end of the first resistor R1 is connected to the negative input terminal of the first operational amplifier OP1, and the second end of the first resistor R1 is connected to the output terminal of the first operational amplifier OP1. The output terminal of the first operational amplifier OP1 serves as the output terminal of the voltage conversion circuit 112.

[0054] Because the output of the MoS2 negative capacitance phototransistor 111 is a current, while current hardware and software systems are more voltage-sensitive, it is necessary to convert the output current into voltage. The current-to-voltage conversion circuit includes a first operational amplifier OP1 and a first resistor R1. According to the operating principle of the operational amplifier, its input current... I 1 and output voltage V 1 The relationship is:

[0055] Let the resistance value of the first resistor R1 be set to [value]. The schematic diagram of the input and output of the current-to-voltage conversion circuit is shown below. Figure 6 As shown, Figure 6Figure (a) is a waveform diagram of the input current of the voltage conversion circuit 112 in one embodiment of this application. Figure 6 Figure (b) shows the waveform of the output voltage of the voltage conversion circuit 112 in one embodiment of this application. It can be seen that the output voltage waveform is the same as the input current waveform, but opposite in magnitude, and the amplitude is 10 times that of the input current. 6 The result is consistent with the theory.

[0056] It can be understood that the positive input terminal of the first operational amplifier OP1 is grounded, and the negative input terminal is responsible for receiving the photosensitive current signal. The first end of the first resistor R1 is connected to the negative input terminal of the first operational amplifier OP1, and the second end is connected to the output terminal of the first operational amplifier OP1, which is also the output terminal of the voltage conversion circuit 112. This circuit structure is a transimpedance amplifier structure. When the photosensitive current signal flows into the feedback loop composed of the first operational amplifier OP1 and the first resistor R1, based on the virtual short and virtual open characteristics of the operational amplifier, the input current signal can be accurately converted into a voltage signal, and this voltage signal will be output from the output terminal of the first operational amplifier OP1. Therefore, the voltage conversion circuit 112 with the above structure can convert the photosensitive current signal into a photosensitive voltage signal.

[0057] It should be noted that the voltage conversion circuit 112 described above is an example structure of this application, and the voltage conversion circuit 112 can also adopt other feasible circuit structures as needed.

[0058] In one embodiment, such as Figure 2 As shown, the differential amplifier circuit 113 includes: a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a second operational amplifier OP2.

[0059] The first terminal of the second resistor R2 is connected to the output terminal of the voltage conversion circuit 112, and the second terminal of the second resistor R2 is connected to the negative input terminal of the second operational amplifier OP2. The first terminal of the third resistor R3 is used to receive the dark-state reference voltage, and the second terminal of the third resistor R3 is connected to the positive input terminal of the second operational amplifier OP2. The dark-state reference voltage is the voltage obtained by converting the dark current of the MoS2 negative capacitor phototransistor 111 in the dark state. The first terminal of the fourth resistor R4 is connected to the positive input terminal of the second operational amplifier OP2, and the second terminal of the fourth resistor R4 is grounded. The first terminal of the fifth resistor R5 is connected to the negative input terminal of the second operational amplifier OP2, and the second terminal of the fifth resistor R5 is connected to the output terminal of the second operational amplifier OP2. The output terminal of the second operational amplifier OP2 serves as the output terminal of the differential amplifier circuit 113.

[0060] To eliminate drift caused by temperature and background, a differential amplifier circuit 113 can be set up to eliminate common-mode input. I1 is the photosensitive current of the MoS2 negative capacitor phototransistor 111, and I2 is the dark current of the same MoS2 negative capacitor phototransistor 111 in the dark state.

[0061] V2 is the voltage value of the photosensitive voltage signal, and V3 is the dark-state reference voltage. Given R2=R3 and R4=R5, according to the operating principle of the operational amplifier:

[0062] Substituting the equations for the current-to-voltage conversion circuit, and Figure 2 When the upper and lower parts of R1 are the same, we have:

[0063] V4 is the differential amplified signal output by differential amplifier circuit 113, and R1 is set to... R2 and R3 are both R4 and R5 are both The input and output schematic diagram of the differential amplifier circuit 113 is shown below. Figure 7 As shown, Figure 7 (a) is a schematic diagram showing the difference in input voltage of the differential amplifier circuit 113 in one embodiment of this application. Figure 7 Figure (b) shows the waveform of the output voltage of the differential amplifier circuit 113 in one embodiment of this application, where the input is the difference between V2 and V3. It can be concluded that the waveform of the output voltage is the same as the waveform of the input voltage difference, and the amplitude is 50 times that of the input voltage difference, which is consistent with the theory.

[0064] The differential amplifier circuit 113 operates based on the characteristics of operational amplifiers. When the input signal (the photosensitive voltage signal from the voltage conversion circuit 112) differs from the dark-state reference voltage, the second operational amplifier OP2 amplifies the difference between these two voltages. By appropriately selecting the values ​​of the second resistor R2, the third resistor R3, the fourth resistor R4, and the fifth resistor R5, the amplification factor can be precisely controlled. When temperature or background factors cause the circuit to generate a common-mode input, the two input terminals of the differential amplifier circuit 113 will simultaneously exhibit similar changes. Due to the symmetrical circuit structure, the common-mode signals cancel each other out at the output, retaining only the difference signal between the light signal and the dark-state reference voltage. For example, if the temperature rises and causes the dark current of the MoS2 negative capacitance phototransistor 111 to increase, the dark state reference voltage and the photosensitive voltage signal may simultaneously drift in the same direction. At this time, the differential amplifier circuit 113 will treat this part of the common-mode drift as an "invalid signal" and suppress it, and only amplify the differential-mode component corresponding to the light signal, thereby ensuring that the output signal is not affected by temperature and background drift, and improving the stability and detection accuracy of the bionic vision array system 1.

[0065] In some embodiments, such as Figure 2 As shown, the sample-and-hold circuit 114 includes: a sixth resistor R6, a seventh resistor R7, a switching unit Q1, a first capacitor C1, and a third operational amplifier OP3.

[0066] The first terminal of the sixth resistor R6 is used to receive the differential amplified signal. The second terminal of the sixth resistor R6 is connected to the first terminal of the switching unit Q1 and the first terminal of the seventh resistor R7. The second terminal of the switching unit Q1 is connected to the negative input terminal of the third operational amplifier OP3 and the first terminal of the first capacitor C1. The control terminal of the switching unit Q1 is used to receive the sample-and-hold control signal. The positive input terminal of the third operational amplifier OP3 is grounded. The output terminal of the third operational amplifier OP3 is connected to the second terminal of the first capacitor C1 and the second terminal of the seventh resistor R7, and serves as the output terminal of the sample-and-hold circuit 114.

[0067] In applications, photodetectors need to be arrayed, and photodetector data from the same bit line of the array needs to be output sequentially. However, since the MoS2 negative capacitance phototransistor 111 has no memory after photosensitive, that is, the photocurrent disappears rapidly after the light intensity disappears, there will be a situation where the photodetector data of the array disappears after the light intensity disappears due to the removal of the light source during the time when the photodetector data of the array needs to be output sequentially. This will lead to the loss of output data. Therefore, it is necessary to sample and retain the photodetector data at the end.

[0068] Q1 can be a switch made using a transistor to control the on / off state of the current. When Q1 is on, the sampled and held signal V5 = -V4, meaning V5 changes in real time with V4. When Q1 is off, V5 remains at the last value of -V4 before the switch was turned on. In application, an inverter circuit can be added in front of it to make V5 = V4.

[0069] Set R6 and R7 to the same value. C1 is The input and output schematic diagram of the sample-and-hold circuit 114 is shown below. Figure 8 As shown, Figure 8 (a) is a waveform diagram of the input voltage of the sample-and-hold circuit 114 in one embodiment of this application; Figure 8 (b) is a waveform diagram of the control voltage of the sample-and-hold circuit 114 in one embodiment of this application; Figure 8 (c) is a waveform diagram of the output voltage of the sample-and-hold circuit 114 in one embodiment of this application; it can be concluded that when the transistor is controlled at a high level, its output voltage waveform is exactly the same as the input voltage waveform and amplitude, and when the transistor is controlled at a low level, its output voltage waveform remains at the value at the last moment of the high level.

[0070] It can be understood that during the sampling phase, when the sample-and-hold control signal turns on the switching unit, the differential amplified signal reaches the negative input terminal of the operational amplifier through the sixth resistor R6 and the switching unit. Since the operational amplifier acts as a voltage follower, the output voltage follows the input signal changes, and the current charges the first capacitor C1 through the seventh resistor R7, enabling the output voltage to quickly track the differential amplified signal. During the holding phase, the switching unit is turned off, and the charge stored in the first capacitor C1 cannot be released. The operational amplifier maintains a stable output voltage through negative feedback, forming a high-input-impedance buffer to ensure that the output voltage remains unchanged. This circuit realizes the sampling and holding function of the differential amplified signal through the sample-and-hold control signal, ensuring that the signal at the last moment of the photosensitive stage can be stably output during the photoelectric data output stage. Thus, even after the photocurrent generated by the MoS2 negative capacitor phototransistor 111 disappears, the sample-and-hold signal can still be output, allowing each photosensitive module 11 to output the corresponding sample-and-hold signal as the system's output voltage in a preset order, forming a recognition image.

[0071] In some embodiments, such as Figure 2 As shown, the voltage regulation circuit 116 includes: an eighth resistor R8, a second capacitor C2, and a fourth operational amplifier OP4.

[0072] The first terminal of the eighth resistor R8 is used to receive the gate voltage control signal. The second terminal of the eighth resistor R8 is connected to the first terminal of the second capacitor C2 and the negative input terminal of the fourth operational amplifier OP4. The positive input terminal of the fourth operational amplifier OP4 is grounded, and the output terminal of the fourth operational amplifier OP4 is connected to the second terminal of the second capacitor C2 and serves as the output terminal of the voltage regulation circuit 116.

[0073] The core of the voltage regulation circuit 116 is to design a module that adjusts the gate voltage by inputting rectangular pulses. The gate voltage is varied by controlling the number and width of the input rectangular pulses. Adjustments can be made. This can be achieved using an integrator circuit.

[0074] According to the operating principle of the operational amplifier, when the input voltage value V6 is applied to the input terminal of the integrator circuit, the second capacitor C2 deflects at a time constant. ( The charging rate is determined by the parameters of the eighth resistor R8 and the second capacitor C2, respectively. Therefore, we have:

[0075] V7 is the output voltage of the voltage regulation circuit 116, i.e., the gate voltage. R8 is set to... C2 is The input and output schematic diagram of voltage regulation circuit 116 is shown below. Figure 9 As shown, Figure 9 (a) is a waveform diagram of the input voltage of the voltage regulation circuit 116 in one embodiment of this application; Figure 9 Figure (b) shows the waveform of the output voltage of the voltage regulation circuit 116 in one embodiment of this application. It can be concluded that when the pulse amplitude of V5 is 1V, the output value of V6 drops by 0.2V within 20ms, which is consistent with the theory.

[0076] The first terminal of the eighth resistor R8 receives the gate voltage control signal from the processing circuit, and the second terminal is connected to the first terminal of the second capacitor C2 and the negative input terminal of the fourth operational amplifier OP4. The positive input terminal of the fourth operational amplifier OP4 is grounded, forming an inverting input configuration. Its output terminal is connected to the second terminal of the second capacitor C2 and serves as the output terminal of the entire circuit. When the gate voltage control signal is input, the eighth resistor R8 and the second capacitor C2 form a low-pass filter network, which can filter out high-frequency noise and make the input signal smoother. The fourth operational amplifier OP4 works as an integrator in this circuit, using the charging and discharging characteristics of the capacitor to integrate the input signal. When the gate voltage control signal changes, the voltage at the output terminal of the operational amplifier will be adjusted accordingly, gradually reaching a stable value through the charging and discharging process of the second capacitor C2, thereby avoiding voltage sudden changes and providing a stable gate voltage for the MoS2 negative capacitor phototransistor 111.

[0077] The circuit structure of this embodiment can effectively suppress interference and noise, ensure the stability of the gate voltage, and thus improve the performance consistency and reliability of the MoS2 negative capacitance phototransistor 111. In the bionic vision array system 1, a stable gate voltage is crucial for accurately controlling the operating state of the phototransistor, enabling the entire system to maintain good photoelectric conversion performance and signal processing capabilities under different environmental conditions.

[0078] In some embodiments, the bionic vision array system 1 further includes a pulse generation circuit (not shown), which is used to periodically generate sample-and-hold control signals and switch selection signals.

[0079] The pulse generation circuit can be controlled by a clock to periodically generate sample-and-hold control signals and switch selection signals.

[0080] It is understandable that the pulse generation circuit can periodically generate sample-and-hold control signals and switch selection signals, providing a timing control reference for each functional module of the system. This timing control mechanism can ensure the orderly connection between the photosensitive stage and the data output stage, guaranteeing that the photosensitive current signal of the MoS2 negative capacitor phototransistor 111 can complete the processing steps such as voltage conversion, differential amplification, sample-and-hold, and gate voltage adjustment according to the process, ultimately realizing the accurate capture and stable output of light signals by the bionic vision array.

[0081] The bionic vision array system 1 obtained based on the above embodiments is verified and analyzed as follows: Establish as Figure 10 The 5x5 pixel grayscale image of the figure "8" shown is closer to white, indicating stronger light intensity, and closer to black, indicating weaker light intensity. It can be concluded that the figure "8" exposed to strong light intensity has poor contrast and a blurry visual effect. When this image is input into a 5x5 photosensitive array formed by a MoS2 negative capacitor phototransistor 111 and a photodetector circuit as photosensitive units, and after multiple input cycles and gate voltage adjustments... After adjustment, the change in the array's photovoltage output value is as follows: Figure 11 As shown in the figure. It can be seen that with each input cycle and the gate voltage... As the light intensity decreases, the number "8" becomes clearer, meaning the contrast relative to the background light intensity increases, resulting in a clearer visual effect.

[0082] The MoS2 negative capacitance phototransistor 111 utilizes the negative capacitance effect generated by the polarity reversal of ferroelectric materials to achieve higher photocurrent under the same conditions. This means that the MoS2 negative capacitance phototransistor 111 can operate at lower bias voltages, thus enabling photoelectric detection of images with low power consumption. Its power consumption can be calculated by integrating the product of bias voltage and current over time.

[0083] in The number of MoS2 negative capacitance phototransistors 111 or MoS2 ordinary phototransistors. This refers to the time of one photosensitive cycle. For the MoS2 negative capacitance phototransistor 111 photosensitive array and the MoS2 ordinary phototransistor photosensitive array, their operating bias and power consumption are compared as follows: Figure 12 As shown, Figure 12 (a) is a schematic diagram comparing the power consumption of a MoS2 negative capacitance phototransistor 111 photosensitive array and a MoS2 ordinary phototransistor photosensitive array in one embodiment of this application. Figure 12 (b) is a schematic diagram comparing the bias voltage of a MoS2 negative capacitance phototransistor 111 photosensitive array and a MoS2 ordinary phototransistor photosensitive array in one embodiment of this application. Compared with the MoS2 ordinary phototransistor photosensitive array, the power consumption of the MoS2 negative capacitance phototransistor 111 photosensitive array for one photosensitive operation is reduced by 68%, and the operating bias voltage can be reduced by 60%.

[0084] The original images of the MNIST handwritten digit dataset, the images of the MNIST handwritten digit dataset with noise added, and the photovoltage images of the images of the MNIST handwritten digit dataset with noise added after being detected by the MoS2 negative capacitance phototransistor 111 photosensitive array were respectively input into a pre-configured neural network for training and recognition. By observing the changes in the loss function and accuracy curves with the number of training rounds during the neural network training process, it is demonstrated that the photosensitive image of the MoS2 negative capacitance phototransistor 111 has the effect of denoising and optimizing the image.

[0085] like Figure 13 As shown, Figure 13 (a) is a schematic diagram of the original images of the MNIST handwritten digit dataset; Figure 13 (b) is a schematic diagram of the MNIST handwritten digit dataset with added noise. Figure 13 Image (c) is a schematic diagram of the photovoltage image after a noisy MNIST handwritten digit dataset image has been detected by the bionic vision array system 1. Intuitively, the noisy MNIST handwritten digit dataset image is more difficult to distinguish than the original image, corresponding to a decrease in the accuracy of the neural network recognition. However, after the noisy MNIST handwritten digit dataset image is detected by the MoS2 negative capacitance phototransistor 111 photosensitive array, the noise is removed, and the shape of the digits can be clearly distinguished, corresponding to the recovery of the neural network recognition accuracy.

[0086] like Figure 14 As shown, Figure 14 (a) is Figure 13 The graph shows the curves showing how the accuracy of each image in the training and recognition process changes with the number of training rounds, after each image is input into a pre-configured neural network. Figure 14 (b) is Figure 13 The diagram illustrates the change in the loss function of each image in the MNIST handwritten digit dataset as a function of the training and recognition neural network, with the number of training epochs. It can be seen that compared to the original images in the MNIST handwritten digit dataset, adding noise significantly reduces the recognition accuracy of the neural network, from 97.07% to 87.37%, and the loss function also increases significantly, from 0.1023 to 0.4049. However, after the noisy MNIST handwritten digit dataset images are detected by the MoS2 negative capacitance phototransistor 111 photosensitive array, the noise is removed, resulting in a significant recovery in the recognition accuracy of the neural network, from 87.37% to 97.05%, and a significant decrease in the loss function, from 0.4049 to 0.1024. Through the above verification analysis, the effectiveness and superiority of the bionic vision array system 1, which simulates the human eye's photosensitive method, in data preprocessing are demonstrated.

[0087] Based on the same inventive concept, this application also provides a control method for a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor. This control method is applied to any of the above-described biomimetic vision array systems based on a two-dimensional negative capacitance phototransistor. Figure 15 As shown, the control method includes the following steps S1501 and S1502.

[0088] S1501: Obtain the output voltage of the bionic vision array system.

[0089] S1502: Compares the output voltage with the preset maximum allowable voltage, and controls the voltage regulation circuit to adjust the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor based on the comparison result.

[0090] It should be noted that the control method of the bionic vision array system based on two-dimensional negative capacitance phototransistors provided in this application embodiment is based on the same application concept as the bionic vision array system based on two-dimensional negative capacitance phototransistors provided in this application embodiment. Therefore, the specific implementation of this embodiment can refer to the aforementioned implementation of the bionic vision array system based on two-dimensional negative capacitance phototransistors, and the repeated parts will not be described again.

[0091] In some embodiments, an electronic device provided in this application includes a processor and a memory; the memory stores a computer program, wherein the computer program, when executed by the processor, implements the above-described control method for a biomimetic visual array system based on a two-dimensional negative capacitance phototransistor.

[0092] Specifically, the processor may include, for example, a general-purpose microprocessor, an instruction set processor and / or an associated chipset and / or a special-purpose microprocessor (e.g., an application-specific integrated circuit (ASIC)), etc. The processor may also include onboard memory for caching purposes. The processor may be a single processing unit or multiple processing units for performing different actions of the method flow according to embodiments of this application.

[0093] Memory can be any medium capable of containing, storing, transmitting, propagating, or transmitting instructions. For example, memory can include, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, instruments, or propagation media. Specific examples of memory include: magnetic storage devices such as magnetic tape or hard disk drives (HDDs); optical storage devices such as optical discs (CD-ROMs); and also random access memory (RAM) or flash memory; and / or wired / wireless communication links.

[0094] This application also provides a computer-readable medium storing a computer program that, when executed by a processor, implements the control method described above for a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor. This computer-readable medium may be included in the device / apparatus / system described in the above embodiments; or it may exist independently and not assembled into that device / apparatus / system. The aforementioned computer-readable medium carries one or more programs, which, when executed, implement the method as described in the embodiments of this application.

[0095] According to embodiments of this application, a computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wired, optical fiber, radio frequency signals, etc., or any suitable combination thereof.

[0096] Those skilled in the art will understand that the features described in the various embodiments and / or claims of this application can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in this application. In particular, the features described in the various embodiments and / or claims of this application can be combined and / or combined in various ways without departing from the spirit and teachings of this application. All such combinations and / or combinations fall within the scope of this application. Therefore, the scope of this application should not be limited to the above embodiments, but should be defined not only by the appended claims, but also by their equivalents. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A biomimetic visual array system based on a two-dimensional negative capacitance phototransistor, characterized in that, include: Multiple photosensitive modules, each photosensitive module including a MoS2 negative capacitance phototransistor, a voltage conversion circuit, a differential amplifier circuit, a sample and hold circuit, a switching circuit, and a voltage regulation circuit; The MoS2 negative capacitance phototransistor is used to sense light signals and generate a photocurrent signal; the voltage conversion circuit is used to convert the photocurrent signal into a photovoltage signal; the differential amplifier circuit is used to differentially amplify the photovoltage signal and output a differential amplified signal to the sample-and-hold circuit; the sample-and-hold circuit is used to generate a sample-and-hold signal based on the differential amplified signal in response to a sample-and-hold control signal; the switching circuit is used to control the output of the sample-and-hold signal in response to a switch selection signal; the voltage adjustment circuit is used to output a gate voltage adjustment signal based on a gate voltage control signal to adjust the gate voltage applied to the gate of the MoS2 negative capacitance phototransistor. The turn-on threshold voltage of the MoS2 negative capacitance phototransistor is inversely correlated with the light intensity, and the light sensitivity of the MoS2 negative capacitance phototransistor is positively correlated with the gate voltage when the gate voltage is less than the dark state current turn-on voltage. Each photosensitive module receives the switch selection signal in a preset order, so that each photosensitive module outputs the corresponding sample-and-hold signal in a preset order.

2. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The MoS2 negative capacitance phototransistor includes: a substrate, a ferroelectric layer, a dielectric layer, a MoS2 semiconductor layer, a source electrode, and a drain electrode; The substrate serves as the gate of the MoS2 negative capacitance phototransistor; The ferroelectric layer is located on the upper surface of the substrate; The dielectric layer includes a surface located away from the substrate of the ferroelectric layer; The MoS2 semiconductor layer is located on the surface of the dielectric layer away from the substrate; The source and drain are located on the surface of the dielectric layer away from the substrate, and on opposite sides of the MoS2 semiconductor layer.

3. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The bionic vision array system also includes processing circuitry; The processing circuit is connected to the output terminal of the bionic vision array system. The processing circuit is used to obtain the output voltage of the bionic vision array system, compare the output voltage with the preset maximum allowable voltage, and control the voltage regulation circuit to adjust the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor according to the comparison result.

4. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 3, characterized in that, The cycle of the bionic vision array system includes a photosensitive phase and a photoelectric data output phase. During the photosensitive stage, the MoS2 negative capacitance phototransistor senses a light signal and generates a photosensitive current signal. The voltage conversion circuit converts the photosensitive current signal into a photosensitive voltage signal. The differential amplifier circuit performs differential amplification on the photosensitive voltage signal and outputs a differential amplified signal to the sample-and-hold circuit. The sample-and-hold circuit responds to a sample-and-hold control signal at a first level and generates a sample-and-hold signal that is consistent with the differential amplified signal. During the photoelectric data output stage, the sample-and-hold circuit responds to the sample-and-hold control signal at the second level state to hold the sample-and-hold signal at the last moment of the photosensitive stage; each photosensitive module outputs the corresponding sample-and-hold signal as the output voltage of the bionic vision array system in a preset order, and the processing circuit controls the voltage adjustment circuit to adjust the corresponding gate voltage according to each output voltage.

5. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The voltage conversion circuit includes: a first operational amplifier and a first resistor; The positive input terminal of the first operational amplifier is grounded, and the negative input terminal of the first operational amplifier is used to receive the photosensitive current signal; The first end of the first resistor is connected to the negative input terminal of the first operational amplifier, and the second end of the first resistor is connected to the output terminal of the first operational amplifier. The output terminal of the first operational amplifier serves as the output terminal of the voltage conversion circuit.

6. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The differential amplifier circuit includes: a second resistor, a third resistor, a fourth resistor, a fifth resistor, and a second operational amplifier; The first end of the second resistor is connected to the output terminal of the voltage conversion circuit, and the second end of the second resistor is connected to the negative input terminal of the second operational amplifier. The first end of the third resistor is used to receive the dark state reference voltage, and the second end of the third resistor is connected to the positive input terminal of the second operational amplifier. The dark state reference voltage is the voltage obtained by the dark current conversion of the MoS2 negative capacitor phototransistor in the dark state. The first end of the fourth resistor is connected to the positive input terminal of the second operational amplifier, and the second end of the fourth resistor is grounded. The first end of the fifth resistor is connected to the negative input terminal of the second operational amplifier, and the second end of the fifth resistor is connected to the output terminal of the second operational amplifier. The output terminal of the second operational amplifier serves as the output terminal of the differential amplifier circuit.

7. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The sample-and-hold circuit includes: a sixth resistor, a seventh resistor, a switching unit, a first capacitor, and a third operational amplifier; The first end of the sixth resistor is used to receive the differential amplified signal, and the second end of the sixth resistor is connected to the first end of the switching unit and the first end of the seventh resistor, respectively. The second terminal of the switching unit is connected to the negative input terminal of the third operational amplifier and the first terminal of the first capacitor, respectively. The control terminal of the switching unit is used to receive the sample-and-hold control signal. The positive input terminal of the third operational amplifier is grounded, and the output terminal of the third operational amplifier is connected to the second terminal of the first capacitor and the second terminal of the seventh resistor, respectively, and serves as the output terminal of the sample-and-hold circuit.

8. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The voltage regulation circuit includes: an eighth resistor, a second capacitor, and a fourth operational amplifier; The first end of the eighth resistor is used to receive the gate voltage control signal, and the second end of the eighth resistor is connected to the first end of the second capacitor and the negative input terminal of the fourth operational amplifier, respectively. The positive input terminal of the fourth operational amplifier is grounded, and the output terminal of the fourth operational amplifier is connected to the second terminal of the second capacitor and serves as the output terminal of the voltage regulation circuit.

9. The biomimetic visual array system based on a two-dimensional negative capacitance phototransistor as described in claim 1, characterized in that, The bionic vision array system further includes a pulse generation circuit, which is used to periodically generate the sample-and-hold control signal and the switch selection signal.

10. A control method for a biomimetic vision array system based on a two-dimensional negative capacitance phototransistor, characterized in that, The control method is applied to the biomimetic vision array system based on a two-dimensional negative capacitance phototransistor as described in any one of claims 1 to 9; the method includes: Obtain the output voltage of the bionic vision array system; The output voltage is compared with the preset maximum allowable voltage, and the voltage regulation circuit is controlled to adjust the gate voltage applied to the gate of the MoS2 negative capacitor phototransistor based on the comparison result.

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