Method and system for improving polymorphic warping of wafer

Abstract

The invention provides a method and system for improving polymorphic warping of a wafer, and the method comprises the steps: 1), measuring the initial warping morphology of the wafer, and obtaining deformation distribution data; (2) calculating three-dimensional deformation of wafer warping through a finite element simulation model, and on the basis of the three-dimensional deformation, optimizing parameters of a stress film on the back surface of the wafer through a linear superposition method on the basis of the actually measured deformation distribution data, so that the stress film generates deformation distribution opposite to the initial warping morphology; 3) preparing an arch-shaped stress film on the back surface of the wafer; 4) measuring deformation distribution data of the optimized wafer; according to the method, initial deformation of various types can be counteracted, warping generated in specific steps in the production process can be reduced to the maximum extent, and the product quality and reliability requirements are fully guaranteed.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of semiconductor integrated circuit design and manufacturing, and particularly relates to a method and system for improving wafer multi-modal warpage. BACKGROUND

[0002] Since the invention of transistors, the semiconductor industry has not yet reached saturation, but rather presents a more prosperous picture. Many studies show that the minimum physical gate length of transistors is the physical limit of silicon, because this limit is the size of atoms and molecules. Therefore, under the limitation of Moore's Law, the industry has been discussing the future of "More Moore", "More than Moore" and "Beyond CMOS". Recently, the development of artificial intelligence technology has opened up a more abundant application space, and big data analysis has become a new powerful driving force for semiconductor business, and the directionality of semiconductor market demand has become clear. As a future technology trend, nanosheets and 3D-IC are being researched, and the semiconductor industry, including research and development, is full of vitality. Power devices have their unique evolution history track. Power semiconductors are the core devices of power electronic products, mainly used for frequency conversion, voltage conversion, rectification, power conversion and management of power electronic equipment, while also having energy saving efficiency. Future deployment of autonomous driving and renewable energy systems to achieve carbon neutrality has become a new driving force for power device business. Research shows that the power device business is facing a new turning point. For power semiconductors, emerging applications pay more attention to energy efficiency, power density and reliability. Authorities predict that power devices will grow by no less than 6% annually in the coming years. Similar to the development of integrated circuits, power device production and manufacturing have also achieved overcapacity on 300mm. As product performance improves, process complexity also becomes more complex; more compact structures plus high aspect ratios bring new challenges, with the biggest challenge being wafer multi-modal warpage caused by stress mismatch.

[0003] It should be noted that the above introduction to the technical background is only to facilitate the clear and complete description of the technical solutions of the present application, and to facilitate the understanding of those skilled in the art. The above technical solutions cannot be considered as known to those skilled in the art merely because they are described in the background section of the present application. SUMMARY

[0004] In view of the above-mentioned shortcomings of the prior art, the purpose of the present application is to provide a method and system for improving wafer multi-modal warpage, which solves the problem of wafer warpage in various forms in actual production in the prior art.

[0005] To achieve the above object and other related objects, the present application provides a method for improving the multi-form warping of a wafer, which comprises the following steps: 1) measuring the initial warping profile of the wafer to obtain the measured deformation distribution data of the wafer; 2) calculating the three-dimensional deformation of the wafer warping by a finite element simulation model, and on the basis of the measured deformation distribution data, optimizing the parameters of the back stress film of the wafer by a linear superposition method, the parameters including the type, geometric shape, stress value and thickness of the stress film, so that the back stress film generates a deformation distribution opposite to the initial warping profile; 3) preparing the stress film on the back of the wafer according to the parameters of the stress film optimized in step 2), the stress film being in an arc shape and being distributed in the four quadrants near the circumference of the wafer back; 4) measuring the deformation distribution data of the wafer after optimization; 5) judging whether the warping value of the wafer after optimization meets the requirements, if the warping value of the wafer is less than or equal to the maximum wafer warping specification, then preparing the wafer according to the parameters of the stress film in step 3); if the warping value of the wafer is greater than the maximum wafer warping specification, then performing step 6); 6) based on the measurement results in step 4), correcting the parameters of the stress film by back-stepping, and correcting the parameters of the stress film in the finite element simulation model, and re-executing steps 2) to 5) until the warping value of the wafer is less than or equal to the maximum wafer warping specification.

[0006] Optionally, it further comprises the following step: 7) based on the above steps, formulating a matrix table of the back stress film, and according to the initial warping values in the X and Y directions of the front surface, the parameters of the stress film deposited in the four regions in the X and Y directions of the wafer back can be obtained by table lookup.

[0007] Optionally, when measuring the initial warping profile of the wafer, the measurement points are uniformly distributed on the whole wafer, and the height values of each point are measured to obtain the deformation distribution data of the wafer, which satisfies the following function: ; Wherein, z0 represents the initial displacement of a point on the wafer surface in the direction perpendicular to the wafer surface, and is a binary function of the point (x, y) on the wafer surface.

[0008] Optionally, according to the measured deformation distribution data in step 1), the corresponding deformation distribution z1 of the back stress film satisfies: ; For the warping symmetrical through the z-axis of the wafer center, the stress and thickness of the stress film are calculated by the following formula: ; B is the warping amount of the wafer, for the axisymmetric warping, B is the height difference between the edge and the center position of the front surface of the wafer, which satisfies: ; Wherein, σ is the stress of the back stress film, hf T is the thickness of the stress film, T is the product of the stress of the stress film and the film thickness, M is the moment of force per unit area, i.e., the moment density, which is the decisive factor leading to the deformation of the wafer, E is the Young's modulus of elasticity of the substrate, h is the thickness of the substrate, v is the Poisson's ratio of the substrate material, and R is the radius of the wafer; after T is determined, the stress of the stress film and the film thickness are determined according to the principle of economic optimization under the condition of satisfying the feasibility of the film forming process.

[0009] Optionally, for non-central symmetric warping, the finite element simulation model is constructed based on the equation of elasticity, and satisfies: ; where D is the bending stiffness: ; Delta is the Laplacian operator of the Cartesian coordinates: ; z is the displacement of each point on the wafer in the z direction under the action of stress, U(x, y) is the displacement field satisfying the Laplace equation Delta U(x, y)=0, h is the thickness of the substrate, v is the Poisson's ratio of the substrate material, T is the product of the stress of the stress film and the film thickness, and E is the Young's modulus of elasticity of the substrate.

[0010] Optionally, formula (5) satisfies the following boundary conditions: ; ; Based on the above formulas (5)-(9), the equivalent stress distribution T=T(z) or z=T(z) of the front microstructure is obtained based on the finite element simulation model, and the wafer deformation z(x, y)=z(T(x, y)) under the stress distribution is output, wherein R represents the radius of the wafer, for a 12-inch wafer, R=300mm, theta is the angle in the cylindrical coordinate system, and U(R, theta) represents the boundary condition at the edge of the wafer.

[0011] Optionally, the optimal moment density distribution T opt (x, y) is obtained in such a way that: ; Based on formulas (5)-(9), z(T(x, y)) is a linear system, which satisfies the following formula: ; ; where k is a constant, the wafer warping is described by a cos(2theta) curve, and the wafer deformation is described by a polynomial curve, the polar coordinate expression of formula (12) is constructed to describe the wafer deformation, and the following formula is obtained: ; The first term Ar in equation (13) 2 is the central symmetric warping, and the corresponding moment density T can be obtained from equation (3); the second term Br 2 is the cosine of 2θ, which is the product of the 2nd power of r and the cosine of 2θ; A and B are the coefficients of the two terms, with the unit of m -1 ; since z(r,θ) and T(r,θ) are linear systems of each other, the input T(r,θ) is decomposed into the product of the even power polynomial of r P(r) and the even multiple of the cosine of θ C(θ), and the following equation is obtained: ; ; ; where T(r,θ) represents the three-dimensional distribution of the moment density a i and b j are coefficients, with the unit of a i N / m 2i+1 and b j being a dimensionless constant; T(x,y) is decomposed into (n+1)(m+1) terms, and i and j are parameter subscripts, representing the position of the parameter in the parameter sequence; for the following equation (17), the corresponding three-dimensional deformation is calculated by the finite element software: ; where i=0,1,2,…,n; j=0,1,2,…,m, T ij represents the moment density at the position of the parameters i and j; for the target deformation surface-z0 (x,y), the linear superposition fitting is performed by the basic deformation array: ; where the dimensionless coefficient sequence p ij can be determined by the least square method, and the moment density and deformation in equations (17) and (18) satisfy the physical dimensionless coefficient of equation (5), which is normalized into the dimensionless coefficient p ij of the superposition deformation unit z ij in the finite element calculation process; according to the linear superposition principle of equation (11), p ij satisfies the deformation superposition and is also applicable to the superposition of the moment density, and the stress distribution T opt (r,θ) of the deformation-z0 (r,θ) satisfies the following equation: .

[0012] Alternatively, the front warping is eliminated by forming an arc-shaped stress film on the back of the wafer, and the front warping is eliminated by the arc-shaped width (d x1 ,d x2 ), (dy1 , d y2 ) Unique determination of geometry, by (T x1 , T x2 ), (T y1 , T y2 ) describe the stress and film thickness product, then the optimal moment density distribution T opt (x,y) into a single-objective multivariate optimization problem under constraints, meet: Optimization goal: ; Constraints: ; Where, σ lim and h f_lim are the stress and thickness limits that can be achieved by the film deposition process.

[0013] Optionally, the above problem is solved by one or more of genetic algorithm, particle swarm optimization algorithm, gradient descent algorithm, simulated annealing algorithm, and the optimized T value and the arch width d are determined by the initial warping morphology.

[0014] Optionally, the stress film configuration is selected according to the initial warping type of the wafer as one of the following combinations: first type: the wafer front surface x-axis domain is warped upward, and the front surface y-axis domain is not warped, then the arch tensile stress film is deposited on the wafer back surface y-axis two ends; second type: the wafer front surface x-axis domain is warped downward, and the front surface y-axis domain is not warped, then the arch compressive stress film is deposited on the wafer back surface y-axis two ends; third type: the wafer front surface x-axis domain is not warped, and the front surface y-axis domain is warped upward, then the arch tensile stress film is deposited on the wafer back surface x-axis two ends; fourth type: the wafer front surface x-axis domain is not warped, and the front surface y-axis domain is warped downward, then the arch compressive stress film is deposited on the wafer back surface x-axis two ends; fifth type: the wafer front surface x-axis domain is warped downward, and the front surface y-axis domain is warped upward, then the arch tensile stress film is deposited on the wafer back surface x-axis two ends, and the arch compressive stress film is deposited on the back surface y-axis two ends; sixth type: the wafer front surface x-axis domain is warped upward, and the front surface y-axis domain is warped downward, then the arch compressive stress film is deposited on the wafer back surface x-axis two ends, and the arch tensile stress film is deposited on the back surface y-axis two ends.

[0015] Optionally, when the simulation model is iteratively corrected, the parameters are adjusted as follows: keep the arch stress film geometry unchanged, adjust the stress and film thickness product (T x1 , T x2 ), (T y1 , T y2 ) four parameter values, and then output the simulation deformation surface through model calculation, and the difference between the maximum value and the minimum value of the surface is set as B simThe difference between the simulation result and the measured result is a curved surface, and the difference between the maximum value and the minimum value of the curved surface is set as B error , if B error <10% B sim , it is determined that the finite element simulation model is qualified, otherwise the above steps are repeated until the condition B error <10% B sim .

[0016] The application further provides a preparation method of a power device, wherein the power device comprises a trench structure formed on a front surface of a wafer, and the preparation method comprises the method for improving wafer multi-form warping according to any one of the preceding embodiments.

[0017] Optionally, the power device comprises one of a split gate transistor and an insulated gate bipolar transistor.

[0018] The application further provides a power device prepared by the preparation method of the power device according to any one of the preceding embodiments.

[0019] The application further provides a wafer multi-form warping correction system for implementing the method for improving wafer multi-form warping according to any one of the preceding embodiments, comprising: a deformation measurement module configured to measure an initial warping topography of a wafer and obtain measured deformation distribution data of the wafer; a simulation optimization module configured to calculate a three-dimensional deformation of wafer warping by a finite element simulation model, and on the basis of the three-dimensional deformation, optimize parameters of a back stress film of the wafer based on the measured deformation distribution data by a linear superposition method, wherein the parameters comprise a type, a geometric shape, a stress value and a thickness of the stress film, so that the back stress film generates a deformation distribution opposite to the initial warping topography; a deposition etching module configured to prepare the stress film on the back of the wafer according to the parameters of the stress film optimized by the simulation optimization module, and the stress film is in an arc shape and is distributed in four quadrants close to a circumference of the wafer back; and a feedback control module configured to correct the parameters of the stress film in the finite element simulation model until a warping value of the wafer is less than or equal to a maximum wafer warping specification.

[0020] Optionally, the wafer multi-form warping correction system further comprises a stress film matrix table configured to obtain attributes and arc width of the stress film deposited on the wafer back in X and Y four quadrants according to initial warping values in X and Y directions of the front surface.

[0021] The application further provides a computer readable storage medium storing program instructions, wherein the program instructions are executed to implement the method for improving wafer multi-form warping according to any one of the preceding embodiments.

[0022] As described above, the method and system for improving wafer multi-form warping have the following beneficial effects: The application can only solve the corresponding three-dimensional deformation through the finite element software calculation and the least square method for different initial warping, the calculation speed of the algorithm is fast, compared with the iterative optimization method of the finite element model, the method of the application can significantly reduce the computing power requirement and operation time, and has strong engineering application value.

[0023] The application provides a systematic solution for wafer warping, including an overall process flow, a simulation model correction method, an optimization method of stress film parameters, etc.

[0024] The application has no influence on the front device and does not cause adverse effects on the performance of the device.

[0025] The application provides a plurality of methods for manufacturing the back stress film based on the capability of a chemical vapor deposition machine, in cooperation with a photolithography and etching process, especially the arch-shaped tensile stress film and the arch-shaped compressive stress film can be simultaneously deposited in the corresponding regions of the wafer back through a regional deposition process, the process is simple and efficient, and has high application value.

[0026] The wafer warping is reduced by more than 50%, and the requirements of conveying equipment on wafer deformation are met.

[0027] The method can significantly reduce the local spherical warping, and is very friendly to the photolithography and chemical mechanical polishing process. DETAILED DESCRIPTION

[0028] The accompanying drawings, which are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the principle of the application. Obviously, the accompanying drawings in the following description only represent some embodiments of the application.

[0029] Figure 1 A split gate transistor structure is shown.

[0030] Figure 2 A saddle-shaped warping effect is shown.

[0031] Figure 3 A step flowchart of the method for improving wafer multi-form warping is shown.

[0032] Figure 4 A wafer deformation measurement point distribution diagram is shown.

[0033] Figure 5 An initial warpage profile measurement schematic diagram showing an embodiment of the present application.

[0034] Figures 6a to 6d A wafer backside stress film simulation finite element model schematic diagram showing an embodiment of the present application, wherein, Figure 6a A stress simulation model structure schematic diagram showing an embodiment of the present application, Figure 6b A wafer surface geometry meshing schematic diagram showing an embodiment of the present application, Figure 6c A stress film (x-y compression-tension) node assignment schematic diagram showing an embodiment of the present application, Figure 6d A simulation output wafer deformation or warpage profile schematic diagram showing an embodiment of the present application.

[0035] Figures 7a to 7d A variety of warpage profiles and their representation method schematic diagram showing an embodiment of the present application, wherein, Figure 7a An umbrella shape and its symbolic representation schematic diagram showing an embodiment of the present application, Figure 7b A bowl shape and its symbolic representation schematic diagram showing an embodiment of the present application, Figure 7c A potato chip shape and its symbolic representation schematic diagram showing an embodiment of the present application, Figure 7d A saddle shape and its symbolic representation schematic diagram showing an embodiment of the present application.

[0036] Figures 8a to 8b A bow-shaped stress film and its parameters schematic diagram showing an embodiment of the present application, wherein, Figure 8a A structure schematic diagram showing adjacent stress films not in contact, Figure 8b A structure schematic diagram showing adjacent stress films in contact.

[0037] Figure 9 A local spherical deformation schematic diagram showing an embodiment of the present application generated by a wafer backside stress film with a large area.

[0038] Figures 10a to 10f A structure schematic diagram showing an embodiment of the present application using wafer backside bow-shaped stress film combination to reduce a variety of types of warpage.

[0039] Figure 11 A first wafer backside stress film manufacturing process flow schematic diagram showing an embodiment of the present application.

[0040] Figure 12 A first wafer backside stress film manufacturing process flow schematic diagram showing an embodiment of the present application.

[0041] Figure 13 A first wafer backside stress film manufacturing process flow schematic diagram showing an embodiment of the present application.

[0042] Figure 14 A simulation model correction flow schematic diagram showing an embodiment of the present application.

[0043] Figures 15a to 15c The experimental results of the embodiment of the present application are shown in the following figures, Figure 15a The initial wafer warping measured is shown in the following figure, Figure 15b The wafer warping of the wafer with the fan-shaped stress film deposited on the back surface is shown in the following figure, Figure 15c The wafer warping of the wafer with the bow-shaped stress film reserved on the back surface is shown in the following figure.

[0044] Figures 16a to 16b The wafer back surface stress film design in the experimental process of the embodiment of the present application is shown in the following figure, Figure 16a The combination of the wafer back surface fan-shaped stress film is shown in the following figure, Figure 16b The combination of the wafer back surface bow-shaped stress film is shown in the following figure.

[0045] Figure 17 The wafer warping improvement effect of the embodiment of the present application is shown in the following figure.

[0046] Element number explanation: wafer substrate 10, stress film 11, bow-shaped tensile stress film 111, bow-shaped compressive stress film 112, fan-shaped tensile stress film 201, fan-shaped compressive stress film 202, steps S11-S16. DETAILED DESCRIPTION

[0048] The advantages and effects of the present application can be easily understood by those skilled in the art from the description of the embodiments of the present application. The present application can also be implemented or applied in different specific embodiments, and the details in the description can be modified or changed based on different views and applications without departing from the spirit of the present application.

[0049] It should be emphasized that the term "comprises / comprising" as used herein indicates the presence of the stated features, integers, steps or components, but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.

[0050] Features described and / or illustrated with respect to one embodiment can be used in the same or similar manner in one or more other embodiments, in combination with features of other embodiments, or in place of features of other embodiments.

[0051] As in the detailed description of the embodiments of the present application, the cross-sectional views of the device structure are partially enlarged without the general scale for the convenience of description, and the schematic views are only examples, which should not limit the scope of protection of the present application. In addition, three-dimensional spatial dimensions of length, width and depth should be included in actual production.

[0052] For convenience in description, spatially relative terms such as "beneath", "below", "lower", "under", "above", "upper" and the like can be used herein for the purpose of illustrating one element or feature's relationship to another element(s) or feature(s) as the devices are oriented in the figures. The spatially relative terms are intended to encompass different orientations of the device in its operation or use in addition to the orientations depicted in the figures. The devices can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein are to be interpreted in accordance with the change of orientation.

[0053] In the context of the present application, a structure described as having a first feature "on" a second feature can include embodiments in which the first and second features are formed directly contacting one another, as well as embodiments in which additional features are formed between the first and second features such that the first and second features can not be directly contacting one another.

[0054] Need to be explained, the embodiment provided in the figure only in a schematic way illustrates the basic idea of the present application, so the figure shows only the components related to the present application, not the number of components, shape and size of the actual implementation of the drawing, the actual implementation of each component type, quantity and proportion can be a voluntary change, and its component layout pattern can be more complex.

[0055] In the preparation process of power devices, with the continuous development and iteration of process technology, split gate transistor (SGT) and insulated gate bipolar transistor (IGBT) products adopt narrower and deeper trench processes to effectively improve power density and reduce loss, and at the same time improve product reliability. In the process, different components or / and thickness of film layers need to be repeatedly formed or deposited on the device. The film layer and the silicon substrate have different mechanical properties due to different chemical compositions, which is also the reason for the interface stress mismatch. Taking one step in the SGT process as an example: Figure 1is a schematic diagram of a cross-sectional structure of SGT. The process is to etch a very deep trench on an epitaxial substrate, and deposit a high-temperature thermal oxide film and form two polysilicon gates in the deep trench. The main purpose is to reduce the gate-drain capacitance by isolating the gate and the drain, and the gate-drain capacitance is converted into the gate-source capacitance; the input capacitance of the device is increased, and the higher input capacitance and Miller capacitance ratio make the device have higher resistance to the impact of the gate by the drain voltage oscillation. After a layer of oxide film is formed on one surface of silicon, due to the difference in the coefficient of thermal expansion (CTE) between silicon dioxide and single crystal silicon, stress mismatch will occur at the interface during the temperature recovery process. For SGT structure, the oxide film formed at high temperature will cause stress mismatch on the trench bottom, sidewall surface and wafer back during the cooling process. Due to the sum of the stress mismatch in the trench extension direction (y direction) and the trench arrangement direction (x direction) and the stress mismatch on the wafer back, the wafer will produce serious warping after the oxide layer is formed, and the warping degree in the x direction and the y direction is very different. The existence of this difference will make the wafer warp into a saddle-shaped structure with the x direction upward and the y direction downward. Figure 2 As can be seen from the thin film stress-deformation relationship (Formula 2), the strain at the edge of the substrate increases with the increase of the substrate size, while the substrate, the thickness of the film, and the mechanical properties of the material remain unchanged. This characteristic is reflected in the semiconductor industry when converting from 6-inch, 8-inch to 12-inch wafers. With the increase of wafer size and more complex structure, the warping of power devices on the production line is also more and more obvious. This deformation directly leads to the failure of normal production in the product process, resulting in lower yield, affecting product quality, and even scrap.

[0056] When the warping amount (the maximum value of y-axis deformation - the maximum value of x-axis deformation) exceeds 250 microns, the following problems are likely to occur: 1) The wafer is easily broken during the mechanical arm conveying process due to slip; 2) The vacuum suction platform cannot achieve good suction of the wafer, and the subsequent process operation cannot be performed, especially in the photolithography process, which will also seriously affect the photolithography precision and alignment precision, thereby causing the pattern profile to deform, directly affecting the device performance; 3) In the batch production cleaning machine, the warping degree is too large, combined with the surface tension of the cleaning solution, which will cause the adjacent wafers to overlap together, and the cleaning process cannot be performed. Therefore, how to improve the warping degree of the wafer, especially the problem of too large difference in warping degree in x and y directions, is the main topic in the production process of power device products at present.

[0057] Generally, the warping amplitude is related to the trench depth, trench width, number of trenches, and oxide film thickness. Table 1 below is the measured data of a certain SGT product. After the high-temperature thermal oxide layer growth in the trench, the warping degree in the y direction is -357 microns, the warping degree in the x direction is 199 microns, and the difference is as high as 556 microns. This warping degree exceeds the mechanical conveying, vacuum suction and process cavity processing capacity of most machines, resulting in the inability to produce products.

[0058] Therefore, a new manufacturing process is needed to solve the problem of the saddle-shaped warpage of the wafer to achieve mass production and improve production efficiency and ensure device performance.

[0059]

[0060] The known methods for solving wafer warpage are as follows: 1) Adjust by arranging different groove directions of chips vertically on a mask, which has the limitation that different layout chips need to be square in size, otherwise the cutting process cannot be realized.

[0061] 2) Adjust by the photolithography method, specifically: deposit a stress film on the wafer surface, protect specific areas with photoresist, and perform ion implantation on other areas to release stress in a specific direction. The limitation of this method is that ion implantation has a great impact on semiconductor devices (especially in the front-end process), and the growth and removal process of the stress film is relatively complex.

[0062] 3) For saddle-shaped warpage, deposit fan-shaped stress films on the back, and the film types in different directions are different, so as to correct the X and Y direction warpages in different directions. This method will form additional local spherical warpage, limiting the warpage adjustment range, and the spherical warpage is not friendly to photolithography and chemical mechanical polishing processes, which can easily cause alignment failure and chipping.

[0063] 4) The authorized Chinese patent with application number 202310384155.9 proposes a method: form a trench structure on the back of the wafer, the position and extension direction of the trench are consistent with the position and extension direction of the front trench; then form a silicon oxide film on the bottom, top and sidewall of the back trench. The compressive stress of the oxide film of the trench structure produces warpage in different directions in the X and Y directions, and the direction is opposite to that produced by the front trench, thereby achieving the purpose of reducing saddle-shaped warpage. This method has good effect, but it is necessary to deposit an oxide film on the front to protect the front structure from mechanical damage and contamination, and after the back process is completed, the front oxide film needs to be removed; it needs to go through front chemical vapor deposition, back photolithography, back etching, cleaning, back protection film generation, and front protection film removal in turn, and the process steps are more, there is still room for optimization.

[0064] Based on the above reasons, as shown in the following Figure 3 The embodiment provides a method for improving the multi-form warpage of a wafer, which comprises the following steps: Step 1) S11, measure the initial warpage of the wafer to obtain the measured deformation distribution data of the wafer; Step 2) S12, calculating the three-dimensional deformation of wafer warpage by finite element simulation model, and based on the measured deformation distribution data, the parameters of wafer back stress film are optimized by linear superposition method, the parameters including the type, geometry, stress value and thickness of stress film, so that the back stress film generates a deformation distribution opposite to the initial warpage topography; Step 3) S13, according to the parameters of stress film optimized in step 2) S12, a stress film is prepared on the back of the wafer, and the stress film is distributed in the form of arch in the four quadrants near the circumference of the wafer back; Step 4) S14, measuring the deformation distribution data of the optimized wafer; Step 5) S15, judging whether the warpage value of the optimized wafer meets the requirements, if the warpage value of the wafer is less than or equal to the maximum wafer warpage specification, the wafer is prepared according to the parameters of the stress film in step 3) S13; if the warpage value of the wafer is greater than the maximum wafer warpage specification, step 6) S16 is performed; Step 6) S16, based on the measurement results of step 4) S14, the parameters of the stress film are corrected by backstepping, and the parameters of the stress film are corrected in the finite element simulation model, and steps 2) S12~5) S15 are re-executed until the warpage value of the wafer is less than or equal to the maximum wafer warpage specification.

[0065] In some embodiments, further comprising the step of: 7) based on the above steps, a matrix table of back stress film deposition is prepared, and according to the initial warpage value in the X and Y directions of the front surface, the parameters of the stress film deposited in the four regions in the X and Y directions of the wafer back can be obtained by looking up the table.

[0066] In some embodiments, optionally, when measuring the initial warpage topography of the wafer, the measurement points are uniformly distributed on the whole wafer, and the height value of each point is measured, thereby obtaining the deformation distribution data of the wafer, and the deformation distribution data satisfies the following function: ; Wherein, z0 represents the initial displacement of a point on the wafer surface in the direction perpendicular to the wafer surface, and is a binary function of the point (x, y) on the wafer surface.

[0067] In some embodiments, according to the measured deformation distribution data in step 1), the corresponding deformation distribution z1 of the back stress film satisfies: ; For the warpage symmetrical through the z-axis of the wafer center, the stress and thickness of the stress film are calculated by the following formula: ; B is the wafer warpage, for the axisymmetric warpage, B is the height difference between the front edge and the center position of the wafer, which satisfies: ; wherein σ is the stress of the back stress film, h f is the thickness of the stress film, T is the product of the stress of the stress film and the film thickness, is the moment of force per unit area, i.e., the moment density, is the decisive factor leading to the deformation of the wafer, E is the Young's modulus of elasticity of the substrate, h is the thickness of the substrate, v is the Poisson's ratio of the substrate material, and R is the radius of the wafer; after T is determined, the stress of the stress film and the film thickness are determined according to the principle of optimal economy under the condition of satisfying the feasibility of the film forming process.

[0068] In some embodiments, for non-central symmetric warping, the finite element simulation model is constructed based on the equation of elasticity, and satisfies: ; wherein D is the bending stiffness: ; Δ is the Laplacian operator in Cartesian coordinates: ; z is the displacement amount of each point on the wafer in the z direction under the action of stress, U(x, y) is the displacement field satisfying the Laplace equation ΔU(x, y) = 0, h is the thickness of the substrate, v is the Poisson's ratio of the substrate material, T is the product of the stress of the stress film and the film thickness, and E is the Young's modulus of elasticity of the substrate.

[0069] In some embodiments, formula (5) satisfies the following boundary conditions: ; ; Based on the above formulas (5) to (9), the equivalent stress distribution T = T(z) or z = T(z) of the front microstructure is obtained based on the finite element simulation model, and the deformation z(x, y) = z(T(x, y)) of the wafer under the stress distribution is output, wherein R represents the radius of the wafer, for a 12-inch wafer, R = 300 mm, θ is the angle in the cylindrical coordinate system, and U(R, θ) represents the boundary condition at the edge of the wafer.

[0070] In some embodiments, the optimal moment density distribution T opt (x, y) is obtained in such a way that: ; Based on formulas (5) to (9), z(T(x, y)) is a linear system, and satisfies the following formula: ; ; where k is a constant, the wafer warpage is described by a cos(2θ) curve, and the wafer deformation is described by a polynomial curve, and the polar coordinate expression of formula (12) is constructed to describe the wafer deformation, and the following formula is obtained: ; The first term Ar in formula (13) 2 is the central symmetric warpage, and the corresponding moment density T can be obtained by formula (3); the second term Br 2 cos(2θ) is the product of the 2nd power of r and the cosine of 2θ; A and B are the coefficients of the two terms, and the unit is m -1 ; Since z(r,θ) and T(r,θ) are linear systems, the input T(r,θ) is decomposed into the product of the even power polynomial of r P(r) and the even multiple of θ cosine C(θ), and the following formula is obtained: ; ; ; where T(r,θ) represents the three-dimensional distribution of the moment density a i and b j are coefficients, the unit of a i is N / m 2i+1 , and b j is a dimensionless constant, T(x,y) is decomposed into (n+1)(m+1) terms, i and j are parameter indices, and represent the position of the parameter in the parameter sequence; for the following formula (17), the corresponding three-dimensional deformation is calculated by the finite element software: ; where i=0,1,2,…,n; j=0,1,2,…,m, T ij represents the moment density at the position of the parameter sequence i and j; for the target deformation surface-z0 (x,y), the linear superposition fitting is performed by the basic deformation array: ; where the dimensionless coefficient sequence p ij can be determined by the least square method, and the moment density and deformation in formula (17) and formula (18) satisfy the physical dimensionless coefficient of formula (5), which is normalized to the dimensionless coefficient p ij of the deformation unit z ij in the finite element calculation process; according to the linear superposition principle of formula (11), p ij satisfies the deformation superposition and is also applicable to the superposition of the moment density, and the stress distribution T opt (r,θ) of the deformation-z0 (r,θ) satisfies the following formula: .

[0071] In some embodiments, the bowing on the front side is eliminated by forming a bow-shaped stress film on the back side of the wafer, the bow width (d x1 , d x2 ), (d y1 , d y2 ) uniquely determines the geometry, the stress multiplied by the film thickness (T x1 , T x2 ), (T y1 , T y2 ) describes the optimal moment density distribution T opt (x,y) is converted into a single-objective multivariate optimization problem under constraints, satisfying: Optimization objective: ; Constraints: ; where σ lim and h f_lim are the stress and thickness limits that can be achieved by the thin film deposition process.

[0072] In some embodiments, the above problem is solved by one or more of genetic algorithm, particle swarm optimization algorithm, gradient descent algorithm, simulated annealing algorithm, and the optimized T value and bow width d are determined by the initial bowing topography.

[0073] In some embodiments, adjacent bow-shaped stress films are separated from each other, or when the bow-shaped stress film width is large, adjacent bow-shaped stress films are in contact with each other, and the boundary line of adjacent bow-shaped stress films is a 45° and 135° diagonal line passing through the center of the wafer.

[0074] In some embodiments, the bow-shaped stress film is arranged to satisfy the following rules: if the wafer front side x-direction bowing, it is corrected by the bow-shaped stress film distributed in the back side y-direction; if the wafer front side y-direction bowing, it is corrected by the bow-shaped stress film distributed in the back side x-direction; if the wafer front side is upwardly bowed, a tensile stress film is deposited on the back side of the wafer; if the wafer front side is downwardly bowed, a compressive stress film is deposited on the back side of the wafer.

[0075] In some embodiments, within the process capability range of thin film deposition, the width of the bow-shaped stress film is reduced by increasing the stress or / and thickness of the bow-shaped stress film.

[0076] In some embodiments, the configuration of the bow-shaped stress film is selected according to the initial warping type of the wafer to select one of the following combinations: first type: the wafer front surface x-axis region warps upward, the front surface y-axis region does not warp, then deposit a bow-shaped tensile stress film 111 at both ends of the wafer back surface y-axis; second type: the wafer front surface x-axis region warps downward, the front surface y-axis region does not warp, then deposit a bow-shaped compressive stress film 112 at both ends of the wafer back surface y-axis; third type: the wafer front surface x-axis region does not warp, the front surface y-axis region warps upward, then deposit a bow-shaped tensile stress film 111 at both ends of the wafer back surface x-axis; fourth type: the wafer front surface x-axis region does not warp, the front surface y-axis region warps downward, then deposit a bow-shaped compressive stress film 112 at both ends of the wafer back surface x-axis; fifth type: the wafer front surface x-axis region warps downward, the front surface y-axis region warps upward, then deposit a bow-shaped tensile stress film 111 at both ends of the wafer back surface x-axis and a bow-shaped compressive stress film 112 at both ends of the back surface y-axis; sixth type: the wafer front surface x-axis region warps upward, the front surface y-axis region warps downward, then deposit a bow-shaped compressive stress film 112 at both ends of the wafer back surface x-axis and a bow-shaped tensile stress film 111 at both ends of the back surface y-axis.

[0077] In some embodiments, the preparation of the bow-shaped stress film of the fifth type or the sixth type includes the following steps: 1) deposit a tensile stress film on the wafer back surface, then use a photolithography process to precisely define the area where the excess film is located, and then remove the excess film by etching to form the required bow-shaped tensile stress film 111; 2) deposit a compressive stress film on the wafer back surface, then use a photolithography process to precisely define the area where the excess film is located, and then remove the excess film by etching to form the required bow-shaped compressive stress film 112.

[0078] In some embodiments, the preparation of the bow-shaped stress film of the fifth type or the sixth type includes the following steps: through a regional deposition process, deposit a fan-shaped tensile stress film and a fan-shaped compressive stress film in the corresponding regions on the wafer back surface, remove the tensile stress film and the compressive stress film in the middle rectangular region through a photolithography process and an etching process, and form the required bow-shaped tensile stress film 111 and the bow-shaped compressive stress film 112 on the wafer back surface.

[0079] In some embodiments, the preparation of the bow-shaped stress film of the fifth type or the sixth type includes the following steps: through a regional deposition process, deposit a bow-shaped tensile stress film 111 and a bow-shaped compressive stress film 112 in the corresponding regions on the wafer back surface.

[0080] In some embodiments, when the simulation model is iteratively corrected, the parameters are adjusted as follows: keep the bow-shaped stress film geometry unchanged, adjust the values of the stress film stress and film thickness product (T x1 , T x2 ), (T y1 , T y2 ), and then output the simulation deformation surface through model calculation, and the difference between the maximum value and the minimum value of the surface is set as B simThe difference between the simulation result and the measured result is a curved surface, and the difference between the maximum value and the minimum value of the curved surface is B error , if B error <10% B sim , it is determined that the finite element simulation model is qualified, otherwise the above steps are repeated until the condition B error <10% B sim .

[0081] The embodiment also provides a preparation method of a power device, the power device including a trench structure formed on a front surface of a wafer, and the preparation method including the method for improving wafer multi-form warping according to any one of the preceding embodiments.

[0082] In some embodiments, the power device includes one of a split gate transistor and an insulated gate bipolar transistor.

[0083] The embodiment also provides a power device prepared by the preparation method of the power device according to any one of the preceding embodiments.

[0084] The embodiment also provides a wafer multi-form warping correction system for implementing the method for improving wafer multi-form warping according to any one of the preceding embodiments, including: a deformation measurement module configured to measure an initial warping topography of a wafer, and obtain measured deformation distribution data of the wafer; a simulation optimization module configured to calculate a three-dimensional deformation of wafer warping by a finite element simulation model, and based on the measured deformation distribution data, optimize parameters of a back stress film of the wafer by a linear superposition method based on the three-dimensional deformation, the parameters including a type, a geometric shape, a stress value and a thickness of the stress film, so that the back stress film generates a deformation distribution opposite to the initial warping topography; a deposition etching module configured to prepare the stress film on the back surface of the wafer according to the optimized parameters of the stress film by the simulation optimization module, and the stress film is in an arc shape and is distributed in four quadrants close to a circumference of the wafer back surface; and a feedback control module configured to correct the parameters of the stress film in the finite element simulation model until a warping value of the wafer is less than or equal to a maximum wafer warping specification.

[0085] In some embodiments, a stress film matrix table is further included, and the stress film matrix table is configured to obtain parameters of the stress film deposited in four X and Y regions on the back surface of the wafer according to initial warping values in X and Y directions of the front surface.

[0086] The embodiment also provides a computer readable storage medium storing program instructions, and the program instructions are executed to implement the method for improving wafer multi-form warping according to any one of the preceding embodiments.

[0087] The embodiment also provides a preparation method of a semiconductor wafer, comprising: providing a wafer, measuring wafer warping data, and depositing a bow-shaped stress film on the back of the wafer according to the wafer warping data, wherein the bow-shaped stress film satisfies the following rules: if the wafer front surface warps in the x direction, the warp is corrected by the bow-shaped stress film distributed in the y direction on the back; if the wafer front surface warps in the y direction, the warp is corrected by the bow-shaped stress film distributed in the x direction on the back; if the wafer front surface warps upward, a tensile stress film is deposited on the back of the wafer; if the wafer front surface warps downward, a compressive stress film is deposited on the back of the wafer.

[0088] In some embodiments, adjacent bow-shaped stress films are separated from each other, or, when adjacent bow-shaped stress films are in contact with each other, the boundary lines of adjacent bow-shaped stress films are 45° and 135° oblique lines passing through the center of the wafer.

[0089] In some embodiments, the configuration of the bow-shaped stress film is selected according to the initial warping type of the wafer, and one of the following combinations is selected: The first type: the wafer front surface warps upward in the x-axis domain, and the front surface does not warp in the y-axis domain, and bow-shaped tensile stress films are deposited on the two ends of the y-axis on the back of the wafer; The second type: the wafer front surface warps downward in the x-axis domain, and the front surface does not warp in the y-axis domain, and bow-shaped compressive stress films are deposited on the two ends of the y-axis on the back of the wafer; The third type: the wafer front surface does not warp in the x-axis domain, and the front surface warps upward in the y-axis domain, and bow-shaped tensile stress films are deposited on the two ends of the x-axis on the back of the wafer; The fourth type: the wafer front surface does not warp in the x-axis domain, and the front surface warps downward in the y-axis domain, and bow-shaped compressive stress films are deposited on the two ends of the x-axis on the back of the wafer; The fifth type: the wafer front surface warps downward in the x-axis domain, and the front surface warps upward in the y-axis domain, and bow-shaped tensile stress films are deposited on the two ends of the x-axis on the back of the wafer, and bow-shaped compressive stress films are deposited on the two ends of the y-axis on the back of the wafer; The sixth type: the wafer front surface warps upward in the x-axis domain, and the front surface warps downward in the y-axis domain, and bow-shaped compressive stress films are deposited on the two ends of the x-axis on the back of the wafer, and bow-shaped tensile stress films are deposited on the two ends of the y-axis on the back of the wafer.

[0090] In some embodiments, the preparation of the bow-shaped stress film of the fifth type or the sixth type comprises the following steps: 1) depositing a tensile stress film on the back of the wafer, then using a photolithography process to define the area where the excess film is located, and then removing the excess tensile stress film by etching to form the required bow-shaped tensile stress film; 2) depositing a compressive stress film on the back of the wafer, then using a photolithography process to define the area where the excess film is located, and then removing the excess compressive stress film by etching to form the required bow-shaped compressive stress film.

[0091] In some embodiments, the preparation of the fifth or sixth type of bow-shaped stress film includes the steps of: depositing a fan-shaped tensile stress film and a fan-shaped compressive stress film in the corresponding regions on the back of the wafer simultaneously through a regional deposition process, removing the tensile stress film and the compressive stress film in the middle rectangular region through a photolithography process and an etching process, and forming the required bow-shaped tensile stress film and bow-shaped compressive stress film on the back of the wafer.

[0092] In some embodiments, the preparation of the fifth or sixth type of bow-shaped stress film includes the steps of: depositing a fan-shaped tensile stress film and a fan-shaped compressive stress film in the corresponding regions on the back of the wafer simultaneously through a regional deposition process, removing the tensile stress film and the compressive stress film in the middle rectangular region through a photolithography process and an etching process, and forming the required bow-shaped tensile stress film and bow-shaped compressive stress film on the back of the wafer.

[0093] In some embodiments, after the preparation of the bow-shaped tensile stress film and the bow-shaped compressive stress film, the process further includes the steps of: depositing a zero-stress film on the back of the wafer, the thickness of the zero-stress film being greater than the thickness of the bow-shaped tensile stress film and the bow-shaped compressive stress film; and planarizing the zero-stress film through a chemical mechanical polishing process.

[0094] In some embodiments, within the process capability range of thin film deposition, the width of the bow-shaped stress film is reduced by increasing the stress or / and thickness of the bow-shaped stress film.

[0095] The embodiments also provide a semiconductor wafer, which includes: a wafer, a bow-shaped stress film deposited on the back of the wafer, wherein the bow-shaped stress film satisfies the following rules: if the wafer is warped in the x direction on the front surface, the warp is corrected by the bow-shaped stress film distributed in the y direction on the back; if the wafer is warped in the y direction on the front surface, the warp is corrected by the bow-shaped stress film distributed in the x direction on the back; if the wafer is warped upward on the front surface, a tensile stress film is deposited on the back of the wafer; and if the wafer is warped downward on the front surface, a compressive stress film is deposited on the back of the wafer.

[0096] In some embodiments, the maximum warp value of the wafer is between 150 microns and 300 microns.

[0097] The embodiments establish a set of methodologies and process flows for solving multi-morphology warping. The methodologies generate deformation in the opposite direction and with the same size as the initial deformation of the wafer by depositing stress films with set geometric shapes in different regions on the back, so as to offset the initial deformation and minimize the warping caused by specific steps in the production process, thereby fully guaranteeing the product quality and reliability requirements. The process flow of the embodiments is as follows: Figure 3As shown, the main steps are divided into four steps: step S11, first, for a given wafer warping caused by pre-process, measure the whole wafer multi-point deformation to ensure that the deformation distribution in three-dimensional space can be represented graphically; step S12, through the stress finite element simulation model, deduce the type, geometry, stress and film thickness of the deposited stress film on the back of the wafer required to reduce warping; step S13, using chemical vapor deposition, lithography, etching and other processes to form the required stress film on the back of the wafer. Step S14, for each type of different warping, an optimization process may be required, that is, steps S15-S16, and repeat steps S12-S14; after meeting the requirements, the process parameters are solidified.

[0098] The following is a detailed description of each step: Step S11: Measure the initial warping topography of the wafer to obtain the measured deformation distribution data of the wafer.

[0099] The traditional wafer warping measurement method only measures the height value of the wafer surface at several points on a straight line passing through the center of the wafer X-axis or Y-axis, and the height difference between the highest point and the lowest point is the warping record. This method is suitable for center-symmetric warping patterns, but not for asymmetric patterns such as saddle-shaped warping patterns. In this invention, the distribution of the measured points is as shown in Figure 4 As shown, the measurement points are uniformly distributed on the whole wafer, and the height value of each point is measured to obtain the deformation distribution of the wafer.

[0100] Here, the curved surface formula (1) is used to describe:

[0101] Where z0 represents the initial displacement of a point on the wafer surface in the direction perpendicular to the wafer surface, i.e. the initial warping topography, which is a binary function of the points (x, y) on the wafer surface.

[0102] As shown in Figure 5 This way can get the details of wafer warping, providing initial deformation data for subsequent simulation optimization.

[0103] Step S12, based on the deformation distribution data, optimize the parameters of the stress film on the back of the wafer through the finite element simulation model, the parameters including the type, geometry, stress value and thickness of the stress film, so that the back stress film produces a deformation distribution opposite to the initial warping topography.

[0104] According to the measured warping topography of step S11, the shape, type, stress size and thickness of the back stress film need to be optimized to produce a distribution opposite to the initial stress and the corresponding deformation distribution z1.

[0105] Ideally, z1 and z0 cancel each other out, and the initial warpage is completely eliminated. For warpage that is symmetric across the z-axis through the center of the wafer, the stress and thickness of the front / backside stress film can be quickly calculated using the Stoney formula of equation (3).

[0106]

[0107] B is the wafer warpage, for axisymmetric warpage, B is the height difference between the front edge of the wafer and the center position, which satisfies:

[0108] where σ is the stress of the backside stress film, h f is the thickness of the stress film, T is the product of the stress of the stress film and the film thickness, E is the Young's modulus of elasticity of the substrate, h is the thickness of the substrate, v is the Poisson's ratio of the substrate material, and R is the radius of the wafer.

[0109] However, for non-central symmetric warpage, the finite element simulation model can be constructed based on the equations of elasticity, and the relationship between deformation z and T is:

[0110] where D is the bending stiffness:

[0111] ∆ is the Laplacian operator in Cartesian coordinates:

[0112] z is the displacement field, i.e., the displacement of each point on the wafer in the z direction under the action of stress.

[0113] U(x,y) is the displacement field that satisfies the Laplace equation ΔU(x,y) = 0.

[0114] Equation (5) is a second-order partial differential equation, and to determine a unique solution, the following boundary conditions (cylindrical coordinates) must also be satisfied:

[0115] It should be noted that T is the product of stress and film thickness, which is the fundamental reason for determining the wafer deformation, and its physical meaning is the moment generated per unit area, which is referred to as moment density here. Knowing z0 or z1, equations (5)-(9) can be solved using finite element numerical algorithms to obtain the equivalent stress distribution of the front microstructure T = T(z) or z = T(z). This embodiment uses a finite element modeling tool to solve this problem. First, a finite element simulation model based on structural mechanics is created, as shown in Figures 6a to 6d Figure 6a ​The geometry structure diagram of the back stress film simulation model is divided into two parts, the upper part is a wafer substrate 10, and the lower part is a relatively thin stress film 11. Figure 6b The geometry structure is divided into dense nodes. Figure 6c As shown in the figure, the stress value of the stress film node is manually assigned first (first determine the regional stress property from a macroscopic point of view, and then assign the stress value of each point from a microscopic point of view), and then start the calculation, the stress-strain equation is calculated by using the finite element method, and the wafer deformation under the stress distribution is output, as shown in the figure. Figure 6d

[0116] The parameters used in the simulation model are shown in Table 2, and the simulation parameter settings are completely consistent with the actual parameters, so as to effectively ensure the accuracy of the simulation model.

[0117]

[0118] Using the above method, any warping can be theoretically eliminated, and in practical engineering applications, as shown in the figure, four kinds of warping, such as umbrella-shaped, bowl-shaped, potato-shaped and saddle-shaped, need to be solved. Figures 7a to 7d

[0119] After solving the deformation calculation problem, as explained in equation (2), the optimal moment density distribution T opt (x,y) needs to be found, so that:

[0120] Although T opt (x,y) can be optimized using commercial finite element software, a round of three-dimensional finite element calculation is required for each iteration to obtain z(x,y), and when the number of nodes is large, the process requires a large amount of computing power and a long calculation time. In practical applications, in order to quickly obtain results, it is necessary to increase the operation server and software authorization license, which greatly increases the use cost. For this purpose, the present application proposes a fast optimization method, which fully utilizes the linear characteristics of the stress-strain equation, and quickly obtains the result T opt (x,y) of equation (10) without increasing the cost of software and hardware.

[0121] As can be seen from equations (5) to (9), z(T(x,y)) is a linear system, that is:

[0122] From the actual production line measurement results and simulation results, the wafer warping mainly has Figures 7a to 7d ​​The four kinds of warping shown in the umbrella shape, bowl shape, potato chip shape and saddle shape are symmetrical in the X direction and Y direction, and the warping direction and size are symmetrical, which can be described by the cos(2θ) curve; from the radial direction, the wafer deformation can be described by the polynomial curve, and therefore the polar coordinate expression shown in formula (12) is used to describe the wafer deformation:

[0123] Formula (13) is composed of two terms, where the first term Ar 2 is the central symmetrical warping, and the corresponding moment density T can be obtained by formula (3); the second term Br 2 cos(2θ) is the product of the 2nd power of r and the cosine of 2θ. A and B are the coefficients of the two terms, and the unit is m -1 . Since z(r,θ) and T(r,θ) are linear systems, the input T(r,θ) is decomposed into a product of even power of r and even multiple of θ cosine, that is:

[0124] Here T(r,θ) represents the three-dimensional distribution of moment density, a i and b j are coefficients, the unit of a i is N / m 2i+1 , and b j is a dimensionless constant. Thus T(x,y) is decomposed into (n+1)(m+1) terms, it should be noted that n and m can not be equal, secondly, a large amount of simulation experience shows that when n and m are too large, the gradient is too large, and the finite element solution is prone to not converge, so the size should be limited according to the model situation.

[0125] When a i =1, b j =1, the matrix shown in Table 3 is formed, and each element in the matrix represents an independent three-dimensional moment distribution.

[0126]

[0127] For each moment density distribution in Table 3, the corresponding three-dimensional deformation is calculated by the finite element software as shown in formula (17):

[0128] Where i=0,1,2,…,n; j=0,1,2,…,m; The deformation surface matrix shown in Table 4 is obtained, where each element represents an independent three-dimensional deformation surface.

[0129]

[0130] For the target deformation surface-z0 (x,y), the basic deformation array in Table 4 can be used for linear superposition fitting:

[0131] Dimensionless coefficient sequence p ij It can be determined by the least square method. It should be noted that formula (5) determines the mechanical relationship between the moment density and the deformation, and the function is a linear relationship. The dimensional coefficient in the formula ensures that the units on both sides of the equation are the same, so that it is not only equal in value, but also shows the force balance condition in the static state. Based on this principle, the moment density and the deformation in formula (17) and formula (18) satisfy the dimensional coefficient of formula (5), which is normalized to the dimensionless coefficient p ij of the deformation element z ij .

[0132] According to the linear superposition principle shown in formula (11), p ij satisfies the deformation superposition, and is also applicable to the superposition of the moment density, so the stress distribution T opt (r,θ) generated by the deformation-z0 (r,θ) can be determined as:

[0133] The proof is as follows: According to formula (11), it can be obtained that:

[0134] According to formula (12), it can be obtained that:

[0135] Therefore, the deformation generated by T opt (r,θ) is equal to-z0 (r,θ), which meets the optimization goal.

[0136] From the simulation results, the larger m and n are, the smaller the fitting error of formula (18) is, the better the warpage elimination effect is, but the longer the calculation time is. Based on experience, m=2 and n=2 can meet the accuracy requirement, then the deformation of 9 models is solved by using the finite element method, only once for different initial warpage, only formula (17) needs to be solved by the least square method, and the calculation speed of the algorithm is very fast, compared with the iterative optimization of the finite element model, the method significantly reduces the computing power requirement and operation time, and has strong engineering application value. It should be noted that T opt (r,θ) is a continuous three-dimensional surface form, which needs to be discretized into a finite number of value distributions for consideration of the feasibility of the process, usually two, and one of them is 0.

[0137] To have a more intuitive description of three-dimensional warping, this embodiment introduces a planar view and sets the warping direction: "±" is used to represent the warping direction in the four directions of the wafer XY axis. For example, Figure 7a In the x and y directions, the wafer is warped downward, so four "-" signs are used to represent it. Correspondingly, Figure 7d The saddle-shaped warping is warped upward in the x direction and downward in the y direction, so "+" is used in the x direction and "-" is used in the y direction.

[0138] For the umbrella-shaped and bowl-shaped warping shown in Figs. Figure 7a and Figure 7b Since they are axisymmetric figures, only a single uniform stress film needs to be deposited on the back of the wafer, and the film thickness h f can be obtained using formula (3)

[0139] For the potato chip-shaped and saddle-shaped warping shown in Figs. Figure 7c and 7d In combination with the feasibility of engineering implementation, this embodiment concludes, after optimization of the simulation model, that the optimal solution to eliminate the front warping is to form an arc-shaped stress film on the back of the wafer. The parameters describing the arc-shaped stress film are shown in Fig. Figure 8a , where the arc-shaped width (d x1 , d x2 ), (d y1 , d y2 ) uniquely determines the geometric shape, and (T x1 , T x2 ), (T y1 , T y2 ) describes the stress and film thickness product. When the arc-shaped stress film width is large, adjacent arc-shaped stress films will be in contact, at which time their geometric shape becomes as shown in Fig. Figure 8b The dividing line of adjacent films is the 45° and 135° diagonal line passing through the center of the wafer. In actual processes, the warping in the x direction and the y direction is generally symmetrical, so the two stress films in the same direction are also symmetrical, i.e., d x1 =d x2 , T x1 =T x2 , d y1 = d y2 , T y1 =T y2 . However, it is not ruled out that asymmetry may occur under special processes, at which time the four sets of eight parameters are all different. Therefore, this problem becomes a single-objective multivariable optimization problem with constraints: Optimization objective:

[0140] Constraints:

[0141] where σ lim and h f_lim are the stress and thickness limits achievable by the film deposition process.

[0142] The above problems can be solved using the fast algorithm proposed above, or using general algorithms such as genetic algorithm, particle swarm optimization, gradient descent, simulated annealing, etc. The optimized T value and the bow width d are determined by the initial warping topography. After a large number of (such as 100 times) simulation optimization, the following conclusions are drawn: (1) The warping in the front x direction is corrected by the bow-shaped stress film distributed in the back y direction, and the warping in the front y direction is corrected by the bow-shaped stress film distributed in the back x direction; (2) The front is upwardly warped, and the back is deposited with tensile stress film, and the front is downwardly warped, and the back is deposited with compressive stress film; (3) The wider the back bow-shaped film, the greater the amplitude of the correction of the front warping; but in the film-covered area, new local spherical deformation is easy to occur, as shown in Figure 9 which will cause a series of process problems such as failure of the machine to adsorb the wafer, chipping, reduction or failure of lithography alignment accuracy, and poor key dimension consistency; (4) Based on the above (3), within the process capability of film deposition, without affecting the subsequent other processes, the total stress T value of the film should be increased as much as possible, i.e. the film stress and thickness should be increased, to reduce the bow-shaped film width and weaken the local spherical deformation effect. It should be noted that experiments show that due to the limitation of chemical vapor deposition process capability, the T value is not proportional to the film thickness, i.e. as the film thickness increases, the stress will decrease, and the T value will tend to be saturated.

[0143] Based on the above conclusions, as shown in Figures 10a to 10f , different combinations of x and y bow-shaped stress films should be used for different forms of warping. Among them, the first to fourth types are potato chip-shaped warping, and the fifth and sixth types are saddle-shaped warping.

[0144] First type: the front x-axis domain is upwardly warped, and the front y-axis domain is not warped; reduce the front x warping: deposit bow-shaped tensile stress film 111 on the back of the wafer at the two ends of the y-axis; Second type: the front x-axis domain is downwardly warped, and the front y-axis domain is not warped; reduce the front x warping: deposit bow-shaped compressive stress film 112 on the back of the wafer at the two ends of the y-axis; Third type: the front x-axis domain is not warped, and the front y-axis domain is upwardly warped; reduce the front y warping: deposit bow-shaped tensile stress film 111 on the back of the wafer at the two ends of the x-axis; Category 4: No warping in the front x-axis region, downward warping in the front y-axis region, reducing front y-warping: depositing an arc-shaped compressive stress film 112 at both ends of the back x-axis of the wafer; Fifth type: The front x-axis region warps downward and the front y-axis region warps upward, reducing the front xy warping: Deposit bow-shaped tensile stress film 111 at both ends of the back x-axis of the wafer, and at the same time deposit bow-shaped compressive stress film 112 at both ends of the back y-axis. Category 6: The front x-axis region warps upward and the front y-axis region warps downward, reducing the front xy warping: an arc-shaped compressive stress film 112 is deposited at both ends of the back x-axis of the wafer, and an arc-shaped tensile stress film 111 is deposited at both ends of the back y-axis.

[0145] Step S13: Create an arc-shaped stress film on the back side of the wafer. The stress film is distributed in an arc shape in the four quadrants near the circumference on the back side of the wafer.

[0146] Based on the dimensions of the arc-shaped stress film on the back side of the wafer determined in step S12, it can be fabricated using chemical vapor deposition, photolithography, and etching processes. This embodiment provides the following three fabrication methods to manufacture... Figure 10e Taking the stress membrane shown as an example, the following preparation methods are included: like Figure 11 As shown, a tensile stress film is first deposited on the back side of the wafer using chemical vapor deposition (CVD). Then, photolithography is used to precisely define the areas containing excess film. Finally, etching removes the excess film, forming an arc-shaped tensile stress film 111. This process is repeated to further fabricate an arc-shaped compressive stress film 112 in the y-axis region on the back side of the wafer. This method can be implemented using a conventional CVD system.

[0147] like Figure 12 As shown, a thin-film deposition system with back-side regional deposition capability is used to deposit two types of fan-shaped stress films on the back side of the wafer in a single pass: fan-shaped tensile stress films are deposited at both ends of the x-axis region on the back side, and fan-shaped compressive stress films are deposited at both ends of the y-axis region on the back side. Then, a single photolithography and etching process removes the film in the central rectangular region, forming an arc-shaped tensile stress film 111 and an arc-shaped compressive stress film 112 at the top of the x and y axes on the back side of the wafer. This process requires only one round of deposition, photolithography, and etching, which is relatively... Figure 11 The method simplifies the process steps, significantly reducing costs and running time.

[0148] like Figure 13 As shown, using a machine with back-side regional deposition capability, an arc-shaped tensile stress membrane 111 and an arc-shaped compressive stress membrane 112 are deposited on the back side in a single step. This method requires only one step in the process, relatively... Figure 12 The method further simplifies the process steps, reduces costs and running time, and eliminates the need for photolithography and etching, thus supporting the deposition of stress films with larger T values ​​and correcting larger initial warpage.

[0149] Step S14, measure the deformation distribution data of the optimized wafer.

[0150] The wafer warpage topography after the backside stress film correction is measured, which is the same as step S11.

[0151] Step S15, determine whether the warpage value of the optimized wafer meets the requirement. If the wafer warpage value is less than or equal to the maximum wafer warpage specification, the wafer is prepared according to the stress film parameters of step S13; if the wafer warpage value is greater than the maximum wafer warpage specification, step S16 is performed.

[0152] A large number of simulations show that, due to the limitation of the T value of the backside stress film, the corrected wafer may still have a certain residual warpage. From the actual application, it is only necessary to reduce the warpage to an acceptable range, i.e. the maximum wafer warpage specification. The specification is determined by the following three minimums: the maximum warpage acceptable by the subsequent process machine hand, the maximum warpage acceptable for the alignment operation of the lithography process, and the maximum warpage acceptable for the chemical mechanical polishing without breaking. Of course, within the implementation range of the backside stress film deposition process, the larger the T value is, the better, and the warpage can be reduced to a smaller value. However, another factor to be considered is that if the thickness of the bow-shaped stress film is large, there will be a large step from the edge to the center, and the wafer flatness will be poor, which may cause other problems. For this, a zero-stress thick film can be deposited on the backside again, and a chemical mechanical polishing process can be used for planarization. In summary, combined with a large number of experiments, for power device manufacturing process, the warpage specification is generally set to a value between 150 microns and 300 microns, and the specific value is determined by the process flow of each product platform.

[0153] If the corrected warpage is less than the specification, it means that the warpage improvement method is effective. If the corrected warpage is still higher than the specification, it means that the optimization result of the bow-shaped stress film has a large error, the simulation model has a low precision, and the model needs to be corrected before re-optimizing the stress film.

[0154] Step S16, based on the measurement result of step S14, the parameters of the stress film are corrected by backstepping, the parameters of the stress film are corrected in the finite element simulation model, and steps S12-S15 are re-executed until the wafer warpage value is less than or equal to the maximum wafer warpage specification.

[0155] Among the parameters of the simulation model, the stress σ in formula (11) and formula (12) cannot be directly measured in actual engineering, so the actual parameters are most likely to deviate from the simulation settings, and the stress value needs to be corrected. The correction method is to backstep the stress σ of the actually deposited stress film based on the measurement result of step S14, and then correct the setting of the parameter in the simulation model. The specific method is as shown in Figure 14 ​ First, the bow-shaped stress film geometry is kept unchanged, according to the actual measured wafer deformation surface in step S14, the simulation results are compared, and the values of the four parameters (T x1 , T x2 ), (T y1 , T y2 ) are adjusted, and then the model is solved to output the simulated deformation surface, the difference between the maximum and minimum values of the surface is set as B sim . The difference between the simulation results and the actual measurement results is a surface, and the difference between the maximum and minimum values of the surface is set as B error , which is used to represent the model error. If B error <10% B sim , the model is reasonable, otherwise repeat the above steps until B error <10% B sim . After too many iterations, the four parameters (T x1 , T x2 ), (T y1 , T y2 ) are modified.

[0156] After the simulation model parameters are modified, steps S12-S15 are executed again to finally complete the correction of warping. The above is a repeated linkage test of simulation, testing, and correction for one type of warping improvement. After the optimal scheme is determined, the corresponding process parameters of the solidification backside deposition film bow-shaped area, film stress, and film thickness are inserted into the process after the warping step. For other types of warping improvement, repeat the above steps to solidify the improvement process parameters and insert them into the corresponding steps.

[0157] To verify the effectiveness of the present application, a 12-inch wafer is used for warping improvement experiments. The process is as follows: Figure 3 1) In the process of manufacturing power devices SGT, a very deep trench needs to be etched on the epitaxial substrate, and a high-temperature thermal oxidation film is deposited in the deep trench. After this step, the wafer appears a large saddle-shaped warping. At this time, a piece is separated from the production line for experiment. First, the overall appearance of the wafer is measured, and the result is shown in Figure 15a . It warps upward in the x direction by 180 microns, and warps downward in the y direction by -310 microns, with a total warping amount of 490 microns, which is far beyond the specification requirement of the subsequent machine for wafer warping.

[0158] 2) According to Figures 10a to 10f , the warping belongs to the sixth type, so the x direction is selected to deposit a compressive stress film, and the y direction is selected to deposit a tensile stress film. Finite element model is used for optimization to determine the bow-shaped stress film parameters, as shown in Table 5. The T value is determined by the actual chemical vapor deposition process capability, and the bow-shaped stress film width d is optimized after being imported into the simulation model.​

[0159]

[0160] 3) Based on the existing machine capabilities, this experiment uses Figure 11 The method shown fabricates an arc-shaped stress film on the back side of a wafer. First, a film is deposited on the back side of the wafer as shown... Figure 16a The fan-shaped stress membrane shown includes a fan-shaped tensile stress membrane 201 and a fan-shaped compressive stress membrane 202. To observe the effect of the fan-shaped stress membrane on warpage, the wafer deformation at 625 points was measured after this step, and the results are as follows. Figure 15b As shown in the figure, the fan-shaped film reduced the initial warpage from 490 micrometers to 290 micrometers. Although the warpage was significantly improved, it still did not meet the warpage specification of 260 micrometers and produced additional large local spherical warpage. Then, photolithography was used to define the central rectangular region, and etching was used to remove the stress film in this region, successfully fabricating the arc-shaped stress film required in Table 3. Figure 16b As shown.

[0161] 4) Measure the amount of warpage after improvement, such as... Figure 15c As shown, the warpage is reduced to 158 micrometers, which is significantly smaller than the specification of 260 micrometers. This provides a warpage process window of up to 102 micrometers for subsequent processes, significantly improving the overall robustness of the process.

[0162] 5) Experimental results are as follows Figure 17 As shown, the method proposed in this invention reduces warpage by 68%, meeting the requirements of subsequent processes. Furthermore, compared to the fan-shaped stress film solution, this method significantly reduces localized spherical warpage, making it more compatible with photolithography and chemical mechanical polishing processes. Therefore, the feasibility and practical performance of the method proposed in this embodiment are fully verified.

[0163] In summary, the method and system for improving wafer warpage of the present invention have the following technical effects: For different initial warps, this invention only requires calculating the corresponding three-dimensional deformation using finite element software and then solving it using the least squares method. This algorithm has a fast calculation speed, and compared with the iterative optimization method of the finite element model, the method of this invention can significantly reduce the computing power requirement and the calculation time, and has strong engineering application value.

[0164] This invention proposes a systematic solution to various wafer warpage problems, including an overall process flow, simulation model correction methods, and stress film parameter optimization methods. By depositing stress films with a set geometric shape in different areas on the back of the wafer, the stress films generate deformations that are opposite in direction and equal in magnitude to the initial deformation of the wafer, thereby offsetting the initial deformation. This minimizes warpage at specific steps in the production process and fully ensures product quality and reliability requirements.

[0165] The present application corrects wafer warping by depositing stress film on the back surface, and has no influence on the front surface device and no adverse effect on the performance of the device.

[0166] The present application proposes a variety of methods for making back surface stress film based on the ability of chemical vapor deposition machine, cooperating with photoetching and etching process, especially can simultaneously deposit arch tensile stress film and arch compressive stress film in corresponding area of wafer back surface by area deposition process, which is simple and efficient, and has high application value.

[0167] The present application reduces wafer warping by more than 50%, and meets the requirements of conveying equipment and other wafer deformation.

[0168] The present application can significantly reduce local spherical warping, and is very friendly to photoetching and chemical mechanical polishing process.

[0169] Therefore, the present application effectively overcomes the shortcomings in the prior art and has high industrial utilization value.

[0170] The above embodiments only exemplarily illustrate the principles and effects of the present application, and are not used to limit the present application. Any person skilled in the art can modify or change the above embodiments without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes completed by those skilled in the art without departing from the spirit and technical thought of the present application should be covered by the claims of the present application.

Claims

1. A method for improving multi-morphological warpage of wafers, characterized in that, The method includes: 1) Measure the initial warpage morphology of the wafer and obtain the measured deformation distribution data of the wafer; 2) Calculate the three-dimensional deformation of wafer warpage using a finite element simulation model and, based on this, optimize the parameters of the back stress film of the wafer using the linear superposition method based on the measured deformation distribution data. The parameters include the type, geometry, stress value, and thickness of the stress film, so that the back stress film produces a deformation distribution opposite to the initial warpage morphology. 3) Based on the optimized stress membrane parameters in step 2), a stress membrane is fabricated on the back side of the wafer. The stress membrane is distributed in an arc shape in the four quadrants near the circumference on the back side of the wafer. 4) Measure the deformation distribution data of the optimized wafer; 5) Determine whether the warpage value of the optimized wafer meets the requirements. If the warpage value is less than or equal to the maximum allowable warpage specification, then proceed with wafer fabrication based on the stress film parameters from step 3). If the warpage value is greater than the maximum allowable warpage specification, proceed to step 6). 6) Based on the measurement results of step 4), the parameters of the stress membrane are corrected by reverse calculation, and the parameters of the stress membrane are corrected in the finite element simulation model. Then, steps 2) to 5) are repeated until the warpage value of the wafer is less than or equal to the maximum allowable warpage specification of the wafer.

2. The method for improving wafer warpage of various shapes according to claim 1, characterized in that: The process also includes step 7) Based on the above steps, a matrix table of stress films on the back side of the wafer is prepared. Based on the initial warpage values ​​in the X and Y directions on the front side, the parameters for depositing stress films in the four regions in the X and Y directions on the back side of the wafer can be obtained by looking up the table.

3. The method for improving wafer warpage of various shapes according to claim 1, characterized in that: When measuring the initial warpage morphology of a wafer, the measurement points are evenly distributed across the entire wafer. The height value of each point is measured to obtain the deformation distribution data of the wafer. The deformation distribution data satisfies the following function: ； Where z0 represents the initial displacement of a point on the wafer surface in a direction perpendicular to the wafer surface, and is a bivariate function of the point (x,y) on the wafer surface.

4. The method for improving wafer warpage according to claim 2, characterized in that: Based on the measured deformation distribution data in step 1), the deformation distribution z1 corresponding to the back stress membrane satisfies: ； For a warpage symmetrical about the z-axis passing through the center of the wafer, the finite element simulation model calculates the stress and thickness of the stress membrane using the following formulas: ； B is the wafer warpage. For axisymmetric warpage, B is the height difference between the edge and center of the front side of the wafer, satisfying: ； Where σ is the stress of the back stress membrane, h f Let T be the thickness of the stress film, T be the product of the stress and thickness of the stress film, v be the torque per unit area, i.e., the torque density, which is the decisive factor causing wafer deformation, E be the Young's modulus of the substrate, h be the substrate thickness, v be the Poisson's ratio of the substrate material, and R be the wafer radius. After determining T, under the condition of satisfying the feasibility of the film deposition process, the stress and thickness of the stress film are determined according to the principle of optimal economy.

5. The method for improving wafer warpage according to claim 4, characterized in that: For non-centrosymmetric warping, the finite element simulation model is constructed based on the equations of elasticity, satisfying: ； Where D is the bending stiffness: ； Δ is the Laplace operator for Cartesian coordinates: ； z is the displacement of each point on the wafer in the z-direction under stress, U(x,y) is the displacement field that satisfies the Laplace equation ΔU(x,y)=0, h is the substrate thickness, v is the Poisson's ratio of the substrate material, T is the product of the stress and the thickness of the stress film, and E is the Young's modulus of the substrate.

6. The method for improving wafer warpage of various shapes according to claim 5, characterized in that: Equation (5) satisfies the following boundary conditions: ； ； Based on the above equations (5) to (9), the equivalent stress distribution of the front microstructure is obtained based on the finite element simulation model, T=T(z) or z=z(T), and the wafer deformation under this stress distribution is output as z(x,y)=z(T(x,y)), where R represents the wafer radius, θ is the angle in the cylindrical coordinate system, and U(R, θ) represents the boundary condition at the edge of the wafer.

7. The method for improving wafer warpage of various shapes according to claim 6, characterized in that: The optimal torque density distribution T is obtained by the following method. opt (x,y) such that: ； Based on equations (5) to (9), z(T(x,y)) is a linear system that satisfies the following formula: ； ； Where k is a constant, wafer warpage is described by the cos(2θ) curve, and wafer deformation is described by the polynomial curve. The polar coordinate expression of equation (12) is constructed to describe wafer deformation, and the following formula is obtained: ； The first term Ar in equation (13) 2 That is, it is a centrally symmetric warping, and the corresponding moment density T can be obtained from equation (3); observe the second term Br 2 cos(2θ), which is the product of r squared and the cosine of 2θ; A and B are the coefficients of these two terms, with units of m. -1 Since z(r,θ) and T(r,θ) are linear systems, the input T(r,θ) is decomposed into the product of an even-power polynomial P(r) of r and an even-multiple cosine of θ, C(θ), resulting in the following formula: ； ； ； Where T(r,θ) represents the three-dimensional distribution of torque density, a i and b j a is a coefficient i The unit is N / m 2i+1 b j As a dimensionless constant, T(x,y) is decomposed into (n+1)(m+1) terms, where i and j are parameter subscripts indicating the position of the parameter in the parameter sequence; for the following equation (17), the corresponding three-dimensional deformation is calculated using finite element software: ； Where i = 0, 1, 2, ..., n; j = 0, 1, 2, ..., m, T ij The moment density represents the position of the parameter sequence at positions i and j; for the target deformable surface -z0(x,y), a linear superposition fitting is performed using the basic deformation array: ； Among them, the dimensionless coefficient sequence p ij The moment density and deformation in equations (17) and (18) can be determined by the least squares method. The physical dimension coefficients of equation (5) are normalized into iterable deformation elements z during the finite element calculation. ij dimensionless coefficient p ij According to the principle of linear superposition in equation (11), p ij It satisfies both deformation superposition and moment density superposition, producing a stress distribution T with deformation -z0(r,θ). opt (r,θ) satisfies the following formula: 。 8. The method for improving wafer warpage of claim 6, characterized in that: Front warpage is eliminated by forming an arc-shaped stress film on the back side of the wafer, through the arc width (d) x1 , d x2 ), (d y1 , d y2 The geometry is uniquely determined by (T) x1 , T x2 ), (T y1 , T y2 The optimal moment density distribution T is obtained by describing the product of stress and film thickness. opt (x,y) is transformed into a single-objective multivariable optimization problem under constraints, satisfying: Optimization goal: ； Constraints: ； Where, σ lim and h f_lim These represent the stress and thickness limits achievable by thin film deposition processes.

9. The method for improving wafer warpage of various shapes according to claim 6, characterized in that: The above problem can be solved by one or more of the following algorithms: genetic algorithm, particle swarm optimization algorithm, gradient descent algorithm, and simulated annealing algorithm. The optimized T value and the bow width d are determined by the initial warping morphology.

10. The method for improving wafer warpage according to claim 6, characterized in that: When iteratively refining the simulation model, adjust the parameters according to the following steps: While maintaining the geometry of the arc-shaped stress membrane, adjust the product of the stress and membrane thickness (T) of the stress membrane. x1 , T x2 ), (T y1 ,T y2 The values ​​of the four parameters are then calculated by the model to output a simulated deformed surface. The difference between the maximum and minimum values ​​of this surface is set as B. sim The difference between the simulation results and the measured results yields a surface, and the difference between the maximum and minimum values ​​of this surface is denoted as B. error If |B error <10% B sim If the condition is met, the finite element simulation model is deemed acceptable; otherwise, repeat the above steps until condition B is satisfied. error <10% B sim .

11. The method for improving wafer warpage of various shapes according to claim 1, characterized in that, The stress film is configured in one of the following combinations based on the initial warpage type of the wafer: Type 1: If the x-axis region on the front side of the wafer is warped upwards and the y-axis region on the front side is not warped, then an arch-shaped tensile stress film is deposited at both ends of the y-axis on the back side of the wafer. The second type: If the x-axis region on the front side of the wafer warps downward and the y-axis region on the front side does not warp, then an arch-shaped compressive stress film is deposited at both ends of the y-axis on the back side of the wafer. The third type: If the front x-axis region of the wafer is not warped and the front y-axis region is warped upward, then an arc-shaped tensile stress film is deposited at both ends of the back x-axis of the wafer. Category 4: If the front x-axis region of the wafer is not warped, but the front y-axis region warps downward, then an arched compressive stress film is deposited at both ends of the back x-axis of the wafer. Fifth type: If the front x-axis region of the wafer warps downward and the front y-axis region warps upward, then an arc-shaped tensile stress film is deposited at both ends of the back x-axis of the wafer, and an arc-shaped compressive stress film is deposited at both ends of the back y-axis. Category 6: If the x-axis region on the front side of the wafer warps upward and the y-axis region on the front side warps downward, then an arc-shaped compressive stress film is deposited at both ends of the x-axis on the back side of the wafer, and an arc-shaped tensile stress film is deposited at both ends of the y-axis on the back side.

12. A method for fabricating a power device, characterized in that: The power device includes a trench structure formed on the front side of the wafer, and the fabrication method includes the method for improving wafer multimorphic warpage as described in any one of claims 1 to 11.

13. The method for fabricating a power device according to claim 12, characterized in that: The power device includes one of a split-gate transistor and an insulated-gate bipolar transistor.

14. A power device, characterized in that, The power device is prepared using the power device preparation method as described in any one of claims 12 to 13.

15. A wafer multi-morphology warpage correction system for implementing the method for improving wafer multi-morphology warpage as described in any one of claims 1 to 11, characterized in that, include: The deformation measurement module is used to measure the initial warpage morphology of the wafer and obtain the measured deformation distribution data of the wafer. The simulation optimization module calculates the three-dimensional deformation of wafer warpage using a finite element simulation model. Based on this, and using the measured deformation distribution data, it optimizes the parameters of the back stress film of the wafer using a linear superposition method. The parameters include the type, geometry, stress value, and thickness of the stress film, so that the back stress film produces a deformation distribution opposite to the initial warpage morphology. The deposition and etching module is used to prepare a stress film on the back side of the wafer based on the parameters of the stress film optimized by the simulation optimization module. The stress film is distributed in an arc shape in the four quadrants near the circumference on the back side of the wafer. Feedback control module: Used to correct the parameters of the stress membrane in the finite element simulation model until the wafer warpage value is less than or equal to the wafer's maximum allowable warpage specification.

16. The wafer multi-morphology warpage correction system according to claim 15, characterized in that: It also includes a stress film matrix table, which is used to look up the parameters for depositing stress films in the four regions X and Y on the back side of the wafer based on the initial warpage values ​​in the X and Y directions on the front side.

17. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores program instructions that, when executed, implement the method for improving wafer multimorphic warpage as described in any one of claims 1 to 11.

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