Low-insertion-loss broadband balun equivalent circuit for base station and balun thereof
The new base station balun designed using LTCC technology and the Marchand balun principle solves the problems of large size and complex debugging in RF balun design, and achieves miniaturized, low insertion loss, and wide bandwidth balun characteristics, making it suitable for base station RF transceiver systems.
Patent Information
- Application Number
- CN202511262726.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-05
- Publication Date
- 2025-11-21
AI Technical Summary
Existing RF balun designs suffer from large size, occupy a lot of PCB board area, and are complex to debug, making it difficult to meet the miniaturization and high-frequency requirements of modern electronic devices.
A novel low insertion loss broadband balun for base stations is designed using LTCC technology. Based on the Marchand balun principle, it achieves an equivalent 1/4 wavelength coupling line by using a low-temperature co-firing process at around 900℃, combined with a wide-side coupled spiral structure and folded coupled transmission line. It also utilizes the three-dimensional wiring advantages of LTCC technology to shield signal crosstalk.
It achieves miniaturization, low insertion loss, and wide bandwidth characteristics of the balun, with dimensions of 1.6mm*0.8mm*0.6mm, a passband frequency of 5~10GHz, insertion loss ≤1.0dB, low fluctuation, and high phase consistency, making it suitable for mass production.
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Figure CN121000194A_ABST
Abstract
Description
Technical Field
[0001] This invention discloses a novel miniaturized, low-insertion-loss, wideband balun for base stations, applicable to base station wireless communication equipment, specifically relating to an equivalent circuit of a low-insertion-loss, wideband balun for base stations and the balun thereof. Background Technology
[0002] Low-Temperature Co-fired Ceramic (LTCC), as a widely applicable high-density packaging technology, has become the preferred method for the integration of future electronic components due to its excellent electronic, mechanical, and thermal properties. RF microwave components and modules designed and manufactured based on LTCC technology include baluns, filters, balun filters, duplexers, multiplexers, couplers, power dividers, antennas, receiver front-end modules, and antenna switch modules. Besides advantages in cost and integrated packaging, LTCC also offers many advantages in wiring linewidth and spacing, low-impedance metallization, design versatility, and high-frequency performance. As modern electronic devices continue to evolve towards miniaturization and higher frequencies, LTCC is now widely used in various electronic devices.
[0003] A balun, as a balanced-to-unbalanced converter, is an important component in a base station radio frequency transceiver system. As a three-port device, it includes one unbalanced port and two balanced ports. Generally, the signal is input from the unbalanced port and output from the two balanced ports. The output signals from the two balanced ports have the same amplitude and are 180° out of phase, which can effectively improve the system's anti-interference capability.
[0004] Traditional microstrip coupled-line circuits used in typical RF balun designs not only occupy a large PCB area but also involve complex debugging. In contrast, surface-mount RF multilayer baluns designed and fabricated using LTCC technology offer superior performance, small size, light weight, simple surface mounting, convenient debugging, low cost, and suitability for mass production. Summary of the Invention
[0005] This invention provides a novel low-insertion-loss, wideband balun for base stations. The balun is structurally designed using the classic Marchand balun principle and employs LTCC technology, being co-fired at approximately 900°C. The technical solution adopted by this invention to solve its technical problem is as follows:
[0006] A low insertion loss broadband balun equivalent circuit for a base station includes a first set of coupled transmission lines and a second set of coupled transmission lines. The first set of coupled transmission lines includes a first inductor L1 and a third inductor L3, and the second set of coupled transmission lines includes a second inductor L2 and a fourth inductor L4. One end of the first inductor L1 is the unbalanced input of the balun, and the other end is connected to the second inductor L2, while the other end of the second inductor L2 is left open. One end of the third inductor L3 is grounded, and the other end is the first balanced output of the balun. One end of the fourth inductor L4 is grounded, and the other end is the second balanced output of the balun.
[0007] This invention provides a low insertion loss broadband balun for base stations. The balun includes a ceramic substrate, a terminal block disposed on the outside of the substrate, and a seven-layer circuit structure in a stacked configuration inside the ceramic substrate, comprising:
[0008] The first layer has a first metal pattern and a second metal pattern printed on a ceramic dielectric substrate. The first metal pattern is connected to the first port P1, the first end of the first metal pattern is connected to the third port P3, and the second end of the first metal pattern is connected to the first internal via.
[0009] The second layer has a second layer of first metal pattern printed on a ceramic dielectric substrate. The first end of the second layer of first metal pattern is connected to the second port P2, and the second end of the second layer of first metal pattern is connected to the first internal via. The first layer of first metal pattern and the second layer of first metal pattern constitute a third inductor L3.
[0010] The third layer has a first metal pattern and a second metal pattern printed on a ceramic dielectric substrate. The first end of the first metal pattern is connected to the first port P1, the second end of the first metal pattern is connected to the second internal via, and the second metal pattern is connected to the third port P3. The first metal pattern forms the first inductor L1.
[0011] The fourth layer has a first metal pattern printed on the ceramic dielectric substrate. The first end of the first metal pattern is connected to the fifth port P5, serving as an isolation layer for the two sets of transmission lines.
[0012] The fifth layer is a first metal pattern printed on a ceramic dielectric substrate. The first end of the first metal pattern is connected to the second port P2, and the second end of the first metal pattern is connected to the second internal via. The first metal pattern forms the second inductor L2.
[0013] The sixth layer is a first metal pattern printed on a ceramic dielectric substrate, wherein the first end of the first metal pattern is connected to the third internal via.
[0014] The seventh layer consists of a first metal coil and a second metal coil printed on a ceramic dielectric substrate. The first end of the first metal coil is connected to the fourth port P4, and the second end of the first metal coil is connected to the third internal via. The first metal pattern of the sixth layer and the first metal coil of the seventh layer together constitute the fourth inductor L4.
[0015] The beneficial effects of this invention are as follows: Based on LTCC (Low Temperature Co-fired Ceramic) technology and designed using the Marchand structural principle, this invention achieves an equivalent 1 / 4 wavelength coupling line through a wide-side coupled spiral structure, greatly reducing the size of the balun. Simultaneously, the two sets of coupled transmission lines are folded, fully utilizing the three-dimensional wiring advantages of LTCC technology. A GND shield is used in the middle to avoid crosstalk between the two sets of coupled transmission lines, achieving the functional characteristics of low insertion loss, good amplitude flatness, high phase consistency, and wide bandwidth with small size for new base stations. The balun product has dimensions of 1.6mm*0.8mm*0.6mm, a passband frequency of 5~10GHz, IL@5~10GHz≤1.0dB, VSWR@5~10GHz≤2.0, amplitude imbalance@5~10GHz≤1.0dB, and phase imbalance@5~10GHz≤10°. Attached Figure Description
[0016] Figure 1 This is a schematic diagram of the equivalent circuit of the low insertion loss, wideband balun used in the base station of the present invention;
[0017] Figure 2 This is a three-dimensional schematic diagram of the low insertion loss, wideband balun for base stations according to the present invention;
[0018] Figure 3 This is a schematic diagram of the internal structure of the low insertion loss, wideband balun used in the base station of this invention;
[0019] Figure 4 The electrical characteristic curve of the low insertion loss, wideband balun used in the base station of this invention;
[0020] Figure 5 This is a schematic diagram of the first layer circuit planar structure of the present invention;
[0021] Figure 6 This is a schematic diagram of the second-layer circuit planar structure of the present invention;
[0022] Figure 7 This is a schematic diagram of the via connection planar structure between the second and third layers of the circuit in this invention;
[0023] Figure 8 This is a schematic diagram of the third-layer circuit planar structure of the present invention;
[0024] Figure 9This invention provides a planar connection via between the third, fourth, fourth, and fifth layers of circuitry.
[0025] Schematic diagram;
[0026] Figure 10 This is a schematic diagram of the fourth layer circuit planar structure of the present invention;
[0027] Figure 11 This is a schematic diagram of the fifth layer circuit planar structure of the present invention;
[0028] Figure 12 This is a schematic diagram of the sixth layer circuit planar structure of the present invention;
[0029] Figure 13 This is a schematic diagram of the via connection planar structure between the sixth and seventh layers of the present invention;
[0030] Figure 14 This is a schematic diagram of the seventh layer circuit planar structure of the present invention. Detailed Implementation
[0031] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.
[0032] A novel low insertion loss, wideband balun for base stations includes a substrate, a terminal block disposed on the outside of the substrate, and a circuit layer disposed inside the substrate, wherein the circuit layer inside the substrate has a stacked structure.
[0033] Figure 1 This is the equivalent circuit diagram of a new type of low-insertion-loss, wideband balun used in base stations. The balun adopts a Marchand-type structure design and consists of two sets of coupled transmission lines. The first set of coupled transmission lines is formed by the first inductor L1 and the third inductor L3, while the second set is formed by the second inductor L2 and the fourth inductor L4. One end of the first inductor L1 is the unbalanced input of the balun, and the other end is connected to the second inductor L2, while the other end of the second inductor L2 is left open. One end of the third inductor L3 and the fourth inductor L4 are grounded, and the other end serves as the balanced output of the balun.
[0034] Figure 2 It is the appearance structure of a low insertion loss, wideband balun used in base stations. The first port P1, the third port P3, and the fifth port P5 are grounding ports. The second port P2 is the common port of the chip duplexer. The fourth port P4 is the high-frequency bandpass output port. The sixth port P6 is the low-frequency output port. Mark is its direction indicator.
[0035] Figure 4 These are the low insertion loss, wide bandwidth balun electrical characteristic curves for new base stations, where 1 represents the unbalanced port and 2 and 3 represent the balanced ports.
[0036] The new base station uses a low insertion loss, wideband balun internal structure, such as Figure 3 As shown, the circuit structure is distributed inside the ceramic substrate. The circuit structure has a total of 7 layers; please refer to [the diagram / reference]. Figure 5-14 .
[0037] The first layer has a first metal pattern 1-1 and a second metal pattern 1-2 printed on a ceramic dielectric substrate. The first metal pattern 1-2 is connected to the first port P1, the first end 1-1a of the first metal pattern is connected to the third port P3, and the second end 1-1b of the first metal pattern is connected to the first internal via 8.
[0038] The second layer has a second layer first metal pattern 2-1 printed on the ceramic dielectric substrate. The first end 2-1a of the second layer first metal pattern is connected to the second port P2, and the second end 2-1b of the second layer first metal pattern is connected to the first internal via 8. The first layer first metal pattern 1-1 and the second layer first metal pattern 2-1 together constitute the coupling transmission line L3 in the schematic diagram.
[0039] The third layer has a first metal pattern 3-1 and a second metal pattern 3-2 printed on the ceramic dielectric substrate. The first end 3-1a of the first metal pattern is connected to the first port P1, the second end 3-1b of the first metal pattern is connected to the second internal via 9, and the second metal pattern 3-2 is connected to the third port P3. The first metal pattern 3-1 forms the coupling transmission line L1 in the schematic diagram.
[0040] The fourth layer has a first metal pattern 4-1 printed on the ceramic dielectric substrate. The first end 4-1a of the first metal pattern is connected to the fifth port P5, serving as an isolation layer for the two sets of transmission lines in the schematic diagram.
[0041] The fifth layer is a first metal pattern 5-1 printed on a ceramic dielectric substrate. The first end 5-1a of the first metal pattern is connected to the second port P2, and the second end 5-1b of the first metal pattern is connected to the second internal via 9. The first metal pattern 5-1 constitutes the coupling transmission line L2 in the schematic diagram.
[0042] The sixth layer is a first metal pattern 6-1 printed on a ceramic dielectric substrate, wherein the first end 6-1a of the first metal pattern is connected to the third internal via 10.
[0043] The seventh layer consists of a first metal coil 7-1 and a second metal coil 7-2 printed on a ceramic dielectric substrate. The first end 7-1a of the first metal coil is connected to the fourth port P4, and the second end 7-1b of the first metal coil is connected to the third internal via 10. The first metal pattern 6-1 of the sixth layer and the first metal coil 7-1 of the seventh layer together constitute the coupling transmission line L4 in the schematic diagram.
Claims
1. A low insertion loss wideband balun equivalent circuit for base stations, characterized in that, The equivalent circuit comprises a first group of coupled transmission lines and a second group of coupled transmission lines, the first group of coupled transmission lines comprises a first inductor L1 and a third inductor L3, and the second group of coupled transmission lines comprises a second inductor L2 and a fourth inductor L4, wherein one end of the first inductor L1 is a non-balanced input end of the balun, the other end of the first inductor L1 is connected to the second inductor L2, and the other end of the second inductor L2 is open; one end of the third inductor L3 is grounded, and the other end of the third inductor L3 is a first balanced output port of the balun; one end of the fourth inductor L4 is grounded, and the other end of the fourth inductor L4 is a second balanced output port of the balun.
2. A balun which realizes the equivalent circuit of a low insertion loss wideband balun for a base station as claimed in claim 1, characterized by The balun comprises a ceramic base, a terminal head arranged outside the base, and seven layers of circuit structures arranged in a laminated structure inside the ceramic base, and the seven layers of circuit structures are respectively: a first layer, a first layer first metal pattern 1-1 and a first layer second metal pattern 1-2 are printed on the ceramic dielectric substrate, the first layer second metal pattern 1-2 is connected to the first port P1, a first end 1-1a of the first layer second metal pattern is connected to the third port P3, and a second end 1-1b of the first layer second metal pattern is connected to a first internal via hole 8; a second layer, a second layer first metal pattern 2-1 is printed on the ceramic dielectric substrate, a first end 2-1a of the second layer first metal pattern is connected to the second port P2, and a second end 2-1b of the second layer first metal pattern is connected to the first internal via hole 8; the first layer first metal pattern 1-1 and the second layer first metal pattern 2-1 constitute the third inductor L3; a third layer, a third layer first metal pattern 3-1 and a third layer second metal pattern 3-2 are printed on the ceramic dielectric substrate, a first end 3-1a of the third layer first metal pattern is connected to the first port P1, a second end 3-1b of the third layer first metal pattern is connected to a second internal via hole 9, the third layer second metal pattern 3-2 is connected to the third port P3, and the third layer first metal pattern 3-1 constitutes the first inductor L1; a fourth layer, a fourth layer first metal pattern 4-1 is printed on the ceramic dielectric substrate, a first end 4-1a of the fourth layer first metal pattern is connected to the fifth port P5, and the fourth layer first metal pattern serves as an isolation layer of the two groups of transmission lines; a fifth layer, a fifth layer first metal pattern 5-1 is printed on the ceramic dielectric substrate, a first end 5-1a of the fifth layer first metal pattern is connected to the second port P2, and a second end 5-1b of the fifth layer first metal pattern is connected to the second internal via hole 9; the fifth layer first metal pattern 5-1 constitutes the second inductor L2; a sixth layer, a sixth layer first metal pattern 6-1 is printed on the ceramic dielectric substrate, and a first end 6-1a of the sixth layer first metal pattern is connected to the third internal via hole 10; a seventh layer, a seventh layer first metal coil 7-1 and a seventh layer second metal coil 7-2 are printed on the ceramic dielectric substrate, a first end 7-1a of the seventh layer first metal coil is connected to the fourth port P4, a second end 7-1b of the seventh layer first metal coil is connected to the third internal via hole 10, and the sixth layer first metal pattern 6-1 and the seventh layer first metal coil 7-1 jointly constitute the fourth inductor L4.
Citation Information
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